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[linux-2.6/kmemtrace.git] / drivers / input / serio / maceps2.c
blobf08a5d0cd5fae5c148a8bd697e6c93af213db3ba
1 /*
2 * SGI O2 MACE PS2 controller driver for linux
4 * Copyright (C) 2002 Vivien Chappelier
6 * This program is free software; you can redistribute it and/or modify
7 * it under the terms of the GNU General Public License version 2 as
8 * published by the Free Software Foundation
9 */
10 #include <linux/module.h>
11 #include <linux/init.h>
12 #include <linux/serio.h>
13 #include <linux/errno.h>
14 #include <linux/interrupt.h>
15 #include <linux/ioport.h>
16 #include <linux/delay.h>
17 #include <linux/platform_device.h>
18 #include <linux/slab.h>
19 #include <linux/spinlock.h>
20 #include <linux/err.h>
22 #include <asm/io.h>
23 #include <asm/irq.h>
24 #include <asm/system.h>
25 #include <asm/ip32/mace.h>
26 #include <asm/ip32/ip32_ints.h>
28 MODULE_AUTHOR("Vivien Chappelier <vivien.chappelier@linux-mips.org");
29 MODULE_DESCRIPTION("SGI O2 MACE PS2 controller driver");
30 MODULE_LICENSE("GPL");
32 #define MACE_PS2_TIMEOUT 10000 /* in 50us unit */
34 #define PS2_STATUS_CLOCK_SIGNAL BIT(0) /* external clock signal */
35 #define PS2_STATUS_CLOCK_INHIBIT BIT(1) /* clken output signal */
36 #define PS2_STATUS_TX_INPROGRESS BIT(2) /* transmission in progress */
37 #define PS2_STATUS_TX_EMPTY BIT(3) /* empty transmit buffer */
38 #define PS2_STATUS_RX_FULL BIT(4) /* full receive buffer */
39 #define PS2_STATUS_RX_INPROGRESS BIT(5) /* reception in progress */
40 #define PS2_STATUS_ERROR_PARITY BIT(6) /* parity error */
41 #define PS2_STATUS_ERROR_FRAMING BIT(7) /* framing error */
43 #define PS2_CONTROL_TX_CLOCK_DISABLE BIT(0) /* inhibit clock signal after TX */
44 #define PS2_CONTROL_TX_ENABLE BIT(1) /* transmit enable */
45 #define PS2_CONTROL_TX_INT_ENABLE BIT(2) /* enable transmit interrupt */
46 #define PS2_CONTROL_RX_INT_ENABLE BIT(3) /* enable receive interrupt */
47 #define PS2_CONTROL_RX_CLOCK_ENABLE BIT(4) /* pause reception if set to 0 */
48 #define PS2_CONTROL_RESET BIT(5) /* reset */
50 struct maceps2_data {
51 struct mace_ps2port *port;
52 int irq;
55 static struct maceps2_data port_data[2];
56 static struct serio *maceps2_port[2];
57 static struct platform_device *maceps2_device;
59 static int maceps2_write(struct serio *dev, unsigned char val)
61 struct mace_ps2port *port = ((struct maceps2_data *)dev->port_data)->port;
62 unsigned int timeout = MACE_PS2_TIMEOUT;
64 do {
65 if (port->status & PS2_STATUS_TX_EMPTY) {
66 port->tx = val;
67 return 0;
69 udelay(50);
70 } while (timeout--);
72 return -1;
75 static irqreturn_t maceps2_interrupt(int irq, void *dev_id,
76 struct pt_regs *regs)
78 struct serio *dev = dev_id;
79 struct mace_ps2port *port = ((struct maceps2_data *)dev->port_data)->port;
80 unsigned long byte;
82 if (port->status & PS2_STATUS_RX_FULL) {
83 byte = port->rx;
84 serio_interrupt(dev, byte & 0xff, 0, regs);
87 return IRQ_HANDLED;
90 static int maceps2_open(struct serio *dev)
92 struct maceps2_data *data = (struct maceps2_data *)dev->port_data;
94 if (request_irq(data->irq, maceps2_interrupt, 0, "PS2 port", dev)) {
95 printk(KERN_ERR "Could not allocate PS/2 IRQ\n");
96 return -EBUSY;
99 /* Reset port */
100 data->port->control = PS2_CONTROL_TX_CLOCK_DISABLE | PS2_CONTROL_RESET;
101 udelay(100);
103 /* Enable interrupts */
104 data->port->control = PS2_CONTROL_RX_CLOCK_ENABLE |
105 PS2_CONTROL_TX_ENABLE |
106 PS2_CONTROL_RX_INT_ENABLE;
108 return 0;
111 static void maceps2_close(struct serio *dev)
113 struct maceps2_data *data = (struct maceps2_data *)dev->port_data;
115 data->port->control = PS2_CONTROL_TX_CLOCK_DISABLE | PS2_CONTROL_RESET;
116 udelay(100);
117 free_irq(data->irq, dev);
121 static struct serio * __devinit maceps2_allocate_port(int idx)
123 struct serio *serio;
125 serio = kzalloc(sizeof(struct serio), GFP_KERNEL);
126 if (serio) {
127 serio->id.type = SERIO_8042;
128 serio->write = maceps2_write;
129 serio->open = maceps2_open;
130 serio->close = maceps2_close;
131 snprintf(serio->name, sizeof(serio->name), "MACE PS/2 port%d", idx);
132 snprintf(serio->phys, sizeof(serio->phys), "mace/serio%d", idx);
133 serio->port_data = &port_data[idx];
134 serio->dev.parent = &maceps2_device->dev;
137 return serio;
140 static int __devinit maceps2_probe(struct platform_device *dev)
142 maceps2_port[0] = maceps2_allocate_port(0);
143 maceps2_port[1] = maceps2_allocate_port(1);
144 if (!maceps2_port[0] || !maceps2_port[1]) {
145 kfree(maceps2_port[0]);
146 kfree(maceps2_port[1]);
147 return -ENOMEM;
150 serio_register_port(maceps2_port[0]);
151 serio_register_port(maceps2_port[1]);
153 return 0;
156 static int __devexit maceps2_remove(struct platform_device *dev)
158 serio_unregister_port(maceps2_port[0]);
159 serio_unregister_port(maceps2_port[1]);
161 return 0;
164 static struct platform_driver maceps2_driver = {
165 .driver = {
166 .name = "maceps2",
167 .owner = THIS_MODULE,
169 .probe = maceps2_probe,
170 .remove = __devexit_p(maceps2_remove),
173 static int __init maceps2_init(void)
175 int error;
177 error = platform_driver_register(&maceps2_driver);
178 if (error)
179 return error;
181 maceps2_device = platform_device_alloc("maceps2", -1);
182 if (!maceps2_device) {
183 error = -ENOMEM;
184 goto err_unregister_driver;
187 port_data[0].port = &mace->perif.ps2.keyb;
188 port_data[0].irq = MACEISA_KEYB_IRQ;
189 port_data[1].port = &mace->perif.ps2.mouse;
190 port_data[1].irq = MACEISA_MOUSE_IRQ;
192 error = platform_device_add(maceps2_device);
193 if (error)
194 goto err_free_device;
196 return 0;
198 err_free_device:
199 platform_device_put(maceps2_device);
200 err_unregister_driver:
201 platform_driver_unregister(&maceps2_driver);
202 return error;
205 static void __exit maceps2_exit(void)
207 platform_device_unregister(maceps2_device);
208 platform_driver_unregister(&maceps2_driver);
211 module_init(maceps2_init);
212 module_exit(maceps2_exit);