4 #include <asm/machvec.h>
7 * A sane default based on a reasonable vector table size, platforms are
8 * advised to cap this at the hard limit that they're interested in
14 * Convert back and forth between INTEVT and IRQ values.
16 #ifdef CONFIG_CPU_HAS_INTEVT
17 #define evt2irq(evt) (((evt) >> 5) - 16)
18 #define irq2evt(irq) (((irq) + 16) << 5)
20 #define evt2irq(evt) (evt)
21 #define irq2evt(irq) (irq)
25 * Simple Mask Register Support
27 extern void make_maskreg_irq(unsigned int irq
);
28 extern unsigned short *irq_mask_register
;
33 void init_IRQ_pint(void);
36 * The shift value is now the number of bits to shift, not the number of
37 * bits/4. This is to make it easier to read the value directly from the
38 * datasheets. The IPR address, addr, will be set from ipr_idx via the
39 * map_ipridx_to_addr function.
43 int ipr_idx
; /* Index for the IPR registered */
44 int shift
; /* Number of bits to shift the data */
45 int priority
; /* The priority */
46 unsigned int addr
; /* Address of Interrupt Priority Register */
50 * Given an IPR IDX, map the value to an IPR register address.
52 unsigned int map_ipridx_to_addr(int idx
);
55 * Enable individual interrupt mode for external IPR IRQs.
57 void ipr_irq_enable_irlm(void);
60 * Function for "on chip support modules".
62 void make_ipr_irq(struct ipr_data
*table
, unsigned int nr_irqs
);
63 void make_imask_irq(unsigned int irq
);
64 void init_IRQ_ipr(void);
68 unsigned char ipr_offset
, ipr_shift
;
69 unsigned char msk_offset
, msk_shift
;
70 unsigned char priority
;
73 void make_intc2_irq(struct intc2_data
*, unsigned int nr_irqs
);
74 void init_IRQ_intc2(void);
76 static inline int generic_irq_demux(int irq
)
81 #define irq_canonicalize(irq) (irq)
82 #define irq_demux(irq) sh_mv.mv_irq_demux(irq)
84 #ifdef CONFIG_4KSTACKS
85 extern void irq_ctx_init(int cpu
);
86 extern void irq_ctx_exit(int cpu
);
87 # define __ARCH_HAS_DO_SOFTIRQ
89 # define irq_ctx_init(cpu) do { } while (0)
90 # define irq_ctx_exit(cpu) do { } while (0)
93 #endif /* __ASM_SH_IRQ_H */