[SPARC64]: Always register a PROM based early console.
[linux-2.6/kmemtrace.git] / arch / sparc64 / kernel / setup.c
blobebad74bd88bb4fa7ed15f390f1dc73ce1a82a5dd
1 /* $Id: setup.c,v 1.72 2002/02/09 19:49:30 davem Exp $
2 * linux/arch/sparc64/kernel/setup.c
4 * Copyright (C) 1995,1996 David S. Miller (davem@caip.rutgers.edu)
5 * Copyright (C) 1997 Jakub Jelinek (jj@sunsite.mff.cuni.cz)
6 */
8 #include <linux/errno.h>
9 #include <linux/sched.h>
10 #include <linux/kernel.h>
11 #include <linux/mm.h>
12 #include <linux/stddef.h>
13 #include <linux/unistd.h>
14 #include <linux/ptrace.h>
15 #include <linux/slab.h>
16 #include <asm/smp.h>
17 #include <linux/user.h>
18 #include <linux/screen_info.h>
19 #include <linux/delay.h>
20 #include <linux/fs.h>
21 #include <linux/seq_file.h>
22 #include <linux/syscalls.h>
23 #include <linux/kdev_t.h>
24 #include <linux/major.h>
25 #include <linux/string.h>
26 #include <linux/init.h>
27 #include <linux/inet.h>
28 #include <linux/console.h>
29 #include <linux/root_dev.h>
30 #include <linux/interrupt.h>
31 #include <linux/cpu.h>
32 #include <linux/initrd.h>
34 #include <asm/system.h>
35 #include <asm/io.h>
36 #include <asm/processor.h>
37 #include <asm/oplib.h>
38 #include <asm/page.h>
39 #include <asm/pgtable.h>
40 #include <asm/idprom.h>
41 #include <asm/head.h>
42 #include <asm/starfire.h>
43 #include <asm/mmu_context.h>
44 #include <asm/timer.h>
45 #include <asm/sections.h>
46 #include <asm/setup.h>
47 #include <asm/mmu.h>
48 #include <asm/ns87303.h>
50 #ifdef CONFIG_IP_PNP
51 #include <net/ipconfig.h>
52 #endif
54 /* Used to synchronize accesses to NatSemi SUPER I/O chip configure
55 * operations in asm/ns87303.h
57 DEFINE_SPINLOCK(ns87303_lock);
59 struct screen_info screen_info = {
60 0, 0, /* orig-x, orig-y */
61 0, /* unused */
62 0, /* orig-video-page */
63 0, /* orig-video-mode */
64 128, /* orig-video-cols */
65 0, 0, 0, /* unused, ega_bx, unused */
66 54, /* orig-video-lines */
67 0, /* orig-video-isVGA */
68 16 /* orig-video-points */
71 void (*prom_palette)(int);
72 void (*prom_keyboard)(void);
74 static void
75 prom_console_write(struct console *con, const char *s, unsigned n)
77 prom_write(s, n);
80 unsigned int boot_flags = 0;
81 #define BOOTME_DEBUG 0x1
83 /* Exported for mm/init.c:paging_init. */
84 unsigned long cmdline_memory_size = 0;
86 static struct console prom_early_console = {
87 .name = "earlyprom",
88 .write = prom_console_write,
89 .flags = CON_PRINTBUFFER | CON_BOOT,
90 .index = -1,
93 /* XXX Implement this at some point... */
94 void kernel_enter_debugger(void)
98 /*
99 * Process kernel command line switches that are specific to the
100 * SPARC or that require special low-level processing.
102 static void __init process_switch(char c)
104 switch (c) {
105 case 'd':
106 boot_flags |= BOOTME_DEBUG;
107 break;
108 case 's':
109 break;
110 case 'h':
111 prom_printf("boot_flags_init: Halt!\n");
112 prom_halt();
113 break;
114 case 'p':
115 /* Just ignore, this behavior is now the default. */
116 break;
117 case 'P':
118 /* Force UltraSPARC-III P-Cache on. */
119 if (tlb_type != cheetah) {
120 printk("BOOT: Ignoring P-Cache force option.\n");
121 break;
123 cheetah_pcache_forced_on = 1;
124 add_taint(TAINT_MACHINE_CHECK);
125 cheetah_enable_pcache();
126 break;
128 default:
129 printk("Unknown boot switch (-%c)\n", c);
130 break;
134 static void __init boot_flags_init(char *commands)
136 while (*commands) {
137 /* Move to the start of the next "argument". */
138 while (*commands && *commands == ' ')
139 commands++;
141 /* Process any command switches, otherwise skip it. */
142 if (*commands == '\0')
143 break;
144 if (*commands == '-') {
145 commands++;
146 while (*commands && *commands != ' ')
147 process_switch(*commands++);
148 continue;
150 if (!strncmp(commands, "mem=", 4)) {
152 * "mem=XXX[kKmM]" overrides the PROM-reported
153 * memory size.
155 cmdline_memory_size = simple_strtoul(commands + 4,
156 &commands, 0);
157 if (*commands == 'K' || *commands == 'k') {
158 cmdline_memory_size <<= 10;
159 commands++;
160 } else if (*commands=='M' || *commands=='m') {
161 cmdline_memory_size <<= 20;
162 commands++;
165 while (*commands && *commands != ' ')
166 commands++;
170 extern void panic_setup(char *, int *);
172 extern unsigned short root_flags;
173 extern unsigned short root_dev;
174 extern unsigned short ram_flags;
175 #define RAMDISK_IMAGE_START_MASK 0x07FF
176 #define RAMDISK_PROMPT_FLAG 0x8000
177 #define RAMDISK_LOAD_FLAG 0x4000
179 extern int root_mountflags;
181 char reboot_command[COMMAND_LINE_SIZE];
183 static struct pt_regs fake_swapper_regs = { { 0, }, 0, 0, 0, 0 };
185 void __init per_cpu_patch(void)
187 struct cpuid_patch_entry *p;
188 unsigned long ver;
189 int is_jbus;
191 if (tlb_type == spitfire && !this_is_starfire)
192 return;
194 is_jbus = 0;
195 if (tlb_type != hypervisor) {
196 __asm__ ("rdpr %%ver, %0" : "=r" (ver));
197 is_jbus = ((ver >> 32UL) == __JALAPENO_ID ||
198 (ver >> 32UL) == __SERRANO_ID);
201 p = &__cpuid_patch;
202 while (p < &__cpuid_patch_end) {
203 unsigned long addr = p->addr;
204 unsigned int *insns;
206 switch (tlb_type) {
207 case spitfire:
208 insns = &p->starfire[0];
209 break;
210 case cheetah:
211 case cheetah_plus:
212 if (is_jbus)
213 insns = &p->cheetah_jbus[0];
214 else
215 insns = &p->cheetah_safari[0];
216 break;
217 case hypervisor:
218 insns = &p->sun4v[0];
219 break;
220 default:
221 prom_printf("Unknown cpu type, halting.\n");
222 prom_halt();
225 *(unsigned int *) (addr + 0) = insns[0];
226 wmb();
227 __asm__ __volatile__("flush %0" : : "r" (addr + 0));
229 *(unsigned int *) (addr + 4) = insns[1];
230 wmb();
231 __asm__ __volatile__("flush %0" : : "r" (addr + 4));
233 *(unsigned int *) (addr + 8) = insns[2];
234 wmb();
235 __asm__ __volatile__("flush %0" : : "r" (addr + 8));
237 *(unsigned int *) (addr + 12) = insns[3];
238 wmb();
239 __asm__ __volatile__("flush %0" : : "r" (addr + 12));
241 p++;
245 void __init sun4v_patch(void)
247 extern void sun4v_hvapi_init(void);
248 struct sun4v_1insn_patch_entry *p1;
249 struct sun4v_2insn_patch_entry *p2;
251 if (tlb_type != hypervisor)
252 return;
254 p1 = &__sun4v_1insn_patch;
255 while (p1 < &__sun4v_1insn_patch_end) {
256 unsigned long addr = p1->addr;
258 *(unsigned int *) (addr + 0) = p1->insn;
259 wmb();
260 __asm__ __volatile__("flush %0" : : "r" (addr + 0));
262 p1++;
265 p2 = &__sun4v_2insn_patch;
266 while (p2 < &__sun4v_2insn_patch_end) {
267 unsigned long addr = p2->addr;
269 *(unsigned int *) (addr + 0) = p2->insns[0];
270 wmb();
271 __asm__ __volatile__("flush %0" : : "r" (addr + 0));
273 *(unsigned int *) (addr + 4) = p2->insns[1];
274 wmb();
275 __asm__ __volatile__("flush %0" : : "r" (addr + 4));
277 p2++;
280 sun4v_hvapi_init();
283 #ifdef CONFIG_SMP
284 void __init boot_cpu_id_too_large(int cpu)
286 prom_printf("Serious problem, boot cpu id (%d) >= NR_CPUS (%d)\n",
287 cpu, NR_CPUS);
288 prom_halt();
290 #endif
292 void __init setup_arch(char **cmdline_p)
294 /* Initialize PROM console and command line. */
295 *cmdline_p = prom_getbootargs();
296 strcpy(boot_command_line, *cmdline_p);
298 boot_flags_init(*cmdline_p);
299 register_console(&prom_early_console);
301 if (tlb_type == hypervisor)
302 printk("ARCH: SUN4V\n");
303 else
304 printk("ARCH: SUN4U\n");
306 #ifdef CONFIG_DUMMY_CONSOLE
307 conswitchp = &dummy_con;
308 #elif defined(CONFIG_PROM_CONSOLE)
309 conswitchp = &prom_con;
310 #endif
312 idprom_init();
314 if (!root_flags)
315 root_mountflags &= ~MS_RDONLY;
316 ROOT_DEV = old_decode_dev(root_dev);
317 #ifdef CONFIG_BLK_DEV_RAM
318 rd_image_start = ram_flags & RAMDISK_IMAGE_START_MASK;
319 rd_prompt = ((ram_flags & RAMDISK_PROMPT_FLAG) != 0);
320 rd_doload = ((ram_flags & RAMDISK_LOAD_FLAG) != 0);
321 #endif
323 task_thread_info(&init_task)->kregs = &fake_swapper_regs;
325 #ifdef CONFIG_IP_PNP
326 if (!ic_set_manually) {
327 int chosen = prom_finddevice ("/chosen");
328 u32 cl, sv, gw;
330 cl = prom_getintdefault (chosen, "client-ip", 0);
331 sv = prom_getintdefault (chosen, "server-ip", 0);
332 gw = prom_getintdefault (chosen, "gateway-ip", 0);
333 if (cl && sv) {
334 ic_myaddr = cl;
335 ic_servaddr = sv;
336 if (gw)
337 ic_gateway = gw;
338 #if defined(CONFIG_IP_PNP_BOOTP) || defined(CONFIG_IP_PNP_RARP)
339 ic_proto_enabled = 0;
340 #endif
343 #endif
345 /* Get boot processor trap_block[] setup. */
346 init_cur_cpu_trap(current_thread_info());
348 paging_init();
351 /* BUFFER is PAGE_SIZE bytes long. */
353 extern char *sparc_cpu_type;
354 extern char *sparc_fpu_type;
356 extern void smp_info(struct seq_file *);
357 extern void smp_bogo(struct seq_file *);
358 extern void mmu_info(struct seq_file *);
360 unsigned int dcache_parity_tl1_occurred;
361 unsigned int icache_parity_tl1_occurred;
363 int ncpus_probed;
365 static int show_cpuinfo(struct seq_file *m, void *__unused)
367 seq_printf(m,
368 "cpu\t\t: %s\n"
369 "fpu\t\t: %s\n"
370 "prom\t\t: %s\n"
371 "type\t\t: %s\n"
372 "ncpus probed\t: %d\n"
373 "ncpus active\t: %d\n"
374 "D$ parity tl1\t: %u\n"
375 "I$ parity tl1\t: %u\n"
376 #ifndef CONFIG_SMP
377 "Cpu0ClkTck\t: %016lx\n"
378 #endif
380 sparc_cpu_type,
381 sparc_fpu_type,
382 prom_version,
383 ((tlb_type == hypervisor) ?
384 "sun4v" :
385 "sun4u"),
386 ncpus_probed,
387 num_online_cpus(),
388 dcache_parity_tl1_occurred,
389 icache_parity_tl1_occurred
390 #ifndef CONFIG_SMP
391 , cpu_data(0).clock_tick
392 #endif
394 #ifdef CONFIG_SMP
395 smp_bogo(m);
396 #endif
397 mmu_info(m);
398 #ifdef CONFIG_SMP
399 smp_info(m);
400 #endif
401 return 0;
404 static void *c_start(struct seq_file *m, loff_t *pos)
406 /* The pointer we are returning is arbitrary,
407 * it just has to be non-NULL and not IS_ERR
408 * in the success case.
410 return *pos == 0 ? &c_start : NULL;
413 static void *c_next(struct seq_file *m, void *v, loff_t *pos)
415 ++*pos;
416 return c_start(m, pos);
419 static void c_stop(struct seq_file *m, void *v)
423 const struct seq_operations cpuinfo_op = {
424 .start =c_start,
425 .next = c_next,
426 .stop = c_stop,
427 .show = show_cpuinfo,
430 extern int stop_a_enabled;
432 void sun_do_break(void)
434 if (!stop_a_enabled)
435 return;
437 prom_printf("\n");
438 flush_user_windows();
440 prom_cmdline();
443 int stop_a_enabled = 1;