[MIPS] Add topology_init.
[linux-2.6/kmemtrace.git] / include / asm-sh / dma.h
bloba118a0d43053fb90350ffc5dea90900a5f5e7ea6
1 /*
2 * include/asm-sh/dma.h
4 * Copyright (C) 2003, 2004 Paul Mundt
6 * This file is subject to the terms and conditions of the GNU General Public
7 * License. See the file "COPYING" in the main directory of this archive
8 * for more details.
9 */
10 #ifndef __ASM_SH_DMA_H
11 #define __ASM_SH_DMA_H
12 #ifdef __KERNEL__
14 #include <linux/config.h>
15 #include <linux/spinlock.h>
16 #include <linux/wait.h>
17 #include <linux/sysdev.h>
18 #include <linux/device.h>
19 #include <asm/cpu/dma.h>
20 #include <asm/semaphore.h>
22 /* The maximum address that we can perform a DMA transfer to on this platform */
23 /* Don't define MAX_DMA_ADDRESS; it's useless on the SuperH and any
24 occurrence should be flagged as an error. */
25 /* But... */
26 /* XXX: This is not applicable to SuperH, just needed for alloc_bootmem */
27 #define MAX_DMA_ADDRESS (PAGE_OFFSET+0x10000000)
29 #ifdef CONFIG_NR_DMA_CHANNELS
30 # define MAX_DMA_CHANNELS (CONFIG_NR_DMA_CHANNELS)
31 #else
32 # define MAX_DMA_CHANNELS (CONFIG_NR_ONCHIP_DMA_CHANNELS)
33 #endif
36 * Read and write modes can mean drastically different things depending on the
37 * channel configuration. Consult your DMAC documentation and module
38 * implementation for further clues.
40 #define DMA_MODE_READ 0x00
41 #define DMA_MODE_WRITE 0x01
42 #define DMA_MODE_MASK 0x01
44 #define DMA_AUTOINIT 0x10
47 * DMAC (dma_info) flags
49 enum {
50 DMAC_CHANNELS_CONFIGURED = 0x00,
51 DMAC_CHANNELS_TEI_CAPABLE = 0x01,
55 * DMA channel capabilities / flags
57 enum {
58 DMA_TEI_CAPABLE = 0x01,
59 DMA_CONFIGURED = 0x02,
62 extern spinlock_t dma_spin_lock;
64 struct dma_channel;
66 struct dma_ops {
67 int (*request)(struct dma_channel *chan);
68 void (*free)(struct dma_channel *chan);
70 int (*get_residue)(struct dma_channel *chan);
71 int (*xfer)(struct dma_channel *chan);
72 void (*configure)(struct dma_channel *chan, unsigned long flags);
75 struct dma_channel {
76 char dev_id[16];
78 unsigned int chan; /* Physical channel number */
79 unsigned int vchan; /* Virtual channel number */
80 unsigned int mode;
81 unsigned int count;
83 unsigned long sar;
84 unsigned long dar;
86 unsigned long flags;
87 atomic_t busy;
89 struct semaphore sem;
90 wait_queue_head_t wait_queue;
92 struct sys_device dev;
95 struct dma_info {
96 struct platform_device *pdev;
98 const char *name;
99 unsigned int nr_channels;
100 unsigned long flags;
102 struct dma_ops *ops;
103 struct dma_channel *channels;
105 struct list_head list;
108 #define to_dma_channel(channel) container_of(channel, struct dma_channel, dev)
110 /* arch/sh/drivers/dma/dma-api.c */
111 extern int dma_xfer(unsigned int chan, unsigned long from,
112 unsigned long to, size_t size, unsigned int mode);
114 #define dma_write(chan, from, to, size) \
115 dma_xfer(chan, from, to, size, DMA_MODE_WRITE)
116 #define dma_write_page(chan, from, to) \
117 dma_write(chan, from, to, PAGE_SIZE)
119 #define dma_read(chan, from, to, size) \
120 dma_xfer(chan, from, to, size, DMA_MODE_READ)
121 #define dma_read_page(chan, from, to) \
122 dma_read(chan, from, to, PAGE_SIZE)
124 extern int request_dma(unsigned int chan, const char *dev_id);
125 extern void free_dma(unsigned int chan);
126 extern int get_dma_residue(unsigned int chan);
127 extern struct dma_info *get_dma_info(unsigned int chan);
128 extern struct dma_channel *get_dma_channel(unsigned int chan);
129 extern void dma_wait_for_completion(unsigned int chan);
130 extern void dma_configure_channel(unsigned int chan, unsigned long flags);
132 extern int register_dmac(struct dma_info *info);
133 extern void unregister_dmac(struct dma_info *info);
135 #ifdef CONFIG_SYSFS
136 /* arch/sh/drivers/dma/dma-sysfs.c */
137 extern int dma_create_sysfs_files(struct dma_channel *, struct dma_info *);
138 extern void dma_remove_sysfs_files(struct dma_channel *, struct dma_info *);
139 #else
140 #define dma_create_sysfs_file(channel, info) do { } while (0)
141 #define dma_remove_sysfs_file(channel, info) do { } while (0)
142 #endif
144 #ifdef CONFIG_PCI
145 extern int isa_dma_bridge_buggy;
146 #else
147 #define isa_dma_bridge_buggy (0)
148 #endif
150 #endif /* __KERNEL__ */
151 #endif /* __ASM_SH_DMA_H */