2 * ite8172.c -- ITE IT8172G Sound Driver.
4 * Copyright 2001 MontaVista Software Inc.
5 * Author: MontaVista Software, Inc.
6 * stevel@mvista.com or source@mvista.com
8 * This program is free software; you can redistribute it and/or modify it
9 * under the terms of the GNU General Public License as published by the
10 * Free Software Foundation; either version 2 of the License, or (at your
11 * option) any later version.
13 * THIS SOFTWARE IS PROVIDED ``AS IS'' AND ANY EXPRESS OR IMPLIED
14 * WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF
15 * MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN
16 * NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
17 * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
18 * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF
19 * USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON
20 * ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
21 * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
22 * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
24 * You should have received a copy of the GNU General Public License along
25 * with this program; if not, write to the Free Software Foundation, Inc.,
26 * 675 Mass Ave, Cambridge, MA 02139, USA.
29 * Module command line parameters:
32 * /dev/dsp standard OSS /dev/dsp device
33 * /dev/mixer standard OSS /dev/mixer device
37 * 1. Much of the OSS buffer allocation, ioctl's, and mmap'ing are
38 * taken, slightly modified or not at all, from the ES1371 driver,
39 * so refer to the credits in es1371.c for those. The rest of the
40 * code (probe, open, read, write, the ISR, etc.) is new.
41 * 2. The following support is untested:
42 * * Memory mapping the audio buffers, and the ioctl controls that go
45 * 3. The following is not supported:
47 * * legacy audio mode.
48 * 4. Support for volume button interrupts is implemented but doesn't
52 * 02.08.2001 0.1 Initial release
54 #include <linux/version.h>
55 #include <linux/module.h>
56 #include <linux/string.h>
57 #include <linux/ioport.h>
58 #include <linux/sched.h>
59 #include <linux/delay.h>
60 #include <linux/sound.h>
61 #include <linux/slab.h>
62 #include <linux/soundcard.h>
63 #include <linux/pci.h>
64 #include <linux/init.h>
65 #include <linux/poll.h>
66 #include <linux/bitops.h>
67 #include <linux/proc_fs.h>
68 #include <linux/spinlock.h>
69 #include <linux/smp_lock.h>
70 #include <linux/ac97_codec.h>
71 #include <linux/wrapper.h>
74 #include <asm/uaccess.h>
75 #include <asm/hardirq.h>
76 #include <asm/it8172/it8172.h>
78 /* --------------------------------------------------------------------- */
80 #undef OSS_DOCUMENTED_MIXER_SEMANTICS
82 #undef IT8172_VERBOSE_DEBUG
85 static const unsigned sample_shift
[] = { 0, 1, 1, 2 };
89 * Audio Controller register bit definitions follow. See
90 * include/asm/it8172/it8172.h for register offsets.
93 /* PCM Out Volume Reg */
94 #define PCMOV_PCMOM (1<<15) /* PCM Out Mute default 1: mute */
95 #define PCMOV_PCMRCG_BIT 8 /* PCM Right channel Gain */
96 #define PCMOV_PCMRCG_MASK (0x1f<<PCMOV_PCMRCG_BIT)
97 #define PCMOV_PCMLCG_BIT 0 /* PCM Left channel gain */
98 #define PCMOV_PCMLCG_MASK 0x1f
100 /* FM Out Volume Reg */
101 #define FMOV_FMOM (1<<15) /* FM Out Mute default 1: mute */
102 #define FMOV_FMRCG_BIT 8 /* FM Right channel Gain */
103 #define FMOV_FMRCG_MASK (0x1f<<FMOV_FMRCG_BIT)
104 #define FMOV_FMLCG_BIT 0 /* FM Left channel gain */
105 #define FMOV_FMLCG_MASK 0x1f
107 /* I2S Out Volume Reg */
108 #define I2SV_I2SOM (1<<15) /* I2S Out Mute default 1: mute */
109 #define I2SV_I2SRCG_BIT 8 /* I2S Right channel Gain */
110 #define I2SV_I2SRCG_MASK (0x1f<<I2SV_I2SRCG_BIT)
111 #define I2SV_I2SLCG_BIT 0 /* I2S Left channel gain */
112 #define I2SV_I2SLCG_MASK 0x1f
114 /* Digital Recording Source Select Reg */
116 #define DRSS_MASK 0x07
117 #define DRSS_AC97_PRIM 0
121 #define DRSS_AC97_SEC 4
123 /* Playback/Capture Channel Control Registers */
124 #define CC_SM (1<<15) /* Stereo, Mone 0: mono 1: stereo */
125 #define CC_DF (1<<14) /* Data Format 0: 8 bit 1: 16 bit */
126 #define CC_FMT_BIT 14
127 #define CC_FMT_MASK (0x03<<CC_FMT_BIT)
128 #define CC_CF_BIT 12 /* Channel format (Playback only) */
129 #define CC_CF_MASK (0x03<<CC_CF_BIT)
131 #define CC_CF_4 (1<<CC_CF_BIT)
132 #define CC_CF_6 (2<<CC_CF_BIT)
133 #define CC_SR_BIT 8 /* sample Rate */
134 #define CC_SR_MASK (0x0f<<CC_SR_BIT)
136 #define CC_SR_8000 (1<<CC_SR_BIT)
137 #define CC_SR_9600 (2<<CC_SR_BIT)
138 #define CC_SR_11025 (3<<CC_SR_BIT)
139 #define CC_SR_16000 (4<<CC_SR_BIT)
140 #define CC_SR_19200 (5<<CC_SR_BIT)
141 #define CC_SR_22050 (6<<CC_SR_BIT)
142 #define CC_SR_32000 (7<<CC_SR_BIT)
143 #define CC_SR_38400 (8<<CC_SR_BIT)
144 #define CC_SR_44100 (9<<CC_SR_BIT)
145 #define CC_SR_48000 (10<<CC_SR_BIT)
146 #define CC_CSP (1<<7) /* Channel stop
147 * 0: End of Current buffer
148 * 1: Immediately stop when rec stop */
149 #define CC_CP (1<<6) /* Channel pause 0: normal, 1: pause */
150 #define CC_CA (1<<5) /* Channel Action 0: Stop , 1: start */
151 #define CC_CB2L (1<<2) /* Cur. buf. 2 xfr is last 0: No, 1: Yes */
152 #define CC_CB1L (1<<1) /* Cur. buf. 1 xfr is last 0: No, 1: Yes */
153 #define CC_DE 1 /* DFC/DFIFO Data Empty 1: empty, 0: not empty
157 /* Codec Control Reg */
158 #define CODECC_GME (1<<9) /* AC97 GPIO Mode enable */
159 #define CODECC_ATM (1<<8) /* AC97 ATE test mode 0: test 1: normal */
160 #define CODECC_WR (1<<6) /* AC97 Warn reset 1: warm reset , 0: Normal */
161 #define CODECC_CR (1<<5) /* AC97 Cold reset 1: Cold reset , 0: Normal */
164 /* I2S Control Reg */
165 #define I2SMC_SR_BIT 6 /* I2S Sampling rate
166 * 00: 48KHz, 01: 44.1 KHz, 10: 32 32 KHz */
167 #define I2SMC_SR_MASK (0x03<<I2SMC_SR_BIT)
168 #define I2SMC_SR_48000 0
169 #define I2SMC_SR_44100 (1<<I2SMC_SR_BIT)
170 #define I2SMC_SR_32000 (2<<I2SMC_SR_BIT)
171 #define I2SMC_SRSS (1<<5) /* Sample Rate Source Select 1:S/W, 0: H/W */
172 #define I2SMC_I2SF_BIT 0 /* I2S Format */
173 #define I2SMC_I2SF_MASK 0x03
174 #define I2SMC_I2SF_DAC 0
175 #define I2SMC_I2SF_ADC 2
176 #define I2SMC_I2SF_I2S 3
179 /* Volume up, Down, Mute */
180 #define VS_VMP (1<<2) /* Volume mute 1: pushed, 0: not */
181 #define VS_VDP (1<<1) /* Volume Down 1: pushed, 0: not */
182 #define VS_VUP 1 /* Volime Up 1: pushed, 0: not */
184 /* SRC, Mixer test control/DFC status reg */
185 #define SRCS_DPUSC (1<<5) /* DFC Playback underrun Status/clear */
186 #define SRCS_DCOSC (1<<4) /* DFC Capture Overrun Status/clear */
187 #define SRCS_SIS (1<<3) /* SRC input select 1: Mixer, 0: Codec I/F */
188 #define SRCS_CDIS_BIT 0 /* Codec Data Input Select */
189 #define SRCS_CDIS_MASK 0x07
190 #define SRCS_CDIS_MIXER 0
191 #define SRCS_CDIS_PCM 1
192 #define SRCS_CDIS_I2S 2
193 #define SRCS_CDIS_FM 3
194 #define SRCS_CDIS_DFC 4
197 /* Codec Index Reg command Port */
198 #define CIRCP_CID_BIT 10
199 #define CIRCP_CID_MASK (0x03<<CIRCP_CID_BIT)
200 #define CIRCP_CPS (1<<9) /* Command Port Status 0: ready, 1: busy */
201 #define CIRCP_DPVF (1<<8) /* Data Port Valid Flag 0: invalis, 1: valid */
202 #define CIRCP_RWC (1<<7) /* Read/write command */
203 #define CIRCP_CIA_BIT 0
204 #define CIRCP_CIA_MASK 0x007F /* Codec Index Address */
206 /* Test Mode Control/Test group Select Control */
208 /* General Control Reg */
209 #define GC_VDC_BIT 6 /* Volume Division Control */
210 #define GC_VDC_MASK (0x03<<GC_VDC_BIT)
211 #define GC_VDC_NONE 0
212 #define GC_VDC_DIV2 (1<<GC_VDC_BIT)
213 #define GC_VDC_DIV4 (2<<GC_VDC_BIT)
214 #define GC_SOE (1<<2) /* S/PDIF Output enable */
215 #define GC_SWR 1 /* Software warn reset */
217 /* Interrupt mask Control Reg */
218 #define IMC_VCIM (1<<6) /* Volume CNTL interrupt mask */
219 #define IMC_CCIM (1<<1) /* Capture Chan. iterrupt mask */
220 #define IMC_PCIM 1 /* Playback Chan. interrupt mask */
222 /* Interrupt status/clear reg */
223 #define ISC_VCI (1<<6) /* Volume CNTL interrupt 1: clears */
224 #define ISC_CCI (1<<1) /* Capture Chan. interrupt 1: clears */
225 #define ISC_PCI 1 /* Playback Chan. interrupt 1: clears */
228 #define POLL_COUNT 0x5000
231 #define IT8172_MODULE_NAME "IT8172 audio"
232 #define PFX IT8172_MODULE_NAME ": "
235 /* --------------------------------------------------------------------- */
237 struct it8172_state
{
238 /* list of it8172 devices */
239 struct list_head devs
;
241 /* the corresponding pci_dev structure */
244 /* soundcore stuff */
247 /* hardware resources */
254 u8 rev
; /* the chip revision */
257 int spdif_volume
; /* S/PDIF output is enabled if != -1 */
260 /* debug /proc entry */
261 struct proc_dir_entry
*ps
;
262 struct proc_dir_entry
*ac97_ps
;
263 #endif /* IT8172_DEBUG */
265 struct ac97_codec codec
;
267 unsigned short pcc
, capcc
;
268 unsigned dacrate
, adcrate
;
271 struct semaphore open_sem
;
273 wait_queue_head_t open_wait
;
285 unsigned total_bytes
;
286 unsigned error
; /* over/underrun */
287 wait_queue_head_t wait
;
288 /* redundant, but makes calculations easier */
291 unsigned fragsamples
;
296 unsigned ossfragshift
;
298 unsigned subdivision
;
302 /* --------------------------------------------------------------------- */
304 static LIST_HEAD(devs
);
306 /* --------------------------------------------------------------------- */
308 extern inline unsigned ld2(unsigned int x
)
333 /* --------------------------------------------------------------------- */
335 static void it8172_delay(int msec
)
343 tmo
= jiffies
+ (msec
*HZ
)/1000;
345 tmo2
= tmo
- jiffies
;
348 schedule_timeout(tmo2
);
353 static unsigned short
354 get_compat_rate(unsigned* rate
)
356 unsigned rate_out
= *rate
;
359 if (rate_out
>= 46050) {
360 sr
= CC_SR_48000
; rate_out
= 48000;
361 } else if (rate_out
>= 41250) {
362 sr
= CC_SR_44100
; rate_out
= 44100;
363 } else if (rate_out
>= 35200) {
364 sr
= CC_SR_38400
; rate_out
= 38400;
365 } else if (rate_out
>= 27025) {
366 sr
= CC_SR_32000
; rate_out
= 32000;
367 } else if (rate_out
>= 20625) {
368 sr
= CC_SR_22050
; rate_out
= 22050;
369 } else if (rate_out
>= 17600) {
370 sr
= CC_SR_19200
; rate_out
= 19200;
371 } else if (rate_out
>= 13513) {
372 sr
= CC_SR_16000
; rate_out
= 16000;
373 } else if (rate_out
>= 10313) {
374 sr
= CC_SR_11025
; rate_out
= 11025;
375 } else if (rate_out
>= 8800) {
376 sr
= CC_SR_9600
; rate_out
= 9600;
377 } else if (rate_out
>= 6750) {
378 sr
= CC_SR_8000
; rate_out
= 8000;
380 sr
= CC_SR_5500
; rate_out
= 5500;
387 static void set_adc_rate(struct it8172_state
*s
, unsigned rate
)
392 sr
= get_compat_rate(&rate
);
394 spin_lock_irqsave(&s
->lock
, flags
);
395 s
->capcc
&= ~CC_SR_MASK
;
397 outw(s
->capcc
, s
->io
+IT_AC_CAPCC
);
398 spin_unlock_irqrestore(&s
->lock
, flags
);
404 static void set_dac_rate(struct it8172_state
*s
, unsigned rate
)
409 sr
= get_compat_rate(&rate
);
411 spin_lock_irqsave(&s
->lock
, flags
);
412 s
->pcc
&= ~CC_SR_MASK
;
414 outw(s
->pcc
, s
->io
+IT_AC_PCC
);
415 spin_unlock_irqrestore(&s
->lock
, flags
);
421 /* --------------------------------------------------------------------- */
423 static u16
rdcodec(struct ac97_codec
*codec
, u8 addr
)
425 struct it8172_state
*s
= (struct it8172_state
*)codec
->private_data
;
427 unsigned short circp
, data
;
430 spin_lock_irqsave(&s
->lock
, flags
);
432 for (i
= 0; i
< POLL_COUNT
; i
++)
433 if (!(inw(s
->io
+IT_AC_CIRCP
) & CIRCP_CPS
))
436 printk(KERN_INFO PFX
"rdcodec: codec ready poll expired!\n");
438 circp
= addr
& CIRCP_CIA_MASK
;
439 circp
|= (codec
->id
<< CIRCP_CID_BIT
);
440 circp
|= CIRCP_RWC
; // read command
441 outw(circp
, s
->io
+IT_AC_CIRCP
);
443 /* now wait for the data */
444 for (i
= 0; i
< POLL_COUNT
; i
++)
445 if (inw(s
->io
+IT_AC_CIRCP
) & CIRCP_DPVF
)
448 printk(KERN_INFO PFX
"rdcodec: read poll expired!\n");
450 data
= inw(s
->io
+IT_AC_CIRDP
);
451 spin_unlock_irqrestore(&s
->lock
, flags
);
457 static void wrcodec(struct ac97_codec
*codec
, u8 addr
, u16 data
)
459 struct it8172_state
*s
= (struct it8172_state
*)codec
->private_data
;
461 unsigned short circp
;
464 spin_lock_irqsave(&s
->lock
, flags
);
466 for (i
= 0; i
< POLL_COUNT
; i
++)
467 if (!(inw(s
->io
+IT_AC_CIRCP
) & CIRCP_CPS
))
470 printk(KERN_INFO PFX
"wrcodec: codec ready poll expired!\n");
472 circp
= addr
& CIRCP_CIA_MASK
;
473 circp
|= (codec
->id
<< CIRCP_CID_BIT
);
474 circp
&= ~CIRCP_RWC
; // write command
476 outw(data
, s
->io
+IT_AC_CIRDP
); // send data first
477 outw(circp
, s
->io
+IT_AC_CIRCP
);
479 spin_unlock_irqrestore(&s
->lock
, flags
);
483 static void waitcodec(struct ac97_codec
*codec
)
487 /* codec_wait is used to wait for a ready state after
491 temp
= rdcodec(codec
, 0x26);
493 // If power down, power up
496 wrcodec(codec
, 0x26, 0);
499 temp
= rdcodec(codec
, 0x26);
502 // Check if Codec REF,ANL,DAC,ADC ready***/
503 if ((temp
& 0x3f0f) != 0x000f) {
504 printk(KERN_INFO PFX
"codec reg 26 status (0x%x) not ready!!\n",
511 /* --------------------------------------------------------------------- */
513 extern inline void stop_adc(struct it8172_state
*s
)
515 struct dmabuf
* db
= &s
->dma_adc
;
522 spin_lock_irqsave(&s
->lock
, flags
);
524 s
->capcc
&= ~(CC_CA
| CC_CP
| CC_CB2L
| CC_CB1L
);
526 outw(s
->capcc
, s
->io
+IT_AC_CAPCC
);
528 // disable capture interrupt
529 imc
= inb(s
->io
+IT_AC_IMC
);
530 outb(imc
| IMC_CCIM
, s
->io
+IT_AC_IMC
);
534 spin_unlock_irqrestore(&s
->lock
, flags
);
537 extern inline void stop_dac(struct it8172_state
*s
)
539 struct dmabuf
* db
= &s
->dma_dac
;
546 spin_lock_irqsave(&s
->lock
, flags
);
548 s
->pcc
&= ~(CC_CA
| CC_CP
| CC_CB2L
| CC_CB1L
);
550 outw(s
->pcc
, s
->io
+IT_AC_PCC
);
552 // disable playback interrupt
553 imc
= inb(s
->io
+IT_AC_IMC
);
554 outb(imc
| IMC_PCIM
, s
->io
+IT_AC_IMC
);
558 spin_unlock_irqrestore(&s
->lock
, flags
);
561 static void start_dac(struct it8172_state
*s
)
563 struct dmabuf
* db
= &s
->dma_dac
;
566 unsigned long buf1
, buf2
;
571 spin_lock_irqsave(&s
->lock
, flags
);
573 // reset Buffer 1 and 2 pointers to nextOut and nextOut+fragsize
574 buf1
= virt_to_bus(db
->nextOut
);
575 buf2
= buf1
+ db
->fragsize
;
576 if (buf2
>= db
->dmaaddr
+ db
->dmasize
)
579 outl(buf1
, s
->io
+IT_AC_PCB1STA
);
580 outl(buf2
, s
->io
+IT_AC_PCB2STA
);
581 db
->curBufPtr
= IT_AC_PCB1STA
;
583 // enable playback interrupt
584 imc
= inb(s
->io
+IT_AC_IMC
);
585 outb(imc
& ~IMC_PCIM
, s
->io
+IT_AC_IMC
);
587 s
->pcc
&= ~(CC_CSP
| CC_CP
| CC_CB2L
| CC_CB1L
);
589 outw(s
->pcc
, s
->io
+IT_AC_PCC
);
593 spin_unlock_irqrestore(&s
->lock
, flags
);
596 static void start_adc(struct it8172_state
*s
)
598 struct dmabuf
* db
= &s
->dma_adc
;
601 unsigned long buf1
, buf2
;
606 spin_lock_irqsave(&s
->lock
, flags
);
608 // reset Buffer 1 and 2 pointers to nextIn and nextIn+fragsize
609 buf1
= virt_to_bus(db
->nextIn
);
610 buf2
= buf1
+ db
->fragsize
;
611 if (buf2
>= db
->dmaaddr
+ db
->dmasize
)
614 outl(buf1
, s
->io
+IT_AC_CAPB1STA
);
615 outl(buf2
, s
->io
+IT_AC_CAPB2STA
);
616 db
->curBufPtr
= IT_AC_CAPB1STA
;
618 // enable capture interrupt
619 imc
= inb(s
->io
+IT_AC_IMC
);
620 outb(imc
& ~IMC_CCIM
, s
->io
+IT_AC_IMC
);
622 s
->capcc
&= ~(CC_CSP
| CC_CP
| CC_CB2L
| CC_CB1L
);
624 outw(s
->capcc
, s
->io
+IT_AC_CAPCC
);
628 spin_unlock_irqrestore(&s
->lock
, flags
);
631 /* --------------------------------------------------------------------- */
633 #define DMABUF_DEFAULTORDER (17-PAGE_SHIFT)
634 #define DMABUF_MINORDER 1
636 extern inline void dealloc_dmabuf(struct it8172_state
*s
, struct dmabuf
*db
)
638 struct page
*page
, *pend
;
641 /* undo marking the pages as reserved */
642 pend
= virt_to_page(db
->rawbuf
+ (PAGE_SIZE
<< db
->buforder
) - 1);
643 for (page
= virt_to_page(db
->rawbuf
); page
<= pend
; page
++)
644 mem_map_unreserve(page
);
645 pci_free_consistent(s
->dev
, PAGE_SIZE
<< db
->buforder
,
646 db
->rawbuf
, db
->dmaaddr
);
648 db
->rawbuf
= db
->nextIn
= db
->nextOut
= NULL
;
649 db
->mapped
= db
->ready
= 0;
652 static int prog_dmabuf(struct it8172_state
*s
, struct dmabuf
*db
,
653 unsigned rate
, unsigned fmt
, unsigned reg
)
658 struct page
*page
, *pend
;
661 db
->ready
= db
->mapped
= 0;
662 for (order
= DMABUF_DEFAULTORDER
; order
>= DMABUF_MINORDER
; order
--)
663 if ((db
->rawbuf
= pci_alloc_consistent(s
->dev
,
669 db
->buforder
= order
;
670 /* now mark the pages as reserved;
671 otherwise remap_page_range doesn't do what we want */
672 pend
= virt_to_page(db
->rawbuf
+ (PAGE_SIZE
<< db
->buforder
) - 1);
673 for (page
= virt_to_page(db
->rawbuf
); page
<= pend
; page
++)
674 mem_map_reserve(page
);
678 db
->nextIn
= db
->nextOut
= db
->rawbuf
;
680 bytepersec
= rate
<< sample_shift
[fmt
];
681 bufs
= PAGE_SIZE
<< db
->buforder
;
682 if (db
->ossfragshift
) {
683 if ((1000 << db
->ossfragshift
) < bytepersec
)
684 db
->fragshift
= ld2(bytepersec
/1000);
686 db
->fragshift
= db
->ossfragshift
;
688 db
->fragshift
= ld2(bytepersec
/100/(db
->subdivision
?
689 db
->subdivision
: 1));
690 if (db
->fragshift
< 3)
693 db
->numfrag
= bufs
>> db
->fragshift
;
694 while (db
->numfrag
< 4 && db
->fragshift
> 3) {
696 db
->numfrag
= bufs
>> db
->fragshift
;
698 db
->fragsize
= 1 << db
->fragshift
;
699 if (db
->ossmaxfrags
>= 4 && db
->ossmaxfrags
< db
->numfrag
)
700 db
->numfrag
= db
->ossmaxfrags
;
701 db
->fragsamples
= db
->fragsize
>> sample_shift
[fmt
];
702 db
->dmasize
= db
->numfrag
<< db
->fragshift
;
703 memset(db
->rawbuf
, (fmt
& (CC_DF
>>CC_FMT_BIT
)) ? 0 : 0x80, db
->dmasize
);
705 // set data length register
706 outw(db
->fragsize
, s
->io
+reg
+2);
712 extern inline int prog_dmabuf_adc(struct it8172_state
*s
)
715 return prog_dmabuf(s
, &s
->dma_adc
, s
->adcrate
,
716 (s
->capcc
& CC_FMT_MASK
) >> CC_FMT_BIT
,
720 extern inline int prog_dmabuf_dac(struct it8172_state
*s
)
723 return prog_dmabuf(s
, &s
->dma_dac
, s
->dacrate
,
724 (s
->pcc
& CC_FMT_MASK
) >> CC_FMT_BIT
,
729 /* hold spinlock for the following! */
731 static void it8172_interrupt(int irq
, void *dev_id
, struct pt_regs
*regs
)
733 struct it8172_state
*s
= (struct it8172_state
*)dev_id
;
734 struct dmabuf
* dac
= &s
->dma_dac
;
735 struct dmabuf
* adc
= &s
->dma_adc
;
736 unsigned char isc
, vs
;
737 unsigned short vol
, mute
;
738 unsigned long newptr
;
742 isc
= inb(s
->io
+IT_AC_ISC
);
744 /* fastpath out, to ease interrupt sharing */
745 if (!(isc
& (ISC_VCI
| ISC_CCI
| ISC_PCI
)))
748 /* clear audio interrupts first */
749 outb(isc
| ISC_VCI
| ISC_CCI
| ISC_PCI
, s
->io
+IT_AC_ISC
);
751 /* handle volume button events */
753 vs
= inb(s
->io
+IT_AC_VS
);
754 outb(0, s
->io
+IT_AC_VS
);
755 vol
= inw(s
->io
+IT_AC_PCMOV
);
756 mute
= vol
& PCMOV_PCMOM
;
757 vol
&= PCMOV_PCMLCG_MASK
;
758 if ((vs
& VS_VUP
) && vol
> 0)
760 if ((vs
& VS_VDP
) && vol
< 0x1f)
762 vol
|= (vol
<< PCMOV_PCMRCG_BIT
);
764 vol
|= (mute
^ PCMOV_PCMOM
);
765 outw(vol
, s
->io
+IT_AC_PCMOV
);
768 /* update capture pointers */
770 if (adc
->count
> adc
->dmasize
- adc
->fragsize
) {
771 // Overrun. Stop ADC and log the error
774 printk(KERN_INFO PFX
"adc overrun\n");
776 newptr
= virt_to_bus(adc
->nextIn
) + 2*adc
->fragsize
;
777 if (newptr
>= adc
->dmaaddr
+ adc
->dmasize
)
778 newptr
-= adc
->dmasize
;
780 outl(newptr
, s
->io
+adc
->curBufPtr
);
781 adc
->curBufPtr
= (adc
->curBufPtr
== IT_AC_CAPB1STA
) ?
782 IT_AC_CAPB2STA
: IT_AC_CAPB1STA
;
784 adc
->nextIn
+= adc
->fragsize
;
785 if (adc
->nextIn
>= adc
->rawbuf
+ adc
->dmasize
)
786 adc
->nextIn
-= adc
->dmasize
;
788 adc
->count
+= adc
->fragsize
;
789 adc
->total_bytes
+= adc
->fragsize
;
791 /* wake up anybody listening */
792 if (waitqueue_active(&adc
->wait
))
793 wake_up_interruptible(&adc
->wait
);
797 /* update playback pointers */
799 newptr
= virt_to_bus(dac
->nextOut
) + 2*dac
->fragsize
;
800 if (newptr
>= dac
->dmaaddr
+ dac
->dmasize
)
801 newptr
-= dac
->dmasize
;
803 outl(newptr
, s
->io
+dac
->curBufPtr
);
804 dac
->curBufPtr
= (dac
->curBufPtr
== IT_AC_PCB1STA
) ?
805 IT_AC_PCB2STA
: IT_AC_PCB1STA
;
807 dac
->nextOut
+= dac
->fragsize
;
808 if (dac
->nextOut
>= dac
->rawbuf
+ dac
->dmasize
)
809 dac
->nextOut
-= dac
->dmasize
;
811 dac
->count
-= dac
->fragsize
;
812 dac
->total_bytes
+= dac
->fragsize
;
814 /* wake up anybody listening */
815 if (waitqueue_active(&dac
->wait
))
816 wake_up_interruptible(&dac
->wait
);
822 spin_unlock(&s
->lock
);
825 /* --------------------------------------------------------------------- */
827 static int it8172_open_mixdev(struct inode
*inode
, struct file
*file
)
829 int minor
= minor(inode
->i_rdev
);
830 struct list_head
*list
;
831 struct it8172_state
*s
;
833 for (list
= devs
.next
; ; list
= list
->next
) {
836 s
= list_entry(list
, struct it8172_state
, devs
);
837 if (s
->codec
.dev_mixer
== minor
)
840 file
->private_data
= s
;
844 static int it8172_release_mixdev(struct inode
*inode
, struct file
*file
)
850 static int mixdev_ioctl(struct ac97_codec
*codec
, unsigned int cmd
,
853 return codec
->mixer_ioctl(codec
, cmd
, arg
);
856 static int it8172_ioctl_mixdev(struct inode
*inode
, struct file
*file
,
857 unsigned int cmd
, unsigned long arg
)
859 struct it8172_state
*s
= (struct it8172_state
*)file
->private_data
;
860 struct ac97_codec
*codec
= &s
->codec
;
862 return mixdev_ioctl(codec
, cmd
, arg
);
865 static /*const*/ struct file_operations it8172_mixer_fops
= {
868 ioctl
: it8172_ioctl_mixdev
,
869 open
: it8172_open_mixdev
,
870 release
: it8172_release_mixdev
,
873 /* --------------------------------------------------------------------- */
875 static int drain_dac(struct it8172_state
*s
, int nonblock
)
880 if (s
->dma_dac
.mapped
|| !s
->dma_dac
.ready
)
884 spin_lock_irqsave(&s
->lock
, flags
);
885 count
= s
->dma_dac
.count
;
886 spin_unlock_irqrestore(&s
->lock
, flags
);
889 if (signal_pending(current
))
893 tmo
= 1000 * count
/ s
->dacrate
;
894 tmo
>>= sample_shift
[(s
->pcc
& CC_FMT_MASK
) >> CC_FMT_BIT
];
897 if (signal_pending(current
))
902 /* --------------------------------------------------------------------- */
904 static ssize_t
it8172_read(struct file
*file
, char *buffer
,
905 size_t count
, loff_t
*ppos
)
907 struct it8172_state
*s
= (struct it8172_state
*)file
->private_data
;
908 struct dmabuf
*db
= &s
->dma_adc
;
911 int cnt
, bufcnt
, avail
;
913 if (ppos
!= &file
->f_pos
)
917 if (!access_ok(VERIFY_WRITE
, buffer
, count
))
922 // wait for samples in capture buffer
924 spin_lock_irqsave(&s
->lock
, flags
);
928 spin_unlock_irqrestore(&s
->lock
, flags
);
930 if (file
->f_flags
& O_NONBLOCK
) {
935 interruptible_sleep_on(&db
->wait
);
936 if (signal_pending(current
)) {
942 } while (avail
<= 0);
944 cnt
= count
> avail
? avail
: count
;
946 if (cnt
% db
->fragsize
) {
947 // round count up to nearest fragment
948 int newcnt
= db
->fragsize
* ((cnt
+ db
->fragsize
) / db
->fragsize
);
952 // copy from nextOut to user
953 if (copy_to_user(buffer
, db
->nextOut
, bufcnt
)) {
959 spin_lock_irqsave(&s
->lock
, flags
);
961 spin_unlock_irqrestore(&s
->lock
, flags
);
964 if (db
->nextOut
>= db
->rawbuf
+ db
->dmasize
)
965 db
->nextOut
-= db
->dmasize
;
970 } // while (count > 0)
975 static ssize_t
it8172_write(struct file
*file
, const char *buffer
,
976 size_t count
, loff_t
*ppos
)
978 struct it8172_state
*s
= (struct it8172_state
*)file
->private_data
;
979 struct dmabuf
*db
= &s
->dma_dac
;
982 int cnt
, bufcnt
, avail
;
984 if (ppos
!= &file
->f_pos
)
988 if (!access_ok(VERIFY_READ
, buffer
, count
))
993 // wait for space in playback buffer
995 spin_lock_irqsave(&s
->lock
, flags
);
996 avail
= db
->dmasize
- db
->count
;
997 spin_unlock_irqrestore(&s
->lock
, flags
);
999 if (file
->f_flags
& O_NONBLOCK
) {
1004 interruptible_sleep_on(&db
->wait
);
1005 if (signal_pending(current
)) {
1011 } while (avail
<= 0);
1013 cnt
= count
> avail
? avail
: count
;
1015 if (copy_from_user(db
->nextIn
, buffer
, cnt
)) {
1022 if (cnt
% db
->fragsize
) {
1023 // round count up to nearest fragment, and fill remainder of
1024 // fragment with silence
1025 int newcnt
= db
->fragsize
* ((cnt
+ db
->fragsize
) / db
->fragsize
);
1026 memset(db
->nextIn
+ cnt
, (s
->pcc
& CC_DF
) ? 0 : 0x80, newcnt
- cnt
);
1030 spin_lock_irqsave(&s
->lock
, flags
);
1034 spin_unlock_irqrestore(&s
->lock
, flags
);
1037 if (db
->nextIn
>= db
->rawbuf
+ db
->dmasize
)
1038 db
->nextIn
-= db
->dmasize
;
1043 } // while (count > 0)
1048 /* No kernel lock - we have our own spinlock */
1049 static unsigned int it8172_poll(struct file
*file
,
1050 struct poll_table_struct
*wait
)
1052 struct it8172_state
*s
= (struct it8172_state
*)file
->private_data
;
1053 unsigned long flags
;
1054 unsigned int mask
= 0;
1056 if (file
->f_mode
& FMODE_WRITE
)
1057 poll_wait(file
, &s
->dma_dac
.wait
, wait
);
1058 if (file
->f_mode
& FMODE_READ
)
1059 poll_wait(file
, &s
->dma_adc
.wait
, wait
);
1060 spin_lock_irqsave(&s
->lock
, flags
);
1061 if (file
->f_mode
& FMODE_READ
) {
1062 if (s
->dma_adc
.count
>= (signed)s
->dma_adc
.fragsize
)
1063 mask
|= POLLIN
| POLLRDNORM
;
1065 if (file
->f_mode
& FMODE_WRITE
) {
1066 if (s
->dma_dac
.mapped
) {
1067 if (s
->dma_dac
.count
>= (signed)s
->dma_dac
.fragsize
)
1068 mask
|= POLLOUT
| POLLWRNORM
;
1070 if ((signed)s
->dma_dac
.dmasize
>=
1071 s
->dma_dac
.count
+ (signed)s
->dma_dac
.fragsize
)
1072 mask
|= POLLOUT
| POLLWRNORM
;
1075 spin_unlock_irqrestore(&s
->lock
, flags
);
1079 static int it8172_mmap(struct file
*file
, struct vm_area_struct
*vma
)
1081 struct it8172_state
*s
= (struct it8172_state
*)file
->private_data
;
1086 if (vma
->vm_flags
& VM_WRITE
)
1088 else if (vma
->vm_flags
& VM_READ
)
1094 if (vma
->vm_pgoff
!= 0) {
1098 size
= vma
->vm_end
- vma
->vm_start
;
1099 if (size
> (PAGE_SIZE
<< db
->buforder
)) {
1103 if (remap_page_range(vma
, vma
->vm_start
, virt_to_phys(db
->rawbuf
),
1104 size
, vma
->vm_page_prot
)) {
1114 #ifdef IT8172_VERBOSE_DEBUG
1115 static struct ioctl_str_t
{
1119 {SNDCTL_DSP_RESET
, "SNDCTL_DSP_RESET"},
1120 {SNDCTL_DSP_SYNC
, "SNDCTL_DSP_SYNC"},
1121 {SNDCTL_DSP_SPEED
, "SNDCTL_DSP_SPEED"},
1122 {SNDCTL_DSP_STEREO
, "SNDCTL_DSP_STEREO"},
1123 {SNDCTL_DSP_GETBLKSIZE
, "SNDCTL_DSP_GETBLKSIZE"},
1124 {SNDCTL_DSP_SAMPLESIZE
, "SNDCTL_DSP_SAMPLESIZE"},
1125 {SNDCTL_DSP_CHANNELS
, "SNDCTL_DSP_CHANNELS"},
1126 {SOUND_PCM_WRITE_CHANNELS
, "SOUND_PCM_WRITE_CHANNELS"},
1127 {SOUND_PCM_WRITE_FILTER
, "SOUND_PCM_WRITE_FILTER"},
1128 {SNDCTL_DSP_POST
, "SNDCTL_DSP_POST"},
1129 {SNDCTL_DSP_SUBDIVIDE
, "SNDCTL_DSP_SUBDIVIDE"},
1130 {SNDCTL_DSP_SETFRAGMENT
, "SNDCTL_DSP_SETFRAGMENT"},
1131 {SNDCTL_DSP_GETFMTS
, "SNDCTL_DSP_GETFMTS"},
1132 {SNDCTL_DSP_SETFMT
, "SNDCTL_DSP_SETFMT"},
1133 {SNDCTL_DSP_GETOSPACE
, "SNDCTL_DSP_GETOSPACE"},
1134 {SNDCTL_DSP_GETISPACE
, "SNDCTL_DSP_GETISPACE"},
1135 {SNDCTL_DSP_NONBLOCK
, "SNDCTL_DSP_NONBLOCK"},
1136 {SNDCTL_DSP_GETCAPS
, "SNDCTL_DSP_GETCAPS"},
1137 {SNDCTL_DSP_GETTRIGGER
, "SNDCTL_DSP_GETTRIGGER"},
1138 {SNDCTL_DSP_SETTRIGGER
, "SNDCTL_DSP_SETTRIGGER"},
1139 {SNDCTL_DSP_GETIPTR
, "SNDCTL_DSP_GETIPTR"},
1140 {SNDCTL_DSP_GETOPTR
, "SNDCTL_DSP_GETOPTR"},
1141 {SNDCTL_DSP_MAPINBUF
, "SNDCTL_DSP_MAPINBUF"},
1142 {SNDCTL_DSP_MAPOUTBUF
, "SNDCTL_DSP_MAPOUTBUF"},
1143 {SNDCTL_DSP_SETSYNCRO
, "SNDCTL_DSP_SETSYNCRO"},
1144 {SNDCTL_DSP_SETDUPLEX
, "SNDCTL_DSP_SETDUPLEX"},
1145 {SNDCTL_DSP_GETODELAY
, "SNDCTL_DSP_GETODELAY"},
1146 {SNDCTL_DSP_GETCHANNELMASK
, "SNDCTL_DSP_GETCHANNELMASK"},
1147 {SNDCTL_DSP_BIND_CHANNEL
, "SNDCTL_DSP_BIND_CHANNEL"},
1148 {OSS_GETVERSION
, "OSS_GETVERSION"},
1149 {SOUND_PCM_READ_RATE
, "SOUND_PCM_READ_RATE"},
1150 {SOUND_PCM_READ_CHANNELS
, "SOUND_PCM_READ_CHANNELS"},
1151 {SOUND_PCM_READ_BITS
, "SOUND_PCM_READ_BITS"},
1152 {SOUND_PCM_READ_FILTER
, "SOUND_PCM_READ_FILTER"}
1156 static int it8172_ioctl(struct inode
*inode
, struct file
*file
,
1157 unsigned int cmd
, unsigned long arg
)
1159 struct it8172_state
*s
= (struct it8172_state
*)file
->private_data
;
1160 unsigned long flags
;
1161 audio_buf_info abinfo
;
1164 int val
, mapped
, ret
, diff
;
1166 mapped
= ((file
->f_mode
& FMODE_WRITE
) && s
->dma_dac
.mapped
) ||
1167 ((file
->f_mode
& FMODE_READ
) && s
->dma_adc
.mapped
);
1169 #ifdef IT8172_VERBOSE_DEBUG
1170 for (count
=0; count
<sizeof(ioctl_str
)/sizeof(ioctl_str
[0]); count
++) {
1171 if (ioctl_str
[count
].cmd
== cmd
)
1174 if (count
< sizeof(ioctl_str
)/sizeof(ioctl_str
[0]))
1175 printk(KERN_INFO PFX
"ioctl %s\n", ioctl_str
[count
].str
);
1177 printk(KERN_INFO PFX
"ioctl unknown, 0x%x\n", cmd
);
1181 case OSS_GETVERSION
:
1182 return put_user(SOUND_VERSION
, (int *)arg
);
1184 case SNDCTL_DSP_SYNC
:
1185 if (file
->f_mode
& FMODE_WRITE
)
1186 return drain_dac(s
, file
->f_flags
& O_NONBLOCK
);
1189 case SNDCTL_DSP_SETDUPLEX
:
1192 case SNDCTL_DSP_GETCAPS
:
1193 return put_user(DSP_CAP_DUPLEX
| DSP_CAP_REALTIME
|
1194 DSP_CAP_TRIGGER
| DSP_CAP_MMAP
, (int *)arg
);
1196 case SNDCTL_DSP_RESET
:
1197 if (file
->f_mode
& FMODE_WRITE
) {
1199 synchronize_irq(s
->irq
);
1200 s
->dma_dac
.count
= s
->dma_dac
.total_bytes
= 0;
1201 s
->dma_dac
.nextIn
= s
->dma_dac
.nextOut
= s
->dma_dac
.rawbuf
;
1203 if (file
->f_mode
& FMODE_READ
) {
1205 synchronize_irq(s
->irq
);
1206 s
->dma_adc
.count
= s
->dma_adc
.total_bytes
= 0;
1207 s
->dma_adc
.nextIn
= s
->dma_adc
.nextOut
= s
->dma_adc
.rawbuf
;
1211 case SNDCTL_DSP_SPEED
:
1212 if (get_user(val
, (int *)arg
))
1215 if (file
->f_mode
& FMODE_READ
) {
1217 set_adc_rate(s
, val
);
1218 if ((ret
= prog_dmabuf_adc(s
)))
1221 if (file
->f_mode
& FMODE_WRITE
) {
1223 set_dac_rate(s
, val
);
1224 if ((ret
= prog_dmabuf_dac(s
)))
1228 return put_user((file
->f_mode
& FMODE_READ
) ?
1229 s
->adcrate
: s
->dacrate
, (int *)arg
);
1231 case SNDCTL_DSP_STEREO
:
1232 if (get_user(val
, (int *)arg
))
1234 if (file
->f_mode
& FMODE_READ
) {
1240 outw(s
->capcc
, s
->io
+IT_AC_CAPCC
);
1241 if ((ret
= prog_dmabuf_adc(s
)))
1244 if (file
->f_mode
& FMODE_WRITE
) {
1250 outw(s
->pcc
, s
->io
+IT_AC_PCC
);
1251 if ((ret
= prog_dmabuf_dac(s
)))
1256 case SNDCTL_DSP_CHANNELS
:
1257 if (get_user(val
, (int *)arg
))
1260 if (file
->f_mode
& FMODE_READ
) {
1268 outw(s
->capcc
, s
->io
+IT_AC_CAPCC
);
1269 if ((ret
= prog_dmabuf_adc(s
)))
1272 if (file
->f_mode
& FMODE_WRITE
) {
1282 // FIX! support multichannel???
1287 outw(s
->pcc
, s
->io
+IT_AC_PCC
);
1288 if ((ret
= prog_dmabuf_dac(s
)))
1292 return put_user(val
, (int *)arg
);
1294 case SNDCTL_DSP_GETFMTS
: /* Returns a mask */
1295 return put_user(AFMT_S16_LE
|AFMT_U8
, (int *)arg
);
1297 case SNDCTL_DSP_SETFMT
: /* Selects ONE fmt*/
1298 if (get_user(val
, (int *)arg
))
1300 if (val
!= AFMT_QUERY
) {
1301 if (file
->f_mode
& FMODE_READ
) {
1303 if (val
== AFMT_S16_LE
)
1309 outw(s
->capcc
, s
->io
+IT_AC_CAPCC
);
1310 if ((ret
= prog_dmabuf_adc(s
)))
1313 if (file
->f_mode
& FMODE_WRITE
) {
1315 if (val
== AFMT_S16_LE
)
1321 outw(s
->pcc
, s
->io
+IT_AC_PCC
);
1322 if ((ret
= prog_dmabuf_dac(s
)))
1326 if (file
->f_mode
& FMODE_READ
)
1327 val
= (s
->capcc
& CC_DF
) ? AFMT_S16_LE
: AFMT_U8
;
1329 val
= (s
->pcc
& CC_DF
) ? AFMT_S16_LE
: AFMT_U8
;
1331 return put_user(val
, (int *)arg
);
1333 case SNDCTL_DSP_POST
:
1336 case SNDCTL_DSP_GETTRIGGER
:
1338 spin_lock_irqsave(&s
->lock
, flags
);
1339 if (file
->f_mode
& FMODE_READ
&& !s
->dma_adc
.stopped
)
1340 val
|= PCM_ENABLE_INPUT
;
1341 if (file
->f_mode
& FMODE_WRITE
&& !s
->dma_dac
.stopped
)
1342 val
|= PCM_ENABLE_OUTPUT
;
1343 spin_unlock_irqrestore(&s
->lock
, flags
);
1344 return put_user(val
, (int *)arg
);
1346 case SNDCTL_DSP_SETTRIGGER
:
1347 if (get_user(val
, (int *)arg
))
1349 if (file
->f_mode
& FMODE_READ
) {
1350 if (val
& PCM_ENABLE_INPUT
)
1355 if (file
->f_mode
& FMODE_WRITE
) {
1356 if (val
& PCM_ENABLE_OUTPUT
)
1363 case SNDCTL_DSP_GETOSPACE
:
1364 if (!(file
->f_mode
& FMODE_WRITE
))
1366 abinfo
.fragsize
= s
->dma_dac
.fragsize
;
1367 spin_lock_irqsave(&s
->lock
, flags
);
1368 count
= s
->dma_dac
.count
;
1369 if (!s
->dma_dac
.stopped
)
1370 count
-= (s
->dma_dac
.fragsize
- inw(s
->io
+IT_AC_PCDL
));
1371 spin_unlock_irqrestore(&s
->lock
, flags
);
1374 abinfo
.bytes
= s
->dma_dac
.dmasize
- count
;
1375 abinfo
.fragstotal
= s
->dma_dac
.numfrag
;
1376 abinfo
.fragments
= abinfo
.bytes
>> s
->dma_dac
.fragshift
;
1377 return copy_to_user((void *)arg
, &abinfo
, sizeof(abinfo
)) ? -EFAULT
: 0;
1379 case SNDCTL_DSP_GETISPACE
:
1380 if (!(file
->f_mode
& FMODE_READ
))
1382 abinfo
.fragsize
= s
->dma_adc
.fragsize
;
1383 spin_lock_irqsave(&s
->lock
, flags
);
1384 count
= s
->dma_adc
.count
;
1385 if (!s
->dma_adc
.stopped
)
1386 count
+= (s
->dma_adc
.fragsize
- inw(s
->io
+IT_AC_CAPCDL
));
1387 spin_unlock_irqrestore(&s
->lock
, flags
);
1390 abinfo
.bytes
= count
;
1391 abinfo
.fragstotal
= s
->dma_adc
.numfrag
;
1392 abinfo
.fragments
= abinfo
.bytes
>> s
->dma_adc
.fragshift
;
1393 return copy_to_user((void *)arg
, &abinfo
, sizeof(abinfo
)) ? -EFAULT
: 0;
1395 case SNDCTL_DSP_NONBLOCK
:
1396 file
->f_flags
|= O_NONBLOCK
;
1399 case SNDCTL_DSP_GETODELAY
:
1400 if (!(file
->f_mode
& FMODE_WRITE
))
1402 spin_lock_irqsave(&s
->lock
, flags
);
1403 count
= s
->dma_dac
.count
;
1404 if (!s
->dma_dac
.stopped
)
1405 count
-= (s
->dma_dac
.fragsize
- inw(s
->io
+IT_AC_PCDL
));
1406 spin_unlock_irqrestore(&s
->lock
, flags
);
1409 return put_user(count
, (int *)arg
);
1411 case SNDCTL_DSP_GETIPTR
:
1412 if (!(file
->f_mode
& FMODE_READ
))
1414 spin_lock_irqsave(&s
->lock
, flags
);
1415 cinfo
.bytes
= s
->dma_adc
.total_bytes
;
1416 count
= s
->dma_adc
.count
;
1417 if (!s
->dma_adc
.stopped
) {
1418 diff
= s
->dma_adc
.fragsize
- inw(s
->io
+IT_AC_CAPCDL
);
1420 cinfo
.bytes
+= diff
;
1421 cinfo
.ptr
= inl(s
->io
+s
->dma_adc
.curBufPtr
) - s
->dma_adc
.dmaaddr
;
1423 cinfo
.ptr
= virt_to_bus(s
->dma_adc
.nextIn
) - s
->dma_adc
.dmaaddr
;
1424 if (s
->dma_adc
.mapped
)
1425 s
->dma_adc
.count
&= s
->dma_adc
.fragsize
-1;
1426 spin_unlock_irqrestore(&s
->lock
, flags
);
1429 cinfo
.blocks
= count
>> s
->dma_adc
.fragshift
;
1430 if (copy_to_user((void *)arg
, &cinfo
, sizeof(cinfo
)))
1434 case SNDCTL_DSP_GETOPTR
:
1435 if (!(file
->f_mode
& FMODE_READ
))
1437 spin_lock_irqsave(&s
->lock
, flags
);
1438 cinfo
.bytes
= s
->dma_dac
.total_bytes
;
1439 count
= s
->dma_dac
.count
;
1440 if (!s
->dma_dac
.stopped
) {
1441 diff
= s
->dma_dac
.fragsize
- inw(s
->io
+IT_AC_CAPCDL
);
1443 cinfo
.bytes
+= diff
;
1444 cinfo
.ptr
= inl(s
->io
+s
->dma_dac
.curBufPtr
) - s
->dma_dac
.dmaaddr
;
1446 cinfo
.ptr
= virt_to_bus(s
->dma_dac
.nextOut
) - s
->dma_dac
.dmaaddr
;
1447 if (s
->dma_dac
.mapped
)
1448 s
->dma_dac
.count
&= s
->dma_dac
.fragsize
-1;
1449 spin_unlock_irqrestore(&s
->lock
, flags
);
1452 cinfo
.blocks
= count
>> s
->dma_dac
.fragshift
;
1453 if (copy_to_user((void *)arg
, &cinfo
, sizeof(cinfo
)))
1457 case SNDCTL_DSP_GETBLKSIZE
:
1458 if (file
->f_mode
& FMODE_WRITE
)
1459 return put_user(s
->dma_dac
.fragsize
, (int *)arg
);
1461 return put_user(s
->dma_adc
.fragsize
, (int *)arg
);
1463 case SNDCTL_DSP_SETFRAGMENT
:
1464 if (get_user(val
, (int *)arg
))
1466 if (file
->f_mode
& FMODE_READ
) {
1468 s
->dma_adc
.ossfragshift
= val
& 0xffff;
1469 s
->dma_adc
.ossmaxfrags
= (val
>> 16) & 0xffff;
1470 if (s
->dma_adc
.ossfragshift
< 4)
1471 s
->dma_adc
.ossfragshift
= 4;
1472 if (s
->dma_adc
.ossfragshift
> 15)
1473 s
->dma_adc
.ossfragshift
= 15;
1474 if (s
->dma_adc
.ossmaxfrags
< 4)
1475 s
->dma_adc
.ossmaxfrags
= 4;
1476 if ((ret
= prog_dmabuf_adc(s
)))
1479 if (file
->f_mode
& FMODE_WRITE
) {
1481 s
->dma_dac
.ossfragshift
= val
& 0xffff;
1482 s
->dma_dac
.ossmaxfrags
= (val
>> 16) & 0xffff;
1483 if (s
->dma_dac
.ossfragshift
< 4)
1484 s
->dma_dac
.ossfragshift
= 4;
1485 if (s
->dma_dac
.ossfragshift
> 15)
1486 s
->dma_dac
.ossfragshift
= 15;
1487 if (s
->dma_dac
.ossmaxfrags
< 4)
1488 s
->dma_dac
.ossmaxfrags
= 4;
1489 if ((ret
= prog_dmabuf_dac(s
)))
1494 case SNDCTL_DSP_SUBDIVIDE
:
1495 if ((file
->f_mode
& FMODE_READ
&& s
->dma_adc
.subdivision
) ||
1496 (file
->f_mode
& FMODE_WRITE
&& s
->dma_dac
.subdivision
))
1498 if (get_user(val
, (int *)arg
))
1500 if (val
!= 1 && val
!= 2 && val
!= 4)
1502 if (file
->f_mode
& FMODE_READ
) {
1504 s
->dma_adc
.subdivision
= val
;
1505 if ((ret
= prog_dmabuf_adc(s
)))
1508 if (file
->f_mode
& FMODE_WRITE
) {
1510 s
->dma_dac
.subdivision
= val
;
1511 if ((ret
= prog_dmabuf_dac(s
)))
1516 case SOUND_PCM_READ_RATE
:
1517 return put_user((file
->f_mode
& FMODE_READ
) ?
1518 s
->adcrate
: s
->dacrate
, (int *)arg
);
1520 case SOUND_PCM_READ_CHANNELS
:
1521 if (file
->f_mode
& FMODE_READ
)
1522 return put_user((s
->capcc
& CC_SM
) ? 2 : 1, (int *)arg
);
1524 return put_user((s
->pcc
& CC_SM
) ? 2 : 1, (int *)arg
);
1526 case SOUND_PCM_READ_BITS
:
1527 if (file
->f_mode
& FMODE_READ
)
1528 return put_user((s
->capcc
& CC_DF
) ? 16 : 8, (int *)arg
);
1530 return put_user((s
->pcc
& CC_DF
) ? 16 : 8, (int *)arg
);
1532 case SOUND_PCM_WRITE_FILTER
:
1533 case SNDCTL_DSP_SETSYNCRO
:
1534 case SOUND_PCM_READ_FILTER
:
1538 return mixdev_ioctl(&s
->codec
, cmd
, arg
);
1542 static int it8172_open(struct inode
*inode
, struct file
*file
)
1544 int minor
= minor(inode
->i_rdev
);
1545 DECLARE_WAITQUEUE(wait
, current
);
1546 unsigned long flags
;
1547 struct list_head
*list
;
1548 struct it8172_state
*s
;
1551 for (list
= devs
.next
; ; list
= list
->next
) {
1554 s
= list_entry(list
, struct it8172_state
, devs
);
1555 if (!((s
->dev_audio
^ minor
) & ~0xf))
1558 file
->private_data
= s
;
1559 /* wait for device to become free */
1561 while (s
->open_mode
& file
->f_mode
) {
1562 if (file
->f_flags
& O_NONBLOCK
) {
1566 add_wait_queue(&s
->open_wait
, &wait
);
1567 __set_current_state(TASK_INTERRUPTIBLE
);
1570 remove_wait_queue(&s
->open_wait
, &wait
);
1571 set_current_state(TASK_RUNNING
);
1572 if (signal_pending(current
))
1573 return -ERESTARTSYS
;
1577 spin_lock_irqsave(&s
->lock
, flags
);
1579 if (file
->f_mode
& FMODE_READ
) {
1580 s
->dma_adc
.ossfragshift
= s
->dma_adc
.ossmaxfrags
=
1581 s
->dma_adc
.subdivision
= s
->dma_adc
.total_bytes
= 0;
1582 s
->capcc
&= ~(CC_SM
| CC_DF
);
1583 set_adc_rate(s
, 8000);
1584 if ((minor
& 0xf) == SND_DEV_DSP16
)
1586 outw(s
->capcc
, s
->io
+IT_AC_CAPCC
);
1587 if ((ret
= prog_dmabuf_adc(s
)))
1590 if (file
->f_mode
& FMODE_WRITE
) {
1591 s
->dma_dac
.ossfragshift
= s
->dma_dac
.ossmaxfrags
=
1592 s
->dma_dac
.subdivision
= s
->dma_dac
.total_bytes
= 0;
1593 s
->pcc
&= ~(CC_SM
| CC_DF
);
1594 set_dac_rate(s
, 8000);
1595 if ((minor
& 0xf) == SND_DEV_DSP16
)
1597 outw(s
->pcc
, s
->io
+IT_AC_PCC
);
1598 if ((ret
= prog_dmabuf_dac(s
)))
1602 spin_unlock_irqrestore(&s
->lock
, flags
);
1604 s
->open_mode
|= file
->f_mode
& (FMODE_READ
| FMODE_WRITE
);
1609 static int it8172_release(struct inode
*inode
, struct file
*file
)
1611 struct it8172_state
*s
= (struct it8172_state
*)file
->private_data
;
1614 if (file
->f_mode
& FMODE_WRITE
)
1615 drain_dac(s
, file
->f_flags
& O_NONBLOCK
);
1617 if (file
->f_mode
& FMODE_WRITE
) {
1619 dealloc_dmabuf(s
, &s
->dma_dac
);
1621 if (file
->f_mode
& FMODE_READ
) {
1623 dealloc_dmabuf(s
, &s
->dma_adc
);
1625 s
->open_mode
&= (~file
->f_mode
) & (FMODE_READ
|FMODE_WRITE
);
1627 wake_up(&s
->open_wait
);
1632 static /*const*/ struct file_operations it8172_audio_fops
= {
1636 write
: it8172_write
,
1638 ioctl
: it8172_ioctl
,
1641 release
: it8172_release
,
1645 /* --------------------------------------------------------------------- */
1648 /* --------------------------------------------------------------------- */
1651 * for debugging purposes, we'll create a proc device that dumps the
1656 static int proc_it8172_dump (char *buf
, char **start
, off_t fpos
,
1657 int length
, int *eof
, void *data
)
1659 struct it8172_state
*s
;
1662 if (list_empty(&devs
))
1664 s
= list_entry(devs
.next
, struct it8172_state
, devs
);
1666 /* print out header */
1667 len
+= sprintf(buf
+ len
, "\n\t\tIT8172 Audio Debug\n\n");
1669 // print out digital controller state
1670 len
+= sprintf (buf
+ len
, "IT8172 Audio Controller registers\n");
1671 len
+= sprintf (buf
+ len
, "---------------------------------\n");
1673 while (cnt
< 0x72) {
1674 if (cnt
== IT_AC_PCB1STA
|| cnt
== IT_AC_PCB2STA
||
1675 cnt
== IT_AC_CAPB1STA
|| cnt
== IT_AC_CAPB2STA
||
1676 cnt
== IT_AC_PFDP
) {
1677 len
+= sprintf (buf
+ len
, "reg %02x = %08x\n",
1678 cnt
, inl(s
->io
+cnt
));
1681 len
+= sprintf (buf
+ len
, "reg %02x = %04x\n",
1682 cnt
, inw(s
->io
+cnt
));
1687 /* print out CODEC state */
1688 len
+= sprintf (buf
+ len
, "\nAC97 CODEC registers\n");
1689 len
+= sprintf (buf
+ len
, "----------------------\n");
1690 for (cnt
=0; cnt
<= 0x7e; cnt
= cnt
+2)
1691 len
+= sprintf (buf
+ len
, "reg %02x = %04x\n",
1692 cnt
, rdcodec(&s
->codec
, cnt
));
1699 *start
= buf
+ fpos
;
1700 if ((len
-= fpos
) > length
)
1706 #endif /* IT8172_DEBUG */
1708 /* --------------------------------------------------------------------- */
1710 /* maximum number of devices; only used for command line params */
1713 static int spdif
[NR_DEVICE
] = { 0, };
1715 static unsigned int devindex
= 0;
1717 MODULE_PARM(spdif
, "1-" __MODULE_STRING(NR_DEVICE
) "i");
1718 MODULE_PARM_DESC(spdif
, "if 1 the S/PDIF digital output is enabled");
1720 MODULE_AUTHOR("Monta Vista Software, stevel@mvista.com");
1721 MODULE_DESCRIPTION("IT8172 AudioPCI97 Driver");
1722 MODULE_LICENSE("GPL");
1724 /* --------------------------------------------------------------------- */
1726 static int __devinit
it8172_probe(struct pci_dev
*pcidev
,
1727 const struct pci_device_id
*pciid
)
1729 struct it8172_state
*s
;
1731 unsigned short pcisr
, vol
;
1732 unsigned char legacy
, imc
;
1735 if (pcidev
->irq
== 0)
1738 if (!(s
= kmalloc(sizeof(struct it8172_state
), GFP_KERNEL
))) {
1739 printk(KERN_ERR PFX
"alloc of device struct failed\n");
1743 memset(s
, 0, sizeof(struct it8172_state
));
1744 init_waitqueue_head(&s
->dma_adc
.wait
);
1745 init_waitqueue_head(&s
->dma_dac
.wait
);
1746 init_waitqueue_head(&s
->open_wait
);
1747 init_MUTEX(&s
->open_sem
);
1748 spin_lock_init(&s
->lock
);
1750 s
->io
= pci_resource_start(pcidev
, 0);
1751 s
->irq
= pcidev
->irq
;
1752 s
->vendor
= pcidev
->vendor
;
1753 s
->device
= pcidev
->device
;
1754 pci_read_config_byte(pcidev
, PCI_REVISION_ID
, &s
->rev
);
1755 s
->codec
.private_data
= s
;
1757 s
->codec
.codec_read
= rdcodec
;
1758 s
->codec
.codec_write
= wrcodec
;
1759 s
->codec
.codec_wait
= waitcodec
;
1761 if (!request_region(s
->io
, pci_resource_len(pcidev
,0),
1762 IT8172_MODULE_NAME
)) {
1763 printk(KERN_ERR PFX
"io ports %#lx->%#lx in use\n",
1764 s
->io
, s
->io
+ pci_resource_len(pcidev
,0)-1);
1767 if (request_irq(s
->irq
, it8172_interrupt
, SA_INTERRUPT
,
1768 IT8172_MODULE_NAME
, s
)) {
1769 printk(KERN_ERR PFX
"irq %u in use\n", s
->irq
);
1773 printk(KERN_INFO PFX
"IO at %#lx, IRQ %d\n", s
->io
, s
->irq
);
1775 /* register devices */
1776 if ((s
->dev_audio
= register_sound_dsp(&it8172_audio_fops
, -1)) < 0)
1778 if ((s
->codec
.dev_mixer
=
1779 register_sound_mixer(&it8172_mixer_fops
, -1)) < 0)
1783 /* intialize the debug proc device */
1784 s
->ps
= create_proc_read_entry(IT8172_MODULE_NAME
, 0, NULL
,
1785 proc_it8172_dump
, NULL
);
1786 #endif /* IT8172_DEBUG */
1789 * Reset the Audio device using the IT8172 PCI Reset register. This
1790 * creates an audible double click on a speaker connected to Line-out.
1792 IT_IO_READ16(IT_PM_PCISR
, pcisr
);
1793 pcisr
|= IT_PM_PCISR_ACSR
;
1794 IT_IO_WRITE16(IT_PM_PCISR
, pcisr
);
1795 /* wait up to 100msec for reset to complete */
1796 for (i
=0; pcisr
& IT_PM_PCISR_ACSR
; i
++) {
1800 IT_IO_READ16(IT_PM_PCISR
, pcisr
);
1803 printk(KERN_ERR PFX
"chip reset timeout!\n");
1807 /* enable pci io and bus mastering */
1808 if (pci_enable_device(pcidev
))
1810 pci_set_master(pcidev
);
1812 /* get out of legacy mode */
1813 pci_read_config_byte (pcidev
, 0x40, &legacy
);
1814 pci_write_config_byte (pcidev
, 0x40, legacy
& ~1);
1816 s
->spdif_volume
= -1;
1817 /* check to see if s/pdif mode is being requested */
1818 if (spdif
[devindex
]) {
1819 printk(KERN_INFO PFX
"enabling S/PDIF output\n");
1820 s
->spdif_volume
= 0;
1821 outb(GC_SOE
, s
->io
+IT_AC_GC
);
1823 printk(KERN_INFO PFX
"disabling S/PDIF output\n");
1824 outb(0, s
->io
+IT_AC_GC
);
1827 /* cold reset the AC97 */
1828 outw(CODECC_CR
, s
->io
+IT_AC_CODECC
);
1830 outw(0, s
->io
+IT_AC_CODECC
);
1831 /* need to delay around 500msec(bleech) to give
1832 some CODECs enough time to wakeup */
1835 /* AC97 warm reset to start the bitclk */
1836 outw(CODECC_WR
, s
->io
+IT_AC_CODECC
);
1838 outw(0, s
->io
+IT_AC_CODECC
);
1841 if (!ac97_probe_codec(&s
->codec
))
1844 /* Enable Volume button interrupts */
1845 imc
= inb(s
->io
+IT_AC_IMC
);
1846 outb(imc
& ~IMC_VCIM
, s
->io
+IT_AC_IMC
);
1848 /* Un-mute PCM and FM out on the controller */
1849 vol
= inw(s
->io
+IT_AC_PCMOV
);
1850 outw(vol
& ~PCMOV_PCMOM
, s
->io
+IT_AC_PCMOV
);
1851 vol
= inw(s
->io
+IT_AC_FMOV
);
1852 outw(vol
& ~FMOV_FMOM
, s
->io
+IT_AC_FMOV
);
1854 /* set channel defaults to 8-bit, mono, 8 Khz */
1857 set_dac_rate(s
, 8000);
1858 set_adc_rate(s
, 8000);
1860 /* set mic to be the recording source */
1861 val
= SOUND_MASK_MIC
;
1862 mixdev_ioctl(&s
->codec
, SOUND_MIXER_WRITE_RECSRC
, (unsigned long)&val
);
1864 /* mute master and PCM when in S/PDIF mode */
1865 if (s
->spdif_volume
!= -1) {
1867 mixdev_ioctl(&s
->codec
, SOUND_MIXER_WRITE_VOLUME
,
1868 (unsigned long)&val
);
1869 mixdev_ioctl(&s
->codec
, SOUND_MIXER_WRITE_PCM
,
1870 (unsigned long)&val
);
1874 sprintf(proc_str
, "driver/%s/%d/ac97", IT8172_MODULE_NAME
, s
->codec
.id
);
1875 s
->ac97_ps
= create_proc_read_entry (proc_str
, 0, NULL
,
1876 ac97_read_proc
, &s
->codec
);
1879 /* store it in the driver field */
1880 pci_set_drvdata(pcidev
, s
);
1881 pcidev
->dma_mask
= 0xffffffff;
1882 /* put it into driver list */
1883 list_add_tail(&s
->devs
, &devs
);
1884 /* increment devindex */
1885 if (devindex
< NR_DEVICE
-1)
1890 unregister_sound_mixer(s
->codec
.dev_mixer
);
1892 unregister_sound_dsp(s
->dev_audio
);
1894 printk(KERN_ERR PFX
"cannot register misc device\n");
1895 free_irq(s
->irq
, s
);
1897 release_region(s
->io
, pci_resource_len(pcidev
,0));
1903 static void __devinit
it8172_remove(struct pci_dev
*dev
)
1905 struct it8172_state
*s
= pci_get_drvdata(dev
);
1912 remove_proc_entry(IT8172_MODULE_NAME
, NULL
);
1913 #endif /* IT8172_DEBUG */
1914 synchronize_irq(s
->irq
);
1915 free_irq(s
->irq
, s
);
1916 release_region(s
->io
, pci_resource_len(dev
,0));
1917 unregister_sound_dsp(s
->dev_audio
);
1918 unregister_sound_mixer(s
->codec
.dev_mixer
);
1920 pci_set_drvdata(dev
, NULL
);
1925 static struct pci_device_id id_table
[] __devinitdata
= {
1926 { PCI_VENDOR_ID_ITE
, PCI_DEVICE_ID_ITE_IT8172G_AUDIO
, PCI_ANY_ID
,
1931 MODULE_DEVICE_TABLE(pci
, id_table
);
1933 static struct pci_driver it8172_driver
= {
1934 name
: IT8172_MODULE_NAME
,
1936 probe
: it8172_probe
,
1937 remove
: it8172_remove
1940 static int __init
init_it8172(void)
1942 if (!pci_present()) /* No PCI bus in this machine! */
1944 printk("version v0.26 time " __TIME__
" " __DATE__
"\n");
1945 return pci_module_init(&it8172_driver
);
1948 static void __exit
cleanup_it8172(void)
1950 printk(KERN_INFO PFX
"unloading\n");
1951 pci_unregister_driver(&it8172_driver
);
1954 module_init(init_it8172
);
1955 module_exit(cleanup_it8172
);