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[PATCH] CREDITS update
[linux-2.6/history.git] / drivers / pcmcia / yenta_socket.c
blob4c8a7a5724d615a5755e1dcfd4b6dec49f2617e2
1 /*
2 * Regular cardbus driver ("yenta_socket")
3 *
4 * (C) Copyright 1999, 2000 Linus Torvalds
5 *
6 * Changelog:
7 * Aug 2002: Manfred Spraul <manfred@colorfullife.com>
8 * Dynamically adjust the size of the bridge resource
9 *
10 * May 2003: Dominik Brodowski <linux@brodo.de>
11 * Merge pci_socket.c and yenta.c into one file
12 */
13 #include <linux/init.h>
14 #include <linux/pci.h>
15 #include <linux/sched.h>
16 #include <linux/workqueue.h>
17 #include <linux/interrupt.h>
18 #include <linux/delay.h>
19 #include <linux/module.h>
20
21 #include <pcmcia/version.h>
22 #include <pcmcia/cs_types.h>
23 #include <pcmcia/ss.h>
24 #include <pcmcia/cs.h>
25
26 #include <asm/io.h>
27
28 #include "yenta_socket.h"
29 #include "i82365.h"
30
31
32 #if 0
33 #define debug(x,args...) printk(KERN_DEBUG "%s: " x, __func__ , ##args)
34 #else
35 #define debug(x,args...)
36 #endif
37
38 /* Don't ask.. */
39 #define to_cycles(ns) ((ns)/120)
40 #define to_ns(cycles) ((cycles)*120)
41
42 static int yenta_probe_cb_irq(struct yenta_socket *socket);
43
44
45 /*
46 * Generate easy-to-use ways of reading a cardbus sockets
47 * regular memory space ("cb_xxx"), configuration space
48 * ("config_xxx") and compatibility space ("exca_xxxx")
49 */
50 static inline u32 cb_readl(struct yenta_socket *socket, unsigned reg)
51 {
52 u32 val = readl(socket->base + reg);
53 debug("%p %04x %08x\n", socket, reg, val);
54 return val;
55 }
56
57 static inline void cb_writel(struct yenta_socket *socket, unsigned reg, u32 val)
58 {
59 debug("%p %04x %08x\n", socket, reg, val);
60 writel(val, socket->base + reg);
61 }
62
63 static inline u8 config_readb(struct yenta_socket *socket, unsigned offset)
64 {
65 u8 val;
66 pci_read_config_byte(socket->dev, offset, &val);
67 debug("%p %04x %02x\n", socket, offset, val);
68 return val;
69 }
70
71 static inline u16 config_readw(struct yenta_socket *socket, unsigned offset)
72 {
73 u16 val;
74 pci_read_config_word(socket->dev, offset, &val);
75 debug("%p %04x %04x\n", socket, offset, val);
76 return val;
77 }
78
79 static inline u32 config_readl(struct yenta_socket *socket, unsigned offset)
80 {
81 u32 val;
82 pci_read_config_dword(socket->dev, offset, &val);
83 debug("%p %04x %08x\n", socket, offset, val);
84 return val;
85 }
86
87 static inline void config_writeb(struct yenta_socket *socket, unsigned offset, u8 val)
88 {
89 debug("%p %04x %02x\n", socket, offset, val);
90 pci_write_config_byte(socket->dev, offset, val);
91 }
92
93 static inline void config_writew(struct yenta_socket *socket, unsigned offset, u16 val)
94 {
95 debug("%p %04x %04x\n", socket, offset, val);
96 pci_write_config_word(socket->dev, offset, val);
97 }
98
99 static inline void config_writel(struct yenta_socket *socket, unsigned offset, u32 val)
100 {
101 debug("%p %04x %08x\n", socket, offset, val);
102 pci_write_config_dword(socket->dev, offset, val);
103 }
104
105 static inline u8 exca_readb(struct yenta_socket *socket, unsigned reg)
106 {
107 u8 val = readb(socket->base + 0x800 + reg);
108 debug("%p %04x %02x\n", socket, reg, val);
109 return val;
110 }
111
112 static inline u8 exca_readw(struct yenta_socket *socket, unsigned reg)
113 {
114 u16 val;
115 val = readb(socket->base + 0x800 + reg);
116 val |= readb(socket->base + 0x800 + reg + 1) << 8;
117 debug("%p %04x %04x\n", socket, reg, val);
118 return val;
119 }
120
121 static inline void exca_writeb(struct yenta_socket *socket, unsigned reg, u8 val)
122 {
123 debug("%p %04x %02x\n", socket, reg, val);
124 writeb(val, socket->base + 0x800 + reg);
125 }
126
127 static void exca_writew(struct yenta_socket *socket, unsigned reg, u16 val)
128 {
129 debug("%p %04x %04x\n", socket, reg, val);
130 writeb(val, socket->base + 0x800 + reg);
131 writeb(val >> 8, socket->base + 0x800 + reg + 1);
132 }
133
134 /*
135 * Ugh, mixed-mode cardbus and 16-bit pccard state: things depend
136 * on what kind of card is inserted..
137 */
138 static int yenta_get_status(struct pcmcia_socket *sock, unsigned int *value)
139 {
140 struct yenta_socket *socket = container_of(sock, struct yenta_socket, socket);
141 unsigned int val;
142 u32 state = cb_readl(socket, CB_SOCKET_STATE);
143
144 val = (state & CB_3VCARD) ? SS_3VCARD : 0;
145 val |= (state & CB_XVCARD) ? SS_XVCARD : 0;
146 val |= (state & (CB_CDETECT1 | CB_CDETECT2 | CB_5VCARD | CB_3VCARD
147 | CB_XVCARD | CB_YVCARD)) ? 0 : SS_PENDING;
148
149 if (state & CB_CBCARD) {
150 val |= SS_CARDBUS;
151 val |= (state & CB_CARDSTS) ? SS_STSCHG : 0;
152 val |= (state & (CB_CDETECT1 | CB_CDETECT2)) ? 0 : SS_DETECT;
153 val |= (state & CB_PWRCYCLE) ? SS_POWERON | SS_READY : 0;
154 } else {
155 u8 status = exca_readb(socket, I365_STATUS);
156 val |= ((status & I365_CS_DETECT) == I365_CS_DETECT) ? SS_DETECT : 0;
157 if (exca_readb(socket, I365_INTCTL) & I365_PC_IOCARD) {
158 val |= (status & I365_CS_STSCHG) ? 0 : SS_STSCHG;
159 } else {
160 val |= (status & I365_CS_BVD1) ? 0 : SS_BATDEAD;
161 val |= (status & I365_CS_BVD2) ? 0 : SS_BATWARN;
162 }
163 val |= (status & I365_CS_WRPROT) ? SS_WRPROT : 0;
164 val |= (status & I365_CS_READY) ? SS_READY : 0;
165 val |= (status & I365_CS_POWERON) ? SS_POWERON : 0;
166 }
167
168 *value = val;
169 return 0;
170 }
171
172 static int yenta_Vcc_power(u32 control)
173 {
174 switch (control & CB_SC_VCC_MASK) {
175 case CB_SC_VCC_5V: return 50;
176 case CB_SC_VCC_3V: return 33;
177 default: return 0;
178 }
179 }
180
181 static int yenta_Vpp_power(u32 control)
182 {
183 switch (control & CB_SC_VPP_MASK) {
184 case CB_SC_VPP_12V: return 120;
185 case CB_SC_VPP_5V: return 50;
186 case CB_SC_VPP_3V: return 33;
187 default: return 0;
188 }
189 }
190
191 static int yenta_get_socket(struct pcmcia_socket *sock, socket_state_t *state)
192 {
193 struct yenta_socket *socket = container_of(sock, struct yenta_socket, socket);
194 u8 reg;
195 u32 control;
196
197 control = cb_readl(socket, CB_SOCKET_CONTROL);
198
199 state->Vcc = yenta_Vcc_power(control);
200 state->Vpp = yenta_Vpp_power(control);
201 state->io_irq = socket->io_irq;
202
203 if (cb_readl(socket, CB_SOCKET_STATE) & CB_CBCARD) {
204 u16 bridge = config_readw(socket, CB_BRIDGE_CONTROL);
205 if (bridge & CB_BRIDGE_CRST)
206 state->flags |= SS_RESET;
207 return 0;
208 }
209
210 /* 16-bit card state.. */
211 reg = exca_readb(socket, I365_POWER);
212 state->flags = (reg & I365_PWR_AUTO) ? SS_PWR_AUTO : 0;
213 state->flags |= (reg & I365_PWR_OUT) ? SS_OUTPUT_ENA : 0;
214
215 reg = exca_readb(socket, I365_INTCTL);
216 state->flags |= (reg & I365_PC_RESET) ? 0 : SS_RESET;
217 state->flags |= (reg & I365_PC_IOCARD) ? SS_IOCARD : 0;
218
219 reg = exca_readb(socket, I365_CSCINT);
220 state->csc_mask = (reg & I365_CSC_DETECT) ? SS_DETECT : 0;
221 if (state->flags & SS_IOCARD) {
222 state->csc_mask |= (reg & I365_CSC_STSCHG) ? SS_STSCHG : 0;
223 } else {
224 state->csc_mask |= (reg & I365_CSC_BVD1) ? SS_BATDEAD : 0;
225 state->csc_mask |= (reg & I365_CSC_BVD2) ? SS_BATWARN : 0;
226 state->csc_mask |= (reg & I365_CSC_READY) ? SS_READY : 0;
227 }
228
229 return 0;
230 }
231
232 static void yenta_set_power(struct yenta_socket *socket, socket_state_t *state)
233 {
234 u32 reg = 0; /* CB_SC_STPCLK? */
235 switch (state->Vcc) {
236 case 33: reg = CB_SC_VCC_3V; break;
237 case 50: reg = CB_SC_VCC_5V; break;
238 default: reg = 0; break;
239 }
240 switch (state->Vpp) {
241 case 33: reg |= CB_SC_VPP_3V; break;
242 case 50: reg |= CB_SC_VPP_5V; break;
243 case 120: reg |= CB_SC_VPP_12V; break;
244 }
245 if (reg != cb_readl(socket, CB_SOCKET_CONTROL))
246 cb_writel(socket, CB_SOCKET_CONTROL, reg);
247 }
248
249 static int yenta_set_socket(struct pcmcia_socket *sock, socket_state_t *state)
250 {
251 struct yenta_socket *socket = container_of(sock, struct yenta_socket, socket);
252 u16 bridge;
253
254 yenta_set_power(socket, state);
255 socket->io_irq = state->io_irq;
256 bridge = config_readw(socket, CB_BRIDGE_CONTROL) & ~(CB_BRIDGE_CRST | CB_BRIDGE_INTR);
257 if (cb_readl(socket, CB_SOCKET_STATE) & CB_CBCARD) {
258 u8 intr;
259 bridge |= (state->flags & SS_RESET) ? CB_BRIDGE_CRST : 0;
260
261 /* ISA interrupt control? */
262 intr = exca_readb(socket, I365_INTCTL);
263 intr = (intr & ~0xf);
264 if (!socket->cb_irq) {
265 intr |= state->io_irq;
266 bridge |= CB_BRIDGE_INTR;
267 }
268 exca_writeb(socket, I365_INTCTL, intr);
269 } else {
270 u8 reg;
271
272 reg = exca_readb(socket, I365_INTCTL) & (I365_RING_ENA | I365_INTR_ENA);
273 reg |= (state->flags & SS_RESET) ? 0 : I365_PC_RESET;
274 reg |= (state->flags & SS_IOCARD) ? I365_PC_IOCARD : 0;
275 if (state->io_irq != socket->cb_irq) {
276 reg |= state->io_irq;
277 bridge |= CB_BRIDGE_INTR;
278 }
279 exca_writeb(socket, I365_INTCTL, reg);
280
281 reg = exca_readb(socket, I365_POWER) & (I365_VCC_MASK|I365_VPP1_MASK);
282 reg |= I365_PWR_NORESET;
283 if (state->flags & SS_PWR_AUTO) reg |= I365_PWR_AUTO;
284 if (state->flags & SS_OUTPUT_ENA) reg |= I365_PWR_OUT;
285 if (exca_readb(socket, I365_POWER) != reg)
286 exca_writeb(socket, I365_POWER, reg);
287
288 /* CSC interrupt: no ISA irq for CSC */
289 reg = I365_CSC_DETECT;
290 if (state->flags & SS_IOCARD) {
291 if (state->csc_mask & SS_STSCHG) reg |= I365_CSC_STSCHG;
292 } else {
293 if (state->csc_mask & SS_BATDEAD) reg |= I365_CSC_BVD1;
294 if (state->csc_mask & SS_BATWARN) reg |= I365_CSC_BVD2;
295 if (state->csc_mask & SS_READY) reg |= I365_CSC_READY;
296 }
297 exca_writeb(socket, I365_CSCINT, reg);
298 exca_readb(socket, I365_CSC);
299 if(sock->zoom_video)
300 sock->zoom_video(sock, state->flags & SS_ZVCARD);
301 }
302 config_writew(socket, CB_BRIDGE_CONTROL, bridge);
303 /* Socket event mask: get card insert/remove events.. */
304 cb_writel(socket, CB_SOCKET_EVENT, -1);
305 cb_writel(socket, CB_SOCKET_MASK, CB_CDMASK);
306 return 0;
307 }
308
309 static int yenta_set_io_map(struct pcmcia_socket *sock, struct pccard_io_map *io)
310 {
311 struct yenta_socket *socket = container_of(sock, struct yenta_socket, socket);
312 int map;
313 unsigned char ioctl, addr, enable;
314
315 map = io->map;
316
317 if (map > 1)
318 return -EINVAL;
319
320 enable = I365_ENA_IO(map);
321 addr = exca_readb(socket, I365_ADDRWIN);
322
323 /* Disable the window before changing it.. */
324 if (addr & enable) {
325 addr &= ~enable;
326 exca_writeb(socket, I365_ADDRWIN, addr);
327 }
328
329 exca_writew(socket, I365_IO(map)+I365_W_START, io->start);
330 exca_writew(socket, I365_IO(map)+I365_W_STOP, io->stop);
331
332 ioctl = exca_readb(socket, I365_IOCTL) & ~I365_IOCTL_MASK(map);
333 if (io->flags & MAP_0WS) ioctl |= I365_IOCTL_0WS(map);
334 if (io->flags & MAP_16BIT) ioctl |= I365_IOCTL_16BIT(map);
335 if (io->flags & MAP_AUTOSZ) ioctl |= I365_IOCTL_IOCS16(map);
336 exca_writeb(socket, I365_IOCTL, ioctl);
337
338 if (io->flags & MAP_ACTIVE)
339 exca_writeb(socket, I365_ADDRWIN, addr | enable);
340 return 0;
341 }
342
343 static int yenta_set_mem_map(struct pcmcia_socket *sock, struct pccard_mem_map *mem)
344 {
345 struct yenta_socket *socket = container_of(sock, struct yenta_socket, socket);
346 int map;
347 unsigned char addr, enable;
348 unsigned int start, stop, card_start;
349 unsigned short word;
350
351 map = mem->map;
352 start = mem->sys_start;
353 stop = mem->sys_stop;
354 card_start = mem->card_start;
355
356 if (map > 4 || start > stop || ((start ^ stop) >> 24) ||
357 (card_start >> 26) || mem->speed > 1000)
358 return -EINVAL;
359
360 enable = I365_ENA_MEM(map);
361 addr = exca_readb(socket, I365_ADDRWIN);
362 if (addr & enable) {
363 addr &= ~enable;
364 exca_writeb(socket, I365_ADDRWIN, addr);
365 }
366
367 exca_writeb(socket, CB_MEM_PAGE(map), start >> 24);
368
369 word = (start >> 12) & 0x0fff;
370 if (mem->flags & MAP_16BIT)
371 word |= I365_MEM_16BIT;
372 if (mem->flags & MAP_0WS)
373 word |= I365_MEM_0WS;
374 exca_writew(socket, I365_MEM(map) + I365_W_START, word);
375
376 word = (stop >> 12) & 0x0fff;
377 switch (to_cycles(mem->speed)) {
378 case 0: break;
379 case 1: word |= I365_MEM_WS0; break;
380 case 2: word |= I365_MEM_WS1; break;
381 default: word |= I365_MEM_WS1 | I365_MEM_WS0; break;
382 }
383 exca_writew(socket, I365_MEM(map) + I365_W_STOP, word);
384
385 word = ((card_start - start) >> 12) & 0x3fff;
386 if (mem->flags & MAP_WRPROT)
387 word |= I365_MEM_WRPROT;
388 if (mem->flags & MAP_ATTRIB)
389 word |= I365_MEM_REG;
390 exca_writew(socket, I365_MEM(map) + I365_W_OFF, word);
391
392 if (mem->flags & MAP_ACTIVE)
393 exca_writeb(socket, I365_ADDRWIN, addr | enable);
394 return 0;
395 }
396
397
398 static unsigned int yenta_events(struct yenta_socket *socket)
399 {
400 u8 csc;
401 u32 cb_event;
402 unsigned int events;
403
404 /* Clear interrupt status for the event */
405 cb_event = cb_readl(socket, CB_SOCKET_EVENT);
406 cb_writel(socket, CB_SOCKET_EVENT, cb_event);
407
408 csc = exca_readb(socket, I365_CSC);
409
410 events = (cb_event & (CB_CD1EVENT | CB_CD2EVENT)) ? SS_DETECT : 0 ;
411 events |= (csc & I365_CSC_DETECT) ? SS_DETECT : 0;
412 if (exca_readb(socket, I365_INTCTL) & I365_PC_IOCARD) {
413 events |= (csc & I365_CSC_STSCHG) ? SS_STSCHG : 0;
414 } else {
415 events |= (csc & I365_CSC_BVD1) ? SS_BATDEAD : 0;
416 events |= (csc & I365_CSC_BVD2) ? SS_BATWARN : 0;
417 events |= (csc & I365_CSC_READY) ? SS_READY : 0;
418 }
419 return events;
420 }
421
422
423 static irqreturn_t yenta_interrupt(int irq, void *dev_id, struct pt_regs *regs)
424 {
425 unsigned int events;
426 struct yenta_socket *socket = (struct yenta_socket *) dev_id;
427
428 events = yenta_events(socket);
429 if (events) {
430 pcmcia_parse_events(&socket->socket, events);
431 return IRQ_HANDLED;
432 }
433 return IRQ_NONE;
434 }
435
436 static void yenta_interrupt_wrapper(unsigned long data)
437 {
438 struct yenta_socket *socket = (struct yenta_socket *) data;
439
440 yenta_interrupt(0, (void *)socket, NULL);
441 socket->poll_timer.expires = jiffies + HZ;
442 add_timer(&socket->poll_timer);
443 }
444
445 static void yenta_clear_maps(struct yenta_socket *socket)
446 {
447 int i;
448 struct resource res = { .start = 0, .end = 0x0fff };
449 pccard_io_map io = { 0, 0, 0, 0, 1 };
450 pccard_mem_map mem = { .res = &res, .sys_stop = 0x0fff, };
451
452 yenta_set_socket(&socket->socket, &dead_socket);
453 for (i = 0; i < 2; i++) {
454 io.map = i;
455 yenta_set_io_map(&socket->socket, &io);
456 }
457 for (i = 0; i < 5; i++) {
458 mem.map = i;
459 yenta_set_mem_map(&socket->socket, &mem);
460 }
461 }
462
463 /* Called at resume and initialization events */
464 static int yenta_sock_init(struct pcmcia_socket *sock)
465 {
466 struct yenta_socket *socket = container_of(sock, struct yenta_socket, socket);
467 u32 state;
468 u16 bridge;
469
470 bridge = config_readw(socket, CB_BRIDGE_CONTROL) & ~CB_BRIDGE_INTR;
471 if (!socket->cb_irq)
472 bridge |= CB_BRIDGE_INTR;
473 config_writew(socket, CB_BRIDGE_CONTROL, bridge);
474
475 exca_writeb(socket, I365_GBLCTL, 0x00);
476 exca_writeb(socket, I365_GENCTL, 0x00);
477
478 /* Redo card voltage interrogation */
479 state = cb_readl(socket, CB_SOCKET_STATE);
480 if (!(state & (CB_CDETECT1 | CB_CDETECT2 | CB_5VCARD |
481 CB_3VCARD | CB_XVCARD | CB_YVCARD)))
482 cb_writel(socket, CB_SOCKET_FORCE, CB_CVSTEST);
483
484 yenta_clear_maps(socket);
485
486 if (socket->type && socket->type->sock_init)
487 socket->type->sock_init(socket);
488
489 /* Re-enable CSC interrupts */
490 cb_writel(socket, CB_SOCKET_MASK, CB_CDMASK);
491
492 return 0;
493 }
494
495 static int yenta_sock_suspend(struct pcmcia_socket *sock)
496 {
497 struct yenta_socket *socket = container_of(sock, struct yenta_socket, socket);
498
499 yenta_set_socket(sock, &dead_socket);
500
501 /* Disable CSC interrupts */
502 cb_writel(socket, CB_SOCKET_MASK, 0x0);
503
504 return 0;
505 }
506
507 /*
508 * Use an adaptive allocation for the memory resource,
509 * sometimes the memory behind pci bridges is limited:
510 * 1/8 of the size of the io window of the parent.
511 * max 4 MB, min 16 kB.
512 */
513 #define BRIDGE_MEM_MAX 4*1024*1024
514 #define BRIDGE_MEM_MIN 16*1024
515
516 #define BRIDGE_IO_MAX 256
517 #define BRIDGE_IO_MIN 32
518
519 #ifndef PCIBIOS_MIN_CARDBUS_IO
520 #define PCIBIOS_MIN_CARDBUS_IO PCIBIOS_MIN_IO
521 #endif
522
523 static void yenta_allocate_res(struct yenta_socket *socket, int nr, unsigned type)
524 {
525 struct pci_bus *bus;
526 struct resource *root, *res;
527 u32 start, end;
528 u32 align, size, min;
529 unsigned offset;
530 unsigned mask;
531
532 /* The granularity of the memory limit is 4kB, on IO it's 4 bytes */
533 mask = ~0xfff;
534 if (type & IORESOURCE_IO)
535 mask = ~3;
536
537 offset = 0x1c + 8*nr;
538 bus = socket->dev->subordinate;
539 res = socket->dev->resource + PCI_BRIDGE_RESOURCES + nr;
540 res->name = bus->name;
541 res->flags = type;
542 res->start = 0;
543 res->end = 0;
544 root = pci_find_parent_resource(socket->dev, res);
545
546 if (!root)
547 return;
548
549 start = config_readl(socket, offset) & mask;
550 end = config_readl(socket, offset+4) | ~mask;
551 if (start && end > start) {
552 res->start = start;
553 res->end = end;
554 if (request_resource(root, res) == 0)
555 return;
556 printk(KERN_INFO "yenta %s: Preassigned resource %d busy, reconfiguring...\n",
557 pci_name(socket->dev), nr);
558 res->start = res->end = 0;
559 }
560
561 if (type & IORESOURCE_IO) {
562 align = 1024;
563 size = BRIDGE_IO_MAX;
564 min = BRIDGE_IO_MIN;
565 start = PCIBIOS_MIN_CARDBUS_IO;
566 end = ~0U;
567 } else {
568 unsigned long avail = root->end - root->start;
569 int i;
570 size = BRIDGE_MEM_MAX;
571 if (size > avail/8) {
572 size=(avail+1)/8;
573 /* round size down to next power of 2 */
574 i = 0;
575 while ((size /= 2) != 0)
576 i++;
577 size = 1 << i;
578 }
579 if (size < BRIDGE_MEM_MIN)
580 size = BRIDGE_MEM_MIN;
581 min = BRIDGE_MEM_MIN;
582 align = size;
583 start = PCIBIOS_MIN_MEM;
584 end = ~0U;
585 }
586
587 do {
588 if (allocate_resource(root, res, size, start, end, align, NULL, NULL)==0) {
589 config_writel(socket, offset, res->start);
590 config_writel(socket, offset+4, res->end);
591 return;
592 }
593 size = size/2;
594 align = size;
595 } while (size >= min);
596 printk(KERN_INFO "yenta %s: no resource of type %x available, trying to continue...\n",
597 pci_name(socket->dev), type);
598 res->start = res->end = 0;
599 }
600
601 /*
602 * Allocate the bridge mappings for the device..
603 */
604 static void yenta_allocate_resources(struct yenta_socket *socket)
605 {
606 yenta_allocate_res(socket, 0, IORESOURCE_MEM|IORESOURCE_PREFETCH);
607 yenta_allocate_res(socket, 1, IORESOURCE_MEM);
608 yenta_allocate_res(socket, 2, IORESOURCE_IO);
609 yenta_allocate_res(socket, 3, IORESOURCE_IO); /* PCI isn't clever enough to use this one yet */
610 }
611
612
613 /*
614 * Free the bridge mappings for the device..
615 */
616 static void yenta_free_resources(struct yenta_socket *socket)
617 {
618 int i;
619 for (i=0;i<4;i++) {
620 struct resource *res;
621 res = socket->dev->resource + PCI_BRIDGE_RESOURCES + i;
622 if (res->start != 0 && res->end != 0)
623 release_resource(res);
624 res->start = res->end = 0;
625 }
626 }
627
628
629 /*
630 * Close it down - release our resources and go home..
631 */
632 static void yenta_close(struct pci_dev *dev)
633 {
634 struct yenta_socket *sock = pci_get_drvdata(dev);
635
636 /* we don't want a dying socket registered */
637 pcmcia_unregister_socket(&sock->socket);
638
639 /* Disable all events so we don't die in an IRQ storm */
640 cb_writel(sock, CB_SOCKET_MASK, 0x0);
641 exca_writeb(sock, I365_CSCINT, 0);
642
643 if (sock->cb_irq)
644 free_irq(sock->cb_irq, sock);
645 else
646 del_timer_sync(&sock->poll_timer);
647
648 if (sock->base)
649 iounmap(sock->base);
650 yenta_free_resources(sock);
651
652 pci_release_regions(dev);
653 pci_set_drvdata(dev, NULL);
654 }
655
656
657 static struct pccard_operations yenta_socket_operations = {
658 .init = yenta_sock_init,
659 .suspend = yenta_sock_suspend,
660 .get_status = yenta_get_status,
661 .get_socket = yenta_get_socket,
662 .set_socket = yenta_set_socket,
663 .set_io_map = yenta_set_io_map,
664 .set_mem_map = yenta_set_mem_map,
665 };
666
667
668 #include "ti113x.h"
669 #include "ricoh.h"
670 #include "topic.h"
671 #include "o2micro.h"
672
673 enum {
674 CARDBUS_TYPE_DEFAULT = -1,
675 CARDBUS_TYPE_TI,
676 CARDBUS_TYPE_TI113X,
677 CARDBUS_TYPE_TI12XX,
678 CARDBUS_TYPE_TI1250,
679 CARDBUS_TYPE_RICOH,
680 CARDBUS_TYPE_TOPIC97,
681 CARDBUS_TYPE_O2MICRO,
682 };
683
684 /*
685 * Different cardbus controllers have slightly different
686 * initialization sequences etc details. List them here..
687 */
688 struct cardbus_type cardbus_type[] = {
689 [CARDBUS_TYPE_TI] = {
690 .override = ti_override,
691 .save_state = ti_save_state,
692 .restore_state = ti_restore_state,
693 .sock_init = ti_init,
694 },
695 [CARDBUS_TYPE_TI113X] = {
696 .override = ti113x_override,
697 .save_state = ti_save_state,
698 .restore_state = ti_restore_state,
699 .sock_init = ti_init,
700 },
701 [CARDBUS_TYPE_TI12XX] = {
702 .override = ti12xx_override,
703 .save_state = ti_save_state,
704 .restore_state = ti_restore_state,
705 .sock_init = ti_init,
706 },
707 [CARDBUS_TYPE_TI1250] = {
708 .override = ti1250_override,
709 .save_state = ti_save_state,
710 .restore_state = ti_restore_state,
711 .sock_init = ti_init,
712 },
713 [CARDBUS_TYPE_RICOH] = {
714 .override = ricoh_override,
715 .save_state = ricoh_save_state,
716 .restore_state = ricoh_restore_state,
717 },
718 [CARDBUS_TYPE_TOPIC97] = {
719 .override = topic97_override,
720 },
721 [CARDBUS_TYPE_O2MICRO] = {
722 .override = o2micro_override,
723 .restore_state = o2micro_restore_state,
724 },
725 };
726
727
728 /*
729 * Only probe "regular" interrupts, don't
730 * touch dangerous spots like the mouse irq,
731 * because there are mice that apparently
732 * get really confused if they get fondled
733 * too intimately.
734 *
735 * Default to 11, 10, 9, 7, 6, 5, 4, 3.
736 */
737 static u32 isa_interrupts = 0x0ef8;
738
739 static unsigned int yenta_probe_irq(struct yenta_socket *socket, u32 isa_irq_mask)
740 {
741 int i;
742 unsigned long val;
743 u16 bridge_ctrl;
744 u32 mask;
745
746 /* Set up ISA irq routing to probe the ISA irqs.. */
747 bridge_ctrl = config_readw(socket, CB_BRIDGE_CONTROL);
748 if (!(bridge_ctrl & CB_BRIDGE_INTR)) {
749 bridge_ctrl |= CB_BRIDGE_INTR;
750 config_writew(socket, CB_BRIDGE_CONTROL, bridge_ctrl);
751 }
752
753 /*
754 * Probe for usable interrupts using the force
755 * register to generate bogus card status events.
756 */
757 cb_writel(socket, CB_SOCKET_EVENT, -1);
758 cb_writel(socket, CB_SOCKET_MASK, CB_CSTSMASK);
759 exca_writeb(socket, I365_CSCINT, 0);
760 val = probe_irq_on() & isa_irq_mask;
761 for (i = 1; i < 16; i++) {
762 if (!((val >> i) & 1))
763 continue;
764 exca_writeb(socket, I365_CSCINT, I365_CSC_STSCHG | (i << 4));
765 cb_writel(socket, CB_SOCKET_FORCE, CB_FCARDSTS);
766 udelay(100);
767 cb_writel(socket, CB_SOCKET_EVENT, -1);
768 }
769 cb_writel(socket, CB_SOCKET_MASK, 0);
770 exca_writeb(socket, I365_CSCINT, 0);
771
772 mask = probe_irq_mask(val) & 0xffff;
773
774 bridge_ctrl &= ~CB_BRIDGE_INTR;
775 config_writew(socket, CB_BRIDGE_CONTROL, bridge_ctrl);
776
777 return mask;
778 }
779
780
781 /* interrupt handler, only used during probing */
782 static irqreturn_t yenta_probe_handler(int irq, void *dev_id, struct pt_regs *regs)
783 {
784 struct yenta_socket *socket = (struct yenta_socket *) dev_id;
785 u8 csc;
786 u32 cb_event;
787
788 /* Clear interrupt status for the event */
789 cb_event = cb_readl(socket, CB_SOCKET_EVENT);
790 cb_writel(socket, CB_SOCKET_EVENT, -1);
791 csc = exca_readb(socket, I365_CSC);
792
793 if (cb_event || csc) {
794 socket->probe_status = 1;
795 return IRQ_HANDLED;
796 }
797
798 return IRQ_NONE;
799 }
800
801 /* probes the PCI interrupt, use only on override functions */
802 static int yenta_probe_cb_irq(struct yenta_socket *socket)
803 {
804 u16 bridge_ctrl;
805
806 if (!socket->cb_irq)
807 return -1;
808
809 socket->probe_status = 0;
810
811 /* disable ISA interrupts */
812 bridge_ctrl = config_readw(socket, CB_BRIDGE_CONTROL);
813 bridge_ctrl &= ~CB_BRIDGE_INTR;
814 config_writew(socket, CB_BRIDGE_CONTROL, bridge_ctrl);
815
816 if (request_irq(socket->cb_irq, yenta_probe_handler, SA_SHIRQ, "yenta", socket)) {
817 printk(KERN_WARNING "Yenta: request_irq() in yenta_probe_cb_irq() failed!\n");
818 return -1;
819 }
820
821 /* generate interrupt, wait */
822 exca_writeb(socket, I365_CSCINT, I365_CSC_STSCHG);
823 cb_writel(socket, CB_SOCKET_EVENT, -1);
824 cb_writel(socket, CB_SOCKET_MASK, CB_CSTSMASK);
825 cb_writel(socket, CB_SOCKET_FORCE, CB_FCARDSTS);
826
827 set_current_state(TASK_UNINTERRUPTIBLE);
828 schedule_timeout(HZ/10);
829
830 /* disable interrupts */
831 cb_writel(socket, CB_SOCKET_MASK, 0);
832 exca_writeb(socket, I365_CSCINT, 0);
833 cb_writel(socket, CB_SOCKET_EVENT, -1);
834 exca_readb(socket, I365_CSC);
835
836 free_irq(socket->cb_irq, socket);
837
838 return (int) socket->probe_status;
839 }
840
841
842
843 /*
844 * Set static data that doesn't need re-initializing..
845 */
846 static void yenta_get_socket_capabilities(struct yenta_socket *socket, u32 isa_irq_mask)
847 {
848 socket->socket.features |= SS_CAP_PAGE_REGS | SS_CAP_PCCARD | SS_CAP_CARDBUS;
849 socket->socket.map_size = 0x1000;
850 socket->socket.pci_irq = socket->cb_irq;
851 socket->socket.irq_mask = yenta_probe_irq(socket, isa_irq_mask);
852 socket->socket.cb_dev = socket->dev;
853
854 printk(KERN_INFO "Yenta: ISA IRQ mask 0x%04x, PCI irq %d\n",
855 socket->socket.irq_mask, socket->cb_irq);
856 }
857
858 /*
859 * Initialize the standard cardbus registers
860 */
861 static void yenta_config_init(struct yenta_socket *socket)
862 {
863 u16 bridge;
864 struct pci_dev *dev = socket->dev;
865
866 pci_set_power_state(socket->dev, 0);
867
868 config_writel(socket, CB_LEGACY_MODE_BASE, 0);
869 config_writel(socket, PCI_BASE_ADDRESS_0, dev->resource[0].start);
870 config_writew(socket, PCI_COMMAND,
871 PCI_COMMAND_IO |
872 PCI_COMMAND_MEMORY |
873 PCI_COMMAND_MASTER |
874 PCI_COMMAND_WAIT);
875
876 /* MAGIC NUMBERS! Fixme */
877 config_writeb(socket, PCI_CACHE_LINE_SIZE, L1_CACHE_BYTES / 4);
878 config_writeb(socket, PCI_LATENCY_TIMER, 168);
879 config_writel(socket, PCI_PRIMARY_BUS,
880 (176 << 24) | /* sec. latency timer */
881 (dev->subordinate->subordinate << 16) | /* subordinate bus */
882 (dev->subordinate->secondary << 8) | /* secondary bus */
883 dev->subordinate->primary); /* primary bus */
884
885 /*
886 * Set up the bridging state:
887 * - enable write posting.
888 * - memory window 0 prefetchable, window 1 non-prefetchable
889 * - PCI interrupts enabled if a PCI interrupt exists..
890 */
891 bridge = config_readw(socket, CB_BRIDGE_CONTROL);
892 bridge &= ~(CB_BRIDGE_CRST | CB_BRIDGE_PREFETCH1 | CB_BRIDGE_INTR | CB_BRIDGE_ISAEN | CB_BRIDGE_VGAEN);
893 bridge |= CB_BRIDGE_PREFETCH0 | CB_BRIDGE_POSTEN | CB_BRIDGE_INTR;
894 config_writew(socket, CB_BRIDGE_CONTROL, bridge);
895 }
896
897 /*
898 * Initialize a cardbus controller. Make sure we have a usable
899 * interrupt, and that we can map the cardbus area. Fill in the
900 * socket information structure..
901 */
902 static int __devinit yenta_probe (struct pci_dev *dev, const struct pci_device_id *id)
903 {
904 struct yenta_socket *socket;
905 int ret;
906
907 socket = kmalloc(sizeof(struct yenta_socket), GFP_KERNEL);
908 if (!socket)
909 return -ENOMEM;
910 memset(socket, 0, sizeof(*socket));
911
912 /* prepare pcmcia_socket */
913 socket->socket.ops = &yenta_socket_operations;
914 socket->socket.dev.dev = &dev->dev;
915 socket->socket.driver_data = socket;
916 socket->socket.owner = THIS_MODULE;
917
918 /* prepare struct yenta_socket */
919 socket->dev = dev;
920 pci_set_drvdata(dev, socket);
921
922 /*
923 * Do some basic sanity checking..
924 */
925 if (pci_enable_device(dev)) {
926 ret = -EBUSY;
927 goto free;
928 }
929
930 ret = pci_request_regions(dev, "yenta_socket");
931 if (ret)
932 goto disable;
933
934 if (!pci_resource_start(dev, 0)) {
935 printk(KERN_ERR "No cardbus resource!\n");
936 ret = -ENODEV;
937 goto release;
938 }
939
940 /*
941 * Ok, start setup.. Map the cardbus registers,
942 * and request the IRQ.
943 */
944 socket->base = ioremap(pci_resource_start(dev, 0), 0x1000);
945 if (!socket->base) {
946 ret = -ENOMEM;
947 goto release;
948 }
949
950 /*
951 * report the subsystem vendor and device for help debugging
952 * the irq stuff...
953 */
954 printk(KERN_INFO "Yenta: CardBus bridge found at %s [%04x:%04x]\n",
955 dev->slot_name, dev->subsystem_vendor, dev->subsystem_device);
956
957 yenta_config_init(socket);
958
959 /* Disable all events */
960 cb_writel(socket, CB_SOCKET_MASK, 0x0);
961
962 /* Set up the bridge regions.. */
963 yenta_allocate_resources(socket);
964
965 socket->cb_irq = dev->irq;
966
967 /* Do we have special options for the device? */
968 if (id->driver_data != CARDBUS_TYPE_DEFAULT &&
969 id->driver_data < ARRAY_SIZE(cardbus_type)) {
970 socket->type = &cardbus_type[id->driver_data];
971
972 ret = socket->type->override(socket);
973 if (ret < 0)
974 goto unmap;
975 }
976
977 /* We must finish initialization here */
978
979 if (!socket->cb_irq || request_irq(socket->cb_irq, yenta_interrupt, SA_SHIRQ, "yenta", socket)) {
980 /* No IRQ or request_irq failed. Poll */
981 socket->cb_irq = 0; /* But zero is a valid IRQ number. */
982 init_timer(&socket->poll_timer);
983 socket->poll_timer.function = yenta_interrupt_wrapper;
984 socket->poll_timer.data = (unsigned long)socket;
985 socket->poll_timer.expires = jiffies + HZ;
986 add_timer(&socket->poll_timer);
987 }
988
989 /* Figure out what the dang thing can do for the PCMCIA layer... */
990 yenta_get_socket_capabilities(socket, isa_interrupts);
991 printk(KERN_INFO "Socket status: %08x\n", cb_readl(socket, CB_SOCKET_STATE));
992
993 /* Register it with the pcmcia layer.. */
994 ret = pcmcia_register_socket(&socket->socket);
995 if (ret == 0)
996 goto out;
997
998 unmap:
999 iounmap(socket->base);
1000 release:
1001 pci_release_regions(dev);
1002 disable:
1003 pci_disable_device(dev);
1004 free:
1005 kfree(socket);
1006 out:
1007 return ret;
1008 }
1009
1010
1011 static int yenta_dev_suspend (struct pci_dev *dev, u32 state)
1012 {
1013 struct yenta_socket *socket = pci_get_drvdata(dev);
1014 int ret;
1015
1016 ret = pcmcia_socket_dev_suspend(&dev->dev, state);
1017
1018 if (socket) {
1019 if (socket->type && socket->type->save_state)
1020 socket->type->save_state(socket);
1021
1022 /* FIXME: pci_save_state needs to have a better interface */
1023 pci_save_state(dev, socket->saved_state);
1024 pci_read_config_dword(dev, 16*4, &socket->saved_state[16]);
1025 pci_read_config_dword(dev, 17*4, &socket->saved_state[17]);
1026 pci_set_power_state(dev, 3);
1027 }
1028
1029 return ret;
1030 }
1031
1032
1033 static int yenta_dev_resume (struct pci_dev *dev)
1034 {
1035 struct yenta_socket *socket = pci_get_drvdata(dev);
1036
1037 if (socket) {
1038 pci_set_power_state(dev, 0);
1039 /* FIXME: pci_restore_state needs to have a better interface */
1040 pci_restore_state(dev, socket->saved_state);
1041 pci_write_config_dword(dev, 16*4, socket->saved_state[16]);
1042 pci_write_config_dword(dev, 17*4, socket->saved_state[17]);
1043
1044 if (socket->type && socket->type->restore_state)
1045 socket->type->restore_state(socket);
1046 }
1047
1048 return pcmcia_socket_dev_resume(&dev->dev);
1049 }
1050
1051
1052 #define CB_ID(vend,dev,type) \
1053 { \
1054 .vendor = vend, \
1055 .device = dev, \
1056 .subvendor = PCI_ANY_ID, \
1057 .subdevice = PCI_ANY_ID, \
1058 .class = PCI_CLASS_BRIDGE_CARDBUS << 8, \
1059 .class_mask = ~0, \
1060 .driver_data = CARDBUS_TYPE_##type, \
1061 }
1062
1063 static struct pci_device_id yenta_table [] = {
1064 CB_ID(PCI_VENDOR_ID_TI, PCI_DEVICE_ID_TI_1031, TI),
1065
1066 /*
1067 * TBD: Check if these TI variants can use more
1068 * advanced overrides instead. (I can't get the
1069 * data sheets for these devices. --rmk)
1070 */
1071 CB_ID(PCI_VENDOR_ID_TI, PCI_DEVICE_ID_TI_1210, TI),
1072
1073 CB_ID(PCI_VENDOR_ID_TI, PCI_DEVICE_ID_TI_1130, TI113X),
1074 CB_ID(PCI_VENDOR_ID_TI, PCI_DEVICE_ID_TI_1131, TI113X),
1075
1076 CB_ID(PCI_VENDOR_ID_TI, PCI_DEVICE_ID_TI_1211, TI12XX),
1077 CB_ID(PCI_VENDOR_ID_TI, PCI_DEVICE_ID_TI_1220, TI12XX),
1078 CB_ID(PCI_VENDOR_ID_TI, PCI_DEVICE_ID_TI_1221, TI12XX),
1079 CB_ID(PCI_VENDOR_ID_TI, PCI_DEVICE_ID_TI_1225, TI12XX),
1080 CB_ID(PCI_VENDOR_ID_TI, PCI_DEVICE_ID_TI_1251A, TI12XX),
1081 CB_ID(PCI_VENDOR_ID_TI, PCI_DEVICE_ID_TI_1251B, TI12XX),
1082 CB_ID(PCI_VENDOR_ID_TI, PCI_DEVICE_ID_TI_1420, TI12XX),
1083 CB_ID(PCI_VENDOR_ID_TI, PCI_DEVICE_ID_TI_1450, TI12XX),
1084 CB_ID(PCI_VENDOR_ID_TI, PCI_DEVICE_ID_TI_1451A, TI12XX),
1085 CB_ID(PCI_VENDOR_ID_TI, PCI_DEVICE_ID_TI_1510, TI12XX),
1086 CB_ID(PCI_VENDOR_ID_TI, PCI_DEVICE_ID_TI_1520, TI12XX),
1087 CB_ID(PCI_VENDOR_ID_TI, PCI_DEVICE_ID_TI_1620, TI12XX),
1088 CB_ID(PCI_VENDOR_ID_TI, PCI_DEVICE_ID_TI_4410, TI12XX),
1089 CB_ID(PCI_VENDOR_ID_TI, PCI_DEVICE_ID_TI_4450, TI12XX),
1090 CB_ID(PCI_VENDOR_ID_TI, PCI_DEVICE_ID_TI_4451, TI12XX),
1091
1092 CB_ID(PCI_VENDOR_ID_TI, PCI_DEVICE_ID_TI_1250, TI1250),
1093 CB_ID(PCI_VENDOR_ID_TI, PCI_DEVICE_ID_TI_1410, TI1250),
1094
1095 CB_ID(PCI_VENDOR_ID_ENE, PCI_DEVICE_ID_ENE_1211, TI12XX),
1096 CB_ID(PCI_VENDOR_ID_ENE, PCI_DEVICE_ID_ENE_1225, TI12XX),
1097 CB_ID(PCI_VENDOR_ID_ENE, PCI_DEVICE_ID_ENE_1410, TI1250),
1098 CB_ID(PCI_VENDOR_ID_ENE, PCI_DEVICE_ID_ENE_1420, TI12XX),
1099
1100 CB_ID(PCI_VENDOR_ID_RICOH, PCI_DEVICE_ID_RICOH_RL5C465, RICOH),
1101 CB_ID(PCI_VENDOR_ID_RICOH, PCI_DEVICE_ID_RICOH_RL5C466, RICOH),
1102 CB_ID(PCI_VENDOR_ID_RICOH, PCI_DEVICE_ID_RICOH_RL5C475, RICOH),
1103 CB_ID(PCI_VENDOR_ID_RICOH, PCI_DEVICE_ID_RICOH_RL5C476, RICOH),
1104 CB_ID(PCI_VENDOR_ID_RICOH, PCI_DEVICE_ID_RICOH_RL5C478, RICOH),
1105
1106 CB_ID(PCI_VENDOR_ID_TOSHIBA, PCI_DEVICE_ID_TOSHIBA_TOPIC97, TOPIC97),
1107 CB_ID(PCI_VENDOR_ID_TOSHIBA, PCI_DEVICE_ID_TOSHIBA_TOPIC100, TOPIC97),
1108
1109 CB_ID(PCI_VENDOR_ID_O2, PCI_ANY_ID, O2MICRO),
1110
1111 /* match any cardbus bridge */
1112 CB_ID(PCI_ANY_ID, PCI_ANY_ID, DEFAULT),
1113 { /* all zeroes */ }
1114 };
1115 MODULE_DEVICE_TABLE(pci, yenta_table);
1116
1117
1118 static struct pci_driver yenta_cardbus_driver = {
1119 .name = "yenta_cardbus",
1120 .id_table = yenta_table,
1121 .probe = yenta_probe,
1122 .remove = __devexit_p(yenta_close),
1123 .suspend = yenta_dev_suspend,
1124 .resume = yenta_dev_resume,
1125 };
1126
1127
1128 static int __init yenta_socket_init(void)
1129 {
1130 return pci_register_driver (&yenta_cardbus_driver);
1131 }
1132
1133
1134 static void __exit yenta_socket_exit (void)
1135 {
1136 pci_unregister_driver (&yenta_cardbus_driver);
1137 }
1138
1139
1140 module_init(yenta_socket_init);
1141 module_exit(yenta_socket_exit);
1142
1143 MODULE_LICENSE("GPL");
Historical 2.5/2.6 development