[PATCH] More modules.txt removals
[linux-2.6/history.git] / drivers / block / cpqarray.c
blobc97ac4765cd0af1f034e260a2e0f34c86cb0c563
1 /*
2 * Disk Array driver for Compaq SMART2 Controllers
3 * Copyright 1998 Compaq Computer Corporation
5 * This program is free software; you can redistribute it and/or modify
6 * it under the terms of the GNU General Public License as published by
7 * the Free Software Foundation; either version 2 of the License, or
8 * (at your option) any later version.
10 * This program is distributed in the hope that it will be useful,
11 * but WITHOUT ANY WARRANTY; without even the implied warranty of
12 * MERCHANTABILITY OR FITNESS FOR A PARTICULAR PURPOSE, GOOD TITLE or
13 * NON INFRINGEMENT. See the GNU General Public License for more details.
15 * You should have received a copy of the GNU General Public License
16 * along with this program; if not, write to the Free Software
17 * Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
19 * Questions/Comments/Bugfixes to arrays@compaq.com
22 #include <linux/config.h> /* CONFIG_PROC_FS */
23 #include <linux/module.h>
24 #include <linux/version.h>
25 #include <linux/types.h>
26 #include <linux/pci.h>
27 #include <linux/bio.h>
28 #include <linux/interrupt.h>
29 #include <linux/kernel.h>
30 #include <linux/slab.h>
31 #include <linux/delay.h>
32 #include <linux/major.h>
33 #include <linux/fs.h>
34 #include <linux/blkpg.h>
35 #include <linux/timer.h>
36 #include <linux/proc_fs.h>
37 #include <linux/devfs_fs_kernel.h>
38 #include <linux/init.h>
39 #include <linux/hdreg.h>
40 #include <linux/spinlock.h>
41 #include <linux/blkdev.h>
42 #include <linux/genhd.h>
43 #include <asm/uaccess.h>
44 #include <asm/io.h>
47 #define SMART2_DRIVER_VERSION(maj,min,submin) ((maj<<16)|(min<<8)|(submin))
49 #define DRIVER_NAME "Compaq SMART2 Driver (v 2.4.5)"
50 #define DRIVER_VERSION SMART2_DRIVER_VERSION(2,4,5)
52 /* Embedded module documentation macros - see modules.h */
53 /* Original author Chris Frantz - Compaq Computer Corporation */
54 MODULE_AUTHOR("Compaq Computer Corporation");
55 MODULE_DESCRIPTION("Driver for Compaq Smart2 Array Controllers");
56 MODULE_LICENSE("GPL");
58 #include "cpqarray.h"
59 #include "ida_cmd.h"
60 #include "smart1,2.h"
61 #include "ida_ioctl.h"
63 #define READ_AHEAD 128
64 #define NR_CMDS 128 /* This could probably go as high as ~400 */
66 #define MAX_CTLR 8
67 #define CTLR_SHIFT 8
69 #define CPQARRAY_DMA_MASK 0xFFFFFFFF /* 32 bit DMA */
71 static int nr_ctlr;
72 static ctlr_info_t *hba[MAX_CTLR];
74 static int eisa[8];
76 #define NR_PRODUCTS (sizeof(products)/sizeof(struct board_type))
78 /* board_id = Subsystem Device ID & Vendor ID
79 * product = Marketing Name for the board
80 * access = Address of the struct of function pointers
82 static struct board_type products[] = {
83 { 0x0040110E, "IDA", &smart1_access },
84 { 0x0140110E, "IDA-2", &smart1_access },
85 { 0x1040110E, "IAES", &smart1_access },
86 { 0x2040110E, "SMART", &smart1_access },
87 { 0x3040110E, "SMART-2/E", &smart2e_access },
88 { 0x40300E11, "SMART-2/P", &smart2_access },
89 { 0x40310E11, "SMART-2SL", &smart2_access },
90 { 0x40320E11, "Smart Array 3200", &smart2_access },
91 { 0x40330E11, "Smart Array 3100ES", &smart2_access },
92 { 0x40340E11, "Smart Array 221", &smart2_access },
93 { 0x40400E11, "Integrated Array", &smart4_access },
94 { 0x40480E11, "Compaq Raid LC2", &smart4_access },
95 { 0x40500E11, "Smart Array 4200", &smart4_access },
96 { 0x40510E11, "Smart Array 4250ES", &smart4_access },
97 { 0x40580E11, "Smart Array 431", &smart4_access },
100 static struct gendisk *ida_gendisk[MAX_CTLR][NWD];
102 /* Debug... */
103 #define DBG(s) do { s } while(0)
104 /* Debug (general info)... */
105 #define DBGINFO(s) do { } while(0)
106 /* Debug Paranoid... */
107 #define DBGP(s) do { } while(0)
108 /* Debug Extra Paranoid... */
109 #define DBGPX(s) do { } while(0)
111 static int cpqarray_pci_detect(void);
112 static int cpqarray_pci_init(ctlr_info_t *c, struct pci_dev *pdev);
113 static void *remap_pci_mem(ulong base, ulong size);
114 static int cpqarray_eisa_detect(void);
115 static int pollcomplete(int ctlr);
116 static void getgeometry(int ctlr);
117 static void start_fwbk(int ctlr);
119 static cmdlist_t * cmd_alloc(ctlr_info_t *h, int get_from_pool);
120 static void cmd_free(ctlr_info_t *h, cmdlist_t *c, int got_from_pool);
122 static int sendcmd(
123 __u8 cmd,
124 int ctlr,
125 void *buff,
126 size_t size,
127 unsigned int blk,
128 unsigned int blkcnt,
129 unsigned int log_unit );
131 static int ida_open(struct inode *inode, struct file *filep);
132 static int ida_release(struct inode *inode, struct file *filep);
133 static int ida_ioctl(struct inode *inode, struct file *filep, unsigned int cmd, unsigned long arg);
134 static int ida_ctlr_ioctl(ctlr_info_t *h, int dsk, ida_ioctl_t *io);
136 static void do_ida_request(request_queue_t *q);
137 static void start_io(ctlr_info_t *h);
139 static inline void addQ(cmdlist_t **Qptr, cmdlist_t *c);
140 static inline cmdlist_t *removeQ(cmdlist_t **Qptr, cmdlist_t *c);
141 static inline void complete_buffers(struct bio *bio, int ok);
142 static inline void complete_command(cmdlist_t *cmd, int timeout);
144 static irqreturn_t do_ida_intr(int irq, void *dev_id, struct pt_regs * regs);
145 static void ida_timer(unsigned long tdata);
146 static int ida_revalidate(struct gendisk *disk);
147 static int revalidate_allvol(ctlr_info_t *host);
149 #ifdef CONFIG_PROC_FS
150 static void ida_procinit(int i);
151 static int ida_proc_get_info(char *buffer, char **start, off_t offset, int length, int *eof, void *data);
152 #else
153 static void ida_procinit(int i) {}
154 #endif
156 static inline drv_info_t *get_drv(struct gendisk *disk)
158 return disk->private_data;
161 static inline ctlr_info_t *get_host(struct gendisk *disk)
163 return disk->queue->queuedata;
167 static struct block_device_operations ida_fops = {
168 .owner = THIS_MODULE,
169 .open = ida_open,
170 .release = ida_release,
171 .ioctl = ida_ioctl,
172 .revalidate_disk= ida_revalidate,
176 #ifdef CONFIG_PROC_FS
178 static struct proc_dir_entry *proc_array;
181 * Get us a file in /proc/array that says something about each controller.
182 * Create /proc/array if it doesn't exist yet.
184 static void __init ida_procinit(int i)
186 if (proc_array == NULL) {
187 proc_array = proc_mkdir("cpqarray", proc_root_driver);
188 if (!proc_array) return;
191 create_proc_read_entry(hba[i]->devname, 0, proc_array,
192 ida_proc_get_info, hba[i]);
196 * Report information about this controller.
198 static int ida_proc_get_info(char *buffer, char **start, off_t offset, int length, int *eof, void *data)
200 off_t pos = 0;
201 off_t len = 0;
202 int size, i, ctlr;
203 ctlr_info_t *h = (ctlr_info_t*)data;
204 drv_info_t *drv;
205 #ifdef CPQ_PROC_PRINT_QUEUES
206 cmdlist_t *c;
207 unsigned long flags;
208 #endif
210 ctlr = h->ctlr;
211 size = sprintf(buffer, "%s: Compaq %s Controller\n"
212 " Board ID: 0x%08lx\n"
213 " Firmware Revision: %c%c%c%c\n"
214 " Controller Sig: 0x%08lx\n"
215 " Memory Address: 0x%08lx\n"
216 " I/O Port: 0x%04x\n"
217 " IRQ: %d\n"
218 " Logical drives: %d\n"
219 " Physical drives: %d\n\n"
220 " Current Q depth: %d\n"
221 " Max Q depth since init: %d\n\n",
222 h->devname,
223 h->product_name,
224 (unsigned long)h->board_id,
225 h->firm_rev[0], h->firm_rev[1], h->firm_rev[2], h->firm_rev[3],
226 (unsigned long)h->ctlr_sig, (unsigned long)h->vaddr,
227 (unsigned int) h->ioaddr, (unsigned int)h->intr,
228 h->log_drives, h->phys_drives,
229 h->Qdepth, h->maxQsinceinit);
231 pos += size; len += size;
233 size = sprintf(buffer+len, "Logical Drive Info:\n");
234 pos += size; len += size;
236 for(i=0; i<h->log_drives; i++) {
237 drv = &h->drv[i];
238 size = sprintf(buffer+len, "ida/c%dd%d: blksz=%d nr_blks=%d\n",
239 ctlr, i, drv->blk_size, drv->nr_blks);
240 pos += size; len += size;
243 #ifdef CPQ_PROC_PRINT_QUEUES
244 spin_lock_irqsave(IDA_LOCK(h->ctlr), flags);
245 size = sprintf(buffer+len, "\nCurrent Queues:\n");
246 pos += size; len += size;
248 c = h->reqQ;
249 size = sprintf(buffer+len, "reqQ = %p", c); pos += size; len += size;
250 if (c) c=c->next;
251 while(c && c != h->reqQ) {
252 size = sprintf(buffer+len, "->%p", c);
253 pos += size; len += size;
254 c=c->next;
257 c = h->cmpQ;
258 size = sprintf(buffer+len, "\ncmpQ = %p", c); pos += size; len += size;
259 if (c) c=c->next;
260 while(c && c != h->cmpQ) {
261 size = sprintf(buffer+len, "->%p", c);
262 pos += size; len += size;
263 c=c->next;
266 size = sprintf(buffer+len, "\n"); pos += size; len += size;
267 spin_unlock_irqrestore(IDA_LOCK(h->ctlr), flags);
268 #endif
269 size = sprintf(buffer+len, "nr_allocs = %d\nnr_frees = %d\n",
270 h->nr_allocs, h->nr_frees);
271 pos += size; len += size;
273 *eof = 1;
274 *start = buffer+offset;
275 len -= offset;
276 if (len>length)
277 len = length;
278 return len;
280 #endif /* CONFIG_PROC_FS */
282 MODULE_PARM(eisa, "1-8i");
284 static void __exit cpqarray_exit(void)
286 int i, j;
287 char buff[4];
289 for(i=0; i<nr_ctlr; i++) {
291 /* sendcmd will turn off interrupt, and send the flush...
292 * To write all data in the battery backed cache to disks
293 * no data returned, but don't want to send NULL to sendcmd */
294 if( sendcmd(FLUSH_CACHE, i, buff, 4, 0, 0, 0))
296 printk(KERN_WARNING "Unable to flush cache on "
297 "controller %d\n", i);
299 free_irq(hba[i]->intr, hba[i]);
300 iounmap(hba[i]->vaddr);
301 unregister_blkdev(COMPAQ_SMART2_MAJOR+i, hba[i]->devname);
302 del_timer(&hba[i]->timer);
303 blk_cleanup_queue(hba[i]->queue);
304 remove_proc_entry(hba[i]->devname, proc_array);
305 pci_free_consistent(hba[i]->pci_dev,
306 NR_CMDS * sizeof(cmdlist_t), (hba[i]->cmd_pool),
307 hba[i]->cmd_pool_dhandle);
308 kfree(hba[i]->cmd_pool_bits);
310 for (j = 0; j < NWD; j++) {
311 if (ida_gendisk[i][j]->flags & GENHD_FL_UP)
312 del_gendisk(ida_gendisk[i][j]);
313 devfs_remove("ida/c%dd%d",i,j);
314 put_disk(ida_gendisk[i][j]);
317 devfs_remove("ida");
318 remove_proc_entry("cpqarray", proc_root_driver);
322 * This is it. Find all the controllers and register them. I really hate
323 * stealing all these major device numbers.
324 * returns the number of block devices registered.
326 static int __init cpqarray_init(void)
328 request_queue_t *q;
329 int i,j;
330 int num_cntlrs_reg = 0;
331 /* detect controllers */
332 cpqarray_pci_detect();
333 cpqarray_eisa_detect();
335 if (nr_ctlr == 0)
336 return -ENODEV;
338 printk(DRIVER_NAME "\n");
339 printk("Found %d controller(s)\n", nr_ctlr);
341 /* allocate space for disk structs */
343 * register block devices
344 * Find disks and fill in structs
345 * Get an interrupt, set the Q depth and get into /proc
347 for(i=0; i < nr_ctlr; i++) {
348 /* If this successful it should insure that we are the only */
349 /* instance of the driver */
350 if (register_blkdev(COMPAQ_SMART2_MAJOR+i, hba[i]->devname))
351 continue;
353 hba[i]->access.set_intr_mask(hba[i], 0);
354 if (request_irq(hba[i]->intr, do_ida_intr,
355 SA_INTERRUPT|SA_SHIRQ, hba[i]->devname, hba[i])) {
357 printk(KERN_ERR "cpqarray: Unable to get irq %d for %s\n",
358 hba[i]->intr, hba[i]->devname);
359 unregister_blkdev(COMPAQ_SMART2_MAJOR+i, hba[i]->devname);
360 continue;
362 num_cntlrs_reg++;
363 for (j=0; j<NWD; j++) {
364 ida_gendisk[i][j] = alloc_disk(1 << NWD_SHIFT);
365 if (!ida_gendisk[i][j])
366 goto Enomem2;
368 hba[i]->cmd_pool = (cmdlist_t *)pci_alloc_consistent(
369 hba[i]->pci_dev, NR_CMDS * sizeof(cmdlist_t),
370 &(hba[i]->cmd_pool_dhandle));
371 hba[i]->cmd_pool_bits = kmalloc(((NR_CMDS+BITS_PER_LONG-1)/BITS_PER_LONG)*sizeof(unsigned long), GFP_KERNEL);
373 if (!hba[i]->cmd_pool_bits || !hba[i]->cmd_pool)
374 goto Enomem1;
375 memset(hba[i]->cmd_pool, 0, NR_CMDS * sizeof(cmdlist_t));
376 memset(hba[i]->cmd_pool_bits, 0, ((NR_CMDS+BITS_PER_LONG-1)/BITS_PER_LONG)*sizeof(unsigned long));
377 printk(KERN_INFO "cpqarray: Finding drives on %s",
378 hba[i]->devname);
380 spin_lock_init(&hba[i]->lock);
381 q = blk_init_queue(do_ida_request, &hba[i]->lock);
382 if (!q)
383 goto Enomem1;
385 hba[i]->queue = q;
386 q->queuedata = hba[i];
388 getgeometry(i);
389 start_fwbk(i);
391 ida_procinit(i);
393 blk_queue_bounce_limit(q, hba[i]->pci_dev->dma_mask);
395 /* This is a hardware imposed limit. */
396 blk_queue_max_hw_segments(q, SG_MAX);
398 /* This is a driver limit and could be eliminated. */
399 blk_queue_max_phys_segments(q, SG_MAX);
401 init_timer(&hba[i]->timer);
402 hba[i]->timer.expires = jiffies + IDA_TIMER;
403 hba[i]->timer.data = (unsigned long)hba[i];
404 hba[i]->timer.function = ida_timer;
405 add_timer(&hba[i]->timer);
407 /* Enable IRQ now that spinlock and rate limit timer are set up */
408 hba[i]->access.set_intr_mask(hba[i], FIFO_NOT_EMPTY);
410 for(j=0; j<NWD; j++) {
411 struct gendisk *disk = ida_gendisk[i][j];
412 drv_info_t *drv = &hba[i]->drv[j];
413 sprintf(disk->disk_name, "ida/c%dd%d", i, j);
414 disk->major = COMPAQ_SMART2_MAJOR + i;
415 disk->first_minor = j<<NWD_SHIFT;
416 disk->fops = &ida_fops;
417 if (j && !drv->nr_blks)
418 continue;
419 blk_queue_hardsect_size(hba[i]->queue, drv->blk_size);
420 set_capacity(disk, drv->nr_blks);
421 disk->queue = hba[i]->queue;
422 disk->private_data = drv;
423 add_disk(disk);
426 /* done ! */
427 return num_cntlrs_reg ? 0 : -ENODEV;
429 Enomem1:
430 nr_ctlr = i;
431 kfree(hba[i]->cmd_pool_bits);
432 if (hba[i]->cmd_pool)
433 pci_free_consistent(hba[i]->pci_dev, NR_CMDS*sizeof(cmdlist_t),
434 hba[i]->cmd_pool, hba[i]->cmd_pool_dhandle);
435 Enomem2:
436 while (j--) {
437 put_disk(ida_gendisk[i][j]);
438 ida_gendisk[i][j] = NULL;
440 free_irq(hba[i]->intr, hba[i]);
441 unregister_blkdev(COMPAQ_SMART2_MAJOR+i, hba[i]->devname);
442 num_cntlrs_reg--;
443 printk( KERN_ERR "cpqarray: out of memory");
445 if (!num_cntlrs_reg) {
446 remove_proc_entry("cpqarray", proc_root_driver);
447 return -ENODEV;
449 return 0;
453 * Find the controller and initialize it
454 * Cannot use the class code to search, because older array controllers use
455 * 0x018000 and new ones use 0x010400. So I might as well search for each
456 * each device IDs, being there are only going to be three of them.
458 static int cpqarray_pci_detect(void)
460 struct pci_dev *pdev;
462 #define IDA_BOARD_TYPES 3
463 static int ida_vendor_id[IDA_BOARD_TYPES] = { PCI_VENDOR_ID_DEC,
464 PCI_VENDOR_ID_NCR, PCI_VENDOR_ID_COMPAQ };
465 static int ida_device_id[IDA_BOARD_TYPES] = { PCI_DEVICE_ID_COMPAQ_42XX, PCI_DEVICE_ID_NCR_53C1510, PCI_DEVICE_ID_COMPAQ_SMART2P };
466 int brdtype;
468 /* search for all PCI board types that could be for this driver */
469 for(brdtype=0; brdtype<IDA_BOARD_TYPES; brdtype++)
471 pdev = pci_find_device(ida_vendor_id[brdtype],
472 ida_device_id[brdtype], NULL);
473 while (pdev) {
474 printk(KERN_DEBUG "cpqarray: Device 0x%x has"
475 " been found at bus %d dev %d func %d\n",
476 ida_vendor_id[brdtype],
477 pdev->bus->number, PCI_SLOT(pdev->devfn),
478 PCI_FUNC(pdev->devfn));
479 if (nr_ctlr == 8) {
480 printk(KERN_WARNING "cpqarray: This driver"
481 " supports a maximum of 8 controllers.\n");
482 break;
485 /* if it is a PCI_DEVICE_ID_NCR_53C1510, make sure it's the Compaq version of the chip */
487 if (ida_device_id[brdtype] == PCI_DEVICE_ID_NCR_53C1510) {
488 unsigned short subvendor=pdev->subsystem_vendor;
489 if(subvendor != PCI_VENDOR_ID_COMPAQ)
491 printk(KERN_DEBUG
492 "cpqarray: not a Compaq integrated array controller\n");
493 continue;
497 hba[nr_ctlr] = kmalloc(sizeof(ctlr_info_t), GFP_KERNEL); if(hba[nr_ctlr]==NULL)
499 printk(KERN_ERR "cpqarray: out of memory.\n");
500 continue;
502 memset(hba[nr_ctlr], 0, sizeof(ctlr_info_t));
503 if (cpqarray_pci_init(hba[nr_ctlr], pdev) != 0)
505 kfree(hba[nr_ctlr]);
506 continue;
508 sprintf(hba[nr_ctlr]->devname, "ida%d", nr_ctlr);
509 hba[nr_ctlr]->ctlr = nr_ctlr;
510 nr_ctlr++;
512 pdev = pci_find_device(ida_vendor_id[brdtype],
513 ida_device_id[brdtype], pdev);
517 return nr_ctlr;
521 * Find the IO address of the controller, its IRQ and so forth. Fill
522 * in some basic stuff into the ctlr_info_t structure.
524 static int cpqarray_pci_init(ctlr_info_t *c, struct pci_dev *pdev)
526 ushort vendor_id, device_id, command;
527 unchar cache_line_size, latency_timer;
528 unchar irq, revision;
529 unsigned long addr[6];
530 __u32 board_id;
532 int i;
534 c->pci_dev = pdev;
535 if (pci_enable_device(pdev)) {
536 printk(KERN_ERR "cpqarray: Unable to Enable PCI device\n");
537 return -1;
539 vendor_id = pdev->vendor;
540 device_id = pdev->device;
541 irq = pdev->irq;
543 for(i=0; i<6; i++)
544 addr[i] = pci_resource_start(pdev, i);
546 if (pci_set_dma_mask(pdev, CPQARRAY_DMA_MASK) != 0)
548 printk(KERN_ERR "cpqarray: Unable to set DMA mask\n");
549 return -1;
552 pci_read_config_word(pdev, PCI_COMMAND, &command);
553 pci_read_config_byte(pdev, PCI_CLASS_REVISION, &revision);
554 pci_read_config_byte(pdev, PCI_CACHE_LINE_SIZE, &cache_line_size);
555 pci_read_config_byte(pdev, PCI_LATENCY_TIMER, &latency_timer);
557 pci_read_config_dword(pdev, 0x2c, &board_id);
559 DBGINFO(
560 printk("vendor_id = %x\n", vendor_id);
561 printk("device_id = %x\n", device_id);
562 printk("command = %x\n", command);
563 for(i=0; i<6; i++)
564 printk("addr[%d] = %lx\n", i, addr[i]);
565 printk("revision = %x\n", revision);
566 printk("irq = %x\n", irq);
567 printk("cache_line_size = %x\n", cache_line_size);
568 printk("latency_timer = %x\n", latency_timer);
569 printk("board_id = %x\n", board_id);
572 c->intr = irq;
573 c->ioaddr = addr[0];
575 c->paddr = 0;
576 for(i=0; i<6; i++)
577 if (pci_resource_flags(pdev, i) & IORESOURCE_MEM) {
578 c->paddr = pci_resource_start (pdev, i);
579 break;
581 if (!c->paddr)
582 return -1;
583 c->vaddr = remap_pci_mem(c->paddr, 128);
584 if (!c->vaddr)
585 return -1;
586 c->board_id = board_id;
588 for(i=0; i<NR_PRODUCTS; i++) {
589 if (board_id == products[i].board_id) {
590 c->product_name = products[i].product_name;
591 c->access = *(products[i].access);
592 break;
595 if (i == NR_PRODUCTS) {
596 printk(KERN_WARNING "cpqarray: Sorry, I don't know how"
597 " to access the SMART Array controller %08lx\n",
598 (unsigned long)board_id);
599 return -1;
602 return 0;
606 * Map (physical) PCI mem into (virtual) kernel space
608 static void *remap_pci_mem(ulong base, ulong size)
610 ulong page_base = ((ulong) base) & PAGE_MASK;
611 ulong page_offs = ((ulong) base) - page_base;
612 void *page_remapped = ioremap(page_base, page_offs+size);
614 return (page_remapped ? (page_remapped + page_offs) : NULL);
617 #ifndef MODULE
618 #if LINUX_VERSION_CODE >= KERNEL_VERSION(2,3,13)
620 * Config string is a comma separated set of i/o addresses of EISA cards.
622 static int cpqarray_setup(char *str)
624 int i, ints[9];
626 (void)get_options(str, ARRAY_SIZE(ints), ints);
628 for(i=0; i<ints[0] && i<8; i++)
629 eisa[i] = ints[i+1];
630 return 1;
633 __setup("smart2=", cpqarray_setup);
635 #else
638 * Copy the contents of the ints[] array passed to us by init.
640 void cpqarray_setup(char *str, int *ints)
642 int i;
643 for(i=0; i<ints[0] && i<8; i++)
644 eisa[i] = ints[i+1];
646 #endif
647 #endif
650 * Find an EISA controller's signature. Set up an hba if we find it.
652 static int cpqarray_eisa_detect(void)
654 int i=0, j;
655 __u32 board_id;
656 int intr;
658 while(i<8 && eisa[i]) {
659 if (nr_ctlr == 8) {
660 printk(KERN_WARNING "cpqarray: This driver supports"
661 " a maximum of 8 controllers.\n");
662 break;
664 board_id = inl(eisa[i]+0xC80);
665 for(j=0; j < NR_PRODUCTS; j++)
666 if (board_id == products[j].board_id)
667 break;
669 if (j == NR_PRODUCTS) {
670 printk(KERN_WARNING "cpqarray: Sorry, I don't know how"
671 " to access the SMART Array controller %08lx\n", (unsigned long)board_id);
672 continue;
674 hba[nr_ctlr] = (ctlr_info_t *) kmalloc(sizeof(ctlr_info_t), GFP_KERNEL);
675 if(hba[nr_ctlr]==NULL)
677 printk(KERN_ERR "cpqarray: out of memory.\n");
678 continue;
680 memset(hba[nr_ctlr], 0, sizeof(ctlr_info_t));
681 hba[nr_ctlr]->ioaddr = eisa[i];
684 * Read the config register to find our interrupt
686 intr = inb(eisa[i]+0xCC0) >> 4;
687 if (intr & 1) intr = 11;
688 else if (intr & 2) intr = 10;
689 else if (intr & 4) intr = 14;
690 else if (intr & 8) intr = 15;
692 hba[nr_ctlr]->intr = intr;
693 sprintf(hba[nr_ctlr]->devname, "ida%d", nr_ctlr);
694 hba[nr_ctlr]->product_name = products[j].product_name;
695 hba[nr_ctlr]->access = *(products[j].access);
696 hba[nr_ctlr]->ctlr = nr_ctlr;
697 hba[nr_ctlr]->board_id = board_id;
698 hba[nr_ctlr]->pci_dev = NULL; /* not PCI */
700 DBGINFO(
701 printk("i = %d, j = %d\n", i, j);
702 printk("irq = %x\n", intr);
703 printk("product name = %s\n", products[j].product_name);
704 printk("board_id = %x\n", board_id);
707 nr_ctlr++;
708 i++;
711 return nr_ctlr;
716 * Open. Make sure the device is really there.
718 static int ida_open(struct inode *inode, struct file *filep)
720 drv_info_t *drv = get_drv(inode->i_bdev->bd_disk);
721 ctlr_info_t *host = get_host(inode->i_bdev->bd_disk);
723 DBGINFO(printk("ida_open %s\n", inode->i_bdev->bd_disk->disk_name));
725 * Root is allowed to open raw volume zero even if it's not configured
726 * so array config can still work. I don't think I really like this,
727 * but I'm already using way to many device nodes to claim another one
728 * for "raw controller".
730 if (!drv->nr_blks) {
731 if (!capable(CAP_SYS_RAWIO))
732 return -ENXIO;
733 if (!capable(CAP_SYS_ADMIN) && drv != host->drv)
734 return -ENXIO;
736 host->usage_count++;
737 return 0;
741 * Close. Sync first.
743 static int ida_release(struct inode *inode, struct file *filep)
745 ctlr_info_t *host = get_host(inode->i_bdev->bd_disk);
746 host->usage_count--;
747 return 0;
751 * Enqueuing and dequeuing functions for cmdlists.
753 static inline void addQ(cmdlist_t **Qptr, cmdlist_t *c)
755 if (*Qptr == NULL) {
756 *Qptr = c;
757 c->next = c->prev = c;
758 } else {
759 c->prev = (*Qptr)->prev;
760 c->next = (*Qptr);
761 (*Qptr)->prev->next = c;
762 (*Qptr)->prev = c;
766 static inline cmdlist_t *removeQ(cmdlist_t **Qptr, cmdlist_t *c)
768 if (c && c->next != c) {
769 if (*Qptr == c) *Qptr = c->next;
770 c->prev->next = c->next;
771 c->next->prev = c->prev;
772 } else {
773 *Qptr = NULL;
775 return c;
779 * Get a request and submit it to the controller.
780 * This routine needs to grab all the requests it possibly can from the
781 * req Q and submit them. Interrupts are off (and need to be off) when you
782 * are in here (either via the dummy do_ida_request functions or by being
783 * called from the interrupt handler
785 static void do_ida_request(request_queue_t *q)
787 ctlr_info_t *h = q->queuedata;
788 cmdlist_t *c;
789 struct request *creq;
790 struct scatterlist tmp_sg[SG_MAX];
791 int i, dir, seg;
793 if (blk_queue_plugged(q))
794 goto startio;
796 queue_next:
797 creq = elv_next_request(q);
798 if (!creq)
799 goto startio;
801 if (creq->nr_phys_segments > SG_MAX)
802 BUG();
804 if ((c = cmd_alloc(h,1)) == NULL)
805 goto startio;
807 blkdev_dequeue_request(creq);
809 c->ctlr = h->ctlr;
810 c->hdr.unit = (drv_info_t *)(creq->rq_disk->private_data) - h->drv;
811 c->hdr.size = sizeof(rblk_t) >> 2;
812 c->size += sizeof(rblk_t);
814 c->req.hdr.blk = creq->sector;
815 c->rq = creq;
816 DBGPX(
817 printk("sector=%d, nr_sectors=%d\n", creq->sector, creq->nr_sectors);
819 seg = blk_rq_map_sg(q, creq, tmp_sg);
821 /* Now do all the DMA Mappings */
822 if (rq_data_dir(creq) == READ)
823 dir = PCI_DMA_FROMDEVICE;
824 else
825 dir = PCI_DMA_TODEVICE;
826 for( i=0; i < seg; i++)
828 c->req.sg[i].size = tmp_sg[i].length;
829 c->req.sg[i].addr = (__u32) pci_map_page(h->pci_dev,
830 tmp_sg[i].page,
831 tmp_sg[i].offset,
832 tmp_sg[i].length, dir);
834 DBGPX( printk("Submitting %d sectors in %d segments\n", creq->nr_sectors, seg); );
835 c->req.hdr.sg_cnt = seg;
836 c->req.hdr.blk_cnt = creq->nr_sectors;
837 c->req.hdr.cmd = (rq_data_dir(creq) == READ) ? IDA_READ : IDA_WRITE;
838 c->type = CMD_RWREQ;
840 /* Put the request on the tail of the request queue */
841 addQ(&h->reqQ, c);
842 h->Qdepth++;
843 if (h->Qdepth > h->maxQsinceinit)
844 h->maxQsinceinit = h->Qdepth;
846 goto queue_next;
848 startio:
849 start_io(h);
853 * start_io submits everything on a controller's request queue
854 * and moves it to the completion queue.
856 * Interrupts had better be off if you're in here
858 static void start_io(ctlr_info_t *h)
860 cmdlist_t *c;
862 while((c = h->reqQ) != NULL) {
863 /* Can't do anything if we're busy */
864 if (h->access.fifo_full(h) == 0)
865 return;
867 /* Get the first entry from the request Q */
868 removeQ(&h->reqQ, c);
869 h->Qdepth--;
871 /* Tell the controller to do our bidding */
872 h->access.submit_command(h, c);
874 /* Get onto the completion Q */
875 addQ(&h->cmpQ, c);
879 static inline void complete_buffers(struct bio *bio, int ok)
881 struct bio *xbh;
882 while(bio) {
883 int nr_sectors = bio_sectors(bio);
885 xbh = bio->bi_next;
886 bio->bi_next = NULL;
888 blk_finished_io(nr_sectors);
889 bio_endio(bio, nr_sectors << 9, ok ? 0 : -EIO);
891 bio = xbh;
895 * Mark all buffers that cmd was responsible for
897 static inline void complete_command(cmdlist_t *cmd, int timeout)
899 int ok=1;
900 int i, ddir;
902 if (cmd->req.hdr.rcode & RCODE_NONFATAL &&
903 (hba[cmd->ctlr]->misc_tflags & MISC_NONFATAL_WARN) == 0) {
904 printk(KERN_NOTICE "Non Fatal error on ida/c%dd%d\n",
905 cmd->ctlr, cmd->hdr.unit);
906 hba[cmd->ctlr]->misc_tflags |= MISC_NONFATAL_WARN;
908 if (cmd->req.hdr.rcode & RCODE_FATAL) {
909 printk(KERN_WARNING "Fatal error on ida/c%dd%d\n",
910 cmd->ctlr, cmd->hdr.unit);
911 ok = 0;
913 if (cmd->req.hdr.rcode & RCODE_INVREQ) {
914 printk(KERN_WARNING "Invalid request on ida/c%dd%d = (cmd=%x sect=%d cnt=%d sg=%d ret=%x)\n",
915 cmd->ctlr, cmd->hdr.unit, cmd->req.hdr.cmd,
916 cmd->req.hdr.blk, cmd->req.hdr.blk_cnt,
917 cmd->req.hdr.sg_cnt, cmd->req.hdr.rcode);
918 ok = 0;
920 if (timeout) ok = 0;
921 /* unmap the DMA mapping for all the scatter gather elements */
922 if (cmd->req.hdr.cmd == IDA_READ)
923 ddir = PCI_DMA_FROMDEVICE;
924 else
925 ddir = PCI_DMA_TODEVICE;
926 for(i=0; i<cmd->req.hdr.sg_cnt; i++)
927 pci_unmap_page(hba[cmd->ctlr]->pci_dev, cmd->req.sg[i].addr,
928 cmd->req.sg[i].size, ddir);
930 complete_buffers(cmd->rq->bio, ok);
932 DBGPX(printk("Done with %p\n", cmd->rq););
933 end_that_request_last(cmd->rq);
937 * The controller will interrupt us upon completion of commands.
938 * Find the command on the completion queue, remove it, tell the OS and
939 * try to queue up more IO
941 static irqreturn_t do_ida_intr(int irq, void *dev_id, struct pt_regs *regs)
943 ctlr_info_t *h = dev_id;
944 cmdlist_t *c;
945 unsigned long istat;
946 unsigned long flags;
947 __u32 a,a1;
949 istat = h->access.intr_pending(h);
950 /* Is this interrupt for us? */
951 if (istat == 0)
952 return IRQ_NONE;
955 * If there are completed commands in the completion queue,
956 * we had better do something about it.
958 spin_lock_irqsave(IDA_LOCK(h->ctlr), flags);
959 if (istat & FIFO_NOT_EMPTY) {
960 while((a = h->access.command_completed(h))) {
961 a1 = a; a &= ~3;
962 if ((c = h->cmpQ) == NULL)
964 printk(KERN_WARNING "cpqarray: Completion of %08lx ignored\n", (unsigned long)a1);
965 continue;
967 while(c->busaddr != a) {
968 c = c->next;
969 if (c == h->cmpQ)
970 break;
973 * If we've found the command, take it off the
974 * completion Q and free it
976 if (c->busaddr == a) {
977 removeQ(&h->cmpQ, c);
978 /* Check for invalid command.
979 * Controller returns command error,
980 * But rcode = 0.
983 if((a1 & 0x03) && (c->req.hdr.rcode == 0))
985 c->req.hdr.rcode = RCODE_INVREQ;
987 if (c->type == CMD_RWREQ) {
988 complete_command(c, 0);
989 cmd_free(h, c, 1);
990 } else if (c->type == CMD_IOCTL_PEND) {
991 c->type = CMD_IOCTL_DONE;
993 continue;
999 * See if we can queue up some more IO
1001 do_ida_request(h->queue);
1002 spin_unlock_irqrestore(IDA_LOCK(h->ctlr), flags);
1003 return IRQ_HANDLED;
1007 * This timer was for timing out requests that haven't happened after
1008 * IDA_TIMEOUT. That wasn't such a good idea. This timer is used to
1009 * reset a flags structure so we don't flood the user with
1010 * "Non-Fatal error" messages.
1012 static void ida_timer(unsigned long tdata)
1014 ctlr_info_t *h = (ctlr_info_t*)tdata;
1016 h->timer.expires = jiffies + IDA_TIMER;
1017 add_timer(&h->timer);
1018 h->misc_tflags = 0;
1022 * ida_ioctl does some miscellaneous stuff like reporting drive geometry,
1023 * setting readahead and submitting commands from userspace to the controller.
1025 static int ida_ioctl(struct inode *inode, struct file *filep, unsigned int cmd, unsigned long arg)
1027 drv_info_t *drv = get_drv(inode->i_bdev->bd_disk);
1028 ctlr_info_t *host = get_host(inode->i_bdev->bd_disk);
1029 int error;
1030 int diskinfo[4];
1031 struct hd_geometry *geo = (struct hd_geometry *)arg;
1032 ida_ioctl_t *io = (ida_ioctl_t*)arg;
1033 ida_ioctl_t *my_io;
1035 switch(cmd) {
1036 case HDIO_GETGEO:
1037 if (drv->cylinders) {
1038 diskinfo[0] = drv->heads;
1039 diskinfo[1] = drv->sectors;
1040 diskinfo[2] = drv->cylinders;
1041 } else {
1042 diskinfo[0] = 0xff;
1043 diskinfo[1] = 0x3f;
1044 diskinfo[2] = drv->nr_blks / (0xff*0x3f);
1046 put_user(diskinfo[0], &geo->heads);
1047 put_user(diskinfo[1], &geo->sectors);
1048 put_user(diskinfo[2], &geo->cylinders);
1049 put_user(get_start_sect(inode->i_bdev), &geo->start);
1050 return 0;
1051 case IDAGETDRVINFO:
1052 if (copy_to_user(&io->c.drv, drv, sizeof(drv_info_t)))
1053 return -EFAULT;
1054 return 0;
1055 case IDAPASSTHRU:
1056 if (!capable(CAP_SYS_RAWIO))
1057 return -EPERM;
1058 my_io = kmalloc(sizeof(ida_ioctl_t), GFP_KERNEL);
1059 if (!my_io)
1060 return -ENOMEM;
1061 error = -EFAULT;
1062 if (copy_from_user(my_io, io, sizeof(*my_io)))
1063 goto out_passthru;
1064 error = ida_ctlr_ioctl(host, drv - host->drv, my_io);
1065 if (error)
1066 goto out_passthru;
1067 error = -EFAULT;
1068 if (copy_to_user(io, &my_io, sizeof(*my_io)))
1069 goto out_passthru;
1070 error = 0;
1071 out_passthru:
1072 kfree(my_io);
1073 return error;
1074 case IDAGETCTLRSIG:
1075 if (!arg) return -EINVAL;
1076 put_user(host->ctlr_sig, (int*)arg);
1077 return 0;
1078 case IDAREVALIDATEVOLS:
1079 if (iminor(inode) != 0)
1080 return -ENXIO;
1081 return revalidate_allvol(host);
1082 case IDADRIVERVERSION:
1083 if (!arg) return -EINVAL;
1084 put_user(DRIVER_VERSION, (unsigned long*)arg);
1085 return 0;
1086 case IDAGETPCIINFO:
1089 ida_pci_info_struct pciinfo;
1091 if (!arg) return -EINVAL;
1092 pciinfo.bus = host->pci_dev->bus->number;
1093 pciinfo.dev_fn = host->pci_dev->devfn;
1094 pciinfo.board_id = host->board_id;
1095 if(copy_to_user((void *) arg, &pciinfo,
1096 sizeof( ida_pci_info_struct)))
1097 return -EFAULT;
1098 return(0);
1101 default:
1102 return -EINVAL;
1107 * ida_ctlr_ioctl is for passing commands to the controller from userspace.
1108 * The command block (io) has already been copied to kernel space for us,
1109 * however, any elements in the sglist need to be copied to kernel space
1110 * or copied back to userspace.
1112 * Only root may perform a controller passthru command, however I'm not doing
1113 * any serious sanity checking on the arguments. Doing an IDA_WRITE_MEDIA and
1114 * putting a 64M buffer in the sglist is probably a *bad* idea.
1116 static int ida_ctlr_ioctl(ctlr_info_t *h, int dsk, ida_ioctl_t *io)
1118 int ctlr = h->ctlr;
1119 cmdlist_t *c;
1120 void *p = NULL;
1121 unsigned long flags;
1122 int error;
1124 if ((c = cmd_alloc(h, 0)) == NULL)
1125 return -ENOMEM;
1126 c->ctlr = ctlr;
1127 c->hdr.unit = (io->unit & UNITVALID) ? (io->unit & ~UNITVALID) : dsk;
1128 c->hdr.size = sizeof(rblk_t) >> 2;
1129 c->size += sizeof(rblk_t);
1131 c->req.hdr.cmd = io->cmd;
1132 c->req.hdr.blk = io->blk;
1133 c->req.hdr.blk_cnt = io->blk_cnt;
1134 c->type = CMD_IOCTL_PEND;
1136 /* Pre submit processing */
1137 switch(io->cmd) {
1138 case PASSTHRU_A:
1139 p = kmalloc(io->sg[0].size, GFP_KERNEL);
1140 if (!p)
1142 error = -ENOMEM;
1143 cmd_free(h, c, 0);
1144 return(error);
1146 if (copy_from_user(p, (void*)io->sg[0].addr, io->sg[0].size)) {
1147 kfree(p);
1148 cmd_free(h, c, 0);
1149 return -EFAULT;
1151 c->req.hdr.blk = pci_map_single(h->pci_dev, &(io->c),
1152 sizeof(ida_ioctl_t),
1153 PCI_DMA_BIDIRECTIONAL);
1154 c->req.sg[0].size = io->sg[0].size;
1155 c->req.sg[0].addr = pci_map_single(h->pci_dev, p,
1156 c->req.sg[0].size, PCI_DMA_BIDIRECTIONAL);
1157 c->req.hdr.sg_cnt = 1;
1158 break;
1159 case IDA_READ:
1160 case READ_FLASH_ROM:
1161 case SENSE_CONTROLLER_PERFORMANCE:
1162 p = kmalloc(io->sg[0].size, GFP_KERNEL);
1163 if (!p)
1165 error = -ENOMEM;
1166 cmd_free(h, c, 0);
1167 return(error);
1170 c->req.sg[0].size = io->sg[0].size;
1171 c->req.sg[0].addr = pci_map_single(h->pci_dev, p,
1172 c->req.sg[0].size, PCI_DMA_BIDIRECTIONAL);
1173 c->req.hdr.sg_cnt = 1;
1174 break;
1175 case IDA_WRITE:
1176 case IDA_WRITE_MEDIA:
1177 case DIAG_PASS_THRU:
1178 case COLLECT_BUFFER:
1179 case WRITE_FLASH_ROM:
1180 p = kmalloc(io->sg[0].size, GFP_KERNEL);
1181 if (!p)
1183 error = -ENOMEM;
1184 cmd_free(h, c, 0);
1185 return(error);
1187 if (copy_from_user(p, (void*)io->sg[0].addr, io->sg[0].size)) {
1188 kfree(p);
1189 cmd_free(h, c, 0);
1190 return -EFAULT;
1192 c->req.sg[0].size = io->sg[0].size;
1193 c->req.sg[0].addr = pci_map_single(h->pci_dev, p,
1194 c->req.sg[0].size, PCI_DMA_BIDIRECTIONAL);
1195 c->req.hdr.sg_cnt = 1;
1196 break;
1197 default:
1198 c->req.sg[0].size = sizeof(io->c);
1199 c->req.sg[0].addr = pci_map_single(h->pci_dev,&io->c,
1200 c->req.sg[0].size, PCI_DMA_BIDIRECTIONAL);
1201 c->req.hdr.sg_cnt = 1;
1204 /* Put the request on the tail of the request queue */
1205 spin_lock_irqsave(IDA_LOCK(ctlr), flags);
1206 addQ(&h->reqQ, c);
1207 h->Qdepth++;
1208 start_io(h);
1209 spin_unlock_irqrestore(IDA_LOCK(ctlr), flags);
1211 /* Wait for completion */
1212 while(c->type != CMD_IOCTL_DONE)
1213 schedule();
1215 /* Unmap the DMA */
1216 pci_unmap_single(h->pci_dev, c->req.sg[0].addr, c->req.sg[0].size,
1217 PCI_DMA_BIDIRECTIONAL);
1218 /* Post submit processing */
1219 switch(io->cmd) {
1220 case PASSTHRU_A:
1221 pci_unmap_single(h->pci_dev, c->req.hdr.blk,
1222 sizeof(ida_ioctl_t),
1223 PCI_DMA_BIDIRECTIONAL);
1224 case IDA_READ:
1225 case DIAG_PASS_THRU:
1226 case SENSE_CONTROLLER_PERFORMANCE:
1227 case READ_FLASH_ROM:
1228 if (copy_to_user((void*)io->sg[0].addr, p, io->sg[0].size)) {
1229 kfree(p);
1230 return -EFAULT;
1232 /* fall through and free p */
1233 case IDA_WRITE:
1234 case IDA_WRITE_MEDIA:
1235 case COLLECT_BUFFER:
1236 case WRITE_FLASH_ROM:
1237 kfree(p);
1238 break;
1239 default:;
1240 /* Nothing to do */
1243 io->rcode = c->req.hdr.rcode;
1244 cmd_free(h, c, 0);
1245 return(0);
1249 * Commands are pre-allocated in a large block. Here we use a simple bitmap
1250 * scheme to suballocte them to the driver. Operations that are not time
1251 * critical (and can wait for kmalloc and possibly sleep) can pass in NULL
1252 * as the first argument to get a new command.
1254 static cmdlist_t * cmd_alloc(ctlr_info_t *h, int get_from_pool)
1256 cmdlist_t * c;
1257 int i;
1258 dma_addr_t cmd_dhandle;
1260 if (!get_from_pool) {
1261 c = (cmdlist_t*)pci_alloc_consistent(h->pci_dev,
1262 sizeof(cmdlist_t), &cmd_dhandle);
1263 if(c==NULL)
1264 return NULL;
1265 } else {
1266 do {
1267 i = find_first_zero_bit(h->cmd_pool_bits, NR_CMDS);
1268 if (i == NR_CMDS)
1269 return NULL;
1270 } while(test_and_set_bit(i&(BITS_PER_LONG-1), h->cmd_pool_bits+(i/BITS_PER_LONG)) != 0);
1271 c = h->cmd_pool + i;
1272 cmd_dhandle = h->cmd_pool_dhandle + i*sizeof(cmdlist_t);
1273 h->nr_allocs++;
1276 memset(c, 0, sizeof(cmdlist_t));
1277 c->busaddr = cmd_dhandle;
1278 return c;
1281 static void cmd_free(ctlr_info_t *h, cmdlist_t *c, int got_from_pool)
1283 int i;
1285 if (!got_from_pool) {
1286 pci_free_consistent(h->pci_dev, sizeof(cmdlist_t), c,
1287 c->busaddr);
1288 } else {
1289 i = c - h->cmd_pool;
1290 clear_bit(i&(BITS_PER_LONG-1), h->cmd_pool_bits+(i/BITS_PER_LONG));
1291 h->nr_frees++;
1295 /***********************************************************************
1296 name: sendcmd
1297 Send a command to an IDA using the memory mapped FIFO interface
1298 and wait for it to complete.
1299 This routine should only be called at init time.
1300 ***********************************************************************/
1301 static int sendcmd(
1302 __u8 cmd,
1303 int ctlr,
1304 void *buff,
1305 size_t size,
1306 unsigned int blk,
1307 unsigned int blkcnt,
1308 unsigned int log_unit )
1310 cmdlist_t *c;
1311 int complete;
1312 unsigned long temp;
1313 unsigned long i;
1314 ctlr_info_t *info_p = hba[ctlr];
1316 c = cmd_alloc(info_p, 1);
1317 if(!c)
1318 return IO_ERROR;
1319 c->ctlr = ctlr;
1320 c->hdr.unit = log_unit;
1321 c->hdr.prio = 0;
1322 c->hdr.size = sizeof(rblk_t) >> 2;
1323 c->size += sizeof(rblk_t);
1325 /* The request information. */
1326 c->req.hdr.next = 0;
1327 c->req.hdr.rcode = 0;
1328 c->req.bp = 0;
1329 c->req.hdr.sg_cnt = 1;
1330 c->req.hdr.reserved = 0;
1332 if (size == 0)
1333 c->req.sg[0].size = 512;
1334 else
1335 c->req.sg[0].size = size;
1337 c->req.hdr.blk = blk;
1338 c->req.hdr.blk_cnt = blkcnt;
1339 c->req.hdr.cmd = (unsigned char) cmd;
1340 c->req.sg[0].addr = (__u32) pci_map_single(info_p->pci_dev,
1341 buff, c->req.sg[0].size, PCI_DMA_BIDIRECTIONAL);
1343 * Disable interrupt
1345 info_p->access.set_intr_mask(info_p, 0);
1346 /* Make sure there is room in the command FIFO */
1347 /* Actually it should be completely empty at this time. */
1348 for (i = 200000; i > 0; i--) {
1349 temp = info_p->access.fifo_full(info_p);
1350 if (temp != 0) {
1351 break;
1353 udelay(10);
1354 DBG(
1355 printk(KERN_WARNING "cpqarray ida%d: idaSendPciCmd FIFO full,"
1356 " waiting!\n", ctlr);
1360 * Send the cmd
1362 info_p->access.submit_command(info_p, c);
1363 complete = pollcomplete(ctlr);
1365 pci_unmap_single(info_p->pci_dev, (dma_addr_t) c->req.sg[0].addr,
1366 c->req.sg[0].size, PCI_DMA_BIDIRECTIONAL);
1367 if (complete != 1) {
1368 if (complete != c->busaddr) {
1369 printk( KERN_WARNING
1370 "cpqarray ida%d: idaSendPciCmd "
1371 "Invalid command list address returned! (%08lx)\n",
1372 ctlr, (unsigned long)complete);
1373 cmd_free(info_p, c, 1);
1374 return (IO_ERROR);
1376 } else {
1377 printk( KERN_WARNING
1378 "cpqarray ida%d: idaSendPciCmd Timeout out, "
1379 "No command list address returned!\n",
1380 ctlr);
1381 cmd_free(info_p, c, 1);
1382 return (IO_ERROR);
1385 if (c->req.hdr.rcode & 0x00FE) {
1386 if (!(c->req.hdr.rcode & BIG_PROBLEM)) {
1387 printk( KERN_WARNING
1388 "cpqarray ida%d: idaSendPciCmd, error: "
1389 "Controller failed at init time "
1390 "cmd: 0x%x, return code = 0x%x\n",
1391 ctlr, c->req.hdr.cmd, c->req.hdr.rcode);
1393 cmd_free(info_p, c, 1);
1394 return (IO_ERROR);
1397 cmd_free(info_p, c, 1);
1398 return (IO_OK);
1402 * revalidate_allvol is for online array config utilities. After a
1403 * utility reconfigures the drives in the array, it can use this function
1404 * (through an ioctl) to make the driver zap any previous disk structs for
1405 * that controller and get new ones.
1407 * Right now I'm using the getgeometry() function to do this, but this
1408 * function should probably be finer grained and allow you to revalidate one
1409 * particualar logical volume (instead of all of them on a particular
1410 * controller).
1412 static int revalidate_allvol(ctlr_info_t *host)
1414 int ctlr = host->ctlr;
1415 int i;
1416 unsigned long flags;
1418 spin_lock_irqsave(IDA_LOCK(ctlr), flags);
1419 if (host->usage_count > 1) {
1420 spin_unlock_irqrestore(IDA_LOCK(ctlr), flags);
1421 printk(KERN_WARNING "cpqarray: Device busy for volume"
1422 " revalidation (usage=%d)\n", host->usage_count);
1423 return -EBUSY;
1425 host->usage_count++;
1426 spin_unlock_irqrestore(IDA_LOCK(ctlr), flags);
1429 * Set the partition and block size structures for all volumes
1430 * on this controller to zero. We will reread all of this data
1432 set_capacity(ida_gendisk[ctlr][0], 0);
1433 for (i = 1; i < NWD; i++) {
1434 struct gendisk *disk = ida_gendisk[ctlr][i];
1435 if (disk->flags & GENHD_FL_UP)
1436 del_gendisk(disk);
1438 memset(host->drv, 0, sizeof(drv_info_t)*NWD);
1441 * Tell the array controller not to give us any interrupts while
1442 * we check the new geometry. Then turn interrupts back on when
1443 * we're done.
1445 host->access.set_intr_mask(host, 0);
1446 getgeometry(ctlr);
1447 host->access.set_intr_mask(host, FIFO_NOT_EMPTY);
1449 for(i=0; i<NWD; i++) {
1450 struct gendisk *disk = ida_gendisk[ctlr][i];
1451 drv_info_t *drv = &host->drv[i];
1452 if (i && !drv->nr_blks)
1453 continue;
1454 blk_queue_hardsect_size(host->queue, drv->blk_size);
1455 set_capacity(disk, drv->nr_blks);
1456 disk->queue = host->queue;
1457 disk->private_data = drv;
1458 if (i)
1459 add_disk(disk);
1462 host->usage_count--;
1463 return 0;
1466 static int ida_revalidate(struct gendisk *disk)
1468 drv_info_t *drv = disk->private_data;
1469 set_capacity(disk, drv->nr_blks);
1470 return 0;
1473 /********************************************************************
1474 name: pollcomplete
1475 Wait polling for a command to complete.
1476 The memory mapped FIFO is polled for the completion.
1477 Used only at init time, interrupts disabled.
1478 ********************************************************************/
1479 static int pollcomplete(int ctlr)
1481 int done;
1482 int i;
1484 /* Wait (up to 2 seconds) for a command to complete */
1486 for (i = 200000; i > 0; i--) {
1487 done = hba[ctlr]->access.command_completed(hba[ctlr]);
1488 if (done == 0) {
1489 udelay(10); /* a short fixed delay */
1490 } else
1491 return (done);
1493 /* Invalid address to tell caller we ran out of time */
1494 return 1;
1496 /*****************************************************************
1497 start_fwbk
1498 Starts controller firmwares background processing.
1499 Currently only the Integrated Raid controller needs this done.
1500 If the PCI mem address registers are written to after this,
1501 data corruption may occur
1502 *****************************************************************/
1503 static void start_fwbk(int ctlr)
1505 id_ctlr_t *id_ctlr_buf;
1506 int ret_code;
1508 if( (hba[ctlr]->board_id != 0x40400E11)
1509 && (hba[ctlr]->board_id != 0x40480E11) )
1511 /* Not a Integrated Raid, so there is nothing for us to do */
1512 return;
1513 printk(KERN_DEBUG "cpqarray: Starting firmware's background"
1514 " processing\n");
1515 /* Command does not return anything, but idasend command needs a
1516 buffer */
1517 id_ctlr_buf = (id_ctlr_t *)kmalloc(sizeof(id_ctlr_t), GFP_KERNEL);
1518 if(id_ctlr_buf==NULL)
1520 printk(KERN_WARNING "cpqarray: Out of memory. "
1521 "Unable to start background processing.\n");
1522 return;
1524 ret_code = sendcmd(RESUME_BACKGROUND_ACTIVITY, ctlr,
1525 id_ctlr_buf, 0, 0, 0, 0);
1526 if(ret_code != IO_OK)
1527 printk(KERN_WARNING "cpqarray: Unable to start"
1528 " background processing\n");
1530 kfree(id_ctlr_buf);
1532 /*****************************************************************
1533 getgeometry
1534 Get ida logical volume geometry from the controller
1535 This is a large bit of code which once existed in two flavors,
1536 It is used only at init time.
1537 *****************************************************************/
1538 static void getgeometry(int ctlr)
1540 id_log_drv_t *id_ldrive;
1541 id_ctlr_t *id_ctlr_buf;
1542 sense_log_drv_stat_t *id_lstatus_buf;
1543 config_t *sense_config_buf;
1544 unsigned int log_unit, log_index;
1545 int ret_code, size;
1546 drv_info_t *drv;
1547 ctlr_info_t *info_p = hba[ctlr];
1548 int i;
1550 info_p->log_drv_map = 0;
1552 id_ldrive = (id_log_drv_t *)kmalloc(sizeof(id_log_drv_t), GFP_KERNEL);
1553 if(id_ldrive == NULL)
1555 printk( KERN_ERR "cpqarray: out of memory.\n");
1556 return;
1559 id_ctlr_buf = (id_ctlr_t *)kmalloc(sizeof(id_ctlr_t), GFP_KERNEL);
1560 if(id_ctlr_buf == NULL)
1562 kfree(id_ldrive);
1563 printk( KERN_ERR "cpqarray: out of memory.\n");
1564 return;
1567 id_lstatus_buf = (sense_log_drv_stat_t *)kmalloc(sizeof(sense_log_drv_stat_t), GFP_KERNEL);
1568 if(id_lstatus_buf == NULL)
1570 kfree(id_ctlr_buf);
1571 kfree(id_ldrive);
1572 printk( KERN_ERR "cpqarray: out of memory.\n");
1573 return;
1576 sense_config_buf = (config_t *)kmalloc(sizeof(config_t), GFP_KERNEL);
1577 if(sense_config_buf == NULL)
1579 kfree(id_lstatus_buf);
1580 kfree(id_ctlr_buf);
1581 kfree(id_ldrive);
1582 printk( KERN_ERR "cpqarray: out of memory.\n");
1583 return;
1586 memset(id_ldrive, 0, sizeof(id_log_drv_t));
1587 memset(id_ctlr_buf, 0, sizeof(id_ctlr_t));
1588 memset(id_lstatus_buf, 0, sizeof(sense_log_drv_stat_t));
1589 memset(sense_config_buf, 0, sizeof(config_t));
1591 info_p->phys_drives = 0;
1592 info_p->log_drv_map = 0;
1593 info_p->drv_assign_map = 0;
1594 info_p->drv_spare_map = 0;
1595 info_p->mp_failed_drv_map = 0; /* only initialized here */
1596 /* Get controllers info for this logical drive */
1597 ret_code = sendcmd(ID_CTLR, ctlr, id_ctlr_buf, 0, 0, 0, 0);
1598 if (ret_code == IO_ERROR) {
1600 * If can't get controller info, set the logical drive map to 0,
1601 * so the idastubopen will fail on all logical drives
1602 * on the controller.
1604 /* Free all the buffers and return */
1605 printk(KERN_ERR "cpqarray: error sending ID controller\n");
1606 kfree(sense_config_buf);
1607 kfree(id_lstatus_buf);
1608 kfree(id_ctlr_buf);
1609 kfree(id_ldrive);
1610 return;
1613 info_p->log_drives = id_ctlr_buf->nr_drvs;;
1614 for(i=0;i<4;i++)
1615 info_p->firm_rev[i] = id_ctlr_buf->firm_rev[i];
1616 info_p->ctlr_sig = id_ctlr_buf->cfg_sig;
1618 printk(" (%s)\n", info_p->product_name);
1620 * Initialize logical drive map to zero
1622 log_index = 0;
1624 * Get drive geometry for all logical drives
1626 if (id_ctlr_buf->nr_drvs > 16)
1627 printk(KERN_WARNING "cpqarray ida%d: This driver supports "
1628 "16 logical drives per controller.\n. "
1629 " Additional drives will not be "
1630 "detected\n", ctlr);
1632 for (log_unit = 0;
1633 (log_index < id_ctlr_buf->nr_drvs)
1634 && (log_unit < NWD);
1635 log_unit++) {
1636 struct gendisk *disk = ida_gendisk[ctlr][log_unit];
1638 size = sizeof(sense_log_drv_stat_t);
1641 Send "Identify logical drive status" cmd
1643 ret_code = sendcmd(SENSE_LOG_DRV_STAT,
1644 ctlr, id_lstatus_buf, size, 0, 0, log_unit);
1645 if (ret_code == IO_ERROR) {
1647 If can't get logical drive status, set
1648 the logical drive map to 0, so the
1649 idastubopen will fail for all logical drives
1650 on the controller.
1652 info_p->log_drv_map = 0;
1653 printk( KERN_WARNING
1654 "cpqarray ida%d: idaGetGeometry - Controller"
1655 " failed to report status of logical drive %d\n"
1656 "Access to this controller has been disabled\n",
1657 ctlr, log_unit);
1658 /* Free all the buffers and return */
1659 kfree(sense_config_buf);
1660 kfree(id_lstatus_buf);
1661 kfree(id_ctlr_buf);
1662 kfree(id_ldrive);
1663 return;
1666 Make sure the logical drive is configured
1668 if (id_lstatus_buf->status != LOG_NOT_CONF) {
1669 ret_code = sendcmd(ID_LOG_DRV, ctlr, id_ldrive,
1670 sizeof(id_log_drv_t), 0, 0, log_unit);
1672 If error, the bit for this
1673 logical drive won't be set and
1674 idastubopen will return error.
1676 if (ret_code != IO_ERROR) {
1677 drv = &info_p->drv[log_unit];
1678 drv->blk_size = id_ldrive->blk_size;
1679 drv->nr_blks = id_ldrive->nr_blks;
1680 drv->cylinders = id_ldrive->drv.cyl;
1681 drv->heads = id_ldrive->drv.heads;
1682 drv->sectors = id_ldrive->drv.sect_per_track;
1683 info_p->log_drv_map |= (1 << log_unit);
1685 printk(KERN_INFO "cpqarray ida/c%dd%d: blksz=%d nr_blks=%d\n",
1686 ctlr, log_unit, drv->blk_size, drv->nr_blks);
1687 ret_code = sendcmd(SENSE_CONFIG,
1688 ctlr, sense_config_buf,
1689 sizeof(config_t), 0, 0, log_unit);
1690 if (ret_code == IO_ERROR) {
1691 info_p->log_drv_map = 0;
1692 /* Free all the buffers and return */
1693 printk(KERN_ERR "cpqarray: error sending sense config\n");
1694 kfree(sense_config_buf);
1695 kfree(id_lstatus_buf);
1696 kfree(id_ctlr_buf);
1697 kfree(id_ldrive);
1698 return;
1702 sprintf(disk->devfs_name, "ida/c%dd%d", ctlr, log_unit);
1704 info_p->phys_drives =
1705 sense_config_buf->ctlr_phys_drv;
1706 info_p->drv_assign_map
1707 |= sense_config_buf->drv_asgn_map;
1708 info_p->drv_assign_map
1709 |= sense_config_buf->spare_asgn_map;
1710 info_p->drv_spare_map
1711 |= sense_config_buf->spare_asgn_map;
1712 } /* end of if no error on id_ldrive */
1713 log_index = log_index + 1;
1714 } /* end of if logical drive configured */
1715 } /* end of for log_unit */
1716 kfree(sense_config_buf);
1717 kfree(id_ldrive);
1718 kfree(id_lstatus_buf);
1719 kfree(id_ctlr_buf);
1720 return;
1724 module_init(cpqarray_init)
1725 module_exit(cpqarray_exit)