drivers/isdn/hisax/telespci.c

   1 /* $Id: telespci.c,v 2.16.6.5 2001/09/23 22:24:52 kai Exp $
   2  *
   3  * low level stuff for Teles PCI isdn cards
   4  *
   5  * Author       Ton van Rosmalen
   6  *              Karsten Keil
   7  * Copyright    by Ton van Rosmalen
   8  *              by Karsten Keil      <keil@isdn4linux.de>
   9  *
  10  * This software may be used and distributed according to the terms
  11  * of the GNU General Public License, incorporated herein by reference.
  12  *
  13  */
  14
  15 #include <linux/init.h>
  16 #include <linux/config.h>
  17 #include "hisax.h"
  18 #include "isac.h"
  19 #include "hscx.h"
  20 #include "isdnl1.h"
  21 #include <linux/pci.h>
  22
  23 extern const char *CardType[];
  24 const char *telespci_revision = "$Revision: 2.16.6.5 $";
  25
  26 #define ZORAN_PO_RQ_PEN 0x02000000
  27 #define ZORAN_PO_WR     0x00800000
  28 #define ZORAN_PO_GID0   0x00000000
  29 #define ZORAN_PO_GID1   0x00100000
  30 #define ZORAN_PO_GREG0  0x00000000
  31 #define ZORAN_PO_GREG1  0x00010000
  32 #define ZORAN_PO_DMASK  0xFF
  33
  34 #define WRITE_ADDR_ISAC (ZORAN_PO_WR | ZORAN_PO_GID0 | ZORAN_PO_GREG0)
  35 #define READ_DATA_ISAC  (ZORAN_PO_GID0 | ZORAN_PO_GREG1)
  36 #define WRITE_DATA_ISAC (ZORAN_PO_WR | ZORAN_PO_GID0 | ZORAN_PO_GREG1)
  37 #define WRITE_ADDR_HSCX (ZORAN_PO_WR | ZORAN_PO_GID1 | ZORAN_PO_GREG0)
  38 #define READ_DATA_HSCX  (ZORAN_PO_GID1 | ZORAN_PO_GREG1)
  39 #define WRITE_DATA_HSCX (ZORAN_PO_WR | ZORAN_PO_GID1 | ZORAN_PO_GREG1)
  40
  41 #define ZORAN_WAIT_NOBUSY       do { \
  42                                         portdata = readl(adr); \
  43                                 } while (portdata & ZORAN_PO_RQ_PEN)
  44
  45 static u8
  46 isac_read(struct IsdnCardState *cs, u8 off)
  47 {
  48         void *adr = cs->hw.teles0.membase + 0x200;
  49         unsigned int portdata;
  50
  51         ZORAN_WAIT_NOBUSY;
  52
  53         /* set address for ISAC */
  54         writel(WRITE_ADDR_ISAC | off, adr);
  55         ZORAN_WAIT_NOBUSY;
  56
  57         /* read data from ISAC */
  58         writel(READ_DATA_ISAC, adr);
  59         ZORAN_WAIT_NOBUSY;
  60         return((u8)(portdata & ZORAN_PO_DMASK));
  61 }
  62
  63 static void
  64 isac_write(struct IsdnCardState *cs, u8 off, u8 data)
  65 {
  66         void *adr = cs->hw.teles0.membase + 0x200;
  67         unsigned int portdata;
  68
  69         ZORAN_WAIT_NOBUSY;
  70
  71         /* set address for ISAC */
  72         writel(WRITE_ADDR_ISAC | off, adr);
  73         ZORAN_WAIT_NOBUSY;
  74
  75         /* write data to ISAC */
  76         writel(WRITE_DATA_ISAC | data, adr);
  77         ZORAN_WAIT_NOBUSY;
  78 }
  79
  80 static void
  81 isac_read_fifo(struct IsdnCardState *cs, u8 *data, int size)
  82 {
  83         void *adr = cs->hw.teles0.membase + 0x200;
  84         unsigned int portdata;
  85         int i;
  86
  87         ZORAN_WAIT_NOBUSY;
  88         /* read data from ISAC */
  89         for (i = 0; i < size; i++) {
  90                 /* set address for ISAC fifo */
  91                 writel(WRITE_ADDR_ISAC | 0x1E, adr);
  92                 ZORAN_WAIT_NOBUSY;
  93                 writel(READ_DATA_ISAC, adr);
  94                 ZORAN_WAIT_NOBUSY;
  95                 data[i] = (u8)(portdata & ZORAN_PO_DMASK);
  96         }
  97 }
  98
  99 static void
 100 isac_write_fifo(struct IsdnCardState *cs, u8 *data, int size)
 101 {
 102         void *adr = cs->hw.teles0.membase + 0x200;
 103         unsigned int portdata;
 104         int i;
 105
 106         ZORAN_WAIT_NOBUSY;
 107         /* write data to ISAC */
 108         for (i = 0; i < size; i++) {
 109                 /* set address for ISAC fifo */
 110                 writel(WRITE_ADDR_ISAC | 0x1E, adr);
 111                 ZORAN_WAIT_NOBUSY;
 112                 writel(WRITE_DATA_ISAC | data[i], adr);
 113                 ZORAN_WAIT_NOBUSY;
 114         }
 115 }
 116
 117 static struct dc_hw_ops isac_ops = {
 118         .read_reg   = isac_read,
 119         .write_reg  = isac_write,
 120         .read_fifo  = isac_read_fifo,
 121         .write_fifo = isac_write_fifo,
 122 };
 123
 124 static u8
 125 hscx_read(struct IsdnCardState *cs, int hscx, u8 off)
 126 {
 127         void *adr = cs->hw.teles0.membase + 0x200;
 128         unsigned int portdata;
 129
 130         ZORAN_WAIT_NOBUSY;
 131         /* set address for HSCX */
 132         writel(WRITE_ADDR_HSCX | ((hscx ? 0x40:0) + off), adr);
 133         ZORAN_WAIT_NOBUSY;
 134
 135         /* read data from HSCX */
 136         writel(READ_DATA_HSCX, adr);
 137         ZORAN_WAIT_NOBUSY;
 138         return ((u8)(portdata & ZORAN_PO_DMASK));
 139 }
 140
 141 static void
 142 hscx_write(struct IsdnCardState *cs, int hscx, u8 off, u8 data)
 143 {
 144         void *adr = cs->hw.teles0.membase + 0x200;
 145         unsigned int portdata;
 146
 147         ZORAN_WAIT_NOBUSY;
 148         /* set address for HSCX */
 149         writel(WRITE_ADDR_HSCX | ((hscx ? 0x40:0) + off), adr);
 150         ZORAN_WAIT_NOBUSY;
 151
 152         /* write data to HSCX */
 153         writel(WRITE_DATA_HSCX | data, adr);
 154         ZORAN_WAIT_NOBUSY;
 155 }
 156
 157 static void
 158 hscx_read_fifo(struct IsdnCardState *cs, int hscx, u8 * data, int size)
 159 {
 160         void *adr = cs->hw.teles0.membase + 0x200;
 161         unsigned int portdata;
 162         int i;
 163
 164         ZORAN_WAIT_NOBUSY;
 165         /* read data from HSCX */
 166         for (i = 0; i < size; i++) {
 167                 /* set address for HSCX fifo */
 168                 writel(WRITE_ADDR_HSCX |(hscx ? 0x5F:0x1F), adr);
 169                 ZORAN_WAIT_NOBUSY;
 170                 writel(READ_DATA_HSCX, adr);
 171                 ZORAN_WAIT_NOBUSY;
 172                 data[i] = (u8) (portdata & ZORAN_PO_DMASK);
 173         }
 174 }
 175
 176 static void
 177 hscx_write_fifo(struct IsdnCardState *cs, int hscx, u8 * data, int size)
 178 {
 179         void *adr = cs->hw.teles0.membase + 0x200;
 180         unsigned int portdata;
 181         int i;
 182
 183         ZORAN_WAIT_NOBUSY;
 184         /* write data to HSCX */
 185         for (i = 0; i < size; i++) {
 186                 /* set address for HSCX fifo */
 187                 writel(WRITE_ADDR_HSCX |(hscx ? 0x5F:0x1F), adr);
 188                 ZORAN_WAIT_NOBUSY;
 189                 writel(WRITE_DATA_HSCX | data[i], adr);
 190                 ZORAN_WAIT_NOBUSY;
 191                 udelay(10);
 192         }
 193 }
 194
 195 static struct bc_hw_ops hscx_ops = {
 196         .read_reg   = hscx_read,
 197         .write_reg  = hscx_write,
 198         .read_fifo  = hscx_read_fifo,
 199         .write_fifo = hscx_write_fifo,
 200 };
 201
 202 static irqreturn_t
 203 telespci_interrupt(int intno, void *dev_id, struct pt_regs *regs)
 204 {
 205 #define MAXCOUNT 20
 206         struct IsdnCardState *cs = dev_id;
 207         u8 val;
 208
 209         spin_lock(&cs->lock);
 210         val = hscx_read(cs, 1, HSCX_ISTA);
 211         if (val)
 212                 hscx_int_main(cs, val);
 213         val = isac_read(cs, ISAC_ISTA);
 214         if (val)
 215                 isac_interrupt(cs, val);
 216         /* Clear interrupt register for Zoran PCI controller */
 217         writel(0x70000000, cs->hw.teles0.membase + 0x3C);
 218
 219         hscx_write(cs, 0, HSCX_MASK, 0xFF);
 220         hscx_write(cs, 1, HSCX_MASK, 0xFF);
 221         isac_write(cs, ISAC_MASK, 0xFF);
 222         isac_write(cs, ISAC_MASK, 0x0);
 223         hscx_write(cs, 0, HSCX_MASK, 0x0);
 224         hscx_write(cs, 1, HSCX_MASK, 0x0);
 225         spin_unlock(&cs->lock);
 226         return IRQ_HANDLED;
 227 }
 228
 229 static struct card_ops telespci_ops = {
 230         .init     = inithscxisac,
 231         .release  = hisax_release_resources,
 232         .irq_func = telespci_interrupt,
 233 };
 234
 235 static int __init
 236 telespci_probe(struct IsdnCardState *cs, struct pci_dev *pdev)
 237 {
 238         int rc;
 239
 240         printk(KERN_INFO "TelesPCI: defined at %#lx IRQ %d\n",
 241                pci_resource_start(pdev, 0), pdev->irq);
 242
 243         rc = -EBUSY;
 244         if (pci_enable_device(pdev))
 245                 goto err;
 246
 247         cs->irq = pdev->irq;
 248         cs->irq_flags |= SA_SHIRQ;
 249         cs->hw.teles0.membase = request_mmio(&cs->rs, pci_resource_start(pdev, 0), 4096, "telespci");
 250         if (!cs->hw.teles0.membase)
 251                 goto err;
 252
 253         /* Initialize Zoran PCI controller */
 254         writel(0x00000000, cs->hw.teles0.membase + 0x28);
 255         writel(0x01000000, cs->hw.teles0.membase + 0x28);
 256         writel(0x01000000, cs->hw.teles0.membase + 0x28);
 257         writel(0x7BFFFFFF, cs->hw.teles0.membase + 0x2C);
 258         writel(0x70000000, cs->hw.teles0.membase + 0x3C);
 259         writel(0x61000000, cs->hw.teles0.membase + 0x40);
 260         /* writel(0x00800000, cs->hw.teles0.membase + 0x200); */
 261
 262         cs->card_ops = &telespci_ops;
 263         if (hscxisac_setup(cs, &isac_ops, &hscx_ops))
 264                 goto err;
 265         return 0;
 266  err:
 267         hisax_release_resources(cs);
 268         return rc;
 269 }
 270
 271 static struct pci_dev *dev_tel __initdata = NULL;
 272
 273 int __init
 274 setup_telespci(struct IsdnCard *card)
 275 {
 276         char tmp[64];
 277
 278 #ifdef __BIG_ENDIAN
 279 #error "not running on big endian machines now"
 280 #endif
 281         strcpy(tmp, telespci_revision);
 282         printk(KERN_INFO "HiSax: Teles/PCI driver Rev. %s\n",
 283                HiSax_getrev(tmp));
 284         dev_tel = pci_find_device(PCI_VENDOR_ID_ZORAN,
 285                                   PCI_DEVICE_ID_ZORAN_36120, dev_tel);
 286         if (dev_tel) {
 287                 if (telespci_probe(card->cs, dev_tel) < 0)
 288                         return 0;
 289                 return 1;
 290         }
 291         printk(KERN_WARNING "TelesPCI: No PCI card found\n");
 292         return 0;
 293 }