1 /* $Id: bkm_a8.c,v 1.14.6.7 2001/09/23 22:24:46 kai Exp $
3 * low level stuff for Scitel Quadro (4*S0, passive)
5 * Author Roland Klabunde
6 * Copyright by Roland Klabunde <R.Klabunde@Berkom.de>
8 * This software may be used and distributed according to the terms
9 * of the GNU General Public License, incorporated herein by reference.
13 #include <linux/config.h>
14 #include <linux/init.h>
20 #include <linux/pci.h>
23 #define ATTEMPT_PCI_REMAPPING /* Required for PLX rev 1 */
25 extern const char *CardType
[];
26 static spinlock_t bkm_a8_lock
= SPIN_LOCK_UNLOCKED
;
27 const char sct_quadro_revision
[] = "$Revision: 1.14.6.7 $";
29 static const char *sct_quadro_subtypes
[] =
39 #define wordout(addr,val) outw(val,addr)
40 #define wordin(addr) inw(addr)
43 ipac_read(struct IsdnCardState
*cs
, u8 off
)
48 spin_lock_irqsave(&bkm_a8_lock
, flags
);
49 wordout(cs
->hw
.ax
.base
, off
);
50 ret
= wordin(cs
->hw
.ax
.data_adr
) & 0xFF;
51 spin_unlock_irqrestore(&bkm_a8_lock
, flags
);
56 ipac_write(struct IsdnCardState
*cs
, u8 off
, u8 data
)
60 spin_lock_irqsave(&bkm_a8_lock
, flags
);
61 wordout(cs
->hw
.ax
.base
, off
);
62 wordout(cs
->hw
.ax
.data_adr
, data
);
63 spin_unlock_irqrestore(&bkm_a8_lock
, flags
);
67 ipac_readfifo(struct IsdnCardState
*cs
, u8 off
, u8
*data
, int size
)
71 wordout(cs
->hw
.ax
.base
, off
);
72 for (i
= 0; i
< size
; i
++)
73 data
[i
] = wordin(cs
->hw
.ax
.data_adr
) & 0xFF;
77 ipac_writefifo(struct IsdnCardState
*cs
, u8 off
, u8
*data
, int size
)
81 wordout(cs
->hw
.ax
.base
, off
);
82 for (i
= 0; i
< size
; i
++)
83 wordout(cs
->hw
.ax
.data_adr
, data
[i
]);
86 /* This will generate ipac_dc_ops and ipac_bc_ops using the functions
91 /* Set the specific ipac to active */
93 set_ipac_active(struct IsdnCardState
*cs
, u_int active
)
96 ipac_write(cs
, IPAC_MASK
, active
? 0xc0 : 0xff);
100 enable_bkm_int(struct IsdnCardState
*cs
, unsigned bEnable
)
103 wordout(cs
->hw
.ax
.plx_adr
+ 0x4C, (wordin(cs
->hw
.ax
.plx_adr
+ 0x4C) | 0x41));
105 wordout(cs
->hw
.ax
.plx_adr
+ 0x4C, (wordin(cs
->hw
.ax
.plx_adr
+ 0x4C) & ~0x41));
109 reset_bkm(struct IsdnCardState
*cs
)
111 if (cs
->subtyp
== SCT_1
) {
112 wordout(cs
->hw
.ax
.plx_adr
+ 0x50, (wordin(cs
->hw
.ax
.plx_adr
+ 0x50) & ~4));
113 set_current_state(TASK_UNINTERRUPTIBLE
);
114 schedule_timeout((10 * HZ
) / 1000);
115 /* Remove the soft reset */
116 wordout(cs
->hw
.ax
.plx_adr
+ 0x50, (wordin(cs
->hw
.ax
.plx_adr
+ 0x50) | 4));
117 set_current_state(TASK_UNINTERRUPTIBLE
);
118 schedule_timeout((10 * HZ
) / 1000);
123 bkm_a8_init(struct IsdnCardState
*cs
)
125 cs
->debug
|= L1_DEB_IPAC
;
126 set_ipac_active(cs
, 1);
129 enable_bkm_int(cs
, 1);
133 bkm_a8_reset(struct IsdnCardState
*cs
)
136 set_ipac_active(cs
, 0);
137 enable_bkm_int(cs
, 0);
143 bkm_a8_release(struct IsdnCardState
*cs
)
145 set_ipac_active(cs
, 0);
146 enable_bkm_int(cs
, 0);
147 hisax_release_resources(cs
);
150 static struct card_ops bkm_a8_ops
= {
152 .reset
= bkm_a8_reset
,
153 .release
= bkm_a8_release
,
154 .irq_func
= ipac_irq
,
157 static struct pci_dev
*dev_a8 __initdata
= NULL
;
158 static u16 sub_vendor_id __initdata
= 0;
159 static u16 sub_sys_id __initdata
= 0;
160 static u8 pci_irq __initdata
= 0;
163 setup_sct_quadro(struct IsdnCard
*card
)
165 struct IsdnCardState
*cs
= card
->cs
;
169 u_int pci_ioaddr1
, pci_ioaddr2
, pci_ioaddr3
, pci_ioaddr4
, pci_ioaddr5
;
171 strcpy(tmp
, sct_quadro_revision
);
172 printk(KERN_INFO
"HiSax: T-Berkom driver Rev. %s\n", HiSax_getrev(tmp
));
173 /* Identify subtype by para[0] */
174 if (card
->para
[0] >= SCT_1
&& card
->para
[0] <= SCT_4
)
175 cs
->subtyp
= card
->para
[0];
177 printk(KERN_WARNING
"HiSax: %s: Invalid subcontroller in configuration, default to 1\n",
178 CardType
[card
->typ
]);
181 if ((cs
->subtyp
!= SCT_1
) && ((sub_sys_id
!= PCI_DEVICE_ID_BERKOM_SCITEL_QUADRO
) ||
182 (sub_vendor_id
!= PCI_VENDOR_ID_BERKOM
)))
184 if (cs
->subtyp
== SCT_1
) {
185 while ((dev_a8
= pci_find_device(PCI_VENDOR_ID_PLX
,
186 PCI_DEVICE_ID_PLX_9050
, dev_a8
))) {
188 sub_vendor_id
= dev_a8
->subsystem_vendor
;
189 sub_sys_id
= dev_a8
->subsystem_device
;
190 if ((sub_sys_id
== PCI_DEVICE_ID_BERKOM_SCITEL_QUADRO
) &&
191 (sub_vendor_id
== PCI_VENDOR_ID_BERKOM
)) {
192 if (pci_enable_device(dev_a8
))
194 pci_ioaddr1
= pci_resource_start(dev_a8
, 1);
195 pci_irq
= dev_a8
->irq
;
201 printk(KERN_WARNING
"HiSax: %s (%s): Card not found\n",
203 sct_quadro_subtypes
[cs
->subtyp
]);
206 #ifdef ATTEMPT_PCI_REMAPPING
207 /* HACK: PLX revision 1 bug: PLX address bit 7 must not be set */
208 pci_read_config_byte(dev_a8
, PCI_REVISION_ID
, &pci_rev_id
);
209 if ((pci_ioaddr1
& 0x80) && (pci_rev_id
== 1)) {
210 printk(KERN_WARNING
"HiSax: %s (%s): PLX rev 1, remapping required!\n",
212 sct_quadro_subtypes
[cs
->subtyp
]);
213 /* Restart PCI negotiation */
214 pci_write_config_dword(dev_a8
, PCI_BASE_ADDRESS_1
, (u_int
) - 1);
215 /* Move up by 0x80 byte */
217 pci_ioaddr1
&= PCI_BASE_ADDRESS_IO_MASK
;
218 pci_write_config_dword(dev_a8
, PCI_BASE_ADDRESS_1
, pci_ioaddr1
);
219 dev_a8
->resource
[ 1].start
= pci_ioaddr1
;
221 #endif /* End HACK */
223 if (!pci_irq
) { /* IRQ range check ?? */
224 printk(KERN_WARNING
"HiSax: %s (%s): No IRQ\n",
226 sct_quadro_subtypes
[cs
->subtyp
]);
229 pci_read_config_dword(dev_a8
, PCI_BASE_ADDRESS_1
, &pci_ioaddr1
);
230 pci_read_config_dword(dev_a8
, PCI_BASE_ADDRESS_2
, &pci_ioaddr2
);
231 pci_read_config_dword(dev_a8
, PCI_BASE_ADDRESS_3
, &pci_ioaddr3
);
232 pci_read_config_dword(dev_a8
, PCI_BASE_ADDRESS_4
, &pci_ioaddr4
);
233 pci_read_config_dword(dev_a8
, PCI_BASE_ADDRESS_5
, &pci_ioaddr5
);
234 if (!pci_ioaddr1
|| !pci_ioaddr2
|| !pci_ioaddr3
|| !pci_ioaddr4
|| !pci_ioaddr5
) {
235 printk(KERN_WARNING
"HiSax: %s (%s): No IO base address(es)\n",
237 sct_quadro_subtypes
[cs
->subtyp
]);
240 pci_ioaddr1
&= PCI_BASE_ADDRESS_IO_MASK
;
241 pci_ioaddr2
&= PCI_BASE_ADDRESS_IO_MASK
;
242 pci_ioaddr3
&= PCI_BASE_ADDRESS_IO_MASK
;
243 pci_ioaddr4
&= PCI_BASE_ADDRESS_IO_MASK
;
244 pci_ioaddr5
&= PCI_BASE_ADDRESS_IO_MASK
;
247 cs
->irq_flags
|= SA_SHIRQ
;
248 /* pci_ioaddr1 is unique to all subdevices */
249 /* pci_ioaddr2 is for the fourth subdevice only */
250 /* pci_ioaddr3 is for the third subdevice only */
251 /* pci_ioaddr4 is for the second subdevice only */
252 /* pci_ioaddr5 is for the first subdevice only */
253 cs
->hw
.ax
.plx_adr
= pci_ioaddr1
;
254 /* Enter all ipac_base addresses */
257 cs
->hw
.ax
.base
= pci_ioaddr5
+ 0x00;
258 if (!request_io(&cs
->rs
, pci_ioaddr1
, 128, "scitel"))
260 if (!request_io(&cs
->rs
, pci_ioaddr5
, 64, "scitel"))
264 cs
->hw
.ax
.base
= pci_ioaddr4
+ 0x08;
265 if (!request_io(&cs
->rs
, pci_ioaddr4
, 64, "scitel"))
269 cs
->hw
.ax
.base
= pci_ioaddr3
+ 0x10;
270 if (!request_io(&cs
->rs
, pci_ioaddr3
, 64, "scitel"))
274 cs
->hw
.ax
.base
= pci_ioaddr2
+ 0x20;
275 if (!request_io(&cs
->rs
, pci_ioaddr2
, 64, "scitel"))
279 cs
->hw
.ax
.data_adr
= cs
->hw
.ax
.base
+ 4;
280 ipac_write(cs
, IPAC_MASK
, 0xFF);
282 printk(KERN_INFO
"HiSax: %s (%s) configured at 0x%.4lX, 0x%.4lX, 0x%.4lX and IRQ %d\n",
284 sct_quadro_subtypes
[cs
->subtyp
],
290 cs
->card_ops
= &bkm_a8_ops
;
291 if (ipac_setup(cs
, &ipac_dc_ops
, &ipac_bc_ops
))
296 hisax_release_resources(cs
);