1 /****************************************************************************/
3 * linux/include/asm-m68knommu/ide.h
5 * Copyright (C) 1994-1996 Linus Torvalds & authors
6 * Copyright (C) 2001 Lineo Inc., davidm@uclinux.org
8 /****************************************************************************/
9 #ifndef _M68KNOMMU_IDE_H
10 #define _M68KNOMMU_IDE_H
13 /****************************************************************************/
15 #include <linux/config.h>
16 #include <linux/interrupt.h>
18 #include <asm/setup.h>
22 /****************************************************************************/
24 * some coldfire specifics
27 #ifdef CONFIG_COLDFIRE
28 #include <asm/coldfire.h>
29 #include <asm/mcfsim.h>
32 * Save some space, only have 1 interface
34 #define MAX_HWIFS 1 /* we only have one interface for now */
36 #ifdef CONFIG_SECUREEDGEMP3
37 #define MCFSIM_LOCALCS MCFSIM_CSCR4
39 #define MCFSIM_LOCALCS MCFSIM_CSCR6
42 #endif /* CONFIG_COLDFIRE */
44 /****************************************************************************/
46 * Fix up things that may not have been provided
50 #define MAX_HWIFS 4 /* same as the other archs */
53 #undef SUPPORT_SLOW_DATA_PORTS
54 #define SUPPORT_SLOW_DATA_PORTS 0
56 #undef SUPPORT_VLB_SYNC
57 #define SUPPORT_VLB_SYNC 0
59 /* this definition is used only on startup .. */
63 #define DBGIDE(fmt,a...)
64 // #define DBGIDE(fmt,a...) printk(fmt, ##a)
65 #define IDE_INLINE __inline__
68 /****************************************************************************/
71 unsigned all
: 8; /* all of the bits together */
73 unsigned bit7
: 1; /* always 1 */
74 unsigned lba
: 1; /* using LBA instead of CHS */
75 unsigned bit5
: 1; /* always 1 */
76 unsigned unit
: 1; /* drive select number, 0 or 1 */
77 unsigned head
: 4; /* always zeros here */
82 * our list of ports/irq's for different boards
85 static struct m68k_ide_defaults
{
88 } m68k_ide_defaults
[MAX_HWIFS
] = {
89 #if defined(CONFIG_SECUREEDGEMP3)
90 { ((ide_ioreg_t
)0x30800000), 29 },
91 #elif defined(CONFIG_eLIA)
92 { ((ide_ioreg_t
)0x30c00000), 29 },
94 { ((ide_ioreg_t
)0x0), 0 }
98 /****************************************************************************/
100 static IDE_INLINE
int ide_default_irq(ide_ioreg_t base
)
104 for (i
= 0; i
< MAX_HWIFS
; i
++)
105 if (m68k_ide_defaults
[i
].base
== base
)
106 return(m68k_ide_defaults
[i
].irq
);
110 static IDE_INLINE ide_ioreg_t
ide_default_io_base(int index
)
112 if (index
>= 0 && index
< MAX_HWIFS
)
113 return(m68k_ide_defaults
[index
].base
);
119 * Set up a hw structure for a specified data port, control port and IRQ.
120 * This should follow whatever the default interface uses.
122 static IDE_INLINE
void ide_init_hwif_ports(
124 ide_ioreg_t data_port
,
125 ide_ioreg_t ctrl_port
,
128 ide_ioreg_t reg
= data_port
;
131 for (i
= IDE_DATA_OFFSET
; i
<= IDE_STATUS_OFFSET
; i
++) {
132 hw
->io_ports
[i
] = reg
;
136 hw
->io_ports
[IDE_CONTROL_OFFSET
] = ctrl_port
;
138 hw
->io_ports
[IDE_CONTROL_OFFSET
] = data_port
+ 0xe;
144 * This registers the standard ports for this architecture with the IDE
147 static IDE_INLINE
void ide_init_default_hwifs(void)
153 for (index
= 0; index
< MAX_HWIFS
; index
++) {
154 base
= ide_default_io_base(index
);
157 memset(&hw
, 0, sizeof(hw
));
158 ide_init_hwif_ports(&hw
, base
, 0, NULL
);
159 hw
.irq
= ide_default_irq(base
);
160 ide_register_hw(&hw
, NULL
);
165 static IDE_INLINE
int
168 void (*handler
)(int, void *, struct pt_regs
*),
173 #ifdef CONFIG_COLDFIRE
176 return(request_irq(irq
, handler
, flags
, device
, dev_id
));
180 static IDE_INLINE
void
181 ide_free_irq(unsigned int irq
, void *dev_id
)
183 free_irq(irq
, dev_id
);
187 static IDE_INLINE
int
188 ide_check_region(ide_ioreg_t from
, unsigned int extent
)
194 static IDE_INLINE
void
195 ide_request_region(ide_ioreg_t from
, unsigned int extent
, const char *name
)
200 static IDE_INLINE
void
201 ide_release_region(ide_ioreg_t from
, unsigned int extent
)
206 static IDE_INLINE
void
207 ide_fix_driveid(struct hd_driveid
*id
)
209 #ifdef CONFIG_COLDFIRE
211 unsigned short *wp
= (unsigned short *) id
;
212 int avoid
[] = {49, 51, 52, 59, -1 }; /* do not swap these words */
214 /* Need to byte swap shorts, but not char fields */
215 for (i
= n
= 0; i
< sizeof(*id
) / sizeof(*wp
); i
++, wp
++) {
220 *wp
= ((*wp
& 0xff) << 8) | ((*wp
>> 8) & 0xff);
222 /* have to word swap the one 32 bit field */
223 id
->lba_capacity
= ((id
->lba_capacity
& 0xffff) << 16) |
224 ((id
->lba_capacity
>> 16) & 0xffff);
229 static IDE_INLINE
void
230 ide_release_lock (int *ide_lock
)
235 static IDE_INLINE
void
238 void (*handler
)(int, void *, struct pt_regs
*),
244 #define ide_ack_intr(hwif) \
245 ((hwif)->hw.ack_intr ? (hwif)->hw.ack_intr(hwif) : 1)
246 #define ide__sti() __sti()
248 /****************************************************************************/
250 * System specific IO requirements
253 #ifdef CONFIG_COLDFIRE
255 #ifdef CONFIG_SECUREEDGEMP3
257 /* Replace standard IO functions for funky mapping of MP3 board */
263 #define outb(v, a) ide_outb(v, (unsigned long) (a))
264 #define outb_p(v, a) ide_outb(v, (unsigned long) (a))
265 #define inb(a) ide_inb((unsigned long) (a))
266 #define inb_p(a) ide_inb((unsigned long) (a))
268 #define ADDR8_PTR(addr) (((addr) & 0x1) ? (0x8000 + (addr) - 1) : (addr))
269 #define ADDR16_PTR(addr) (addr)
270 #define ADDR32_PTR(addr) (addr)
271 #define SWAP8(w) ((((w) & 0xffff) << 8) | (((w) & 0xffff) >> 8))
272 #define SWAP16(w) (w)
273 #define SWAP32(w) (w)
276 static IDE_INLINE
void
277 ide_outb(unsigned int val
, unsigned int addr
)
279 volatile unsigned short *rp
;
281 DBGIDE("%s(val=%x,addr=%x)\n", __FUNCTION__
, val
, addr
);
282 rp
= (volatile unsigned short *) ADDR8_PTR(addr
);
287 static IDE_INLINE
int
288 ide_inb(unsigned int addr
)
290 volatile unsigned short *rp
, val
;
292 DBGIDE("%s(addr=%x)\n", __FUNCTION__
, addr
);
293 rp
= (volatile unsigned short *) ADDR8_PTR(addr
);
299 static IDE_INLINE
void
300 ide_outw(unsigned int val
, unsigned int addr
)
302 volatile unsigned short *rp
;
304 DBGIDE("%s(val=%x,addr=%x)\n", __FUNCTION__
, val
, addr
);
305 rp
= (volatile unsigned short *) ADDR16_PTR(addr
);
309 static IDE_INLINE
void
310 ide_outsw(unsigned int addr
, const void *vbuf
, unsigned long len
)
312 volatile unsigned short *rp
, val
;
315 DBGIDE("%s(addr=%x,vbuf=%p,len=%x)\n", __FUNCTION__
, addr
, vbuf
, len
);
316 buf
= (unsigned short *) vbuf
;
317 rp
= (volatile unsigned short *) ADDR16_PTR(addr
);
318 for (; (len
> 0); len
--) {
324 static IDE_INLINE
int
325 ide_inw(unsigned int addr
)
327 volatile unsigned short *rp
, val
;
329 DBGIDE("%s(addr=%x)\n", __FUNCTION__
, addr
);
330 rp
= (volatile unsigned short *) ADDR16_PTR(addr
);
335 static IDE_INLINE
void
336 ide_insw(unsigned int addr
, void *vbuf
, unsigned long len
)
338 volatile unsigned short *rp
;
339 unsigned short w
, *buf
;
341 DBGIDE("%s(addr=%x,vbuf=%p,len=%x)\n", __FUNCTION__
, addr
, vbuf
, len
);
342 buf
= (unsigned short *) vbuf
;
343 rp
= (volatile unsigned short *) ADDR16_PTR(addr
);
344 for (; (len
> 0); len
--) {
350 static IDE_INLINE
void
351 ide_insl(unsigned int addr
, void *vbuf
, unsigned long len
)
353 volatile unsigned long *rp
;
354 unsigned long w
, *buf
;
356 DBGIDE("%s(addr=%x,vbuf=%p,len=%x)\n", __FUNCTION__
, addr
, vbuf
, len
);
357 buf
= (unsigned long *) vbuf
;
358 rp
= (volatile unsigned long *) ADDR32_PTR(addr
);
359 for (; (len
> 0); len
--) {
365 static IDE_INLINE
void
366 ide_outsl(unsigned int addr
, const void *vbuf
, unsigned long len
)
368 volatile unsigned long *rp
, val
;
371 DBGIDE("%s(addr=%x,vbuf=%p,len=%x)\n", __FUNCTION__
, addr
, vbuf
, len
);
372 buf
= (unsigned long *) vbuf
;
373 rp
= (volatile unsigned long *) ADDR32_PTR(addr
);
374 for (; (len
> 0); len
--) {
382 /* 8/16 bit acesses are controlled by flicking bits in the CS register */
383 #define ACCESS_MODE_16BIT() \
384 *((volatile unsigned short *) (MCF_MBAR + MCFSIM_LOCALCS)) = 0x0080
385 #define ACCESS_MODE_8BIT() \
386 *((volatile unsigned short *) (MCF_MBAR + MCFSIM_LOCALCS)) = 0x0040
389 static IDE_INLINE
void
390 ide_outw(unsigned int val
, unsigned int addr
)
397 static IDE_INLINE
void
398 ide_outsw(unsigned int addr
, const void *vbuf
, unsigned long len
)
401 outsw(addr
, vbuf
, len
);
405 static IDE_INLINE
int
406 ide_inw(unsigned int addr
)
416 static IDE_INLINE
void
417 ide_insw(unsigned int addr
, void *vbuf
, unsigned long len
)
420 insw(addr
, vbuf
, len
);
424 static IDE_INLINE
void
425 ide_insl(unsigned int addr
, void *vbuf
, unsigned long len
)
428 insl(addr
, vbuf
, len
);
432 static IDE_INLINE
void
433 ide_outsl(unsigned int addr
, const void *vbuf
, unsigned long len
)
436 outsl(addr
, vbuf
, len
);
440 #endif /* CONFIG_SECUREEDGEMP3 */
451 #define outw(v, a) ide_outw(v, (unsigned long) (a))
452 #define outw_p(v, a) ide_outw(v, (unsigned long) (a))
453 #define outsw(a, b, n) ide_outsw((unsigned long) (a), b, n)
454 #define inw(a) ide_inw((unsigned long) (a))
455 #define inw_p(a) ide_inw((unsigned long) (a))
456 #define insw(a, b, n) ide_insw((unsigned long) (a), b, n)
457 #define insl(a, b, n) ide_insl((unsigned long) (a), b, n)
458 #define outsl(a, b, n) ide_outsl((unsigned long) (a), b, n)
460 #endif CONFIG_COLDFIRE
462 /****************************************************************************/
463 #endif /* __KERNEL__ */
464 #endif /* _M68KNOMMU_IDE_H */
465 /****************************************************************************/