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[PATCH] update copyright and licensing
[linux-2.6/history.git] / drivers / scsi / dec_esp.c
blob22b919165c1e3b80f4eba122ad0573892b4b2e36
1 /*
2 * dec_esp.c: Driver for SCSI chips on IOASIC based TURBOchannel DECstations
3 * and TURBOchannel PMAZ-A cards
4 *
5 * TURBOchannel changes by Harald Koerfgen
6 * PMAZ-A support by David Airlie
7 *
8 * based on jazz_esp.c:
9 * Copyright (C) 1997 Thomas Bogendoerfer (tsbogend@alpha.franken.de)
10 *
11 * jazz_esp is based on David S. Miller's ESP driver and cyber_esp
12 *
13 * 20000819 - Small PMAZ-AA fixes by Florian Lohoff <flo@rfc822.org>
14 * Be warned the PMAZ-AA works currently as a single card.
15 * Dont try to put multiple cards in one machine - They are
16 * both detected but it may crash under high load garbling your
17 * data.
18 * 20001005 - Initialization fixes for 2.4.0-test9
19 * Florian Lohoff <flo@rfc822.org>
20 */
21
22 #include <linux/kernel.h>
23 #include <linux/delay.h>
24 #include <linux/types.h>
25 #include <linux/string.h>
26 #include <linux/slab.h>
27 #include <linux/blkdev.h>
28 #include <linux/proc_fs.h>
29 #include <linux/stat.h>
30
31 #include "scsi.h"
32 #include "hosts.h"
33 #include "NCR53C9x.h"
34
35 #include <asm/irq.h>
36 #include <asm/jazz.h>
37 #include <asm/jazzdma.h>
38 #include <asm/dma.h>
39
40 #include <asm/pgtable.h>
41
42 #include <asm/dec/tc.h>
43 #include <asm/dec/interrupts.h>
44 #include <asm/dec/ioasic_addrs.h>
45 #include <asm/dec/ioasic_ints.h>
46 #include <asm/dec/machtype.h>
47
48 #define DEC_SCSI_SREG 0
49 #define DEC_SCSI_DMAREG 0x40000
50 #define DEC_SCSI_SRAM 0x80000
51 #define DEC_SCSI_DIAG 0xC0000
52
53 /*
54 * Once upon a time the pmaz code used to be working but
55 * it hasn't been maintained for quite some time.
56 * It isn't working anymore but I'll leave here as a
57 * starting point. #define this an be prepared for tons
58 * of warnings and errors :)
59 */
60 static int dma_bytes_sent(struct NCR_ESP *esp, int fifo_count);
61 static void dma_drain(struct NCR_ESP *esp);
62 static int dma_can_transfer(struct NCR_ESP *esp, Scsi_Cmnd * sp);
63 static void dma_dump_state(struct NCR_ESP *esp);
64 static void dma_init_read(struct NCR_ESP *esp, __u32 vaddress, int length);
65 static void dma_init_write(struct NCR_ESP *esp, __u32 vaddress, int length);
66 static void dma_ints_off(struct NCR_ESP *esp);
67 static void dma_ints_on(struct NCR_ESP *esp);
68 static int dma_irq_p(struct NCR_ESP *esp);
69 static int dma_ports_p(struct NCR_ESP *esp);
70 static void dma_setup(struct NCR_ESP *esp, __u32 addr, int count, int write);
71 static void dma_mmu_get_scsi_one(struct NCR_ESP *esp, Scsi_Cmnd * sp);
72 static void dma_mmu_get_scsi_sgl(struct NCR_ESP *esp, Scsi_Cmnd * sp);
73 static void dma_advance_sg(Scsi_Cmnd * sp);
74
75 static void pmaz_dma_drain(struct NCR_ESP *esp);
76 static void pmaz_dma_init_read(struct NCR_ESP *esp, __u32 vaddress, int length);
77 static void pmaz_dma_init_write(struct NCR_ESP *esp, __u32 vaddress, int length);
78 static void pmaz_dma_ints_off(struct NCR_ESP *esp);
79 static void pmaz_dma_ints_on(struct NCR_ESP *esp);
80 static void pmaz_dma_setup(struct NCR_ESP *esp, __u32 addr, int count, int write);
81 static void pmaz_dma_mmu_get_scsi_one(struct NCR_ESP *esp, Scsi_Cmnd * sp);
82
83 #define TC_ESP_RAM_SIZE 0x20000
84 #define ESP_TGT_DMA_SIZE ((TC_ESP_RAM_SIZE/7) & ~(sizeof(int)-1))
85 #define ESP_NCMD 7
86
87 #define TC_ESP_DMAR_MASK 0x1ffff
88 #define TC_ESP_DMAR_WRITE 0x80000000
89 #define TC_ESP_DMA_ADDR(x) ((unsigned)(x) & TC_ESP_DMAR_MASK)
90
91 __u32 esp_virt_buffer;
92 int scsi_current_length;
93
94 volatile unsigned char cmd_buffer[16];
95 volatile unsigned char pmaz_cmd_buffer[16];
96 /* This is where all commands are put
97 * before they are trasfered to the ESP chip
98 * via PIO.
99 */
100
101 volatile unsigned long *scsi_dma_ptr;
102 volatile unsigned long *scsi_next_ptr;
103 volatile unsigned long *scsi_scr;
104 volatile unsigned long *ioasic_ssr;
105 volatile unsigned long *scsi_sdr0;
106 volatile unsigned long *scsi_sdr1;
107
108 static void scsi_dma_int(int, void *, struct pt_regs *);
109
110 int dec_esp_detect(Scsi_Host_Template * tpnt);
111
112 static int dec_esp_release(struct Scsi_Host *shost)
113 {
114 if (shost->irq)
115 free_irq(shost->irq, NULL);
116 if (shost->io_port && shost->n_io_port)
117 release_region(shost->io_port, shost->n_io_port);
118 scsi_unregister(shost);
119 return 0;
120 }
121
122 static Scsi_Host_Template driver_template = {
123 .proc_name = "esp",
124 .proc_info = &esp_proc_info,
125 .name = "NCR53C94",
126 .detect = dec_esp_detect,
127 .release = dec_esp_release,
128 .info = esp_info,
129 .queuecommand = esp_queue,
130 .eh_abort_handler = esp_abort,
131 .eh_bus_reset_handler = esp_reset,
132 .can_queue = 7,
133 .this_id = 7,
134 .sg_tablesize = SG_ALL,
135 .cmd_per_lun = 1,
136 .use_clustering = DISABLE_CLUSTERING,
137 };
138
139
140 #include "scsi_module.c"
141
142 /***************************************************************** Detection */
143 int dec_esp_detect(Scsi_Host_Template * tpnt)
144 {
145 struct NCR_ESP *esp;
146 struct ConfigDev *esp_dev;
147 int slot;
148 unsigned long mem_start;
149
150 if (IOASIC) {
151 esp_dev = 0;
152 esp = esp_allocate(tpnt, (void *) esp_dev);
153
154 scsi_dma_ptr = (unsigned long *) (system_base + IOCTL + SCSI_DMA_P);
155 scsi_next_ptr = (unsigned long *) (system_base + IOCTL + SCSI_DMA_BP);
156 scsi_scr = (unsigned long *) (system_base + IOCTL + SCSI_SCR);
157 ioasic_ssr = (unsigned long *) (system_base + IOCTL + SSR);
158 scsi_sdr0 = (unsigned long *) (system_base + IOCTL + SCSI_SDR0);
159 scsi_sdr1 = (unsigned long *) (system_base + IOCTL + SCSI_SDR1);
160
161 /* Do command transfer with programmed I/O */
162 esp->do_pio_cmds = 1;
163
164 /* Required functions */
165 esp->dma_bytes_sent = &dma_bytes_sent;
166 esp->dma_can_transfer = &dma_can_transfer;
167 esp->dma_dump_state = &dma_dump_state;
168 esp->dma_init_read = &dma_init_read;
169 esp->dma_init_write = &dma_init_write;
170 esp->dma_ints_off = &dma_ints_off;
171 esp->dma_ints_on = &dma_ints_on;
172 esp->dma_irq_p = &dma_irq_p;
173 esp->dma_ports_p = &dma_ports_p;
174 esp->dma_setup = &dma_setup;
175
176 /* Optional functions */
177 esp->dma_barrier = 0;
178 esp->dma_drain = &dma_drain;
179 esp->dma_invalidate = 0;
180 esp->dma_irq_entry = 0;
181 esp->dma_irq_exit = 0;
182 esp->dma_poll = 0;
183 esp->dma_reset = 0;
184 esp->dma_led_off = 0;
185 esp->dma_led_on = 0;
186
187 /* virtual DMA functions */
188 esp->dma_mmu_get_scsi_one = &dma_mmu_get_scsi_one;
189 esp->dma_mmu_get_scsi_sgl = &dma_mmu_get_scsi_sgl;
190 esp->dma_mmu_release_scsi_one = 0;
191 esp->dma_mmu_release_scsi_sgl = 0;
192 esp->dma_advance_sg = &dma_advance_sg;
193
194
195 /* SCSI chip speed */
196 esp->cfreq = 25000000;
197
198 /*
199 * we don't give the address of DMA channel, but the number
200 * of DMA channel, so we can use the jazz DMA functions
201 *
202 */
203 esp->dregs = JAZZ_SCSI_DMA;
204
205 /* ESP register base */
206 esp->eregs = (struct ESP_regs *) (system_base + SCSI);
207
208 /* Set the command buffer */
209 esp->esp_command = (volatile unsigned char *) cmd_buffer;
210
211 /* get virtual dma address for command buffer */
212 esp->esp_command_dvma = (__u32) KSEG1ADDR((volatile unsigned char *) cmd_buffer);
213
214 esp->irq = SCSI_INT;
215
216 esp->scsi_id = 7;
217
218 /* Check for differential SCSI-bus */
219 esp->diff = 0;
220
221 esp_initialize(esp);
222
223 if (request_irq(esp->irq, esp_intr, SA_INTERRUPT,
224 "NCR 53C94 SCSI", esp->ehost))
225 goto err_dealloc;
226 if (request_irq(SCSI_DMA_INT, scsi_dma_int, SA_INTERRUPT,
227 "JUNKIO SCSI DMA", esp->ehost))
228 goto err_free_irq;
229
230 }
231
232 if (TURBOCHANNEL) {
233 while ((slot = search_tc_card("PMAZ-AA")) >= 0) {
234 claim_tc_card(slot);
235
236 esp_dev = 0;
237 esp = esp_allocate(tpnt, (void *) esp_dev);
238
239 mem_start = get_tc_base_addr(slot);
240
241 /* Store base addr into esp struct */
242 esp->slot = mem_start;
243
244 esp->dregs = 0;
245 esp->eregs = (struct ESP_regs *) (mem_start + DEC_SCSI_SREG);
246 esp->do_pio_cmds = 1;
247
248 /* Set the command buffer */
249 esp->esp_command = (volatile unsigned char *) pmaz_cmd_buffer;
250
251 /* get virtual dma address for command buffer */
252 esp->esp_command_dvma = (__u32) KSEG0ADDR((volatile unsigned char *) pmaz_cmd_buffer);
253
254 esp->cfreq = get_tc_speed();
255
256 esp->irq = get_tc_irq_nr(slot);
257
258 /* Required functions */
259 esp->dma_bytes_sent = &dma_bytes_sent;
260 esp->dma_can_transfer = &dma_can_transfer;
261 esp->dma_dump_state = &dma_dump_state;
262 esp->dma_init_read = &pmaz_dma_init_read;
263 esp->dma_init_write = &pmaz_dma_init_write;
264 esp->dma_ints_off = &pmaz_dma_ints_off;
265 esp->dma_ints_on = &pmaz_dma_ints_on;
266 esp->dma_irq_p = &dma_irq_p;
267 esp->dma_ports_p = &dma_ports_p;
268 esp->dma_setup = &pmaz_dma_setup;
269
270 /* Optional functions */
271 esp->dma_barrier = 0;
272 esp->dma_drain = &pmaz_dma_drain;
273 esp->dma_invalidate = 0;
274 esp->dma_irq_entry = 0;
275 esp->dma_irq_exit = 0;
276 esp->dma_poll = 0;
277 esp->dma_reset = 0;
278 esp->dma_led_off = 0;
279 esp->dma_led_on = 0;
280
281 esp->dma_mmu_get_scsi_one = pmaz_dma_mmu_get_scsi_one;
282 esp->dma_mmu_get_scsi_sgl = 0;
283 esp->dma_mmu_release_scsi_one = 0;
284 esp->dma_mmu_release_scsi_sgl = 0;
285 esp->dma_advance_sg = 0;
286
287 if (request_irq(esp->irq, esp_intr, SA_INTERRUPT,
288 "PMAZ_AA", esp->ehost)) {
289 esp_deallocate(esp);
290 release_tc_card(slot);
291 continue;
292 }
293 esp->scsi_id = 7;
294 esp->diff = 0;
295 esp_initialize(esp);
296 }
297 }
298
299 if(nesps) {
300 printk("ESP: Total of %d ESP hosts found, %d actually in use.\n", nesps, esps_in_use);
301 esps_running = esps_in_use;
302 return esps_in_use;
303 }
304 return 0;
305
306 err_free_irq:
307 free_irq(esp->irq, esp_intr);
308 err_dealloc:
309 esp_deallocate(esp);
310 return 0;
311 }
312
313 /************************************************************* DMA Functions */
314 static void scsi_dma_int(int irq, void *dev_id, struct pt_regs *regs)
315 {
316 extern volatile unsigned int *isr;
317 unsigned int dummy;
318
319 if (*isr & SCSI_PTR_LOADED) {
320 /* next page */
321 *scsi_next_ptr = ((*scsi_dma_ptr + PAGE_SIZE) & PAGE_MASK) << 3;
322 *isr &= ~SCSI_PTR_LOADED;
323 } else {
324 if (*isr & SCSI_PAGOVRRUN)
325 *isr &= ~SCSI_PAGOVRRUN;
326 if (*isr & SCSI_DMA_MEMRDERR) {
327 printk("Got unexpected SCSI DMA Interrupt! < ");
328 printk("SCSI_DMA_MEMRDERR ");
329 printk(">\n");
330 *isr &= ~SCSI_DMA_MEMRDERR;
331 }
332 }
333
334 /*
335 * This routine will only work on IOASIC machines
336 * so we can avoid an indirect function call here
337 * and flush the writeback buffer the fast way
338 */
339 dummy = *isr;
340 dummy = *isr;
341 }
342
343 static int dma_bytes_sent(struct NCR_ESP *esp, int fifo_count)
344 {
345 return fifo_count;
346 }
347
348 static void dma_drain(struct NCR_ESP *esp)
349 {
350 unsigned long nw = *scsi_scr;
351 unsigned short *p = (unsigned short *)KSEG1ADDR((*scsi_dma_ptr) >> 3);
352
353 /*
354 * Is there something in the dma buffers left?
355 */
356 if (nw) {
357 switch (nw) {
358 case 1:
359 *p = (unsigned short) *scsi_sdr0;
360 break;
361 case 2:
362 *p++ = (unsigned short) (*scsi_sdr0);
363 *p = (unsigned short) ((*scsi_sdr0) >> 16);
364 break;
365 case 3:
366 *p++ = (unsigned short) (*scsi_sdr0);
367 *p++ = (unsigned short) ((*scsi_sdr0) >> 16);
368 *p = (unsigned short) (*scsi_sdr1);
369 break;
370 default:
371 printk("Strange: %d words in dma buffer left\n", (int) nw);
372 break;
373 }
374 }
375 }
376
377 static int dma_can_transfer(struct NCR_ESP *esp, Scsi_Cmnd * sp)
378 {
379 return sp->SCp.this_residual;;
380 }
381
382 static void dma_dump_state(struct NCR_ESP *esp)
383 {
384 /*
385 ESPLOG(("esp%d: dma -- enable <%08x> residue <%08x\n",
386 esp->esp_id, vdma_get_enable((int)esp->dregs), vdma_get_resdiue((int)esp->dregs)));
387 */
388 }
389
390 static void dma_init_read(struct NCR_ESP *esp, __u32 vaddress, int length)
391 {
392 extern volatile unsigned int *isr;
393 unsigned int dummy;
394
395 if (vaddress & 3)
396 panic("dec_efs.c: unable to handle partial word transfers, yet...");
397
398 dma_cache_wback_inv((unsigned long) phys_to_virt(vaddress), length);
399
400 *ioasic_ssr &= ~SCSI_DMA_EN;
401 *scsi_scr = 0;
402 *scsi_dma_ptr = vaddress << 3;
403
404 /* prepare for next page */
405 *scsi_next_ptr = ((vaddress + PAGE_SIZE) & PAGE_MASK) << 3;
406 *ioasic_ssr |= (SCSI_DMA_DIR | SCSI_DMA_EN);
407
408 /*
409 * see above
410 */
411 dummy = *isr;
412 dummy = *isr;
413 }
414
415 static void dma_init_write(struct NCR_ESP *esp, __u32 vaddress, int length)
416 {
417 extern volatile unsigned int *isr;
418 unsigned int dummy;
419
420 if (vaddress & 3)
421 panic("dec_efs.c: unable to handle partial word transfers, yet...");
422
423 dma_cache_wback_inv((unsigned long) phys_to_virt(vaddress), length);
424
425 *ioasic_ssr &= ~(SCSI_DMA_DIR | SCSI_DMA_EN);
426 *scsi_scr = 0;
427 *scsi_dma_ptr = vaddress << 3;
428
429 /* prepare for next page */
430 *scsi_next_ptr = ((vaddress + PAGE_SIZE) & PAGE_MASK) << 3;
431 *ioasic_ssr |= SCSI_DMA_EN;
432
433 /*
434 * see above
435 */
436 dummy = *isr;
437 dummy = *isr;
438 }
439
440 static void dma_ints_off(struct NCR_ESP *esp)
441 {
442 disable_irq(SCSI_DMA_INT);
443 }
444
445 static void dma_ints_on(struct NCR_ESP *esp)
446 {
447 enable_irq(SCSI_DMA_INT);
448 }
449
450 static int dma_irq_p(struct NCR_ESP *esp)
451 {
452 return (esp->eregs->esp_status & ESP_STAT_INTR);
453 }
454
455 static int dma_ports_p(struct NCR_ESP *esp)
456 {
457 /*
458 * FIXME: what's this good for?
459 */
460 return 1;
461 }
462
463 static void dma_setup(struct NCR_ESP *esp, __u32 addr, int count, int write)
464 {
465 /*
466 * On the Sparc, DMA_ST_WRITE means "move data from device to memory"
467 * so when (write) is true, it actually means READ!
468 */
469 if (write) {
470 dma_init_read(esp, addr, count);
471 } else {
472 dma_init_write(esp, addr, count);
473 }
474 }
475
476 /*
477 * These aren't used yet
478 */
479 static void dma_mmu_get_scsi_one(struct NCR_ESP *esp, Scsi_Cmnd * sp)
480 {
481 sp->SCp.ptr = (char *)PHYSADDR(sp->SCp.buffer);
482 }
483
484 static void dma_mmu_get_scsi_sgl(struct NCR_ESP *esp, Scsi_Cmnd * sp)
485 {
486 int sz = sp->SCp.buffers_residual;
487 struct mmu_sglist *sg = (struct mmu_sglist *) sp->SCp.buffer;
488
489 while (sz >= 0) {
490 sg[sz].dvma_addr = PHYSADDR(sg[sz].addr);
491 sz--;
492 }
493 sp->SCp.ptr = (char *) ((unsigned long) sp->SCp.buffer->dvma_address);
494 }
495
496 static void dma_advance_sg(Scsi_Cmnd * sp)
497 {
498 sp->SCp.ptr = (char *) ((unsigned long) sp->SCp.buffer->dvma_address);
499 }
500
501 static void pmaz_dma_drain(struct NCR_ESP *esp)
502 {
503 memcpy((void *) (KSEG0ADDR(esp_virt_buffer)),
504 (void *) ( esp->slot + DEC_SCSI_SRAM + ESP_TGT_DMA_SIZE),
505 scsi_current_length);
506 }
507
508 static void pmaz_dma_init_read(struct NCR_ESP *esp, __u32 vaddress, int length)
509 {
510 volatile int *dmareg = (volatile int *) (esp->slot + DEC_SCSI_DMAREG);
511
512 if (length > ESP_TGT_DMA_SIZE)
513 length = ESP_TGT_DMA_SIZE;
514
515 *dmareg = TC_ESP_DMA_ADDR(esp->slot + DEC_SCSI_SRAM + ESP_TGT_DMA_SIZE);
516
517 esp_virt_buffer = vaddress;
518 scsi_current_length = length;
519 }
520
521 static void pmaz_dma_init_write(struct NCR_ESP *esp, __u32 vaddress, int length)
522 {
523 volatile int *dmareg = (volatile int *) ( esp->slot + DEC_SCSI_DMAREG );
524
525 memcpy((void *)(esp->slot + DEC_SCSI_SRAM + ESP_TGT_DMA_SIZE),
526 (void *)KSEG0ADDR(vaddress), length);
527
528 *dmareg = TC_ESP_DMAR_WRITE |
529 TC_ESP_DMA_ADDR(esp->slot + DEC_SCSI_SRAM + ESP_TGT_DMA_SIZE);
530
531 }
532
533 static void pmaz_dma_ints_off(struct NCR_ESP *esp)
534 {
535 }
536
537 static void pmaz_dma_ints_on(struct NCR_ESP *esp)
538 {
539 }
540
541 static void pmaz_dma_setup(struct NCR_ESP *esp, __u32 addr, int count, int write)
542 {
543 /*
544 * On the Sparc, DMA_ST_WRITE means "move data from device to memory"
545 * so when (write) is true, it actually means READ!
546 */
547 if (write) {
548 pmaz_dma_init_read(esp, addr, count);
549 } else {
550 pmaz_dma_init_write(esp, addr, count);
551 }
552 }
553
554 static void pmaz_dma_mmu_get_scsi_one(struct NCR_ESP *esp, Scsi_Cmnd * sp)
555 {
556 sp->SCp.ptr = (char *)KSEG0ADDR((sp->request_buffer));
557 }
Historical 2.5/2.6 development