?  search:
summary | log | graphiclog1 | graphiclog2 | commit | commitdiff | tree | refs | edit | fork
blame | history | raw | HEAD
[PATCH] DVB: misc. updates to frontend drivers
[linux-2.6/history.git] / drivers / media / dvb / frontends / stv0299.c
blob332c606e3373f75404f5ad2e644a965f4c2ca78c
1 /*
2 Universal driver for STV0299/TDA5059/SL1935 based
3 DVB QPSK frontends
4
5 Alps BSRU6, LG TDQB-S00x
6
7 Copyright (C) 2001-2002 Convergence Integrated Media GmbH
8 <ralph@convergence.de>,
9 <holger@convergence.de>,
10 <js@convergence.de>
11
12
13 Philips SU1278/SH
14
15 Copyright (C) 2002 by Peter Schildmann <peter.schildmann@web.de>
16
17
18 LG TDQF-S001F
19
20 Copyright (C) 2002 Felix Domke <tmbinc@elitedvb.net>
21 & Andreas Oberritter <obi@linuxtv.org>
22
23
24 Support for Samsung TBMU24112IMB used on Technisat SkyStar2 rev. 2.6B
25
26 Copyright (C) 2003 Vadim Catana <skystar@moldova.cc>:
27
28 Support for Philips SU1278 on Technotrend hardware
29
30 Copyright (C) 2004 Andrew de Quincey <adq_dvb@lidskialf.net>
31
32 This program is free software; you can redistribute it and/or modify
33 it under the terms of the GNU General Public License as published by
34 the Free Software Foundation; either version 2 of the License, or
35 (at your option) any later version.
36
37 This program is distributed in the hope that it will be useful,
38 but WITHOUT ANY WARRANTY; without even the implied warranty of
39 MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
40 GNU General Public License for more details.
41
42 You should have received a copy of the GNU General Public License
43 along with this program; if not, write to the Free Software
44 Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
45
46 */
47
48 #include <linux/init.h>
49 #include <linux/kernel.h>
50 #include <linux/module.h>
51 #include <linux/moduleparam.h>
52 #include <linux/string.h>
53 #include <linux/slab.h>
54 #include <asm/div64.h>
55
56 #include "dvb_frontend.h"
57
58 #define FRONTEND_NAME "dvbfe_stv0299"
59
60 #define dprintk(args...) \
61 do { \
62 if (debug) printk(KERN_DEBUG FRONTEND_NAME ": " args); \
63 } while (0)
64
65 static int debug;
66 static int stv0299_status;
67
68 module_param(debug, int, 0644);
69 MODULE_PARM_DESC(debug, "Turn on/off frontend debugging (default:off).");
70 module_param(stv0299_status, int, 0444);
71 MODULE_PARM_DESC(stv0299_status, "Which status value to support "
72 "(0 == BER (default), 1 == UCBLOCKS)");
73
74 #define STATUS_BER 0
75 #define STATUS_UCBLOCKS 1
76
77
78 /* frontend types */
79 #define UNKNOWN_FRONTEND -1
80 #define PHILIPS_SU1278_TSA 0 // SU1278 with TSA5059 synth and datasheet recommended settings
81 #define ALPS_BSRU6 1
82 #define LG_TDQF_S001F 2
83 #define PHILIPS_SU1278_TUA 3 // SU1278 with TUA6100 synth
84 #define SAMSUNG_TBMU24112IMB 4
85 #define PHILIPS_SU1278_TSA_TT 5 // SU1278 with TSA5059 synth and TechnoTrend settings
86 #define PHILIPS_SU1278_TSA_TY 6 // SU1278 with TUA5059 synth and Typhoon wiring
87 #define PHILIPS_SU1278_TSA_CI 7 // SU1278 with TUA5059 synth and TerraTec Cinergy wiring
88
89 /* Master Clock = 88 MHz */
90 #define M_CLK (88000000UL)
91
92 /* Master Clock for TT cards = 64 MHz */
93 #define M_CLK_SU1278_TSA_TT (64000000UL)
94
95 static struct dvb_frontend_info uni0299_info = {
96 .name = "STV0299/TSA5059/SL1935 based",
97 .type = FE_QPSK,
98 .frequency_min = 950000,
99 .frequency_max = 2150000,
100 .frequency_stepsize = 125, /* kHz for QPSK frontends */
101 .frequency_tolerance = M_CLK/2000,
102 .symbol_rate_min = 1000000,
103 .symbol_rate_max = 45000000,
104 .symbol_rate_tolerance = 500, /* ppm */
105 .notifier_delay = 0,
106 .caps = FE_CAN_FEC_1_2 | FE_CAN_FEC_2_3 | FE_CAN_FEC_3_4 |
107 FE_CAN_FEC_5_6 | FE_CAN_FEC_7_8 |
108 FE_CAN_QPSK |
109 FE_CAN_FEC_AUTO
110 };
111
112
113 struct stv0299_state {
114 u8 tuner_type;
115 u8 initialised:1;
116 u32 tuner_frequency;
117 u32 symbol_rate;
118 fe_code_rate_t fec_inner;
119 struct i2c_adapter *i2c;
120 struct dvb_adapter *dvb;
121 };
122
123
124 static u8 init_tab [] = {
125 0x04, 0x7d, /* F22FR = 0x7d */
126 /* F22 = f_VCO / 128 / 0x7d = 22 kHz */
127
128 /* I2C bus repeater */
129 0x05, 0x35, /* I2CT = 0, SCLT = 1, SDAT = 1 */
130
131 /* general purpose DAC registers */
132 0x06, 0x40, /* DAC not used, set to high impendance mode */
133 0x07, 0x00, /* DAC LSB */
134
135 /* DiSEqC registers */
136 0x08, 0x40, /* DiSEqC off, LNB power on OP2/LOCK pin on */
137 0x09, 0x00, /* FIFO */
138
139 /* Input/Output configuration register */
140 0x0c, 0x51, /* OP1 ctl = Normal, OP1 val = 1 (LNB Power ON) */
141 /* OP0 ctl = Normal, OP0 val = 1 (18 V) */
142 /* Nyquist filter = 00, QPSK reverse = 0 */
143
144 /* AGC1 control register */
145 0x0d, 0x82, /* DC offset compensation = ON, beta_agc1 = 2 */
146
147 /* Timing loop register */
148 0x0e, 0x23, /* alpha_tmg = 2, beta_tmg = 3 */
149
150 0x10, 0x3f, // AGC2 0x3d
151
152 0x11, 0x84,
153 0x12, 0xb5, // Lock detect: -64 Carrier freq detect:on
154
155 0x15, 0xc9, // lock detector threshold
156
157 0x16, 0x00,
158 0x17, 0x00,
159 0x18, 0x00,
160 0x19, 0x00,
161 0x1a, 0x00,
162
163 0x1f, 0x50,
164
165 0x20, 0x00,
166 0x21, 0x00,
167 0x22, 0x00,
168 0x23, 0x00,
169
170 0x28, 0x00, // out imp: normal out type: parallel FEC mode:0
171
172 0x29, 0x1e, // 1/2 threshold
173 0x2a, 0x14, // 2/3 threshold
174 0x2b, 0x0f, // 3/4 threshold
175 0x2c, 0x09, // 5/6 threshold
176 0x2d, 0x05, // 7/8 threshold
177 0x2e, 0x01,
178
179 0x31, 0x1f, // test all FECs
180
181 0x32, 0x19, // viterbi and synchro search
182 0x33, 0xfc, // rs control
183 0x34, 0x93, // error control
184 };
185
186
187 static u8 init_tab_samsung [] = {
188 0x01, 0x15,
189 0x02, 0x00,
190 0x03, 0x00,
191 0x04, 0x7D,
192 0x05, 0x35,
193 0x06, 0x02,
194 0x07, 0x00,
195 0x08, 0xC3,
196 0x0C, 0x00,
197 0x0D, 0x81,
198 0x0E, 0x23,
199 0x0F, 0x12,
200 0x10, 0x7E,
201 0x11, 0x84,
202 0x12, 0xB9,
203 0x13, 0x88,
204 0x14, 0x89,
205 0x15, 0xC9,
206 0x16, 0x00,
207 0x17, 0x5C,
208 0x18, 0x00,
209 0x19, 0x00,
210 0x1A, 0x00,
211 0x1C, 0x00,
212 0x1D, 0x00,
213 0x1E, 0x00,
214 0x1F, 0x3A,
215 0x20, 0x2E,
216 0x21, 0x80,
217 0x22, 0xFF,
218 0x23, 0xC1,
219 0x28, 0x00,
220 0x29, 0x1E,
221 0x2A, 0x14,
222 0x2B, 0x0F,
223 0x2C, 0x09,
224 0x2D, 0x05,
225 0x31, 0x1F,
226 0x32, 0x19,
227 0x33, 0xFE,
228 0x34, 0x93
229 };
230
231
232 static u8 init_tab_su1278_tsa_tt [] = {
233 0x01, 0x0f,
234 0x02, 0x30,
235 0x03, 0x00,
236 0x04, 0x5b,
237 0x05, 0x85,
238 0x06, 0x02,
239 0x07, 0x00,
240 0x08, 0x02,
241 0x09, 0x00,
242 0x0C, 0x01,
243 0x0D, 0x81,
244 0x0E, 0x44,
245 0x0f, 0x14,
246 0x10, 0x3c,
247 0x11, 0x84,
248 0x12, 0xda,
249 0x13, 0x97,
250 0x14, 0x95,
251 0x15, 0xc9,
252 0x16, 0x19,
253 0x17, 0x8c,
254 0x18, 0x59,
255 0x19, 0xf8,
256 0x1a, 0xfe,
257 0x1c, 0x7f,
258 0x1d, 0x00,
259 0x1e, 0x00,
260 0x1f, 0x50,
261 0x20, 0x00,
262 0x21, 0x00,
263 0x22, 0x00,
264 0x23, 0x00,
265 0x28, 0x00,
266 0x29, 0x28,
267 0x2a, 0x14,
268 0x2b, 0x0f,
269 0x2c, 0x09,
270 0x2d, 0x09,
271 0x31, 0x1f,
272 0x32, 0x19,
273 0x33, 0xfc,
274 0x34, 0x13
275 };
276
277 static int stv0299_set_FEC (struct i2c_adapter *i2c, fe_code_rate_t fec);
278 static int stv0299_set_symbolrate (struct i2c_adapter *i2c, u32 srate, int tuner_type);
279
280 static int stv0299_writereg (struct i2c_adapter *i2c, u8 reg, u8 data)
281 {
282 int ret;
283 u8 buf [] = { reg, data };
284 struct i2c_msg msg = { .addr = 0x68, .flags = 0, .buf = buf, .len = 2 };
285
286 ret = i2c_transfer (i2c, &msg, 1);
287
288 if (ret != 1)
289 dprintk("%s: writereg error (reg == 0x%02x, val == 0x%02x, "
290 "ret == %i)\n", __FUNCTION__, reg, data, ret);
291
292 return (ret != 1) ? -EREMOTEIO : 0;
293 }
294
295
296 static u8 stv0299_readreg (struct i2c_adapter *i2c, u8 reg)
297 {
298 int ret;
299 u8 b0 [] = { reg };
300 u8 b1 [] = { 0 };
301 struct i2c_msg msg [] = { { .addr = 0x68, .flags = 0, .buf = b0, .len = 1 },
302 { .addr = 0x68, .flags = I2C_M_RD, .buf = b1, .len = 1 } };
303
304 ret = i2c_transfer (i2c, msg, 2);
305
306 if (ret != 2)
307 dprintk("%s: readreg error (reg == 0x%02x, ret == %i)\n",
308 __FUNCTION__, reg, ret);
309
310 return b1[0];
311 }
312
313
314 static int stv0299_readregs (struct i2c_adapter *i2c, u8 reg1, u8 *b, u8 len)
315 {
316 int ret;
317 struct i2c_msg msg [] = { { .addr = 0x68, .flags = 0, .buf = &reg1, .len = 1 },
318 { .addr = 0x68, .flags = I2C_M_RD, .buf = b, .len = len } };
319
320 ret = i2c_transfer (i2c, msg, 2);
321
322 if (ret != 2)
323 dprintk("%s: readreg error (ret == %i)\n", __FUNCTION__, ret);
324
325 return ret == 2 ? 0 : ret;
326 }
327
328
329 static int pll_write (struct i2c_adapter *i2c, u8 addr, u8 *data, int len)
330 {
331 int ret;
332 struct i2c_msg msg = { .addr = addr, .buf = data, .len = len };
333
334
335 stv0299_writereg(i2c, 0x05, 0xb5); /* enable i2c repeater on stv0299 */
336
337 ret = i2c_transfer (i2c, &msg, 1);
338
339 stv0299_writereg(i2c, 0x05, 0x35); /* disable i2c repeater on stv0299 */
340
341 if (ret != 1)
342 dprintk("%s: i/o error (ret == %i)\n", __FUNCTION__, ret);
343
344 return (ret != 1) ? -1 : 0;
345 }
346
347
348 static int sl1935_set_tv_freq (struct i2c_adapter *i2c, u32 freq, int ftype)
349 {
350 u8 buf[4];
351 u32 div;
352
353 div = freq / 125;
354
355 dprintk("%s : freq = %i, div = %i\n", __FUNCTION__, freq, div);
356
357 buf[0] = (div >> 8) & 0x7f;
358 buf[1] = div & 0xff;
359 buf[2] = 0x84; // 0xC4
360 buf[3] = 0x08;
361
362 if (freq < 1500000) buf[3] |= 0x10;
363
364 return pll_write (i2c, 0x61, buf, sizeof(buf));
365 }
366
367 /**
368 * set up the downconverter frequency divisor for a
369 * reference clock comparision frequency of 125 kHz.
370 */
371 static int tsa5059_set_tv_freq (struct i2c_adapter *i2c, u32 freq, int ftype, int srate)
372 {
373 u8 addr;
374 u32 div;
375 u8 buf[4];
376 int divisor, regcode;
377
378 dprintk ("%s: freq %i, ftype %i\n", __FUNCTION__, freq, ftype);
379
380 if ((freq < 950000) || (freq > 2150000)) return -EINVAL;
381
382 if (ftype == PHILIPS_SU1278_TSA_TT) {
383 divisor = 500;
384 regcode = 2;
385 } else {
386 divisor = 125;
387 regcode = 4;
388 }
389
390 // setup frequency divisor
391 div = (freq + (divisor - 1)) / divisor; // round correctly
392 buf[0] = (div >> 8) & 0x7f;
393 buf[1] = div & 0xff;
394 buf[2] = 0x80 | ((div & 0x18000) >> 10) | regcode;
395 buf[3] = 0;
396
397 // tuner-specific settings
398 switch(ftype) {
399 case PHILIPS_SU1278_TSA:
400 case PHILIPS_SU1278_TSA_TT:
401 case PHILIPS_SU1278_TSA_TY:
402 case PHILIPS_SU1278_TSA_CI:
403 if (ftype == PHILIPS_SU1278_TSA_TY || ftype == PHILIPS_SU1278_TSA_CI)
404 addr = 0x61;
405 else
406 addr = 0x60;
407
408 buf[3] |= 0x20;
409
410 if (srate < 4000000) buf[3] |= 1;
411
412 if (freq < 1250000) buf[3] |= 0;
413 else if (freq < 1550000) buf[3] |= 0x40;
414 else if (freq < 2050000) buf[3] |= 0x80;
415 else if (freq < 2150000) buf[3] |= 0xC0;
416 break;
417
418 case ALPS_BSRU6:
419 addr = 0x61;
420 buf[3] = 0xC4;
421 if (freq > 1530000) buf[3] = 0xc0;
422 break;
423
424 default:
425 return -EINVAL;
426 }
427
428 return pll_write (i2c, addr, buf, sizeof(buf));
429 }
430
431
432 #define MIN2(a,b) ((a) < (b) ? (a) : (b))
433 #define MIN3(a,b,c) MIN2(MIN2(a,b),c)
434
435 static int tua6100_set_tv_freq (struct i2c_adapter *i2c, u32 freq,
436 int ftype, int srate)
437 {
438 u8 reg0 [2] = { 0x00, 0x00 };
439 u8 reg1 [4] = { 0x01, 0x00, 0x00, 0x00 };
440 u8 reg2 [3] = { 0x02, 0x00, 0x00 };
441 int _fband;
442 int first_ZF;
443 int R, A, N, P, M;
444 int err;
445
446 first_ZF = (freq) / 1000;
447
448 if (abs(MIN2(abs(first_ZF-1190),abs(first_ZF-1790))) <
449 abs(MIN3(abs(first_ZF-1202),abs(first_ZF-1542),abs(first_ZF-1890))))
450 _fband = 2;
451 else
452 _fband = 3;
453
454 if (_fband == 2) {
455 if (((first_ZF >= 950) && (first_ZF < 1350)) ||
456 ((first_ZF >= 1430) && (first_ZF < 1950)))
457 reg0[1] = 0x07;
458 else if (((first_ZF >= 1350) && (first_ZF < 1430)) ||
459 ((first_ZF >= 1950) && (first_ZF < 2150)))
460 reg0[1] = 0x0B;
461 }
462
463 if(_fband == 3) {
464 if (((first_ZF >= 950) && (first_ZF < 1350)) ||
465 ((first_ZF >= 1455) && (first_ZF < 1950)))
466 reg0[1] = 0x07;
467 else if (((first_ZF >= 1350) && (first_ZF < 1420)) ||
468 ((first_ZF >= 1950) && (first_ZF < 2150)))
469 reg0[1] = 0x0B;
470 else if ((first_ZF >= 1420) && (first_ZF < 1455))
471 reg0[1] = 0x0F;
472 }
473
474 if (first_ZF > 1525)
475 reg1[1] |= 0x80;
476 else
477 reg1[1] &= 0x7F;
478
479 if (_fband == 2) {
480 if (first_ZF > 1430) { /* 1430MHZ */
481 reg1[1] &= 0xCF; /* N2 */
482 reg2[1] &= 0xCF; /* R2 */
483 reg2[1] |= 0x10;
484 } else {
485 reg1[1] &= 0xCF; /* N2 */
486 reg1[1] |= 0x20;
487 reg2[1] &= 0xCF; /* R2 */
488 reg2[1] |= 0x10;
489 }
490 }
491
492 if (_fband == 3) {
493 if ((first_ZF >= 1455) &&
494 (first_ZF < 1630)) {
495 reg1[1] &= 0xCF; /* N2 */
496 reg1[1] |= 0x20;
497 reg2[1] &= 0xCF; /* R2 */
498 } else {
499 if (first_ZF < 1455) {
500 reg1[1] &= 0xCF; /* N2 */
501 reg1[1] |= 0x20;
502 reg2[1] &= 0xCF; /* R2 */
503 reg2[1] |= 0x10;
504 } else {
505 if (first_ZF >= 1630) {
506 reg1[1] &= 0xCF; /* N2 */
507 reg2[1] &= 0xCF; /* R2 */
508 reg2[1] |= 0x10;
509 }
510 }
511 }
512 }
513
514 /* set ports, enable P0 for symbol rates > 4Ms/s */
515 if (srate >= 4000000)
516 reg1[1] |= 0x0c;
517 else
518 reg1[1] |= 0x04;
519
520 reg2[1] |= 0x0c;
521
522 R = 64;
523 A = 64;
524 P = 64; //32
525
526 M = (freq * R) / 4; /* in Mhz */
527 N = (M - A * 1000) / (P * 1000);
528
529 reg1[1] |= (N >> 9) & 0x03;
530 reg1[2] = (N >> 1) & 0xff;
531 reg1[3] = (N << 7) & 0x80;
532
533 reg2[1] |= (R >> 8) & 0x03;
534 reg2[2] = R & 0xFF; /* R */
535
536 reg1[3] |= A & 0x7f; /* A */
537
538 if (P == 64)
539 reg1[1] |= 0x40; /* Prescaler 64/65 */
540
541 reg0[1] |= 0x03;
542
543 if ((err = pll_write(i2c, 0x60, reg0, sizeof(reg0))))
544 return err;
545
546 if ((err = pll_write(i2c, 0x60, reg1, sizeof(reg1))))
547 return err;
548
549 if ((err = pll_write(i2c, 0x60, reg2, sizeof(reg2))))
550 return err;
551
552 return 0;
553 }
554
555
556 static int pll_set_tv_freq (struct i2c_adapter *i2c, u32 freq, int ftype, int srate)
557 {
558 switch(ftype) {
559 case SAMSUNG_TBMU24112IMB:
560 return sl1935_set_tv_freq(i2c, freq, ftype);
561
562 case LG_TDQF_S001F:
563 return sl1935_set_tv_freq(i2c, freq, ftype);
564
565 case PHILIPS_SU1278_TUA:
566 return tua6100_set_tv_freq(i2c, freq, ftype, srate);
567
568 default:
569 return tsa5059_set_tv_freq(i2c, freq, ftype, srate);
570 }
571 }
572
573 #if 0
574 static int tsa5059_read_status (struct i2c_adapter *i2c)
575 {
576 int ret;
577 u8 rpt1 [] = { 0x05, 0xb5 };
578 u8 stat [] = { 0 };
579
580 struct i2c_msg msg [] = {{ .addr = 0x68, .flags = 0, .buf = rpt1, .len = 2 },
581 { .addr = 0x60, .flags = I2C_M_RD, .buf = stat, .len = 1 }};
582
583 dprintk ("%s\n", __FUNCTION__);
584
585 ret = i2c_transfer (i2c, msg, 2);
586
587 if (ret != 2)
588 dprintk("%s: readreg error (ret == %i)\n", __FUNCTION__, ret);
589
590 return stat[0];
591 }
592 #endif
593
594
595 static int stv0299_init (struct i2c_adapter *i2c, int ftype)
596 {
597 int i;
598
599 dprintk("stv0299: init chip\n");
600
601 switch(ftype) {
602 case SAMSUNG_TBMU24112IMB:
603 dprintk("%s: init stv0299 chip for Samsung TBMU24112IMB\n", __FUNCTION__);
604
605 for (i=0; i<sizeof(init_tab_samsung); i+=2)
606 {
607 dprintk("%s: reg == 0x%02x, val == 0x%02x\n", __FUNCTION__, init_tab_samsung[i], init_tab_samsung[i+1]);
608
609 stv0299_writereg (i2c, init_tab_samsung[i], init_tab_samsung[i+1]);
610 }
611 break;
612
613 case PHILIPS_SU1278_TSA_TT:
614 for (i=0; i<sizeof(init_tab_su1278_tsa_tt); i+=2) {
615 stv0299_writereg (i2c, init_tab_su1278_tsa_tt[i], init_tab_su1278_tsa_tt[i+1]);
616 }
617 break;
618
619 default:
620 stv0299_writereg (i2c, 0x01, 0x15);
621 stv0299_writereg (i2c, 0x02, ftype == PHILIPS_SU1278_TUA ? 0x00 : 0x30);
622 stv0299_writereg (i2c, 0x03, 0x00);
623
624 for (i=0; i<sizeof(init_tab); i+=2)
625 stv0299_writereg (i2c, init_tab[i], init_tab[i+1]);
626
627 /* AGC1 reference register setup */
628 if (ftype == PHILIPS_SU1278_TSA || ftype == PHILIPS_SU1278_TSA_TY || ftype == PHILIPS_SU1278_TSA_CI)
629 stv0299_writereg (i2c, 0x0f, 0x92); /* Iagc = Inverse, m1 = 18 */
630 else if (ftype == PHILIPS_SU1278_TUA)
631 stv0299_writereg (i2c, 0x0f, 0x94); /* Iagc = Inverse, m1 = 20 */
632 else
633 stv0299_writereg (i2c, 0x0f, 0x52); /* Iagc = Normal, m1 = 18 */
634 break;
635 }
636
637 switch(stv0299_status) {
638 case STATUS_BER:
639 stv0299_writereg(i2c, 0x34, 0x93);
640 break;
641
642 case STATUS_UCBLOCKS:
643 stv0299_writereg(i2c, 0x34, 0xB3);
644 break;
645 }
646
647 return 0;
648 }
649
650
651 static int stv0299_set_FEC (struct i2c_adapter *i2c, fe_code_rate_t fec)
652 {
653 dprintk ("%s\n", __FUNCTION__);
654
655 switch (fec) {
656 case FEC_AUTO:
657 {
658 dprintk ("%s : FEC_AUTO\n", __FUNCTION__);
659 return stv0299_writereg (i2c, 0x31, 0x1f);
660 }
661 case FEC_1_2:
662 {
663 dprintk ("%s : FEC_1_2\n", __FUNCTION__);
664 return stv0299_writereg (i2c, 0x31, 0x01);
665 }
666 case FEC_2_3:
667 {
668 dprintk ("%s : FEC_2_3\n", __FUNCTION__);
669 return stv0299_writereg (i2c, 0x31, 0x02);
670 }
671 case FEC_3_4:
672 {
673 dprintk ("%s : FEC_3_4\n", __FUNCTION__);
674 return stv0299_writereg (i2c, 0x31, 0x04);
675 }
676 case FEC_5_6:
677 {
678 dprintk ("%s : FEC_5_6\n", __FUNCTION__);
679 return stv0299_writereg (i2c, 0x31, 0x08);
680 }
681 case FEC_7_8:
682 {
683 dprintk ("%s : FEC_7_8\n", __FUNCTION__);
684 return stv0299_writereg (i2c, 0x31, 0x10);
685 }
686 default:
687 {
688 dprintk ("%s : FEC invalid\n", __FUNCTION__);
689 return -EINVAL;
690 }
691 }
692 }
693
694
695 static fe_code_rate_t stv0299_get_fec (struct i2c_adapter *i2c)
696 {
697 static fe_code_rate_t fec_tab [] = { FEC_2_3, FEC_3_4, FEC_5_6,
698 FEC_7_8, FEC_1_2 };
699 u8 index;
700
701 dprintk ("%s\n", __FUNCTION__);
702
703 index = stv0299_readreg (i2c, 0x1b);
704 index &= 0x7;
705
706 if (index > 4)
707 return FEC_AUTO;
708
709 return fec_tab [index];
710 }
711
712
713 static int stv0299_wait_diseqc_fifo (struct i2c_adapter *i2c, int timeout)
714 {
715 unsigned long start = jiffies;
716
717 dprintk ("%s\n", __FUNCTION__);
718
719 while (stv0299_readreg(i2c, 0x0a) & 1) {
720 if (jiffies - start > timeout) {
721 dprintk ("%s: timeout!!\n", __FUNCTION__);
722 return -ETIMEDOUT;
723 }
724 msleep(10);
725 };
726
727 return 0;
728 }
729
730
731 static int stv0299_wait_diseqc_idle (struct i2c_adapter *i2c, int timeout)
732 {
733 unsigned long start = jiffies;
734
735 dprintk ("%s\n", __FUNCTION__);
736
737 while ((stv0299_readreg(i2c, 0x0a) & 3) != 2 ) {
738 if (jiffies - start > timeout) {
739 dprintk ("%s: timeout!!\n", __FUNCTION__);
740 return -ETIMEDOUT;
741 }
742 msleep(10);
743 };
744
745 return 0;
746 }
747
748
749 static int stv0299_send_diseqc_msg (struct i2c_adapter *i2c,
750 struct dvb_diseqc_master_cmd *m)
751 {
752 u8 val;
753 int i;
754
755 dprintk ("%s\n", __FUNCTION__);
756
757 if (stv0299_wait_diseqc_idle (i2c, 100) < 0)
758 return -ETIMEDOUT;
759
760 val = stv0299_readreg (i2c, 0x08);
761
762 if (stv0299_writereg (i2c, 0x08, (val & ~0x7) | 0x6)) /* DiSEqC mode */
763 return -EREMOTEIO;
764
765 for (i=0; i<m->msg_len; i++) {
766 if (stv0299_wait_diseqc_fifo (i2c, 100) < 0)
767 return -ETIMEDOUT;
768
769 if (stv0299_writereg (i2c, 0x09, m->msg[i]))
770 return -EREMOTEIO;
771 }
772
773 if (stv0299_wait_diseqc_idle (i2c, 100) < 0)
774 return -ETIMEDOUT;
775
776 return 0;
777 }
778
779
780 static int stv0299_send_diseqc_burst (struct i2c_adapter *i2c, fe_sec_mini_cmd_t burst)
781 {
782 u8 val;
783
784 dprintk ("%s\n", __FUNCTION__);
785
786 if (stv0299_wait_diseqc_idle (i2c, 100) < 0)
787 return -ETIMEDOUT;
788
789 val = stv0299_readreg (i2c, 0x08);
790
791 if (stv0299_writereg (i2c, 0x08, (val & ~0x7) | 0x2)) /* burst mode */
792 return -EREMOTEIO;
793
794 if (stv0299_writereg (i2c, 0x09, burst == SEC_MINI_A ? 0x00 : 0xff))
795 return -EREMOTEIO;
796
797 if (stv0299_wait_diseqc_idle (i2c, 100) < 0)
798 return -ETIMEDOUT;
799
800 if (stv0299_writereg (i2c, 0x08, val))
801 return -EREMOTEIO;
802
803 return 0;
804 }
805
806
807 static int stv0299_set_tone (struct i2c_adapter *i2c, fe_sec_tone_mode_t tone)
808 {
809 u8 val;
810
811 dprintk("%s: %s\n", __FUNCTION__,
812 tone == SEC_TONE_ON ? "SEC_TONE_ON" :
813 tone == SEC_TONE_OFF ? "SEC_TONE_OFF" : "??");
814
815 if (stv0299_wait_diseqc_idle (i2c, 100) < 0)
816 return -ETIMEDOUT;
817
818 val = stv0299_readreg (i2c, 0x08);
819
820 switch (tone) {
821 case SEC_TONE_ON:
822 {
823 dprintk("%s: TONE_ON\n", __FUNCTION__);
824 return stv0299_writereg (i2c, 0x08, val | 0x3);
825 }
826 case SEC_TONE_OFF:
827 {
828 dprintk("%s: TONE_OFF\n", __FUNCTION__);
829 return stv0299_writereg (i2c, 0x08, (val & ~0x3) | 0x02);
830 }
831 default:
832 {
833 dprintk("%s: TONE INVALID\n", __FUNCTION__);
834 return -EINVAL;
835 }
836 };
837 }
838
839
840 static int stv0299_set_voltage (struct i2c_adapter *i2c, fe_sec_voltage_t voltage,
841 int tuner_type)
842 {
843 u8 reg0x08;
844 u8 reg0x0c;
845
846 dprintk("%s: %s\n", __FUNCTION__,
847 voltage == SEC_VOLTAGE_13 ? "SEC_VOLTAGE_13" :
848 voltage == SEC_VOLTAGE_18 ? "SEC_VOLTAGE_18" : "??");
849
850 reg0x08 = stv0299_readreg (i2c, 0x08);
851 reg0x0c = stv0299_readreg (i2c, 0x0c);
852
853 /**
854 * H/V switching over OP0, OP1 and OP2 are LNB power enable bits
855 */
856 reg0x0c &= 0x0f;
857
858 if (voltage == SEC_VOLTAGE_OFF) {
859 stv0299_writereg (i2c, 0x0c, 0x00); /* LNB power off! */
860 return stv0299_writereg (i2c, 0x08, 0x00); /* LNB power off! */
861 }
862
863 if (tuner_type == PHILIPS_SU1278_TSA_CI)
864 {
865 stv0299_writereg (i2c, 0x08, reg0x08 & 0xBF); // switch LNB power on OP2/LOCK pin off
866 }
867 else
868 {
869 stv0299_writereg (i2c, 0x08, reg0x08 | 0x40);
870 }
871
872 switch (voltage) {
873 case SEC_VOLTAGE_13:
874 if (tuner_type == PHILIPS_SU1278_TSA_TY || tuner_type == PHILIPS_SU1278_TSA_CI)
875 return stv0299_writereg (i2c, 0x0c, reg0x0c | 0x10);
876 else
877 return stv0299_writereg (i2c, 0x0c, reg0x0c | 0x40);
878
879 case SEC_VOLTAGE_18:
880 return stv0299_writereg (i2c, 0x0c, reg0x0c | 0x50);
881
882 default:
883 return -EINVAL;
884 };
885 }
886
887
888 static int stv0299_send_legacy_dish_cmd(struct i2c_adapter *i2c, u32 cmd,
889 int tuner_type)
890 {
891 u8 last = 1;
892 int i;
893
894 /* reset voltage at the end
895 if((0x50 & stv0299_readreg (i2c, 0x0c)) == 0x50)
896 cmd |= 0x80;
897 else
898 cmd &= 0x7F;
899 */
900
901 cmd = cmd << 1;
902 dprintk("%s switch command: 0x%04x\n",__FUNCTION__, cmd);
903
904 stv0299_set_voltage(i2c,SEC_VOLTAGE_18,tuner_type);
905 msleep(32);
906
907 for (i=0; i<9; i++) {
908 if((cmd & 0x01) != last) {
909 stv0299_set_voltage(i2c,
910 last ? SEC_VOLTAGE_13 :
911 SEC_VOLTAGE_18,
912 tuner_type);
913 last = (last) ? 0 : 1;
914 }
915
916 cmd = cmd >> 1;
917
918 if (i != 8)
919 msleep(8);
920 }
921
922 return 0;
923 }
924
925 static int stv0299_set_symbolrate (struct i2c_adapter *i2c, u32 srate, int tuner_type)
926 {
927 u64 big = srate;
928 u32 ratio;
929 u8 aclk = 0;
930 u8 bclk = 0;
931 u8 m1;
932 int Mclk = M_CLK;
933
934 // check rate is within limits
935 if ((srate < 1000000) || (srate > 45000000)) return -EINVAL;
936
937 // calculate value to program
938 if (tuner_type == PHILIPS_SU1278_TSA_TT) Mclk = M_CLK_SU1278_TSA_TT;
939 big = big << 20;
940 big += (Mclk-1); // round correctly
941 do_div(big, Mclk);
942 ratio = big << 4;
943
944 // program registers
945 switch(tuner_type) {
946 case PHILIPS_SU1278_TSA_TT:
947 stv0299_writereg (i2c, 0x0e, 0x44);
948 if (srate >= 10000000) {
949 stv0299_writereg (i2c, 0x13, 0x97);
950 stv0299_writereg (i2c, 0x14, 0x95);
951 stv0299_writereg (i2c, 0x15, 0xc9);
952 stv0299_writereg (i2c, 0x17, 0x8c);
953 stv0299_writereg (i2c, 0x1a, 0xfe);
954 stv0299_writereg (i2c, 0x1c, 0x7f);
955 stv0299_writereg (i2c, 0x2d, 0x09);
956 } else {
957 stv0299_writereg (i2c, 0x13, 0x99);
958 stv0299_writereg (i2c, 0x14, 0x8d);
959 stv0299_writereg (i2c, 0x15, 0xce);
960 stv0299_writereg (i2c, 0x17, 0x43);
961 stv0299_writereg (i2c, 0x1a, 0x1d);
962 stv0299_writereg (i2c, 0x1c, 0x12);
963 stv0299_writereg (i2c, 0x2d, 0x05);
964 }
965 stv0299_writereg (i2c, 0x0e, 0x23);
966 stv0299_writereg (i2c, 0x0f, 0x94);
967 stv0299_writereg (i2c, 0x10, 0x39);
968 stv0299_writereg (i2c, 0x15, 0xc9);
969
970 stv0299_writereg (i2c, 0x1f, (ratio >> 16) & 0xff);
971 stv0299_writereg (i2c, 0x20, (ratio >> 8) & 0xff);
972 stv0299_writereg (i2c, 0x21, (ratio ) & 0xf0);
973 break;
974
975 case PHILIPS_SU1278_TSA_TY:
976 case PHILIPS_SU1278_TSA_CI:
977 case PHILIPS_SU1278_TSA:
978 aclk = 0xb5;
979 if (srate < 2000000) bclk = 0x86;
980 else if (srate < 5000000) bclk = 0x89;
981 else if (srate < 15000000) bclk = 0x8f;
982 else if (srate < 45000000) bclk = 0x95;
983
984 m1 = 0x14;
985 if (srate < 4000000) m1 = 0x10;
986
987 stv0299_writereg (i2c, 0x13, aclk);
988 stv0299_writereg (i2c, 0x14, bclk);
989 stv0299_writereg (i2c, 0x1f, (ratio >> 16) & 0xff);
990 stv0299_writereg (i2c, 0x20, (ratio >> 8) & 0xff);
991 stv0299_writereg (i2c, 0x21, (ratio ) & 0xf0);
992 stv0299_writereg (i2c, 0x0f, (stv0299_readreg(i2c, 0x0f) & 0xc0) | m1);
993 break;
994
995 case ALPS_BSRU6:
996 default:
997 if (srate < 1500000) { aclk = 0xb7; bclk = 0x47; }
998 else if (srate < 3000000) { aclk = 0xb7; bclk = 0x4b; }
999 else if (srate < 7000000) { aclk = 0xb7; bclk = 0x4f; }
1000 else if (srate < 14000000) { aclk = 0xb7; bclk = 0x53; }
1001 else if (srate < 30000000) { aclk = 0xb6; bclk = 0x53; }
1002 else if (srate < 45000000) { aclk = 0xb4; bclk = 0x51; }
1003
1004 stv0299_writereg (i2c, 0x13, aclk);
1005 stv0299_writereg (i2c, 0x14, bclk);
1006 stv0299_writereg (i2c, 0x1f, (ratio >> 16) & 0xff);
1007 stv0299_writereg (i2c, 0x20, (ratio >> 8) & 0xff);
1008 stv0299_writereg (i2c, 0x21, (ratio ) & 0xf0);
1009 break;
1010 }
1011
1012
1013 return 0;
1014 }
1015
1016
1017 static int stv0299_get_symbolrate (struct i2c_adapter *i2c, int tuner_type)
1018 {
1019 u32 Mclk = M_CLK / 4096L;
1020 u32 srate;
1021 s32 offset;
1022 u8 sfr[3];
1023 s8 rtf;
1024
1025 dprintk ("%s\n", __FUNCTION__);
1026
1027 if (tuner_type == PHILIPS_SU1278_TSA_TT) Mclk = M_CLK_SU1278_TSA_TT / 4096L;
1028
1029 stv0299_readregs (i2c, 0x1f, sfr, 3);
1030 stv0299_readregs (i2c, 0x1a, &rtf, 1);
1031
1032 srate = (sfr[0] << 8) | sfr[1];
1033 srate *= Mclk;
1034 srate /= 16;
1035 srate += (sfr[2] >> 4) * Mclk / 256;
1036
1037 offset = (s32) rtf * (srate / 4096L);
1038 offset /= 128;
1039
1040 dprintk ("%s : srate = %i\n", __FUNCTION__, srate);
1041 dprintk ("%s : ofset = %i\n", __FUNCTION__, offset);
1042
1043 srate += offset;
1044
1045 srate += 1000;
1046 srate /= 2000;
1047 srate *= 2000;
1048
1049 return srate;
1050 }
1051
1052 static int uni0299_ioctl (struct dvb_frontend *fe, unsigned int cmd, void *arg)
1053 {
1054 struct stv0299_state *state = (struct stv0299_state *) fe->data;
1055 struct i2c_adapter *i2c = state->i2c;
1056
1057 dprintk ("%s\n", __FUNCTION__);
1058
1059 switch (cmd) {
1060 case FE_GET_INFO:
1061 {
1062 struct dvb_frontend_info* tmp = (struct dvb_frontend_info*) arg;
1063 memcpy (arg, &uni0299_info, sizeof(struct dvb_frontend_info));
1064
1065 if (state->tuner_type == PHILIPS_SU1278_TSA_TT) {
1066 tmp->frequency_tolerance = M_CLK_SU1278_TSA_TT / 2000;
1067 }
1068 break;
1069 }
1070
1071 case FE_READ_STATUS:
1072 {
1073 fe_status_t *status = (fe_status_t *) arg;
1074 u8 signal = 0xff - stv0299_readreg (i2c, 0x18);
1075 u8 sync = stv0299_readreg (i2c, 0x1b);
1076
1077 dprintk ("%s : FE_READ_STATUS : VSTATUS: 0x%02x\n", __FUNCTION__, sync);
1078
1079 *status = 0;
1080
1081 if (signal > 10)
1082 *status |= FE_HAS_SIGNAL;
1083
1084 if (sync & 0x80)
1085 *status |= FE_HAS_CARRIER;
1086
1087 if (sync & 0x10)
1088 *status |= FE_HAS_VITERBI;
1089
1090 if (sync & 0x08)
1091 *status |= FE_HAS_SYNC;
1092
1093 if ((sync & 0x98) == 0x98)
1094 *status |= FE_HAS_LOCK;
1095
1096 break;
1097 }
1098
1099 case FE_READ_BER:
1100 if (stv0299_status == STATUS_BER) {
1101 *((u32*) arg) = (stv0299_readreg (i2c, 0x1d) << 8)
1102 | stv0299_readreg (i2c, 0x1e);
1103 } else {
1104 *((u32*) arg) = 0;
1105 }
1106 break;
1107
1108 case FE_READ_SIGNAL_STRENGTH:
1109 {
1110 s32 signal = 0xffff - ((stv0299_readreg (i2c, 0x18) << 8)
1111 | stv0299_readreg (i2c, 0x19));
1112
1113 dprintk ("%s : FE_READ_SIGNAL_STRENGTH : AGC2I: 0x%02x%02x, signal=0x%04x\n", __FUNCTION__,
1114 stv0299_readreg (i2c, 0x18),
1115 stv0299_readreg (i2c, 0x19), (int) signal);
1116
1117 signal = signal * 5 / 4;
1118 *((u16*) arg) = (signal > 0xffff) ? 0xffff :
1119 (signal < 0) ? 0 : signal;
1120 break;
1121 }
1122 case FE_READ_SNR:
1123 {
1124 s32 snr = 0xffff - ((stv0299_readreg (i2c, 0x24) << 8)
1125 | stv0299_readreg (i2c, 0x25));
1126 snr = 3 * (snr - 0xa100);
1127 *((u16*) arg) = (snr > 0xffff) ? 0xffff :
1128 (snr < 0) ? 0 : snr;
1129 break;
1130 }
1131 case FE_READ_UNCORRECTED_BLOCKS:
1132 if (stv0299_status == STATUS_UCBLOCKS) {
1133 *((u32*) arg) = (stv0299_readreg (i2c, 0x1d) << 8)
1134 | stv0299_readreg (i2c, 0x1e);
1135 } else {
1136 *((u32*) arg) = 0;
1137 }
1138 break;
1139
1140 case FE_SET_FRONTEND:
1141 {
1142 struct dvb_frontend_parameters *p = arg;
1143 int invval = 0;
1144
1145 dprintk ("%s : FE_SET_FRONTEND\n", __FUNCTION__);
1146
1147 // set the inversion
1148 if (p->inversion == INVERSION_OFF) invval = 0;
1149 else if (p->inversion == INVERSION_ON) invval = 1;
1150 else {
1151 printk("stv0299 does not support auto-inversion\n");
1152 return -EINVAL;
1153 }
1154 if (state->tuner_type == ALPS_BSRU6) invval = (~invval) & 1;
1155 stv0299_writereg(i2c, 0x0c, (stv0299_readreg(i2c, 0x0c) & 0xfe) | invval);
1156
1157 switch(state->tuner_type) {
1158 case PHILIPS_SU1278_TSA_TT:
1159 {
1160 /* check if we should do a finetune */
1161 int frequency_delta = p->frequency - state->tuner_frequency;
1162 int minmax = p->u.qpsk.symbol_rate / 2000;
1163 if (minmax < 5000) minmax = 5000;
1164
1165 if ((frequency_delta > -minmax) && (frequency_delta < minmax) && (frequency_delta != 0) &&
1166 (state->fec_inner == p->u.qpsk.fec_inner) &&
1167 (state->symbol_rate == p->u.qpsk.symbol_rate)) {
1168 int Drot_freq = (frequency_delta << 16) / (M_CLK_SU1278_TSA_TT / 1000);
1169
1170 // zap the derotator registers first
1171 stv0299_writereg (i2c, 0x22, 0x00);
1172 stv0299_writereg (i2c, 0x23, 0x00);
1173
1174 // now set them as we want
1175 stv0299_writereg (i2c, 0x22, Drot_freq >> 8);
1176 stv0299_writereg (i2c, 0x23, Drot_freq);
1177 } else {
1178 /* A "normal" tune is requested */
1179 pll_set_tv_freq (i2c, p->frequency, state->tuner_type, p->u.qpsk.symbol_rate);
1180 stv0299_writereg (i2c, 0x32, 0x80);
1181 stv0299_writereg (i2c, 0x22, 0x00);
1182 stv0299_writereg (i2c, 0x23, 0x00);
1183 stv0299_writereg (i2c, 0x32, 0x19);
1184 stv0299_set_symbolrate (i2c, p->u.qpsk.symbol_rate, state->tuner_type);
1185 stv0299_set_FEC (i2c, p->u.qpsk.fec_inner);
1186 }
1187 break;
1188 }
1189
1190 default:
1191 pll_set_tv_freq (i2c, p->frequency, state->tuner_type, p->u.qpsk.symbol_rate);
1192 stv0299_set_FEC (i2c, p->u.qpsk.fec_inner);
1193 stv0299_set_symbolrate (i2c, p->u.qpsk.symbol_rate, state->tuner_type);
1194 stv0299_writereg (i2c, 0x22, 0x00);
1195 stv0299_writereg (i2c, 0x23, 0x00);
1196 stv0299_readreg (i2c, 0x23);
1197 stv0299_writereg (i2c, 0x12, 0xb9);
1198 break;
1199 }
1200
1201 state->tuner_frequency = p->frequency;
1202 state->fec_inner = p->u.qpsk.fec_inner;
1203 state->symbol_rate = p->u.qpsk.symbol_rate;
1204 break;
1205 }
1206
1207 case FE_GET_FRONTEND:
1208 {
1209 struct dvb_frontend_parameters *p = arg;
1210 s32 derot_freq;
1211 int Mclk = M_CLK;
1212 int invval;
1213
1214 if (state->tuner_type == PHILIPS_SU1278_TSA_TT) Mclk = M_CLK_SU1278_TSA_TT;
1215
1216 derot_freq = (s32)(s16) ((stv0299_readreg (i2c, 0x22) << 8)
1217 | stv0299_readreg (i2c, 0x23));
1218
1219 derot_freq *= (Mclk >> 16);
1220 derot_freq += 500;
1221 derot_freq /= 1000;
1222
1223 p->frequency += derot_freq;
1224
1225 invval = stv0299_readreg (i2c, 0x0c) & 1;
1226 if (state->tuner_type == ALPS_BSRU6) invval = (~invval) & 1;
1227 p->inversion = invval ? INVERSION_ON : INVERSION_OFF;
1228
1229 p->u.qpsk.fec_inner = stv0299_get_fec (i2c);
1230 p->u.qpsk.symbol_rate = stv0299_get_symbolrate (i2c, state->tuner_type);
1231 break;
1232 }
1233
1234 case FE_SLEEP:
1235 stv0299_writereg (i2c, 0x0c, 0x00); /* LNB power off! */
1236 stv0299_writereg (i2c, 0x08, 0x00); /* LNB power off! */
1237 stv0299_writereg (i2c, 0x02, 0x80);
1238 state->initialised = 0;
1239 break;
1240
1241 case FE_INIT:
1242 switch(state->tuner_type) {
1243 case PHILIPS_SU1278_TSA_TT:
1244 state->tuner_frequency = 0;
1245 if (!state->initialised) {
1246 state->initialised = 1;
1247 return stv0299_init (i2c, state->tuner_type);
1248 }
1249 break;
1250
1251 default:
1252 return stv0299_init (i2c, state->tuner_type);
1253 }
1254 break;
1255
1256 case FE_DISEQC_SEND_MASTER_CMD:
1257 return stv0299_send_diseqc_msg (i2c, arg);
1258
1259 case FE_DISEQC_SEND_BURST:
1260 return stv0299_send_diseqc_burst (i2c, (fe_sec_mini_cmd_t) arg);
1261
1262 case FE_SET_TONE:
1263 return stv0299_set_tone (i2c, (fe_sec_tone_mode_t) arg);
1264
1265 case FE_SET_VOLTAGE:
1266 return stv0299_set_voltage (i2c, (fe_sec_voltage_t) arg,
1267 state->tuner_type);
1268
1269 case FE_DISHNETWORK_SEND_LEGACY_CMD:
1270 return stv0299_send_legacy_dish_cmd (i2c, (u32) arg,
1271 state->tuner_type);
1272
1273 case FE_GET_TUNE_SETTINGS:
1274 {
1275 struct dvb_frontend_tune_settings* fesettings = (struct dvb_frontend_tune_settings*) arg;
1276
1277 switch(state->tuner_type) {
1278 case PHILIPS_SU1278_TSA_TT:
1279 fesettings->min_delay_ms = 50;
1280 if (fesettings->parameters.u.qpsk.symbol_rate < 10000000) {
1281 fesettings->step_size = fesettings->parameters.u.qpsk.symbol_rate / 32000;
1282 fesettings->max_drift = 5000;
1283 } else {
1284 fesettings->step_size = fesettings->parameters.u.qpsk.symbol_rate / 16000;
1285 fesettings->max_drift = fesettings->parameters.u.qpsk.symbol_rate / 2000;
1286 }
1287 break;
1288
1289 default:
1290 fesettings->min_delay_ms = 100;
1291 if (fesettings->parameters.u.qpsk.symbol_rate < 10000000) {
1292 fesettings->step_size = fesettings->parameters.u.qpsk.symbol_rate / 32000;
1293 fesettings->max_drift = 5000;
1294 } else {
1295 fesettings->step_size = fesettings->parameters.u.qpsk.symbol_rate / 16000;
1296 fesettings->max_drift = fesettings->parameters.u.qpsk.symbol_rate / 2000;
1297 }
1298 break;
1299 }
1300
1301 return 0;
1302 }
1303
1304 default:
1305 return -EOPNOTSUPP;
1306 };
1307
1308 return 0;
1309 }
1310
1311 static long probe_tuner (struct i2c_adapter *adapter)
1312 {
1313 struct i2c_adapter *i2c = adapter; /* superfluous */
1314
1315 /* read the status register of TSA5059 */
1316 u8 rpt[] = { 0x05, 0xb5 };
1317 u8 stat [] = { 0 };
1318 u8 tda6100_buf [] = { 0, 0 };
1319 int ret;
1320 struct i2c_msg msg1 [] = {{ .addr = 0x68, .flags = 0, .buf = rpt, len: 2 },
1321 { .addr = 0x60, .flags = I2C_M_RD, .buf = stat, .len = 1 }};
1322 struct i2c_msg msg2 [] = {{ .addr = 0x68, .flags = 0, .buf = rpt, len: 2 },
1323 { .addr = 0x61, .flags = I2C_M_RD, .buf = stat, .len = 1 }};
1324 struct i2c_msg msg3 [] = {{ .addr = 0x68, .flags = 0, .buf = rpt, len: 2 },
1325 { .addr = 0x60, .flags = 0, .buf = tda6100_buf, .len = 2 }};
1326
1327 stv0299_writereg (i2c, 0x01, 0x15);
1328 stv0299_writereg (i2c, 0x02, 0x30);
1329 stv0299_writereg (i2c, 0x03, 0x00);
1330
1331
1332 printk("stv0299: try to attach to %s\n", adapter->name);
1333
1334 if (!strcmp(adapter->name, "SkyStar2")) {
1335 printk ("stv0299: setup for tuner Samsung TBMU24112IMB\n");
1336 return SAMSUNG_TBMU24112IMB;
1337 }
1338
1339 if ((ret = i2c_transfer(i2c, msg1, 2)) == 2) {
1340 if ( strcmp(adapter->name, "TT-Budget/WinTV-NOVA-CI PCI") == 0 ) {
1341 // technotrend cards require non-datasheet settings
1342 printk ("stv0299: setup for tuner SU1278 (TSA5059 synth) on TechnoTrend hardware\n");
1343 return PHILIPS_SU1278_TSA_TT;
1344 } else {
1345 // fall back to datasheet-recommended settings
1346 printk ("stv0299: setup for tuner SU1278 (TSA5059 synth)\n");
1347 return PHILIPS_SU1278_TSA;
1348 }
1349 }
1350
1351 if ((ret = i2c_transfer(i2c, msg2, 2)) == 2) {
1352 if ( strcmp(adapter->name, "KNC1 DVB-S") == 0 )
1353 {
1354 // Typhoon cards have unusual wiring.
1355 printk ("stv0299: setup for tuner SU1278 (TSA5059 synth) on Typhoon hardware\n");
1356 return PHILIPS_SU1278_TSA_TY;
1357 }
1358 else if ( strcmp(adapter->name, "TerraTec Cinergy 1200 DVB-S") == 0 )
1359 {
1360 // Cinergy cards have unusual wiring.
1361 printk ("%s: setup for tuner SU1278 (TSA5059 synth) on"
1362 " TerraTec hardware\n", __FILE__);
1363 return PHILIPS_SU1278_TSA_CI;
1364 }
1365 //else if ((stat[0] & 0x3f) == 0) {
1366 else if (0) {
1367 printk ("stv0299: setup for tuner TDQF-S001F\n");
1368 return LG_TDQF_S001F;
1369 } else {
1370 printk ("stv0299: setup for tuner BSRU6, TDQB-S00x\n");
1371 return ALPS_BSRU6;
1372 }
1373 }
1374
1375 /**
1376 * setup i2c timing for SU1278...
1377 */
1378 stv0299_writereg (i2c, 0x02, 0x00);
1379
1380 if ((ret = i2c_transfer(i2c, msg3, 2)) == 2) {
1381 printk ("stv0299: setup for tuner Philips SU1278 (TUA6100 synth)\n");
1382 return PHILIPS_SU1278_TUA;
1383 }
1384
1385 printk ("stv0299: unknown PLL synthesizer (ret == %i), please report to <linuxdvb@linuxtv.org>!!\n", ret);
1386
1387 return UNKNOWN_FRONTEND;
1388 }
1389
1390 static struct i2c_client client_template;
1391
1392 static int attach_adapter(struct i2c_adapter *adapter)
1393 {
1394 struct i2c_client *client;
1395 struct stv0299_state* state;
1396 int tuner_type;
1397 int ret;
1398 u8 id;
1399
1400 stv0299_writereg(adapter, 0x02, 0x34); /* standby off */
1401 msleep(200);
1402 id = stv0299_readreg(adapter, 0x00);
1403
1404 dprintk ("%s: id == 0x%02x\n", __FUNCTION__, id);
1405
1406 /* register 0x00 contains 0xa1 for STV0299 and STV0299B */
1407 /* register 0x00 might contain 0x80 when returning from standby */
1408 if (id != 0xa1 && id != 0x80)
1409 return -ENODEV;
1410
1411 if ((tuner_type = probe_tuner(adapter)) < 0)
1412 return -ENODEV;
1413
1414 if ((state = kmalloc(sizeof(struct stv0299_state), GFP_KERNEL)) == NULL) {
1415 return -ENOMEM;
1416 }
1417
1418 if (NULL == (client = kmalloc(sizeof(struct i2c_client), GFP_KERNEL))) {
1419 kfree(state);
1420 return -ENOMEM;
1421 }
1422
1423 state->tuner_type = tuner_type;
1424 state->tuner_frequency = 0;
1425 state->initialised = 0;
1426 state->i2c = adapter;
1427
1428 memcpy(client, &client_template, sizeof(struct i2c_client));
1429 client->adapter = adapter;
1430 client->addr = (0x68>>1);
1431 i2c_set_clientdata(client, (void*)state);
1432
1433 ret = i2c_attach_client(client);
1434 if (ret) {
1435 kfree(client);
1436 kfree(state);
1437 return -EFAULT;
1438 }
1439
1440 BUG_ON(!state->dvb);
1441
1442 ret = dvb_register_frontend(uni0299_ioctl, state->dvb, state,
1443 &uni0299_info, THIS_MODULE);
1444 if (ret) {
1445 i2c_detach_client(client);
1446 kfree(client);
1447 kfree(state);
1448 return -EFAULT;
1449 }
1450
1451 return 0;
1452 }
1453
1454 static int detach_client(struct i2c_client *client)
1455 {
1456 struct stv0299_state *state = (struct stv0299_state*)i2c_get_clientdata(client);
1457
1458 dvb_unregister_frontend (uni0299_ioctl, state->dvb);
1459 i2c_detach_client(client);
1460 kfree(client);
1461 kfree(state);
1462 return 0;
1463 }
1464
1465 static int command (struct i2c_client *client, unsigned int cmd, void *arg)
1466 {
1467 struct stv0299_state *data = (struct stv0299_state*)i2c_get_clientdata(client);
1468 dprintk ("%s\n", __FUNCTION__);
1469
1470 switch (cmd) {
1471 case FE_REGISTER: {
1472 data->dvb = (struct dvb_adapter*)arg;
1473 break;
1474 }
1475 case FE_UNREGISTER: {
1476 data->dvb = NULL;
1477 break;
1478 }
1479 default:
1480 return -EOPNOTSUPP;
1481 }
1482 return 0;
1483 }
1484
1485 static struct i2c_driver driver = {
1486 .owner = THIS_MODULE,
1487 .name = FRONTEND_NAME,
1488 .id = I2C_DRIVERID_DVBFE_STV0299,
1489 .flags = I2C_DF_NOTIFY,
1490 .attach_adapter = attach_adapter,
1491 .detach_client = detach_client,
1492 .command = command,
1493 };
1494
1495 static struct i2c_client client_template = {
1496 .name = FRONTEND_NAME,
1497 .flags = I2C_CLIENT_ALLOW_USE,
1498 .driver = &driver,
1499 };
1500
1501 static int __init init_uni0299 (void)
1502 {
1503 return i2c_add_driver(&driver);
1504 }
1505
1506 static void __exit exit_uni0299 (void)
1507 {
1508 if (i2c_del_driver(&driver))
1509 printk("stv0299: driver deregistration failed\n");
1510 }
1511
1512 module_init (init_uni0299);
1513 module_exit (exit_uni0299);
1514
1515 MODULE_DESCRIPTION("Universal STV0299/TSA5059/SL1935 DVB Frontend driver");
1516 MODULE_AUTHOR("Ralph Metzler, Holger Waechtler, Peter Schildmann, Felix Domke, "
1517 "Andreas Oberritter, Andrew de Quincey, Kenneth Aafløy");
1518 MODULE_LICENSE("GPL");
1519
Historical 2.5/2.6 development