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[PATCH] v4l: keep tvaudio driver away from saa7146
[linux-2.6/history.git] / drivers / scsi / nsp32.c
blob0f8ea29642d0b66b0759ad6a9811ad3799fc6a6a
1 /*
2 * NinjaSCSI-32Bi Cardbus, NinjaSCSI-32UDE PCI/CardBus SCSI driver
3 * Copyright (C) 2001, 2002, 2003
4 * YOKOTA Hiroshi <yokota@netlab.is.tsukuba.ac.jp>
5 * GOTO Masanori <gotom@debian.or.jp>, <gotom@debian.org>
6 *
7 * This program is free software; you can redistribute it and/or modify
8 * it under the terms of the GNU General Public License as published by
9 * the Free Software Foundation; either version 2, or (at your option)
10 * any later version.
11 *
12 * This program is distributed in the hope that it will be useful,
13 * but WITHOUT ANY WARRANTY; without even the implied warranty of
14 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
15 * GNU General Public License for more details.
16 *
17 *
18 * Revision History:
19 * 1.0: Initial Release.
20 * 1.1: Add /proc SDTR status.
21 * Remove obsolete error handler nsp32_reset.
22 * Some clean up.
23 * 1.2: PowerPC (big endian) support.
24 */
25
26 #include <linux/version.h>
27 #include <linux/module.h>
28 #include <linux/init.h>
29 #include <linux/kernel.h>
30 #include <linux/sched.h>
31 #include <linux/slab.h>
32 #include <linux/string.h>
33 #include <linux/timer.h>
34 #include <linux/ioport.h>
35 #include <linux/major.h>
36 #include <linux/blkdev.h>
37 #include <linux/interrupt.h>
38 #include <linux/pci.h>
39 #include <linux/delay.h>
40 #include <linux/ctype.h>
41
42 #include <asm/dma.h>
43 #include <asm/system.h>
44 #include <asm/io.h>
45
46 #include <scsi/scsi.h>
47 #include <scsi/scsi_cmnd.h>
48 #include <scsi/scsi_device.h>
49 #include <scsi/scsi_host.h>
50 #include <scsi/scsi_ioctl.h>
51
52 #if (LINUX_VERSION_CODE < KERNEL_VERSION(2,6,0))
53 # include <linux/blk.h>
54 #endif
55
56 #include "nsp32.h"
57
58
59 /***********************************************************************
60 * Module parameters
61 */
62 static int trans_mode = 0; /* default: BIOS */
63 MODULE_PARM (trans_mode, "i");
64 MODULE_PARM_DESC(trans_mode, "transfer mode (0: BIOS(default) 1: Async 2: Ultra20M");
65 #define ASYNC_MODE 1
66 #define ULTRA20M_MODE 2
67
68 static int auto_param = 0; /* default: ON */
69 MODULE_PARM (auto_param, "i");
70 MODULE_PARM_DESC(auto_param, "AutoParameter mode (0: ON(default) 1: OFF)");
71
72 static int disc_priv = 1; /* default: OFF */
73 MODULE_PARM (disc_priv, "i");
74 MODULE_PARM_DESC(disc_priv, "disconnection privilege mode (0: ON 1: OFF(default))");
75
76 MODULE_AUTHOR("YOKOTA Hiroshi <yokota@netlab.is.tsukuba.ac.jp>, GOTO Masanori <gotom@debian.or.jp>");
77 MODULE_DESCRIPTION("Workbit NinjaSCSI-32Bi/UDE CardBus/PCI SCSI host bus adapter module");
78 MODULE_LICENSE("GPL");
79
80 static const char *nsp32_release_version = "1.2";
81
82
83 /****************************************************************************
84 * Supported hardware
85 */
86 static struct pci_device_id nsp32_pci_table[] __devinitdata = {
87 {
88 .vendor = PCI_VENDOR_ID_IODATA,
89 .device = PCI_DEVICE_ID_NINJASCSI_32BI_CBSC_II,
90 .subvendor = PCI_ANY_ID,
91 .subdevice = PCI_ANY_ID,
92 .driver_data = MODEL_IODATA,
93 },
94 {
95 .vendor = PCI_VENDOR_ID_WORKBIT,
96 .device = PCI_DEVICE_ID_NINJASCSI_32BI_KME,
97 .subvendor = PCI_ANY_ID,
98 .subdevice = PCI_ANY_ID,
99 .driver_data = MODEL_KME,
100 },
101 {
102 .vendor = PCI_VENDOR_ID_WORKBIT,
103 .device = PCI_DEVICE_ID_NINJASCSI_32BI_WBT,
104 .subvendor = PCI_ANY_ID,
105 .subdevice = PCI_ANY_ID,
106 .driver_data = MODEL_WORKBIT,
107 },
108 {
109 .vendor = PCI_VENDOR_ID_WORKBIT,
110 .device = PCI_DEVICE_ID_WORKBIT_STANDARD,
111 .subvendor = PCI_ANY_ID,
112 .subdevice = PCI_ANY_ID,
113 .driver_data = MODEL_PCI_WORKBIT,
114 },
115 {
116 .vendor = PCI_VENDOR_ID_WORKBIT,
117 .device = PCI_DEVICE_ID_NINJASCSI_32BI_LOGITEC,
118 .subvendor = PCI_ANY_ID,
119 .subdevice = PCI_ANY_ID,
120 .driver_data = MODEL_LOGITEC,
121 },
122 {
123 .vendor = PCI_VENDOR_ID_WORKBIT,
124 .device = PCI_DEVICE_ID_NINJASCSI_32BIB_LOGITEC,
125 .subvendor = PCI_ANY_ID,
126 .subdevice = PCI_ANY_ID,
127 .driver_data = MODEL_PCI_LOGITEC,
128 },
129 {
130 .vendor = PCI_VENDOR_ID_WORKBIT,
131 .device = PCI_DEVICE_ID_NINJASCSI_32UDE_MELCO,
132 .subvendor = PCI_ANY_ID,
133 .subdevice = PCI_ANY_ID,
134 .driver_data = MODEL_PCI_MELCO,
135 },
136 {
137 .vendor = PCI_VENDOR_ID_WORKBIT,
138 .device = PCI_DEVICE_ID_NINJASCSI_32UDE_MELCO_II,
139 .subvendor = PCI_ANY_ID,
140 .subdevice = PCI_ANY_ID,
141 .driver_data = MODEL_PCI_MELCO,
142 },
143 {0,0,},
144 };
145 MODULE_DEVICE_TABLE(pci, nsp32_pci_table);
146
147 static nsp32_hw_data nsp32_data_base; /* probe <-> detect glue */
148
149
150 /*
151 * Period/AckWidth speed conversion table
152 *
153 * Note: This period/ackwidth speed table must be in descending order.
154 */
155 static nsp32_sync_table nsp32_sync_table_40M[] = {
156 /* {PNo, AW, SP, EP, SREQ smpl} Speed(MB/s) Period AckWidth */
157 {0x1, 0, 0x0c, 0x0c, SMPL_40M}, /* 20.0 : 50ns, 25ns */
158 {0x2, 0, 0x0d, 0x18, SMPL_40M}, /* 13.3 : 75ns, 25ns */
159 {0x3, 1, 0x19, 0x19, SMPL_40M}, /* 10.0 : 100ns, 50ns */
160 {0x4, 1, 0x1a, 0x1f, SMPL_20M}, /* 8.0 : 125ns, 50ns */
161 {0x5, 2, 0x20, 0x25, SMPL_20M}, /* 6.7 : 150ns, 75ns */
162 {0x6, 2, 0x26, 0x31, SMPL_20M}, /* 5.7 : 175ns, 75ns */
163 {0x7, 3, 0x32, 0x32, SMPL_20M}, /* 5.0 : 200ns, 100ns */
164 {0x8, 3, 0x33, 0x38, SMPL_10M}, /* 4.4 : 225ns, 100ns */
165 {0x9, 3, 0x39, 0x3e, SMPL_10M}, /* 4.0 : 250ns, 100ns */
166 };
167
168 static nsp32_sync_table nsp32_sync_table_20M[] = {
169 {0x1, 0, 0x19, 0x19, SMPL_40M}, /* 10.0 : 100ns, 50ns */
170 {0x2, 0, 0x1a, 0x25, SMPL_20M}, /* 6.7 : 150ns, 50ns */
171 {0x3, 1, 0x26, 0x32, SMPL_20M}, /* 5.0 : 200ns, 100ns */
172 {0x4, 1, 0x33, 0x3e, SMPL_10M}, /* 4.0 : 250ns, 100ns */
173 {0x5, 2, 0x3f, 0x4b, SMPL_10M}, /* 3.3 : 300ns, 150ns */
174 {0x6, 2, 0x4c, 0x57, SMPL_10M}, /* 2.8 : 350ns, 150ns */
175 {0x7, 3, 0x58, 0x64, SMPL_10M}, /* 2.5 : 400ns, 200ns */
176 {0x8, 3, 0x65, 0x70, SMPL_10M}, /* 2.2 : 450ns, 200ns */
177 {0x9, 3, 0x71, 0x7d, SMPL_10M}, /* 2.0 : 500ns, 200ns */
178 };
179
180 static nsp32_sync_table nsp32_sync_table_pci[] = {
181 {0x1, 0, 0x0c, 0x0f, SMPL_40M}, /* 16.6 : 60ns, 30ns */
182 {0x2, 0, 0x10, 0x16, SMPL_40M}, /* 11.1 : 90ns, 30ns */
183 {0x3, 1, 0x17, 0x1e, SMPL_20M}, /* 8.3 : 120ns, 60ns */
184 {0x4, 1, 0x1f, 0x25, SMPL_20M}, /* 6.7 : 150ns, 60ns */
185 {0x5, 2, 0x26, 0x2d, SMPL_20M}, /* 5.6 : 180ns, 90ns */
186 {0x6, 2, 0x2e, 0x34, SMPL_10M}, /* 4.8 : 210ns, 90ns */
187 {0x7, 3, 0x35, 0x3c, SMPL_10M}, /* 4.2 : 240ns, 120ns */
188 {0x8, 3, 0x3d, 0x43, SMPL_10M}, /* 3.7 : 270ns, 120ns */
189 {0x9, 3, 0x44, 0x4b, SMPL_10M}, /* 3.3 : 300ns, 120ns */
190 };
191
192 /*
193 * function declaration
194 */
195 /* module entry point */
196 static int __devinit nsp32_probe (struct pci_dev *, const struct pci_device_id *);
197 static void __devexit nsp32_remove(struct pci_dev *);
198 static int __init init_nsp32 (void);
199 static void __exit exit_nsp32 (void);
200
201 /* struct Scsi_Host_Template */
202 #if (LINUX_VERSION_CODE > KERNEL_VERSION(2,5,73))
203 static int nsp32_proc_info (struct Scsi_Host *, char *, char **, off_t, int, int);
204 #else
205 static int nsp32_proc_info (char *, char **, off_t, int, int, int);
206 #endif
207
208 #if (LINUX_VERSION_CODE > KERNEL_VERSION(2,5,73))
209 static int nsp32_detect (struct pci_dev *pdev);
210 #else
211 static int nsp32_detect (Scsi_Host_Template *);
212 #endif
213 static int nsp32_queuecommand(struct scsi_cmnd *,
214 void (*done)(struct scsi_cmnd *));
215 static const char *nsp32_info (struct Scsi_Host *);
216 static int nsp32_release (struct Scsi_Host *);
217
218 /* SCSI error handler */
219 static int nsp32_eh_abort (struct scsi_cmnd *);
220 static int nsp32_eh_bus_reset (struct scsi_cmnd *);
221 static int nsp32_eh_host_reset(struct scsi_cmnd *);
222
223 /* generate SCSI message */
224 static void nsp32_build_identify(struct scsi_cmnd *);
225 static void nsp32_build_nop (struct scsi_cmnd *);
226 static void nsp32_build_reject (struct scsi_cmnd *);
227 static void nsp32_build_sdtr (struct scsi_cmnd *, unsigned char, unsigned char);
228
229 /* SCSI message handler */
230 static int nsp32_busfree_occur(struct scsi_cmnd *, unsigned short);
231 static void nsp32_msgout_occur (struct scsi_cmnd *);
232 static void nsp32_msgin_occur (struct scsi_cmnd *, unsigned long, unsigned short);
233
234 static int nsp32_setup_sg_table (struct scsi_cmnd *);
235 static int nsp32_selection_autopara(struct scsi_cmnd *);
236 static int nsp32_selection_autoscsi(struct scsi_cmnd *);
237 static void nsp32_scsi_done (struct scsi_cmnd *);
238 static int nsp32_arbitration (struct scsi_cmnd *, unsigned int);
239 static int nsp32_reselection (struct scsi_cmnd *, unsigned char);
240 static void nsp32_adjust_busfree (struct scsi_cmnd *, unsigned int);
241 static void nsp32_restart_autoscsi (struct scsi_cmnd *, unsigned short);
242
243 /* SCSI SDTR */
244 static void nsp32_analyze_sdtr (struct scsi_cmnd *);
245 static int nsp32_search_period_entry(nsp32_hw_data *, nsp32_target *, unsigned char);
246 static void nsp32_set_async (nsp32_hw_data *, nsp32_target *);
247 static void nsp32_set_max_sync (nsp32_hw_data *, nsp32_target *, unsigned char *, unsigned char *);
248 static void nsp32_set_sync_entry (nsp32_hw_data *, nsp32_target *, int, unsigned char);
249
250 /* SCSI bus status handler */
251 static void nsp32_wait_req (nsp32_hw_data *, int);
252 static void nsp32_wait_sack (nsp32_hw_data *, int);
253 static void nsp32_sack_assert (nsp32_hw_data *);
254 static void nsp32_sack_negate (nsp32_hw_data *);
255 static void nsp32_do_bus_reset(nsp32_hw_data *);
256
257 /* hardware interrupt handler */
258 static irqreturn_t do_nsp32_isr(int, void *, struct pt_regs *);
259
260 /* initialize hardware */
261 static int nsp32hw_init(nsp32_hw_data *);
262
263 /* EEPROM handler */
264 static int nsp32_getprom_param (nsp32_hw_data *);
265 static int nsp32_getprom_at24 (nsp32_hw_data *);
266 static int nsp32_getprom_c16 (nsp32_hw_data *);
267 static void nsp32_prom_start (nsp32_hw_data *);
268 static void nsp32_prom_stop (nsp32_hw_data *);
269 static int nsp32_prom_read (nsp32_hw_data *, int);
270 static int nsp32_prom_read_bit (nsp32_hw_data *);
271 static void nsp32_prom_write_bit(nsp32_hw_data *, int);
272 static void nsp32_prom_set (nsp32_hw_data *, int, int);
273 static int nsp32_prom_get (nsp32_hw_data *, int);
274
275 /* debug/warning/info message */
276 static void nsp32_message (const char *, int, char *, char *, ...);
277 #ifdef NSP32_DEBUG
278 static void nsp32_dmessage(const char *, int, int, char *, ...);
279 #endif
280
281 /*
282 * max_sectors is currently limited up to 128.
283 */
284 static struct scsi_host_template nsp32_template = {
285 .proc_name = "nsp32",
286 .name = "Workbit NinjaSCSI-32Bi/UDE",
287 .proc_info = nsp32_proc_info,
288 .info = nsp32_info,
289 .queuecommand = nsp32_queuecommand,
290 .can_queue = 1,
291 .sg_tablesize = NSP32_SG_SIZE,
292 .max_sectors = 128,
293 .cmd_per_lun = 1,
294 .this_id = NSP32_HOST_SCSIID,
295 .use_clustering = DISABLE_CLUSTERING,
296 .eh_abort_handler = nsp32_eh_abort,
297 /* .eh_device_reset_handler = NULL, */
298 .eh_bus_reset_handler = nsp32_eh_bus_reset,
299 .eh_host_reset_handler = nsp32_eh_host_reset,
300 #if (LINUX_VERSION_CODE < KERNEL_VERSION(2,5,74))
301 .detect = nsp32_detect,
302 .release = nsp32_release,
303 #endif
304 #if (LINUX_VERSION_CODE < KERNEL_VERSION(2,5,2))
305 .use_new_eh_code = 1,
306 #else
307 /* .highmem_io = 1, */
308 #endif
309 };
310
311 #include "nsp32_io.h"
312
313 /***********************************************************************
314 * debug, error print
315 */
316 #ifndef NSP32_DEBUG
317 # define NSP32_DEBUG_MASK 0x000000
318 # define nsp32_msg(type, args...) nsp32_message ("", 0, (type), args)
319 # define nsp32_dbg(mask, args...) /* */
320 #else
321 # define NSP32_DEBUG_MASK 0xffffff
322 # define nsp32_msg(type, args...) \
323 nsp32_message (__FUNCTION__, __LINE__, (type), args)
324 # define nsp32_dbg(mask, args...) \
325 nsp32_dmessage(__FUNCTION__, __LINE__, (mask), args)
326 #endif
327
328 #define NSP32_DEBUG_QUEUECOMMAND BIT(0)
329 #define NSP32_DEBUG_REGISTER BIT(1)
330 #define NSP32_DEBUG_AUTOSCSI BIT(2)
331 #define NSP32_DEBUG_INTR BIT(3)
332 #define NSP32_DEBUG_SGLIST BIT(4)
333 #define NSP32_DEBUG_BUSFREE BIT(5)
334 #define NSP32_DEBUG_CDB_CONTENTS BIT(6)
335 #define NSP32_DEBUG_RESELECTION BIT(7)
336 #define NSP32_DEBUG_MSGINOCCUR BIT(8)
337 #define NSP32_DEBUG_EEPROM BIT(9)
338 #define NSP32_DEBUG_MSGOUTOCCUR BIT(10)
339 #define NSP32_DEBUG_BUSRESET BIT(11)
340 #define NSP32_DEBUG_RESTART BIT(12)
341 #define NSP32_DEBUG_SYNC BIT(13)
342 #define NSP32_DEBUG_WAIT BIT(14)
343 #define NSP32_DEBUG_TARGETFLAG BIT(15)
344 #define NSP32_DEBUG_PROC BIT(16)
345 #define NSP32_DEBUG_INIT BIT(17)
346 #define NSP32_SPECIAL_PRINT_REGISTER BIT(20)
347
348 #define NSP32_DEBUG_BUF_LEN 100
349
350 static void nsp32_message(const char *func, int line, char *type, char *fmt, ...)
351 {
352 va_list args;
353 char buf[NSP32_DEBUG_BUF_LEN];
354
355 va_start(args, fmt);
356 vsnprintf(buf, sizeof(buf), fmt, args);
357 va_end(args);
358
359 #ifndef NSP32_DEBUG
360 printk("%snsp32: %s\n", type, buf);
361 #else
362 printk("%snsp32: %s (%d): %s\n", type, func, line, buf);
363 #endif
364 }
365
366 #ifdef NSP32_DEBUG
367 static void nsp32_dmessage(const char *func, int line, int mask, char *fmt, ...)
368 {
369 va_list args;
370 char buf[NSP32_DEBUG_BUF_LEN];
371
372 va_start(args, fmt);
373 vsnprintf(buf, sizeof(buf), fmt, args);
374 va_end(args);
375
376 if (mask & NSP32_DEBUG_MASK) {
377 printk("nsp32-debug: 0x%x %s (%d): %s\n", mask, func, line, buf);
378 }
379 }
380 #endif
381
382 #ifdef NSP32_DEBUG
383 # include "nsp32_debug.c"
384 #else
385 # define show_command(arg) /* */
386 # define show_busphase(arg) /* */
387 # define show_autophase(arg) /* */
388 #endif
389
390 /*
391 * IDENTIFY Message
392 */
393 static void nsp32_build_identify(struct scsi_cmnd *SCpnt)
394 {
395 nsp32_hw_data *data = (nsp32_hw_data *)SCpnt->device->host->hostdata;
396 int pos = data->msgout_len;
397 int mode = FALSE;
398
399 /* XXX: Auto DiscPriv detection is progressing... */
400 if (disc_priv == 0) {
401 /* mode = TRUE; */
402 }
403
404 data->msgoutbuf[pos] = IDENTIFY(mode, SCpnt->device->lun); pos++;
405
406 data->msgout_len = pos;
407 }
408
409 /*
410 * SDTR Message Routine
411 */
412 static void nsp32_build_sdtr(struct scsi_cmnd *SCpnt,
413 unsigned char period,
414 unsigned char offset)
415 {
416 nsp32_hw_data *data = (nsp32_hw_data *)SCpnt->device->host->hostdata;
417 int pos = data->msgout_len;
418
419 data->msgoutbuf[pos] = EXTENDED_MESSAGE; pos++;
420 data->msgoutbuf[pos] = EXTENDED_SDTR_LEN; pos++;
421 data->msgoutbuf[pos] = EXTENDED_SDTR; pos++;
422 data->msgoutbuf[pos] = period; pos++;
423 data->msgoutbuf[pos] = offset; pos++;
424
425 data->msgout_len = pos;
426 }
427
428 /*
429 * No Operation Message
430 */
431 static void nsp32_build_nop(struct scsi_cmnd *SCpnt)
432 {
433 nsp32_hw_data *data = (nsp32_hw_data *)SCpnt->device->host->hostdata;
434 int pos = data->msgout_len;
435
436 if (pos != 0) {
437 nsp32_msg(KERN_WARNING,
438 "Some messages are already contained!");
439 return;
440 }
441
442 data->msgoutbuf[pos] = NOP; pos++;
443 data->msgout_len = pos;
444 }
445
446 /*
447 * Reject Message
448 */
449 static void nsp32_build_reject(struct scsi_cmnd *SCpnt)
450 {
451 nsp32_hw_data *data = (nsp32_hw_data *)SCpnt->device->host->hostdata;
452 int pos = data->msgout_len;
453
454 data->msgoutbuf[pos] = MESSAGE_REJECT; pos++;
455 data->msgout_len = pos;
456 }
457
458 /*
459 * timer
460 */
461 #if 0
462 static void nsp32_start_timer(struct scsi_cmnd *SCpnt, int time)
463 {
464 unsigned int base = SCpnt->host->io_port;
465
466 nsp32_dbg(NSP32_DEBUG_INTR, "timer=%d", time);
467
468 if (time & (~TIMER_CNT_MASK)) {
469 nsp32_dbg(NSP32_DEBUG_INTR, "timer set overflow");
470 }
471
472 nsp32_write2(base, TIMER_SET, time & TIMER_CNT_MASK);
473 }
474 #endif
475
476
477 /*
478 * set SCSI command and other parameter to asic, and start selection phase
479 */
480 static int nsp32_selection_autopara(struct scsi_cmnd *SCpnt)
481 {
482 nsp32_hw_data *data = (nsp32_hw_data *)SCpnt->device->host->hostdata;
483 unsigned int base = SCpnt->device->host->io_port;
484 unsigned int host_id = SCpnt->device->host->this_id;
485 unsigned char target = SCpnt->device->id;
486 nsp32_autoparam *param = data->autoparam;
487 unsigned char phase;
488 int i, ret;
489 unsigned int msgout;
490 u16_le s;
491
492 nsp32_dbg(NSP32_DEBUG_AUTOSCSI, "in");
493
494 /*
495 * check bus free
496 */
497 phase = nsp32_read1(base, SCSI_BUS_MONITOR);
498 if (phase != BUSMON_BUS_FREE) {
499 nsp32_msg(KERN_WARNING, "bus busy");
500 show_busphase(phase & BUSMON_PHASE_MASK);
501 SCpnt->result = DID_BUS_BUSY << 16;
502 return FALSE;
503 }
504
505 /*
506 * message out
507 *
508 * Note: If the range of msgout_len is 1 - 3, fill scsi_msgout.
509 * over 3 messages needs another routine.
510 */
511 if (data->msgout_len == 0) {
512 nsp32_msg(KERN_ERR, "SCSI MsgOut without any message!");
513 SCpnt->result = DID_ERROR << 16;
514 return FALSE;
515 } else if (data->msgout_len > 0 && data->msgout_len <= 3) {
516 msgout = 0;
517 for (i = 0; i < data->msgout_len; i++) {
518 /*
519 * the sending order of the message is:
520 * MCNT 3: MSG#0 -> MSG#1 -> MSG#2
521 * MCNT 2: MSG#1 -> MSG#2
522 * MCNT 1: MSG#2
523 */
524 msgout >>= 8;
525 msgout |= ((unsigned int)(data->msgoutbuf[i]) << 24);
526 }
527 msgout |= MV_VALID; /* MV valid */
528 msgout |= (unsigned int)data->msgout_len; /* len */
529 } else {
530 /* data->msgout_len > 3 */
531 msgout = 0;
532 }
533
534 // nsp_dbg(NSP32_DEBUG_AUTOSCSI, "sel time out=0x%x\n", nsp32_read2(base, SEL_TIME_OUT));
535 // nsp32_write2(base, SEL_TIME_OUT, SEL_TIMEOUT_TIME);
536
537 /*
538 * setup asic parameter
539 */
540 memset(param, 0, sizeof(nsp32_autoparam));
541
542 /* cdb */
543 for (i = 0; i < SCpnt->cmd_len; i++) {
544 param->cdb[4 * i] = SCpnt->cmnd[i];
545 }
546
547 /* outgoing messages */
548 param->msgout = cpu_to_le32(msgout);
549
550 /* syncreg, ackwidth, target id, SREQ sampling rate */
551 param->syncreg = data->cur_target->syncreg;
552 param->ackwidth = data->cur_target->ackwidth;
553 param->target_id = BIT(host_id) | BIT(target);
554 param->sample_reg = data->cur_target->sample_reg;
555
556 // nsp32_dbg(NSP32_DEBUG_AUTOSCSI, "sample rate=0x%x\n", data->cur_target->sample_reg);
557
558 /* command control */
559 param->command_control = cpu_to_le16(CLEAR_CDB_FIFO_POINTER |
560 AUTOSCSI_START |
561 AUTO_MSGIN_00_OR_04 |
562 AUTO_MSGIN_02 |
563 AUTO_ATN );
564
565
566 /* transfer control */
567 s = 0;
568 switch (data->trans_method) {
569 case NSP32_TRANSFER_BUSMASTER:
570 s |= BM_START;
571 break;
572 case NSP32_TRANSFER_MMIO:
573 s |= CB_MMIO_MODE;
574 break;
575 case NSP32_TRANSFER_PIO:
576 s |= CB_IO_MODE;
577 break;
578 default:
579 nsp32_msg(KERN_ERR, "unknown trans_method");
580 break;
581 }
582 /*
583 * OR-ed BLIEND_MODE, FIFO intr is decreased, instead of PCI bus waits.
584 * For bus master transfer, it's taken off.
585 */
586 s |= (TRANSFER_GO | ALL_COUNTER_CLR);
587 param->transfer_control = cpu_to_le16(s);
588
589 /* sg table addr */
590 param->sgt_pointer = cpu_to_le32(data->cur_lunt->sglun_paddr);
591
592 /*
593 * transfer parameter to ASIC
594 */
595 nsp32_write4(base, SGT_ADR, data->auto_paddr);
596 nsp32_write2(base, COMMAND_CONTROL, CLEAR_CDB_FIFO_POINTER |
597 AUTO_PARAMETER );
598
599 /*
600 * Check arbitration
601 */
602 ret = nsp32_arbitration(SCpnt, base);
603
604 return ret;
605 }
606
607
608 /*
609 * Selection with AUTO SCSI (without AUTO PARAMETER)
610 */
611 static int nsp32_selection_autoscsi(struct scsi_cmnd *SCpnt)
612 {
613 nsp32_hw_data *data = (nsp32_hw_data *)SCpnt->device->host->hostdata;
614 unsigned int base = SCpnt->device->host->io_port;
615 unsigned int host_id = SCpnt->device->host->this_id;
616 unsigned char target = SCpnt->device->id;
617 unsigned char phase;
618 int status;
619 unsigned short command = 0;
620 unsigned int msgout = 0;
621 unsigned short execph;
622 int i;
623
624 nsp32_dbg(NSP32_DEBUG_AUTOSCSI, "in");
625
626 /*
627 * IRQ disable
628 */
629 nsp32_write2(base, IRQ_CONTROL, IRQ_CONTROL_ALL_IRQ_MASK);
630
631 /*
632 * check bus line
633 */
634 phase = nsp32_read1(base, SCSI_BUS_MONITOR);
635 if(((phase & BUSMON_BSY) == 1) || (phase & BUSMON_SEL) == 1) {
636 nsp32_msg(KERN_WARNING, "bus busy");
637 SCpnt->result = DID_BUS_BUSY << 16;
638 status = 1;
639 goto out;
640 }
641
642 /*
643 * clear execph
644 */
645 execph = nsp32_read2(base, SCSI_EXECUTE_PHASE);
646
647 /*
648 * clear FIFO counter to set CDBs
649 */
650 nsp32_write2(base, COMMAND_CONTROL, CLEAR_CDB_FIFO_POINTER);
651
652 /*
653 * set CDB0 - CDB15
654 */
655 for (i = 0; i < SCpnt->cmd_len; i++) {
656 nsp32_write1(base, COMMAND_DATA, SCpnt->cmnd[i]);
657 }
658 nsp32_dbg(NSP32_DEBUG_CDB_CONTENTS, "CDB[0]=[0x%x]", SCpnt->cmnd[0]);
659
660 /*
661 * set SCSIOUT LATCH(initiator)/TARGET(target) (OR-ed) ID
662 */
663 nsp32_write1(base, SCSI_OUT_LATCH_TARGET_ID, BIT(host_id) | BIT(target));
664
665 /*
666 * set SCSI MSGOUT REG
667 *
668 * Note: If the range of msgout_len is 1 - 3, fill scsi_msgout.
669 * over 3 messages needs another routine.
670 */
671 if (data->msgout_len == 0) {
672 nsp32_msg(KERN_ERR, "SCSI MsgOut without any message!");
673 SCpnt->result = DID_ERROR << 16;
674 status = 1;
675 goto out;
676 } else if (data->msgout_len > 0 && data->msgout_len <= 3) {
677 msgout = 0;
678 for (i = 0; i < data->msgout_len; i++) {
679 /*
680 * the sending order of the message is:
681 * MCNT 3: MSG#0 -> MSG#1 -> MSG#2
682 * MCNT 2: MSG#1 -> MSG#2
683 * MCNT 1: MSG#2
684 */
685 msgout >>= 8;
686 msgout |= ((unsigned int)(data->msgoutbuf[i]) << 24);
687 }
688 msgout |= MV_VALID; /* MV valid */
689 msgout |= (unsigned int)data->msgout_len; /* len */
690 nsp32_write4(base, SCSI_MSG_OUT, msgout);
691 } else {
692 /* data->msgout_len > 3 */
693 nsp32_write4(base, SCSI_MSG_OUT, 0);
694 }
695
696 /*
697 * set selection timeout(= 250ms)
698 */
699 nsp32_write2(base, SEL_TIME_OUT, SEL_TIMEOUT_TIME);
700
701 /*
702 * set SREQ hazard killer sampling rate
703 *
704 * TODO: sample_rate (BASE+0F) is 0 when internal clock = 40MHz.
705 * check other internal clock!
706 */
707 nsp32_write1(base, SREQ_SMPL_RATE, data->cur_target->sample_reg);
708
709 /*
710 * clear Arbit
711 */
712 nsp32_write1(base, SET_ARBIT, ARBIT_CLEAR);
713
714 /*
715 * set SYNCREG
716 * Don't set BM_START_ADR before setting this register.
717 */
718 nsp32_write1(base, SYNC_REG, data->cur_target->syncreg);
719
720 /*
721 * set ACKWIDTH
722 */
723 nsp32_write1(base, ACK_WIDTH, data->cur_target->ackwidth);
724
725 nsp32_dbg(NSP32_DEBUG_AUTOSCSI,
726 "syncreg=0x%x, ackwidth=0x%x, sgtpaddr=0x%x, id=0x%x",
727 nsp32_read1(base, SYNC_REG), nsp32_read1(base, ACK_WIDTH),
728 nsp32_read4(base, SGT_ADR), nsp32_read1(base, SCSI_OUT_LATCH_TARGET_ID));
729 nsp32_dbg(NSP32_DEBUG_AUTOSCSI, "msgout_len=%d, msgout=0x%x",
730 data->msgout_len, msgout);
731
732 /*
733 * set SGT ADDR (physical address)
734 */
735 nsp32_write4(base, SGT_ADR, data->cur_lunt->sglun_paddr);
736
737 /*
738 * set TRANSFER CONTROL REG
739 */
740 command = 0;
741 command |= (TRANSFER_GO | ALL_COUNTER_CLR);
742 if (data->trans_method & NSP32_TRANSFER_BUSMASTER) {
743 if (SCpnt->request_bufflen > 0) {
744 command |= BM_START;
745 }
746 } else if (data->trans_method & NSP32_TRANSFER_MMIO) {
747 command |= CB_MMIO_MODE;
748 } else if (data->trans_method & NSP32_TRANSFER_PIO) {
749 command |= CB_IO_MODE;
750 }
751 nsp32_write2(base, TRANSFER_CONTROL, command);
752
753 /*
754 * start AUTO SCSI, kick off arbitration
755 */
756 command = (CLEAR_CDB_FIFO_POINTER |
757 AUTOSCSI_START |
758 AUTO_MSGIN_00_OR_04 |
759 AUTO_MSGIN_02 |
760 AUTO_ATN );
761 nsp32_write2(base, COMMAND_CONTROL, command);
762
763 /*
764 * Check arbitration
765 */
766 status = nsp32_arbitration(SCpnt, base);
767
768 out:
769 /*
770 * IRQ enable
771 */
772 nsp32_write2(base, IRQ_CONTROL, 0);
773
774 return status;
775 }
776
777
778 /*
779 * Arbitration Status Check
780 *
781 * Note: Arbitration counter is waited during ARBIT_GO is not lifting.
782 * Using udelay(1) consumes CPU time and system time, but
783 * arbitration delay time is defined minimal 2.4us in SCSI
784 * specification, thus udelay works as coarse grained wait timer.
785 */
786 static int nsp32_arbitration(struct scsi_cmnd *SCpnt, unsigned int base)
787 {
788 unsigned char arbit;
789 int status = TRUE;
790 int time = 0;
791
792 do {
793 arbit = nsp32_read1(base, ARBIT_STATUS);
794 time++;
795 } while ((arbit & (ARBIT_WIN | ARBIT_FAIL)) == 0 &&
796 (time <= ARBIT_TIMEOUT_TIME));
797
798 nsp32_dbg(NSP32_DEBUG_AUTOSCSI,
799 "arbit: 0x%x, delay time: %d", arbit, time);
800
801 if (arbit & ARBIT_WIN) {
802 /* Arbitration succeeded */
803 SCpnt->result = DID_OK << 16;
804 nsp32_index_write1(base, EXT_PORT, LED_ON); /* PCI LED on */
805 } else if (arbit & ARBIT_FAIL) {
806 /* Arbitration failed */
807 SCpnt->result = DID_BUS_BUSY << 16;
808 status = FALSE;
809 } else {
810 /*
811 * unknown error or ARBIT_GO timeout,
812 * something lock up! guess no connection.
813 */
814 nsp32_dbg(NSP32_DEBUG_AUTOSCSI, "arbit timeout");
815 SCpnt->result = DID_NO_CONNECT << 16;
816 status = FALSE;
817 }
818
819 /*
820 * clear Arbit
821 */
822 nsp32_write1(base, SET_ARBIT, ARBIT_CLEAR);
823
824 return status;
825 }
826
827
828 /*
829 * reselection
830 *
831 * Note: This reselection routine is called from msgin_occur,
832 * reselection target id&lun must be already set.
833 * SCSI-2 says IDENTIFY implies RESTORE_POINTER operation.
834 */
835 static int nsp32_reselection(struct scsi_cmnd *SCpnt, unsigned char newlun)
836 {
837 nsp32_hw_data *data = (nsp32_hw_data *)SCpnt->device->host->hostdata;
838 unsigned int host_id = SCpnt->device->host->this_id;
839 unsigned int base = SCpnt->device->host->io_port;
840 unsigned char tmpid, newid;
841
842 nsp32_dbg(NSP32_DEBUG_RESELECTION, "enter");
843
844 /*
845 * calculate reselected SCSI ID
846 */
847 tmpid = nsp32_read1(base, RESELECT_ID);
848 tmpid &= (~BIT(host_id));
849 newid = 0;
850 while (tmpid) {
851 if (tmpid & 1) {
852 break;
853 }
854 tmpid >>= 1;
855 newid++;
856 }
857
858 /*
859 * If reselected New ID:LUN is not existed
860 * or current nexus is not existed, unexpected
861 * reselection is occurred. Send reject message.
862 */
863 if (newid >= ARRAY_SIZE(data->lunt) || newlun >= ARRAY_SIZE(data->lunt[0])) {
864 nsp32_msg(KERN_WARNING, "unknown id/lun");
865 return FALSE;
866 } else if(data->lunt[newid][newlun].SCpnt == NULL) {
867 nsp32_msg(KERN_WARNING, "no SCSI command is processing");
868 return FALSE;
869 }
870
871 data->cur_id = newid;
872 data->cur_lun = newlun;
873 data->cur_target = &(data->target[newid]);
874 data->cur_lunt = &(data->lunt[newid][newlun]);
875
876 /* reset SACK/SavedACK counter (or ALL clear?) */
877 nsp32_write4(base, CLR_COUNTER, CLRCOUNTER_ALLMASK);
878
879 return TRUE;
880 }
881
882
883 /*
884 * nsp32_setup_sg_table - build scatter gather list for transfer data
885 * with bus master.
886 *
887 * Note: NinjaSCSI-32Bi/UDE bus master can not transfer over 64KB at a time.
888 */
889 static int nsp32_setup_sg_table(struct scsi_cmnd *SCpnt)
890 {
891 nsp32_hw_data *data = (nsp32_hw_data *)SCpnt->device->host->hostdata;
892 struct scatterlist *sgl;
893 nsp32_sgtable *sgt = data->cur_lunt->sglun->sgt;
894 int num, i;
895 u32_le l;
896
897 if (SCpnt->request_bufflen == 0) {
898 return TRUE;
899 }
900
901 if (sgt == NULL) {
902 nsp32_dbg(NSP32_DEBUG_SGLIST, "SGT == null");
903 return FALSE;
904 }
905
906 if (SCpnt->use_sg) {
907 sgl = (struct scatterlist *)SCpnt->request_buffer;
908 num = pci_map_sg(data->Pci, sgl, SCpnt->use_sg,
909 SCpnt->sc_data_direction);
910 for (i = 0; i < num; i++) {
911 /*
912 * Build nsp32_sglist, substitute sg dma addresses.
913 */
914 sgt[i].addr = cpu_to_le32(sg_dma_address(sgl));
915 sgt[i].len = cpu_to_le32(sg_dma_len(sgl));
916 sgl++;
917
918 if (le32_to_cpu(sgt[i].len) > 0x10000) {
919 nsp32_msg(KERN_ERR,
920 "can't transfer over 64KB at a time, size=0x%lx", le32_to_cpu(sgt[i].len));
921 return FALSE;
922 }
923 nsp32_dbg(NSP32_DEBUG_SGLIST,
924 "num 0x%x : addr 0x%lx len 0x%lx",
925 i,
926 le32_to_cpu(sgt[i].addr),
927 le32_to_cpu(sgt[i].len ));
928 }
929
930 /* set end mark */
931 l = le32_to_cpu(sgt[num-1].len);
932 sgt[num-1].len = cpu_to_le32(l | SGTEND);
933
934 } else {
935 SCpnt->SCp.have_data_in = pci_map_single(data->Pci,
936 SCpnt->request_buffer, SCpnt->request_bufflen,
937 SCpnt->sc_data_direction);
938
939 sgt[0].addr = cpu_to_le32(SCpnt->SCp.have_data_in);
940 sgt[0].len = cpu_to_le32(SCpnt->request_bufflen | SGTEND); /* set end mark */
941
942 if (SCpnt->request_bufflen > 0x10000) {
943 nsp32_msg(KERN_ERR,
944 "can't transfer over 64KB at a time, size=0x%lx", SCpnt->request_bufflen);
945 return FALSE;
946 }
947 nsp32_dbg(NSP32_DEBUG_SGLIST, "single : addr 0x%lx len=0x%lx",
948 le32_to_cpu(sgt[0].addr),
949 le32_to_cpu(sgt[0].len ));
950 }
951
952 return TRUE;
953 }
954
955 static int nsp32_queuecommand(struct scsi_cmnd *SCpnt, void (*done)(struct scsi_cmnd *))
956 {
957 nsp32_hw_data *data = (nsp32_hw_data *)SCpnt->device->host->hostdata;
958 nsp32_target *target;
959 nsp32_lunt *cur_lunt;
960 int ret;
961
962 nsp32_dbg(NSP32_DEBUG_QUEUECOMMAND,
963 "enter. target: 0x%x LUN: 0x%x cmnd: 0x%x cmndlen: 0x%x "
964 "use_sg: 0x%x reqbuf: 0x%lx reqlen: 0x%x",
965 SCpnt->device->id, SCpnt->device->lun, SCpnt->cmnd[0], SCpnt->cmd_len,
966 SCpnt->use_sg, SCpnt->request_buffer, SCpnt->request_bufflen);
967
968 if (data->CurrentSC != NULL) {
969 nsp32_msg(KERN_ERR, "Currentsc != NULL. Cancel this command request");
970 data->CurrentSC = NULL;
971 SCpnt->result = DID_NO_CONNECT << 16;
972 done(SCpnt);
973
974 return SCSI_MLQUEUE_HOST_BUSY;
975 }
976
977 /* check target ID is not same as this initiator ID */
978 if (SCpnt->device->id == SCpnt->device->host->this_id) {
979 nsp32_dbg(NSP32_DEBUG_QUEUECOMMAND, "terget==host???");
980 SCpnt->result = DID_BAD_TARGET << 16;
981 done(SCpnt);
982 return SCSI_MLQUEUE_DEVICE_BUSY;
983 }
984
985 /* check target LUN is allowable value */
986 if (SCpnt->device->lun >= MAX_LUN) {
987 nsp32_dbg(NSP32_DEBUG_QUEUECOMMAND, "no more lun");
988 SCpnt->result = DID_BAD_TARGET << 16;
989 done(SCpnt);
990 return SCSI_MLQUEUE_DEVICE_BUSY;
991 }
992
993 show_command(SCpnt);
994
995 SCpnt->scsi_done = done;
996 data->CurrentSC = SCpnt;
997 SCpnt->SCp.Status = CHECK_CONDITION;
998 SCpnt->SCp.Message = 0;
999 SCpnt->resid = SCpnt->request_bufflen;
1000
1001 SCpnt->SCp.ptr = (char *) SCpnt->request_buffer;
1002 SCpnt->SCp.this_residual = SCpnt->request_bufflen;
1003 SCpnt->SCp.buffer = NULL;
1004 SCpnt->SCp.buffers_residual = 0;
1005
1006 /* initialize data */
1007 data->msgout_len = 0;
1008 data->msgin_len = 0;
1009 cur_lunt = &(data->lunt[SCpnt->device->id][SCpnt->device->lun]);
1010 cur_lunt->SCpnt = SCpnt;
1011 cur_lunt->save_datp = 0;
1012 cur_lunt->msgin03 = FALSE;
1013 data->cur_lunt = cur_lunt;
1014 data->cur_id = SCpnt->device->id;
1015 data->cur_lun = SCpnt->device->lun;
1016
1017 ret = nsp32_setup_sg_table(SCpnt);
1018 if (ret == FALSE) {
1019 nsp32_msg(KERN_ERR, "SGT fail");
1020 SCpnt->result = DID_ERROR << 16;
1021 nsp32_scsi_done(SCpnt);
1022 return SCSI_MLQUEUE_HOST_BUSY;
1023 }
1024
1025 /* Build IDENTIFY */
1026 nsp32_build_identify(SCpnt);
1027
1028 /*
1029 * If target is the first time to transfer after the reset
1030 * (target don't have SDTR_DONE and SDTR_INITIATOR), sync
1031 * message SDTR is needed to do synchronous transfer.
1032 */
1033 target = &data->target[SCpnt->device->id];
1034 data->cur_target = target;
1035
1036 if (!(target->sync_flag & (SDTR_DONE | SDTR_INITIATOR | SDTR_TARGET))) {
1037 unsigned char period, offset;
1038
1039 if (trans_mode != ASYNC_MODE) {
1040 nsp32_set_max_sync(data, target, &period, &offset);
1041 nsp32_build_sdtr(SCpnt, period, offset);
1042 target->sync_flag |= SDTR_INITIATOR;
1043 } else {
1044 nsp32_set_async(data, target);
1045 target->sync_flag |= SDTR_DONE;
1046 }
1047
1048 nsp32_dbg(NSP32_DEBUG_QUEUECOMMAND,
1049 "SDTR: entry: %d start_period: 0x%x offset: 0x%x\n",
1050 target->limit_entry, period, offset);
1051 } else if (target->sync_flag & SDTR_INITIATOR) {
1052 /*
1053 * It was negotiating SDTR with target, sending from the
1054 * initiator, but there are no chance to remove this flag.
1055 * Set async because we don't get proper negotiation.
1056 */
1057 nsp32_set_async(data, target);
1058 target->sync_flag &= ~SDTR_INITIATOR;
1059 target->sync_flag |= SDTR_DONE;
1060
1061 nsp32_dbg(NSP32_DEBUG_QUEUECOMMAND,
1062 "SDTR_INITIATOR: fall back to async");
1063 } else if (target->sync_flag & SDTR_TARGET) {
1064 /*
1065 * It was negotiating SDTR with target, sending from target,
1066 * but there are no chance to remove this flag. Set async
1067 * because we don't get proper negotiation.
1068 */
1069 nsp32_set_async(data, target);
1070 target->sync_flag &= ~SDTR_TARGET;
1071 target->sync_flag |= SDTR_DONE;
1072
1073 nsp32_dbg(NSP32_DEBUG_QUEUECOMMAND,
1074 "Unknown SDTR from target is reached, fall back to async.");
1075 }
1076
1077 nsp32_dbg(NSP32_DEBUG_TARGETFLAG,
1078 "target: %d sync_flag: 0x%x syncreg: 0x%x ackwidth: 0x%x",
1079 SCpnt->device->id, target->sync_flag, target->syncreg,
1080 target->ackwidth);
1081
1082 /* Selection */
1083 if (auto_param == 0) {
1084 ret = nsp32_selection_autopara(SCpnt);
1085 } else {
1086 ret = nsp32_selection_autoscsi(SCpnt);
1087 }
1088
1089 if (ret != TRUE) {
1090 nsp32_dbg(NSP32_DEBUG_QUEUECOMMAND, "selection fail");
1091 nsp32_scsi_done(SCpnt);
1092 return SCSI_MLQUEUE_DEVICE_BUSY;
1093 }
1094
1095 return 0;
1096 }
1097
1098 /* initialize asic */
1099 static int nsp32hw_init(nsp32_hw_data *data)
1100 {
1101 unsigned int base = data->BaseAddress;
1102 unsigned short irq_stat;
1103 unsigned long lc_reg;
1104 unsigned char power;
1105
1106 lc_reg = nsp32_index_read4(base, CFG_LATE_CACHE);
1107 if ((lc_reg & 0xff00) == 0) {
1108 lc_reg |= (0x20 << 8);
1109 nsp32_index_write2(base, CFG_LATE_CACHE, lc_reg & 0xffff);
1110 }
1111
1112 nsp32_write2(base, IRQ_CONTROL, IRQ_CONTROL_ALL_IRQ_MASK);
1113 nsp32_write2(base, TRANSFER_CONTROL, 0);
1114 nsp32_write4(base, BM_CNT, 0);
1115 nsp32_write2(base, SCSI_EXECUTE_PHASE, 0);
1116
1117 do {
1118 irq_stat = nsp32_read2(base, IRQ_STATUS);
1119 nsp32_dbg(NSP32_DEBUG_INIT, "irq_stat 0x%x", irq_stat);
1120 } while (irq_stat & IRQSTATUS_ANY_IRQ);
1121
1122 /*
1123 * Fill FIFO_FULL_SHLD, FIFO_EMPTY_SHLD. Below parameter is
1124 * designated by specification.
1125 */
1126 if ((data->trans_method & NSP32_TRANSFER_PIO) ||
1127 (data->trans_method & NSP32_TRANSFER_MMIO)) {
1128 nsp32_index_write1(base, FIFO_FULL_SHLD_COUNT, 0x40);
1129 nsp32_index_write1(base, FIFO_EMPTY_SHLD_COUNT, 0x40);
1130 } else if (data->trans_method & NSP32_TRANSFER_BUSMASTER) {
1131 nsp32_index_write1(base, FIFO_FULL_SHLD_COUNT, 0x10);
1132 nsp32_index_write1(base, FIFO_EMPTY_SHLD_COUNT, 0x60);
1133 } else {
1134 nsp32_dbg(NSP32_DEBUG_INIT, "unknown transfer mode");
1135 }
1136
1137 nsp32_dbg(NSP32_DEBUG_INIT, "full 0x%x emp 0x%x",
1138 nsp32_index_read1(base, FIFO_FULL_SHLD_COUNT),
1139 nsp32_index_read1(base, FIFO_EMPTY_SHLD_COUNT));
1140
1141 nsp32_index_write1(base, CLOCK_DIV, data->clock);
1142 nsp32_index_write1(base, BM_CYCLE, MEMRD_CMD1 | SGT_AUTO_PARA_MEMED_CMD);
1143 nsp32_write1(base, PARITY_CONTROL, 0); /* parity check is disable */
1144
1145 /*
1146 * initialize MISC_WRRD register
1147 *
1148 * Note: Designated parameters is obeyed as following:
1149 * MISC_SCSI_DIRECTION_DETECTOR_SELECT: It must be set.
1150 * MISC_MASTER_TERMINATION_SELECT: It must be set.
1151 * MISC_BMREQ_NEGATE_TIMING_SEL: It should be set.
1152 * MISC_AUTOSEL_TIMING_SEL: It should be set.
1153 * MISC_BMSTOP_CHANGE2_NONDATA_PHASE: It should be set.
1154 * MISC_DELAYED_BMSTART: It's selected for safety.
1155 *
1156 * Note: If MISC_BMSTOP_CHANGE2_NONDATA_PHASE is set, then
1157 * we have to set TRANSFERCONTROL_BM_START as 0 and set
1158 * appropriate value before restarting bus master transfer.
1159 */
1160 nsp32_index_write2(base, MISC_WR,
1161 (SCSI_DIRECTION_DETECTOR_SELECT |
1162 DELAYED_BMSTART |
1163 MASTER_TERMINATION_SELECT |
1164 BMREQ_NEGATE_TIMING_SEL |
1165 AUTOSEL_TIMING_SEL |
1166 BMSTOP_CHANGE2_NONDATA_PHASE));
1167
1168 nsp32_index_write1(base, TERM_PWR_CONTROL, 0);
1169 power = nsp32_index_read1(base, TERM_PWR_CONTROL);
1170 if (!(power & SENSE)) {
1171 nsp32_msg(KERN_INFO, "term power on");
1172 nsp32_index_write1(base, TERM_PWR_CONTROL, BPWR);
1173 }
1174
1175 nsp32_write2(base, TIMER_SET, TIMER_STOP);
1176 nsp32_write2(base, TIMER_SET, TIMER_STOP); /* Required 2 times */
1177
1178 nsp32_write1(base, SYNC_REG, 0);
1179 nsp32_write1(base, ACK_WIDTH, 0);
1180 nsp32_write2(base, SEL_TIME_OUT, SEL_TIMEOUT_TIME);
1181
1182 /*
1183 * enable to select designated IRQ (except for
1184 * IRQSELECT_SERR, IRQSELECT_PERR, IRQSELECT_BMCNTERR)
1185 */
1186 nsp32_index_write2(base, IRQ_SELECT, IRQSELECT_TIMER_IRQ |
1187 IRQSELECT_SCSIRESET_IRQ |
1188 IRQSELECT_FIFO_SHLD_IRQ |
1189 IRQSELECT_RESELECT_IRQ |
1190 IRQSELECT_PHASE_CHANGE_IRQ |
1191 IRQSELECT_AUTO_SCSI_SEQ_IRQ |
1192 // IRQSELECT_BMCNTERR_IRQ |
1193 IRQSELECT_TARGET_ABORT_IRQ |
1194 IRQSELECT_MASTER_ABORT_IRQ );
1195 nsp32_write2(base, IRQ_CONTROL, 0);
1196
1197 /* PCI LED off */
1198 nsp32_index_write1(base, EXT_PORT_DDR, LED_OFF);
1199 nsp32_index_write1(base, EXT_PORT, LED_OFF);
1200
1201 return TRUE;
1202 }
1203
1204
1205 /* interrupt routine */
1206 static irqreturn_t do_nsp32_isr(int irq, void *dev_id, struct pt_regs *regs)
1207 {
1208 nsp32_hw_data *data = dev_id;
1209 unsigned int base = data->BaseAddress;
1210 struct scsi_cmnd *SCpnt = data->CurrentSC;
1211 unsigned short auto_stat, irq_stat, trans_stat;
1212 unsigned char busmon, busphase;
1213 unsigned long flags;
1214 int ret;
1215 int handled = 0;
1216
1217 #if (LINUX_VERSION_CODE > KERNEL_VERSION(2,5,0))
1218 struct Scsi_Host *host = data->Host;
1219 spin_lock_irqsave(host->host_lock, flags);
1220 #else
1221 spin_lock_irqsave(&io_request_lock, flags);
1222 #endif
1223
1224 /*
1225 * IRQ check, then enable IRQ mask
1226 */
1227 irq_stat = nsp32_read2(base, IRQ_STATUS);
1228 nsp32_dbg(NSP32_DEBUG_INTR,
1229 "enter IRQ: %d, IRQstatus: 0x%x", irq, irq_stat);
1230 /* is this interrupt comes from Ninja asic? */
1231 if ((irq_stat & IRQSTATUS_ANY_IRQ) == 0) {
1232 nsp32_dbg(NSP32_DEBUG_INTR, "shared interrupt: irq other 0x%x", irq_stat);
1233 goto out2;
1234 }
1235 handled = 1;
1236 nsp32_write2(base, IRQ_CONTROL, IRQ_CONTROL_ALL_IRQ_MASK);
1237
1238 busmon = nsp32_read1(base, SCSI_BUS_MONITOR);
1239 busphase = busmon & BUSMON_PHASE_MASK;
1240
1241 trans_stat = nsp32_read2(base, TRANSFER_STATUS);
1242 if ((irq_stat == 0xffff) && (trans_stat == 0xffff)) {
1243 nsp32_msg(KERN_INFO, "card disconnect");
1244 if (data->CurrentSC != NULL) {
1245 nsp32_msg(KERN_INFO, "clean up current SCSI command");
1246 SCpnt->result = DID_BAD_TARGET << 16;
1247 nsp32_scsi_done(SCpnt);
1248 }
1249 goto out;
1250 }
1251
1252 /* Timer IRQ */
1253 if (irq_stat & IRQSTATUS_TIMER_IRQ) {
1254 nsp32_dbg(NSP32_DEBUG_INTR, "timer stop");
1255 nsp32_write2(base, TIMER_SET, TIMER_STOP);
1256 goto out;
1257 }
1258
1259 /* SCSI reset */
1260 if (irq_stat & IRQSTATUS_SCSIRESET_IRQ) {
1261 nsp32_msg(KERN_INFO, "detected someone do bus reset");
1262 nsp32_do_bus_reset(data);
1263 if (SCpnt != NULL) {
1264 SCpnt->result = DID_RESET << 16;
1265 nsp32_scsi_done(SCpnt);
1266 }
1267 goto out;
1268 }
1269
1270 if (SCpnt == NULL) {
1271 nsp32_msg(KERN_WARNING, "SCpnt==NULL this can't be happened");
1272 nsp32_msg(KERN_WARNING, "irq_stat=0x%x trans_stat=0x%x", irq_stat, trans_stat);
1273 goto out;
1274 }
1275
1276 /*
1277 * AutoSCSI Interrupt.
1278 * Note: This interrupt is occurred when AutoSCSI is finished. Then
1279 * check SCSIEXECUTEPHASE, and do appropriate action. Each phases are
1280 * recorded when AutoSCSI sequencer has been processed.
1281 */
1282 if(irq_stat & IRQSTATUS_AUTOSCSI_IRQ) {
1283 /* getting SCSI executed phase */
1284 auto_stat = nsp32_read2(base, SCSI_EXECUTE_PHASE);
1285 nsp32_write2(base, SCSI_EXECUTE_PHASE, 0);
1286
1287 /* Selection Timeout, go busfree phase. */
1288 if (auto_stat & SELECTION_TIMEOUT) {
1289 nsp32_dbg(NSP32_DEBUG_INTR,
1290 "selection timeout occurred");
1291
1292 SCpnt->result = DID_TIME_OUT << 16;
1293 nsp32_scsi_done(SCpnt);
1294 goto out;
1295 }
1296
1297 if (auto_stat & MSGOUT_PHASE) {
1298 /*
1299 * MsgOut phase was processed.
1300 * If MSG_IN_OCCUER is not set, then MsgOut phase is
1301 * completed. Thus, msgout_len must reset. Otherwise,
1302 * nothing to do here. If MSG_OUT_OCCUER is occurred,
1303 * then we will encounter the condition and check.
1304 */
1305 if (!(auto_stat & MSG_IN_OCCUER) &&
1306 (data->msgout_len <= 3)) {
1307 /*
1308 * !MSG_IN_OCCUER && msgout_len <=3
1309 * ---> AutoSCSI with MSGOUTreg is processed.
1310 */
1311 data->msgout_len = 0;
1312 };
1313
1314 nsp32_dbg(NSP32_DEBUG_INTR, "MsgOut phase processed");
1315 }
1316
1317 if ((auto_stat & DATA_IN_PHASE) &&
1318 (SCpnt->resid > 0) &&
1319 ((nsp32_read2(base, FIFO_REST_CNT) & FIFO_REST_MASK) != 0)) {
1320 printk( "auto+fifo\n");
1321 //nsp32_pio_read(SCpnt);
1322 }
1323
1324 if (auto_stat & (DATA_IN_PHASE | DATA_OUT_PHASE)) {
1325 /* DATA_IN_PHASE/DATA_OUT_PHASE was processed. */
1326 nsp32_dbg(NSP32_DEBUG_INTR,
1327 "Data in/out phase processed");
1328
1329 /* read BMCNT, SGT pointer addr */
1330 nsp32_dbg(NSP32_DEBUG_INTR, "BMCNT=0x%lx",
1331 nsp32_read4(base, BM_CNT));
1332 nsp32_dbg(NSP32_DEBUG_INTR, "addr=0x%lx",
1333 nsp32_read4(base, SGT_ADR));
1334 nsp32_dbg(NSP32_DEBUG_INTR, "SACK=0x%lx",
1335 nsp32_read4(base, SACK_CNT));
1336 nsp32_dbg(NSP32_DEBUG_INTR, "SSACK=0x%lx",
1337 nsp32_read4(base, SAVED_SACK_CNT));
1338
1339 SCpnt->resid = 0; /* all data transfered! */
1340 }
1341
1342 /*
1343 * MsgIn Occur
1344 */
1345 if (auto_stat & MSG_IN_OCCUER) {
1346 nsp32_msgin_occur(SCpnt, irq_stat, auto_stat);
1347 }
1348
1349 /*
1350 * MsgOut Occur
1351 */
1352 if (auto_stat & MSG_OUT_OCCUER) {
1353 nsp32_msgout_occur(SCpnt);
1354 }
1355
1356 /*
1357 * Bus Free Occur
1358 */
1359 if (auto_stat & BUS_FREE_OCCUER) {
1360 ret = nsp32_busfree_occur(SCpnt, auto_stat);
1361 if (ret == TRUE) {
1362 goto out;
1363 }
1364 }
1365
1366 if (auto_stat & STATUS_PHASE) {
1367 /*
1368 * Read CSB and substitute CSB for SCpnt->result
1369 * to save status phase stutas byte.
1370 * scsi error handler checks host_byte (DID_*:
1371 * low level driver to indicate status), then checks
1372 * status_byte (SCSI status byte).
1373 */
1374 SCpnt->result = (int)nsp32_read1(base, SCSI_CSB_IN);
1375 }
1376
1377 if (auto_stat & ILLEGAL_PHASE) {
1378 /* Illegal phase is detected. SACK is not back. */
1379 nsp32_msg(KERN_WARNING,
1380 "AUTO SCSI ILLEGAL PHASE OCCUR!!!!");
1381
1382 /* TODO: currently we don't have any action... bus reset? */
1383
1384 /*
1385 * To send back SACK, assert, wait, and negate.
1386 */
1387 nsp32_sack_assert(data);
1388 nsp32_wait_req(data, NEGATE);
1389 nsp32_sack_negate(data);
1390
1391 }
1392
1393 if (auto_stat & COMMAND_PHASE) {
1394 /* nothing to do */
1395 nsp32_dbg(NSP32_DEBUG_INTR, "Command phase processed");
1396 }
1397
1398 if (auto_stat & AUTOSCSI_BUSY) {
1399 /* AutoSCSI is running */
1400 }
1401
1402 show_autophase(auto_stat);
1403 }
1404
1405 /* FIFO_SHLD_IRQ */
1406 if (irq_stat & IRQSTATUS_FIFO_SHLD_IRQ) {
1407 nsp32_dbg(NSP32_DEBUG_INTR, "FIFO IRQ");
1408
1409 switch(busphase) {
1410 case BUSPHASE_DATA_OUT:
1411 nsp32_dbg(NSP32_DEBUG_INTR, "fifo/write");
1412
1413 //nsp32_pio_write(SCpnt);
1414
1415 break;
1416
1417 case BUSPHASE_DATA_IN:
1418 nsp32_dbg(NSP32_DEBUG_INTR, "fifo/read");
1419
1420 //nsp32_pio_read(SCpnt);
1421
1422 break;
1423
1424 case BUSPHASE_STATUS:
1425 nsp32_dbg(NSP32_DEBUG_INTR, "fifo/status");
1426
1427 SCpnt->SCp.Status = nsp32_read1(base, SCSI_CSB_IN);
1428
1429 break;
1430 default:
1431 nsp32_dbg(NSP32_DEBUG_INTR, "fifo/other phase");
1432 nsp32_dbg(NSP32_DEBUG_INTR, "irq_stat=0x%x trans_stat=0x%x", irq_stat, trans_stat);
1433 show_busphase(busphase);
1434 break;
1435 }
1436
1437 goto out;
1438 }
1439
1440 /* Phase Change IRQ */
1441 if (irq_stat & IRQSTATUS_PHASE_CHANGE_IRQ) {
1442 nsp32_dbg(NSP32_DEBUG_INTR, "phase change IRQ");
1443
1444 switch(busphase) {
1445 case BUSPHASE_MESSAGE_IN:
1446 nsp32_dbg(NSP32_DEBUG_INTR, "phase chg/msg in");
1447 nsp32_msgin_occur(SCpnt, irq_stat, 0);
1448 break;
1449 default:
1450 nsp32_msg(KERN_WARNING, "phase chg/other phase?");
1451 nsp32_msg(KERN_WARNING, "irq_stat=0x%x trans_stat=0x%x\n",
1452 irq_stat, trans_stat);
1453 show_busphase(busphase);
1454 break;
1455 }
1456 goto out;
1457 }
1458
1459 /* PCI_IRQ */
1460 if (irq_stat & IRQSTATUS_PCI_IRQ) {
1461 nsp32_dbg(NSP32_DEBUG_INTR, "PCI IRQ occurred");
1462 /* Do nothing */
1463 }
1464
1465 /* BMCNTERR_IRQ */
1466 if (irq_stat & IRQSTATUS_BMCNTERR_IRQ) {
1467 nsp32_msg(KERN_ERR, "Received unexpected BMCNTERR IRQ! ");
1468 /*
1469 * TODO: To be implemented improving bus master
1470 * transfer reliablity when BMCNTERR is occurred in
1471 * AutoSCSI phase described in specification.
1472 */
1473 }
1474
1475 #if 0
1476 nsp32_dbg(NSP32_DEBUG_INTR,
1477 "irq_stat=0x%x trans_stat=0x%x", irq_stat, trans_stat);
1478 show_busphase(busphase);
1479 #endif
1480
1481 out:
1482 /* disable IRQ mask */
1483 nsp32_write2(base, IRQ_CONTROL, 0);
1484
1485 out2:
1486 #if (LINUX_VERSION_CODE > KERNEL_VERSION(2,5,0))
1487 spin_unlock_irqrestore(host->host_lock, flags);
1488 #else
1489 spin_unlock_irqrestore(&io_request_lock, flags);
1490 #endif
1491
1492 nsp32_dbg(NSP32_DEBUG_INTR, "exit");
1493
1494 return IRQ_RETVAL(handled);
1495 }
1496
1497 #undef SPRINTF
1498 #define SPRINTF(args...) \
1499 do { \
1500 if(length > (pos - buffer)) { \
1501 pos += snprintf(pos, length - (pos - buffer) + 1, ## args); \
1502 nsp32_dbg(NSP32_DEBUG_PROC, "buffer=0x%p pos=0x%p length=%d %d\n", buffer, pos, length, length - (pos - buffer));\
1503 } \
1504 } while(0)
1505 static int nsp32_proc_info(
1506 #if (LINUX_VERSION_CODE > KERNEL_VERSION(2,5,73))
1507 struct Scsi_Host *host,
1508 #endif
1509 char *buffer,
1510 char **start,
1511 off_t offset,
1512 int length,
1513 #if !(LINUX_VERSION_CODE > KERNEL_VERSION(2,5,73))
1514 int hostno,
1515 #endif
1516 int inout)
1517 {
1518 char *pos = buffer;
1519 int thislength;
1520 unsigned long flags;
1521 nsp32_hw_data *data;
1522 #if (LINUX_VERSION_CODE > KERNEL_VERSION(2,5,73))
1523 int hostno;
1524 #else
1525 struct Scsi_Host *host;
1526 #endif
1527 unsigned int base;
1528 unsigned char mode_reg;
1529 int id, speed;
1530 long model;
1531
1532 /* Write is not supported, just return. */
1533 if (inout == TRUE) {
1534 return -EINVAL;
1535 }
1536
1537 #if (LINUX_VERSION_CODE > KERNEL_VERSION(2,5,73))
1538 hostno = host->host_no;
1539 #else
1540 /* search this HBA host */
1541 host = scsi_host_hn_get(hostno);
1542 if (host == NULL) {
1543 return -ESRCH;
1544 }
1545 #endif
1546 data = (nsp32_hw_data *)host->hostdata;
1547 base = host->io_port;
1548
1549 SPRINTF("NinjaSCSI-32 status\n\n");
1550 SPRINTF("Driver version: %s, $Revision: 1.33 $\n", nsp32_release_version);
1551 SPRINTF("SCSI host No.: %d\n", hostno);
1552 SPRINTF("IRQ: %d\n", host->irq);
1553 SPRINTF("IO: 0x%lx-0x%lx\n", host->io_port, host->io_port + host->n_io_port - 1);
1554 SPRINTF("MMIO(virtual address): 0x%lx-0x%lx\n", host->base, host->base + data->MmioLength - 1);
1555 SPRINTF("sg_tablesize: %d\n", host->sg_tablesize);
1556 SPRINTF("Chip revision: 0x%x\n", (nsp32_read2(base, INDEX_REG) >> 8) & 0xff);
1557
1558 mode_reg = nsp32_index_read1(base, CHIP_MODE);
1559 model = data->pci_devid->driver_data;
1560
1561 #ifdef CONFIG_PM
1562 SPRINTF("Power Management: %s\n", (mode_reg & OPTF) ? "yes" : "no");
1563 #endif
1564 SPRINTF("OEM: %ld, %s\n", (mode_reg & (OEM0|OEM1)), nsp32_model[model]);
1565
1566 spin_lock_irqsave(&(data->Lock), flags);
1567 SPRINTF("CurrentSC: 0x%p\n\n", data->CurrentSC);
1568 spin_unlock_irqrestore(&(data->Lock), flags);
1569
1570
1571 SPRINTF("SDTR status\n");
1572 for (id = 0; id < ARRAY_SIZE(data->target); id++) {
1573
1574 SPRINTF("id %d: ", id);
1575
1576 if (id == host->this_id) {
1577 SPRINTF("----- NinjaSCSI-32 host adapter\n");
1578 continue;
1579 }
1580
1581 if (data->target[id].sync_flag == SDTR_DONE) {
1582 if (data->target[id].period == 0 &&
1583 data->target[id].offset == ASYNC_OFFSET ) {
1584 SPRINTF("async");
1585 } else {
1586 SPRINTF(" sync");
1587 }
1588 } else {
1589 SPRINTF(" none");
1590 }
1591
1592 if (data->target[id].period != 0) {
1593
1594 speed = 1000000 / (data->target[id].period * 4);
1595
1596 SPRINTF(" transfer %d.%dMB/s, offset %d",
1597 speed / 1000,
1598 speed % 1000,
1599 data->target[id].offset
1600 );
1601 }
1602 SPRINTF("\n");
1603 }
1604
1605
1606 thislength = pos - (buffer + offset);
1607
1608 if(thislength < 0) {
1609 *start = NULL;
1610 return 0;
1611 }
1612
1613
1614 thislength = min(thislength, length);
1615 *start = buffer + offset;
1616
1617 return thislength;
1618 }
1619 #undef SPRINTF
1620
1621
1622
1623 /*
1624 * Reset parameters and call scsi_done for data->cur_lunt.
1625 * Be careful setting SCpnt->result = DID_* before calling this function.
1626 */
1627 static void nsp32_scsi_done(struct scsi_cmnd *SCpnt)
1628 {
1629 nsp32_hw_data *data = (nsp32_hw_data *)SCpnt->device->host->hostdata;
1630 unsigned int base = SCpnt->device->host->io_port;
1631
1632 /*
1633 * unmap pci
1634 */
1635 if (SCpnt->request_bufflen == 0) {
1636 goto skip;
1637 }
1638
1639 if (SCpnt->use_sg) {
1640 pci_unmap_sg(data->Pci,
1641 (struct scatterlist *)SCpnt->buffer,
1642 SCpnt->use_sg, SCpnt->sc_data_direction);
1643 } else {
1644 pci_unmap_single(data->Pci,
1645 (u32)SCpnt->SCp.have_data_in,
1646 SCpnt->request_bufflen,
1647 SCpnt->sc_data_direction);
1648 }
1649
1650 skip:
1651 /*
1652 * clear TRANSFERCONTROL_BM_START
1653 */
1654 nsp32_write2(base, TRANSFER_CONTROL, 0);
1655 nsp32_write4(base, BM_CNT, 0);
1656
1657 /*
1658 * call scsi_done
1659 */
1660 (*SCpnt->scsi_done)(SCpnt);
1661
1662 /*
1663 * reset parameters
1664 */
1665 data->cur_lunt->SCpnt = NULL;
1666 data->cur_lunt = NULL;
1667 data->cur_target = NULL;
1668 data->CurrentSC = NULL;
1669 }
1670
1671
1672 /*
1673 * Bus Free Occur
1674 *
1675 * Current Phase is BUSFREE. AutoSCSI is automatically execute BUSFREE phase
1676 * with ACK reply when below condition is matched:
1677 * MsgIn 00: Command Complete.
1678 * MsgIn 02: Save Data Pointer.
1679 * MsgIn 04: Diconnect.
1680 * In other case, unexpected BUSFREE is detected.
1681 */
1682 static int nsp32_busfree_occur(struct scsi_cmnd *SCpnt, unsigned short execph)
1683 {
1684 nsp32_hw_data *data = (nsp32_hw_data *)SCpnt->device->host->hostdata;
1685 unsigned int base = SCpnt->device->host->io_port;
1686
1687 nsp32_dbg(NSP32_DEBUG_BUSFREE, "enter execph=0x%x", execph);
1688 show_autophase(execph);
1689
1690 nsp32_write4(base, BM_CNT, 0);
1691 nsp32_write2(base, TRANSFER_CONTROL, 0);
1692
1693 /*
1694 * MsgIn 02: Save Data Pointer
1695 *
1696 * VALID:
1697 * Save Data Pointer is received. Adjust pointer.
1698 *
1699 * NO-VALID:
1700 * SCSI-3 says if Save Data Pointer is not received, then we restart
1701 * processing and we can't adjust any SCSI data pointer in next data
1702 * phase.
1703 */
1704 if (execph & MSGIN_02_VALID) {
1705 nsp32_dbg(NSP32_DEBUG_BUSFREE, "MsgIn02_Valid");
1706
1707 /*
1708 * Check sack_cnt/saved_sack_cnt, then adjust sg table if
1709 * needed.
1710 */
1711 if (!(execph & MSGIN_00_VALID) &&
1712 ((execph & DATA_IN_PHASE) || (execph & DATA_OUT_PHASE))) {
1713 unsigned int sacklen, s_sacklen;
1714
1715 /*
1716 * Read SACK count and SAVEDSACK count, then compare.
1717 */
1718 sacklen = nsp32_read4(base, SACK_CNT );
1719 s_sacklen = nsp32_read4(base, SAVED_SACK_CNT);
1720
1721 /*
1722 * If SAVEDSACKCNT == 0, it means SavedDataPointer is
1723 * come after data transfering.
1724 */
1725 if (s_sacklen > 0) {
1726 /*
1727 * Comparing between sack and savedsack to
1728 * check the condition of AutoMsgIn03.
1729 *
1730 * If they are same, set msgin03 == TRUE,
1731 * COMMANDCONTROL_AUTO_MSGIN_03 is enabled at
1732 * reselection. On the other hand, if they
1733 * aren't same, set msgin03 == FALSE, and
1734 * COMMANDCONTROL_AUTO_MSGIN_03 is disabled at
1735 * reselection.
1736 */
1737 if (sacklen != s_sacklen) {
1738 data->cur_lunt->msgin03 = FALSE;
1739 } else {
1740 data->cur_lunt->msgin03 = TRUE;
1741 }
1742
1743 nsp32_adjust_busfree(SCpnt, s_sacklen);
1744 }
1745 }
1746
1747 /* This value has not substitude with valid value yet... */
1748 //data->cur_lunt->save_datp = data->cur_datp;
1749 } else {
1750 /*
1751 * no processing.
1752 */
1753 }
1754
1755 if (execph & MSGIN_03_VALID) {
1756 /* MsgIn03 was valid to be processed. No need processing. */
1757 }
1758
1759 /*
1760 * target SDTR check
1761 */
1762 if (data->cur_target->sync_flag & SDTR_INITIATOR) {
1763 /*
1764 * SDTR negotiation pulled by the initiator has not
1765 * finished yet. Fall back to ASYNC mode.
1766 */
1767 nsp32_set_async(data, data->cur_target);
1768 data->cur_target->sync_flag &= ~SDTR_INITIATOR;
1769 data->cur_target->sync_flag |= SDTR_DONE;
1770 } else if (data->cur_target->sync_flag & SDTR_TARGET) {
1771 /*
1772 * SDTR negotiation pulled by the target has been
1773 * negotiating.
1774 */
1775 if (execph & (MSGIN_00_VALID | MSGIN_04_VALID)) {
1776 /*
1777 * If valid message is received, then
1778 * negotiation is succeeded.
1779 */
1780 } else {
1781 /*
1782 * On the contrary, if unexpected bus free is
1783 * occurred, then negotiation is failed. Fall
1784 * back to ASYNC mode.
1785 */
1786 nsp32_set_async(data, data->cur_target);
1787 }
1788 data->cur_target->sync_flag &= ~SDTR_TARGET;
1789 data->cur_target->sync_flag |= SDTR_DONE;
1790 }
1791
1792 /*
1793 * It is always ensured by SCSI standard that initiator
1794 * switches into Bus Free Phase after
1795 * receiving message 00 (Command Complete), 04 (Disconnect).
1796 * It's the reason that processing here is valid.
1797 */
1798 if (execph & MSGIN_00_VALID) {
1799 /* MsgIn 00: Command Complete */
1800 nsp32_dbg(NSP32_DEBUG_BUSFREE, "command complete");
1801
1802 SCpnt->SCp.Status = nsp32_read1(base, SCSI_CSB_IN);
1803 SCpnt->SCp.Message = 0;
1804 nsp32_dbg(NSP32_DEBUG_BUSFREE,
1805 "normal end stat=0x%x resid=0x%x\n",
1806 SCpnt->SCp.Status, SCpnt->resid);
1807 SCpnt->result = (DID_OK << 16) |
1808 (SCpnt->SCp.Message << 8) |
1809 (SCpnt->SCp.Status << 0);
1810 nsp32_scsi_done(SCpnt);
1811 /* All operation is done */
1812 return TRUE;
1813 } else if (execph & MSGIN_04_VALID) {
1814 /* MsgIn 04: Disconnect */
1815 SCpnt->SCp.Status = nsp32_read1(base, SCSI_CSB_IN);
1816 SCpnt->SCp.Message = 4;
1817
1818 nsp32_dbg(NSP32_DEBUG_BUSFREE, "disconnect");
1819 return TRUE;
1820 } else {
1821 /* Unexpected bus free */
1822 nsp32_msg(KERN_WARNING, "unexpected bus free occurred");
1823
1824 /* DID_ERROR? */
1825 //SCpnt->result = (DID_OK << 16) | (SCpnt->SCp.Message << 8) | (SCpnt->SCp.Status << 0);
1826 SCpnt->result = DID_ERROR << 16;
1827 nsp32_scsi_done(SCpnt);
1828 return TRUE;
1829 }
1830 return FALSE;
1831 }
1832
1833
1834 /*
1835 * nsp32_adjust_busfree - adjusting SG table
1836 *
1837 * Note: This driver adjust the SG table using SCSI ACK
1838 * counter instead of BMCNT counter!
1839 */
1840 static void nsp32_adjust_busfree(struct scsi_cmnd *SCpnt, unsigned int s_sacklen)
1841 {
1842 nsp32_hw_data *data = (nsp32_hw_data *)SCpnt->device->host->hostdata;
1843 int old_entry = data->cur_entry;
1844 int new_entry;
1845 int sg_num = data->cur_lunt->sg_num;
1846 nsp32_sgtable *sgt = data->cur_lunt->sglun->sgt;
1847 unsigned int restlen, sentlen;
1848 u32_le len, addr;
1849
1850 nsp32_dbg(NSP32_DEBUG_SGLIST, "old resid=0x%x", SCpnt->resid);
1851
1852 /* adjust saved SACK count with 4 byte start address boundary */
1853 s_sacklen -= le32_to_cpu(sgt[old_entry].addr) & 3;
1854
1855 /*
1856 * calculate new_entry from sack count and each sgt[].len
1857 * calculate the byte which is intent to send
1858 */
1859 sentlen = 0;
1860 for (new_entry = old_entry; new_entry < sg_num; new_entry++) {
1861 sentlen += (le32_to_cpu(sgt[new_entry].len) & ~SGTEND);
1862 if (sentlen > s_sacklen) {
1863 break;
1864 }
1865 }
1866
1867 /* all sgt is processed */
1868 if (new_entry == sg_num) {
1869 goto last;
1870 }
1871
1872 if (sentlen == s_sacklen) {
1873 /* XXX: confirm it's ok or not */
1874 /* In this case, it's ok because we are at
1875 the head element of the sg. restlen is correctly calculated. */
1876 }
1877
1878 /* calculate the rest length for transfering */
1879 restlen = sentlen - s_sacklen;
1880
1881 /* update adjusting current SG table entry */
1882 len = le32_to_cpu(sgt[new_entry].len);
1883 addr = le32_to_cpu(sgt[new_entry].addr);
1884 addr += (len - restlen);
1885 sgt[new_entry].addr = cpu_to_le32(addr);
1886 sgt[new_entry].len = cpu_to_le32(restlen);
1887
1888 /* set cur_entry with new_entry */
1889 data->cur_entry = new_entry;
1890
1891 return;
1892
1893 last:
1894 if (SCpnt->resid < sentlen) {
1895 nsp32_msg(KERN_ERR, "resid underflow");
1896 }
1897
1898 SCpnt->resid -= sentlen;
1899 nsp32_dbg(NSP32_DEBUG_SGLIST, "new resid=0x%x", SCpnt->resid);
1900
1901 /* update hostdata and lun */
1902
1903 return;
1904 }
1905
1906
1907 /*
1908 * It's called MsgOut phase occur.
1909 * NinjaSCSI-32Bi/UDE automatically processes up to 3 messages in
1910 * message out phase. It, however, has more than 3 messages,
1911 * HBA creates the interrupt and we have to process by hand.
1912 */
1913 static void nsp32_msgout_occur(struct scsi_cmnd *SCpnt)
1914 {
1915 nsp32_hw_data *data = (nsp32_hw_data *)SCpnt->device->host->hostdata;
1916 unsigned int base = SCpnt->device->host->io_port;
1917 //unsigned short command;
1918 long new_sgtp;
1919 int i;
1920
1921 nsp32_dbg(NSP32_DEBUG_MSGOUTOCCUR,
1922 "enter: msgout_len: 0x%x", data->msgout_len);
1923
1924 /*
1925 * If MsgOut phase is occurred without having any
1926 * message, then No_Operation is sent (SCSI-2).
1927 */
1928 if (data->msgout_len == 0) {
1929 nsp32_build_nop(SCpnt);
1930 }
1931
1932 /*
1933 * Set SGTP ADDR current entry for restarting AUTOSCSI,
1934 * because SGTP is incremented next point.
1935 * There is few statement in the specification...
1936 */
1937 new_sgtp = data->cur_lunt->sglun_paddr +
1938 (data->cur_lunt->cur_entry * sizeof(nsp32_sgtable));
1939
1940 /*
1941 * send messages
1942 */
1943 for (i = 0; i < data->msgout_len; i++) {
1944 nsp32_dbg(NSP32_DEBUG_MSGOUTOCCUR,
1945 "%d : 0x%x", i, data->msgoutbuf[i]);
1946
1947 /*
1948 * Check REQ is asserted.
1949 */
1950 nsp32_wait_req(data, ASSERT);
1951
1952 if (i == (data->msgout_len - 1)) {
1953 /*
1954 * If the last message, set the AutoSCSI restart
1955 * before send back the ack message. AutoSCSI
1956 * restart automatically negate ATN signal.
1957 */
1958 //command = (AUTO_MSGIN_00_OR_04 | AUTO_MSGIN_02);
1959 //nsp32_restart_autoscsi(SCpnt, command);
1960 nsp32_write2(base, COMMAND_CONTROL,
1961 (CLEAR_CDB_FIFO_POINTER |
1962 AUTO_COMMAND_PHASE |
1963 AUTOSCSI_RESTART |
1964 AUTO_MSGIN_00_OR_04 |
1965 AUTO_MSGIN_02 ));
1966 }
1967 /*
1968 * Write data with SACK, then wait sack is
1969 * automatically negated.
1970 */
1971 nsp32_write1(base, SCSI_DATA_WITH_ACK, data->msgoutbuf[i]);
1972 nsp32_wait_sack(data, NEGATE);
1973
1974 nsp32_dbg(NSP32_DEBUG_MSGOUTOCCUR, "bus: 0x%x\n",
1975 nsp32_read1(base, SCSI_BUS_MONITOR));
1976 };
1977
1978 data->msgout_len = 0;
1979
1980 nsp32_dbg(NSP32_DEBUG_MSGOUTOCCUR, "exit");
1981 }
1982
1983 /*
1984 * Restart AutoSCSI
1985 *
1986 * Note: Restarting AutoSCSI needs set:
1987 * SYNC_REG, ACK_WIDTH, SGT_ADR, TRANSFER_CONTROL
1988 */
1989 static void nsp32_restart_autoscsi(struct scsi_cmnd *SCpnt, unsigned short command)
1990 {
1991 nsp32_hw_data *data = (nsp32_hw_data *)SCpnt->device->host->hostdata;
1992 unsigned int base = data->BaseAddress;
1993 unsigned short transfer = 0;
1994
1995 nsp32_dbg(NSP32_DEBUG_RESTART, "enter");
1996
1997 if (data->cur_target == NULL || data->cur_lunt == NULL) {
1998 nsp32_msg(KERN_ERR, "Target or Lun is invalid");
1999 }
2000
2001 /*
2002 * set SYNC_REG
2003 * Don't set BM_START_ADR before setting this register.
2004 */
2005 nsp32_write1(base, SYNC_REG, data->cur_target->syncreg);
2006
2007 /*
2008 * set ACKWIDTH
2009 */
2010 nsp32_write1(base, ACK_WIDTH, data->cur_target->ackwidth);
2011
2012 /*
2013 * set SREQ hazard killer sampling rate
2014 */
2015 nsp32_write1(base, SREQ_SMPL_RATE, data->cur_target->sample_reg);
2016
2017 /*
2018 * set SGT ADDR (physical address)
2019 */
2020 nsp32_write4(base, SGT_ADR, data->cur_lunt->sglun_paddr);
2021
2022 /*
2023 * set TRANSFER CONTROL REG
2024 */
2025 transfer = 0;
2026 transfer |= (TRANSFER_GO | ALL_COUNTER_CLR);
2027 if (data->trans_method & NSP32_TRANSFER_BUSMASTER) {
2028 if (SCpnt->request_bufflen > 0) {
2029 transfer |= BM_START;
2030 }
2031 } else if (data->trans_method & NSP32_TRANSFER_MMIO) {
2032 transfer |= CB_MMIO_MODE;
2033 } else if (data->trans_method & NSP32_TRANSFER_PIO) {
2034 transfer |= CB_IO_MODE;
2035 }
2036 nsp32_write2(base, TRANSFER_CONTROL, transfer);
2037
2038 /*
2039 * restart AutoSCSI
2040 *
2041 * TODO: COMMANDCONTROL_AUTO_COMMAND_PHASE is needed ?
2042 */
2043 command |= (CLEAR_CDB_FIFO_POINTER |
2044 AUTO_COMMAND_PHASE |
2045 AUTOSCSI_RESTART );
2046 nsp32_write2(base, COMMAND_CONTROL, command);
2047
2048 nsp32_dbg(NSP32_DEBUG_RESTART, "exit");
2049 }
2050
2051
2052 /*
2053 * cannot run automatically message in occur
2054 */
2055 static void nsp32_msgin_occur(struct scsi_cmnd *SCpnt,
2056 unsigned long irq_status,
2057 unsigned short execph)
2058 {
2059 nsp32_hw_data *data = (nsp32_hw_data *)SCpnt->device->host->hostdata;
2060 unsigned int base = SCpnt->device->host->io_port;
2061 unsigned char msg;
2062 unsigned char msgtype;
2063 unsigned char newlun;
2064 unsigned short command = 0;
2065 int msgclear = TRUE;
2066 long new_sgtp;
2067 int ret;
2068
2069 /*
2070 * read first message
2071 * Use SCSIDATA_W_ACK instead of SCSIDATAIN, because the procedure
2072 * of Message-In have to be processed before sending back SCSI ACK.
2073 */
2074 msg = nsp32_read1(base, SCSI_DATA_IN);
2075 data->msginbuf[(unsigned char)data->msgin_len] = msg;
2076 msgtype = data->msginbuf[0];
2077 nsp32_dbg(NSP32_DEBUG_MSGINOCCUR,
2078 "enter: msglen: 0x%x msgin: 0x%x msgtype: 0x%x",
2079 data->msgin_len, msg, msgtype);
2080
2081 /*
2082 * TODO: We need checking whether bus phase is message in?
2083 */
2084
2085 /*
2086 * assert SCSI ACK
2087 */
2088 nsp32_sack_assert(data);
2089
2090 /*
2091 * processing IDENTIFY
2092 */
2093 if (msgtype & 0x80) {
2094 if (!(irq_status & IRQSTATUS_RESELECT_OCCUER)) {
2095 /* Invalid (non reselect) phase */
2096 goto reject;
2097 }
2098
2099 newlun = msgtype & 0x1f; /* TODO: SPI-3 compliant? */
2100 ret = nsp32_reselection(SCpnt, newlun);
2101 if (ret == TRUE) {
2102 goto restart;
2103 } else {
2104 goto reject;
2105 }
2106 }
2107
2108 /*
2109 * processing messages except for IDENTIFY
2110 *
2111 * TODO: Messages are all SCSI-2 terminology. SCSI-3 compliance is TODO.
2112 */
2113 switch (msgtype) {
2114 /*
2115 * 1-byte message
2116 */
2117 case COMMAND_COMPLETE:
2118 case DISCONNECT:
2119 /*
2120 * These messages should not be occurred.
2121 * They should be processed on AutoSCSI sequencer.
2122 */
2123 nsp32_msg(KERN_WARNING,
2124 "unexpected message of AutoSCSI MsgIn: 0x%x", msg);
2125 break;
2126
2127 case RESTORE_POINTERS:
2128 /*
2129 * AutoMsgIn03 is disabled, and HBA gets this message.
2130 */
2131
2132 if ((execph & DATA_IN_PHASE) || (execph & DATA_OUT_PHASE)) {
2133 unsigned int s_sacklen;
2134
2135 s_sacklen = nsp32_read4(base, SAVED_SACK_CNT);
2136 if ((execph & MSGIN_02_VALID) && (s_sacklen > 0)) {
2137 nsp32_adjust_busfree(SCpnt, s_sacklen);
2138 } else {
2139 /* No need to rewrite SGT */
2140 }
2141 }
2142 data->cur_lunt->msgin03 = FALSE;
2143
2144 /* Update with the new value */
2145
2146 /* reset SACK/SavedACK counter (or ALL clear?) */
2147 nsp32_write4(base, CLR_COUNTER, CLRCOUNTER_ALLMASK);
2148
2149 /*
2150 * set new sg pointer
2151 */
2152 new_sgtp = data->cur_lunt->sglun_paddr +
2153 (data->cur_lunt->cur_entry * sizeof(nsp32_sgtable));
2154 nsp32_write4(base, SGT_ADR, new_sgtp);
2155
2156 break;
2157
2158 case SAVE_POINTERS:
2159 /*
2160 * These messages should not be occurred.
2161 * They should be processed on AutoSCSI sequencer.
2162 */
2163 nsp32_msg (KERN_WARNING,
2164 "unexpected message of AutoSCSI MsgIn: SAVE_POINTERS");
2165
2166 break;
2167
2168 case MESSAGE_REJECT:
2169 /* If previous message_out is sending SDTR, and get
2170 message_reject from target, SDTR negotiation is failed */
2171 if (data->cur_target->sync_flag &
2172 (SDTR_INITIATOR | SDTR_TARGET)) {
2173 /*
2174 * Current target is negotiating SDTR, but it's
2175 * failed. Fall back to async transfer mode, and set
2176 * SDTR_DONE.
2177 */
2178 nsp32_set_async(data, data->cur_target);
2179 data->cur_target->sync_flag &= ~SDTR_INITIATOR;
2180 data->cur_target->sync_flag |= SDTR_DONE;
2181
2182 }
2183 break;
2184
2185 case LINKED_CMD_COMPLETE:
2186 case LINKED_FLG_CMD_COMPLETE:
2187 /* queue tag is not supported currently */
2188 nsp32_msg (KERN_WARNING,
2189 "unsupported message: 0x%x", msgtype);
2190 break;
2191
2192 case INITIATE_RECOVERY:
2193 /* staring ECA (Extended Contingent Allegiance) state. */
2194 /* This message is declined in SPI2 or later. */
2195
2196 goto reject;
2197
2198 /*
2199 * 2-byte message
2200 */
2201 case SIMPLE_QUEUE_TAG:
2202 case 0x23:
2203 /*
2204 * 0x23: Ignore_Wide_Residue is not declared in scsi.h.
2205 * No support is needed.
2206 */
2207 if (data->msgin_len >= 1) {
2208 goto reject;
2209 }
2210
2211 /* current position is 1-byte of 2 byte */
2212 msgclear = FALSE;
2213
2214 break;
2215
2216 /*
2217 * extended message
2218 */
2219 case EXTENDED_MESSAGE:
2220 if (data->msgin_len < 1) {
2221 /*
2222 * Current position does not reach 2-byte
2223 * (2-byte is extended message length).
2224 */
2225 msgclear = FALSE;
2226 break;
2227 }
2228
2229 if ((data->msginbuf[1] + 1) > data->msgin_len) {
2230 /*
2231 * Current extended message has msginbuf[1] + 2
2232 * (msgin_len starts counting from 0, so buf[1] + 1).
2233 * If current message position is not finished,
2234 * continue receiving message.
2235 */
2236 msgclear = FALSE;
2237 break;
2238 }
2239
2240 /*
2241 * Reach here means regular length of each type of
2242 * extended messages.
2243 */
2244 switch (data->msginbuf[2]) {
2245 case EXTENDED_MODIFY_DATA_POINTER:
2246 /* TODO */
2247 goto reject; /* not implemented yet */
2248 break;
2249
2250 case EXTENDED_SDTR:
2251 /*
2252 * Exchange this message between initiator and target.
2253 */
2254 if (data->msgin_len != EXTENDED_SDTR_LEN + 1) {
2255 /*
2256 * received inappropriate message.
2257 */
2258 goto reject;
2259 break;
2260 }
2261
2262 nsp32_analyze_sdtr(SCpnt);
2263
2264 break;
2265
2266 case EXTENDED_EXTENDED_IDENTIFY:
2267 /* SCSI-I only, not supported. */
2268 goto reject; /* not implemented yet */
2269
2270 break;
2271
2272 case EXTENDED_WDTR:
2273 goto reject; /* not implemented yet */
2274
2275 break;
2276
2277 default:
2278 goto reject;
2279 }
2280 break;
2281
2282 default:
2283 goto reject;
2284 }
2285
2286 restart:
2287 if (msgclear == TRUE) {
2288 data->msgin_len = 0;
2289
2290 /*
2291 * If restarting AutoSCSI, but there are some message to out
2292 * (msgout_len > 0), set AutoATN, and set SCSIMSGOUT as 0
2293 * (MV_VALID = 0). When commandcontrol is written with
2294 * AutoSCSI restart, at the same time MsgOutOccur should be
2295 * happened (however, such situation is really possible...?).
2296 */
2297 if (data->msgout_len > 0) {
2298 nsp32_write4(base, SCSI_MSG_OUT, 0);
2299 command |= AUTO_ATN;
2300 }
2301
2302 /*
2303 * restart AutoSCSI
2304 * If it's failed, COMMANDCONTROL_AUTO_COMMAND_PHASE is needed.
2305 */
2306 command |= (AUTO_MSGIN_00_OR_04 | AUTO_MSGIN_02);
2307
2308 /*
2309 * If current msgin03 is TRUE, then flag on.
2310 */
2311 if (data->cur_lunt->msgin03 == TRUE) {
2312 command |= AUTO_MSGIN_03;
2313 }
2314 data->cur_lunt->msgin03 = FALSE;
2315 } else {
2316 data->msgin_len++;
2317 }
2318
2319 /*
2320 * restart AutoSCSI
2321 */
2322 nsp32_restart_autoscsi(SCpnt, command);
2323
2324 /*
2325 * wait SCSI REQ negate for REQ-ACK handshake
2326 */
2327 nsp32_wait_req(data, NEGATE);
2328
2329 /*
2330 * negate SCSI ACK
2331 */
2332 nsp32_sack_negate(data);
2333
2334 nsp32_dbg(NSP32_DEBUG_MSGINOCCUR, "exit");
2335
2336 return;
2337
2338 reject:
2339 nsp32_msg(KERN_WARNING,
2340 "invalid or unsupported MessageIn, rejected. "
2341 "current msg: 0x%x (len: 0x%x), processing msg: 0x%x",
2342 msg, data->msgin_len, msgtype);
2343 nsp32_build_reject(SCpnt);
2344 data->msgin_len = 0;
2345
2346 goto restart;
2347 }
2348
2349 /*
2350 *
2351 */
2352 static void nsp32_analyze_sdtr(struct scsi_cmnd *SCpnt)
2353 {
2354 nsp32_hw_data *data = (nsp32_hw_data *)SCpnt->device->host->hostdata;
2355 nsp32_target *target = data->cur_target;
2356 nsp32_sync_table *synct;
2357 unsigned char get_period = data->msginbuf[3];
2358 unsigned char get_offset = data->msginbuf[4];
2359 int entry;
2360 int syncnum;
2361
2362 nsp32_dbg(NSP32_DEBUG_MSGINOCCUR, "enter");
2363
2364 synct = data->synct;
2365 syncnum = data->syncnum;
2366
2367 /*
2368 * If this inititor sent the SDTR message, then target responds SDTR,
2369 * initiator SYNCREG, ACKWIDTH from SDTR parameter.
2370 * Messages are not appropriate, then send back reject message.
2371 * If initiator did not send the SDTR, but target sends SDTR,
2372 * initiator calculator the appropriate parameter and send back SDTR.
2373 */
2374 if (target->sync_flag & SDTR_INITIATOR) {
2375 /*
2376 * Initiator sent SDTR, the target responds and
2377 * send back negotiation SDTR.
2378 */
2379 nsp32_dbg(NSP32_DEBUG_MSGINOCCUR, "target responds SDTR");
2380
2381 target->sync_flag &= ~SDTR_INITIATOR;
2382 target->sync_flag |= SDTR_DONE;
2383
2384 /*
2385 * offset:
2386 */
2387 if (get_offset > SYNC_OFFSET) {
2388 /*
2389 * Negotiation is failed, the target send back
2390 * unexpected offset value.
2391 */
2392 goto reject;
2393 }
2394
2395 if (get_offset == ASYNC_OFFSET) {
2396 /*
2397 * Negotiation is succeeded, the target want
2398 * to fall back into asynchronous transfer mode.
2399 */
2400 goto async;
2401 }
2402
2403 /*
2404 * period:
2405 * Check whether sync period is too short. If too short,
2406 * fall back to async mode. If it's ok, then investigate
2407 * the received sync period. If sync period is acceptable
2408 * between sync table start_period and end_period, then
2409 * set this I_T nexus as sent offset and period.
2410 * If it's not acceptable, send back reject and fall back
2411 * to async mode.
2412 */
2413 if (get_period < data->synct[0].period_num) {
2414 /*
2415 * Negotiation is failed, the target send back
2416 * unexpected period value.
2417 */
2418 goto reject;
2419 }
2420
2421 entry = nsp32_search_period_entry(data, target, get_period);
2422
2423 if (entry < 0) {
2424 /*
2425 * Target want to use long period which is not
2426 * acceptable NinjaSCSI-32Bi/UDE.
2427 */
2428 goto reject;
2429 }
2430
2431 /*
2432 * Set new sync table and offset in this I_T nexus.
2433 */
2434 nsp32_set_sync_entry(data, target, entry, get_offset);
2435 } else {
2436 /* Target send SDTR to initiator. */
2437 nsp32_dbg(NSP32_DEBUG_MSGINOCCUR, "target send SDTR");
2438
2439 target->sync_flag |= SDTR_INITIATOR;
2440
2441 /* offset: */
2442 if (get_offset > SYNC_OFFSET) {
2443 /* send back as SYNC_OFFSET */
2444 get_offset = SYNC_OFFSET;
2445 }
2446
2447 /* period: */
2448 if (get_period < data->synct[0].period_num) {
2449 get_period = data->synct[0].period_num;
2450 }
2451
2452 entry = nsp32_search_period_entry(data, target, get_period);
2453
2454 if (get_offset == ASYNC_OFFSET || entry < 0) {
2455 nsp32_set_async(data, target);
2456 nsp32_build_sdtr(SCpnt, 0, ASYNC_OFFSET);
2457 } else {
2458 nsp32_set_sync_entry(data, target, entry, get_offset);
2459 nsp32_build_sdtr(SCpnt, get_period, get_offset);
2460 }
2461 }
2462
2463 target->period = get_period;
2464 nsp32_dbg(NSP32_DEBUG_MSGINOCCUR, "exit");
2465 return;
2466
2467 reject:
2468 /*
2469 * If the current message is unacceptable, send back to the target
2470 * with reject message.
2471 */
2472 nsp32_build_reject(SCpnt);
2473
2474 async:
2475 nsp32_set_async(data, target); /* set as ASYNC transfer mode */
2476
2477 target->period = 0;
2478 nsp32_dbg(NSP32_DEBUG_MSGINOCCUR, "exit: set async");
2479 return;
2480 }
2481
2482
2483 /*
2484 * Search config entry number matched in sync_table from given
2485 * target and speed period value. If failed to search, return negative value.
2486 */
2487 static int nsp32_search_period_entry(nsp32_hw_data *data,
2488 nsp32_target *target,
2489 unsigned char period)
2490 {
2491 int i;
2492
2493 if (target->limit_entry >= data->syncnum) {
2494 nsp32_msg(KERN_ERR, "limit_entry exceeds syncnum!");
2495 target->limit_entry = 0;
2496 }
2497
2498 for (i = target->limit_entry; i < data->syncnum; i++) {
2499 if (period >= data->synct[i].start_period &&
2500 period <= data->synct[i].end_period) {
2501 break;
2502 }
2503 }
2504
2505 /*
2506 * Check given period value is over the sync_table value.
2507 * If so, return max value.
2508 */
2509 if (i == data->syncnum) {
2510 i = -1;
2511 }
2512
2513 return i;
2514 }
2515
2516
2517 /*
2518 * target <-> initiator use ASYNC transfer
2519 */
2520 static void nsp32_set_async(nsp32_hw_data *data, nsp32_target *target)
2521 {
2522 unsigned char period = data->synct[target->limit_entry].period_num;
2523
2524 target->offset = ASYNC_OFFSET;
2525 target->period = 0;
2526 target->syncreg = TO_SYNCREG(period, ASYNC_OFFSET);
2527 target->ackwidth = 0;
2528 target->sample_reg = 0;
2529
2530 nsp32_dbg(NSP32_DEBUG_SYNC, "set async");
2531 }
2532
2533
2534 /*
2535 * target <-> initiator use maximum SYNC transfer
2536 */
2537 static void nsp32_set_max_sync(nsp32_hw_data *data,
2538 nsp32_target *target,
2539 unsigned char *period,
2540 unsigned char *offset)
2541 {
2542 unsigned char period_num, ackwidth;
2543
2544 period_num = data->synct[target->limit_entry].period_num;
2545 *period = data->synct[target->limit_entry].start_period;
2546 ackwidth = data->synct[target->limit_entry].ackwidth;
2547 *offset = SYNC_OFFSET;
2548
2549 target->syncreg = TO_SYNCREG(period_num, *offset);
2550 target->ackwidth = ackwidth;
2551 target->offset = *offset;
2552 target->sample_reg = 0; /* disable SREQ sampling */
2553 }
2554
2555
2556 /*
2557 * target <-> initiator use entry number speed
2558 */
2559 static void nsp32_set_sync_entry(nsp32_hw_data *data,
2560 nsp32_target *target,
2561 int entry,
2562 unsigned char offset)
2563 {
2564 unsigned char period, ackwidth, sample_rate;
2565
2566 period = data->synct[entry].period_num;
2567 ackwidth = data->synct[entry].ackwidth;
2568 offset = offset;
2569 sample_rate = data->synct[entry].sample_rate;
2570
2571 target->syncreg = TO_SYNCREG(period, offset);
2572 target->ackwidth = ackwidth;
2573 target->offset = offset;
2574 target->sample_reg = sample_rate | SAMPLING_ENABLE;
2575
2576 nsp32_dbg(NSP32_DEBUG_SYNC, "set sync");
2577 }
2578
2579
2580 /*
2581 * It waits until SCSI REQ becomes assertion or negation state.
2582 *
2583 * Note: If nsp32_msgin_occur is called, we asserts SCSI ACK. Then
2584 * connected target responds SCSI REQ negation. We have to wait
2585 * SCSI REQ becomes negation in order to negate SCSI ACK signal for
2586 * REQ-ACK handshake.
2587 */
2588 static void nsp32_wait_req(nsp32_hw_data *data, int state)
2589 {
2590 unsigned int base = data->BaseAddress;
2591 int wait_time = 0;
2592 unsigned char bus, req_bit;
2593
2594 if (!((state == ASSERT) || (state == NEGATE))) {
2595 nsp32_msg(KERN_ERR, "unknown state designation");
2596 }
2597 /* REQ is BIT(5) */
2598 req_bit = (state == ASSERT ? BUSMON_REQ : 0);
2599
2600 do {
2601 bus = nsp32_read1(base, SCSI_BUS_MONITOR);
2602 if ((bus & BUSMON_REQ) == req_bit) {
2603 nsp32_dbg(NSP32_DEBUG_WAIT,
2604 "wait_time: %d", wait_time);
2605 return;
2606 }
2607 udelay(1);
2608 wait_time++;
2609 } while (wait_time < REQSACK_TIMEOUT_TIME);
2610
2611 nsp32_msg(KERN_WARNING, "wait REQ timeout, req_bit: 0x%x", req_bit);
2612 }
2613
2614 /*
2615 * It waits until SCSI SACK becomes assertion or negation state.
2616 */
2617 static void nsp32_wait_sack(nsp32_hw_data *data, int state)
2618 {
2619 unsigned int base = data->BaseAddress;
2620 int wait_time = 0;
2621 unsigned char bus, ack_bit;
2622
2623 if (!((state == ASSERT) || (state == NEGATE))) {
2624 nsp32_msg(KERN_ERR, "unknown state designation");
2625 }
2626 /* ACK is BIT(4) */
2627 ack_bit = (state == ASSERT ? BUSMON_ACK : 0);
2628
2629 do {
2630 bus = nsp32_read1(base, SCSI_BUS_MONITOR);
2631 if ((bus & BUSMON_ACK) == ack_bit) {
2632 nsp32_dbg(NSP32_DEBUG_WAIT,
2633 "wait_time: %d", wait_time);
2634 return;
2635 }
2636 udelay(1);
2637 wait_time++;
2638 } while (wait_time < REQSACK_TIMEOUT_TIME);
2639
2640 nsp32_msg(KERN_WARNING, "wait SACK timeout, ack_bit: 0x%x", ack_bit);
2641 }
2642
2643 /*
2644 * assert SCSI ACK
2645 *
2646 * Note: SCSI ACK assertion needs with ACKENB=1, AUTODIRECTION=1.
2647 */
2648 static void nsp32_sack_assert(nsp32_hw_data *data)
2649 {
2650 unsigned int base = data->BaseAddress;
2651 unsigned char busctrl;
2652
2653 busctrl = nsp32_read1(base, SCSI_BUS_CONTROL);
2654 busctrl |= (BUSCTL_ACK | AUTODIRECTION | ACKENB);
2655 nsp32_write1(base, SCSI_BUS_CONTROL, busctrl);
2656 }
2657
2658 /*
2659 * negate SCSI ACK
2660 */
2661 static void nsp32_sack_negate(nsp32_hw_data *data)
2662 {
2663 unsigned int base = data->BaseAddress;
2664 unsigned char busctrl;
2665
2666 busctrl = nsp32_read1(base, SCSI_BUS_CONTROL);
2667 busctrl &= ~BUSCTL_ACK;
2668 nsp32_write1(base, SCSI_BUS_CONTROL, busctrl);
2669 }
2670
2671
2672
2673 /*
2674 * Note: n_io_port is defined as 0x7f because I/O register port is
2675 * assigned as:
2676 * 0x800-0x8ff: memory mapped I/O port
2677 * 0x900-0xbff: (map same 0x800-0x8ff I/O port image repeatedly)
2678 * 0xc00-0xfff: CardBus status registers
2679 */
2680 #if (LINUX_VERSION_CODE > KERNEL_VERSION(2,5,73))
2681 #define DETECT_OK 0
2682 #define DETECT_NG 1
2683 #define PCIDEV pdev
2684 static int nsp32_detect(struct pci_dev *pdev)
2685 #else
2686 #define DETECT_OK 1
2687 #define DETECT_NG 0
2688 #define PCIDEV (data->Pci)
2689 static int nsp32_detect(Scsi_Host_Template *sht)
2690 #endif
2691 {
2692 struct Scsi_Host *host; /* registered host structure */
2693 struct resource *res;
2694 nsp32_hw_data *data;
2695 int ret;
2696 int i, j;
2697
2698 nsp32_dbg(NSP32_DEBUG_REGISTER, "enter");
2699
2700 /*
2701 * register this HBA as SCSI device
2702 */
2703 #if (LINUX_VERSION_CODE > KERNEL_VERSION(2,5,73))
2704 host = scsi_host_alloc(&nsp32_template, sizeof(nsp32_hw_data));
2705 #else
2706 host = scsi_register(sht, sizeof(nsp32_hw_data));
2707 #endif
2708 if (host == NULL) {
2709 nsp32_msg (KERN_ERR, "failed to scsi register");
2710 goto err;
2711 }
2712
2713 /*
2714 * set nsp32_hw_data
2715 */
2716 data = (nsp32_hw_data *)host->hostdata;
2717
2718 memcpy(data, &nsp32_data_base, sizeof(nsp32_hw_data));
2719
2720 host->irq = data->IrqNumber;
2721 host->io_port = data->BaseAddress;
2722 host->unique_id = data->BaseAddress;
2723 host->n_io_port = data->NumAddress;
2724 host->base = (unsigned long)data->MmioAddress;
2725 #if (LINUX_VERSION_CODE > KERNEL_VERSION(2,5,63))
2726 scsi_set_device(host, &PCIDEV->dev);
2727 #else
2728 scsi_set_pci_device(host, PCIDEV);
2729 #endif
2730
2731 data->Host = host;
2732 spin_lock_init(&(data->Lock));
2733
2734 data->cur_lunt = NULL;
2735 data->cur_target = NULL;
2736
2737 /*
2738 * Bus master transfer mode is supported currently.
2739 */
2740 data->trans_method = NSP32_TRANSFER_BUSMASTER;
2741
2742 /*
2743 * Set clock div, CLOCK_4 (HBA has own external clock, and
2744 * dividing * 100ns/4).
2745 * Currently CLOCK_4 has only tested, not for CLOCK_2/PCICLK yet.
2746 */
2747 data->clock = CLOCK_4;
2748
2749 /*
2750 * Select appropriate nsp32_sync_table and set I_CLOCKDIV.
2751 */
2752 switch (data->clock) {
2753 case CLOCK_4:
2754 /* If data->clock is CLOCK_4, then select 40M sync table. */
2755 data->synct = nsp32_sync_table_40M;
2756 data->syncnum = ARRAY_SIZE(nsp32_sync_table_40M);
2757 break;
2758 case CLOCK_2:
2759 /* If data->clock is CLOCK_2, then select 20M sync table. */
2760 data->synct = nsp32_sync_table_20M;
2761 data->syncnum = ARRAY_SIZE(nsp32_sync_table_20M);
2762 break;
2763 case PCICLK:
2764 /* If data->clock is PCICLK, then select pci sync table. */
2765 data->synct = nsp32_sync_table_pci;
2766 data->syncnum = ARRAY_SIZE(nsp32_sync_table_pci);
2767 break;
2768 default:
2769 nsp32_msg(KERN_WARNING,
2770 "Invalid clock div is selected, set CLOCK_4.");
2771 /* Use default value CLOCK_4 */
2772 data->clock = CLOCK_4;
2773 data->synct = nsp32_sync_table_40M;
2774 data->syncnum = ARRAY_SIZE(nsp32_sync_table_40M);
2775 }
2776
2777 /*
2778 * setup nsp32_lunt
2779 */
2780
2781 /*
2782 * setup DMA
2783 */
2784 if (pci_set_dma_mask(PCIDEV, 0xffffffffUL) != 0) {
2785 nsp32_msg (KERN_ERR, "failed to set PCI DMA mask");
2786 goto scsi_unregister;
2787 }
2788
2789 /*
2790 * allocate autoparam DMA resource.
2791 */
2792 data->autoparam = pci_alloc_consistent(PCIDEV, sizeof(nsp32_autoparam), &(data->auto_paddr));
2793 if (data->autoparam == NULL) {
2794 nsp32_msg(KERN_ERR, "failed to allocate DMA memory");
2795 goto scsi_unregister;
2796 }
2797
2798 /*
2799 * allocate scatter-gather DMA resource.
2800 */
2801 data->sg_list = pci_alloc_consistent(PCIDEV, NSP32_SG_TABLE_SIZE,
2802 &(data->sg_paddr));
2803 if (data->sg_list == NULL) {
2804 nsp32_msg(KERN_ERR, "failed to allocate DMA memory");
2805 goto free_autoparam;
2806 }
2807
2808 for (i = 0; i < ARRAY_SIZE(data->lunt); i++) {
2809 for (j = 0; j < ARRAY_SIZE(data->lunt[0]); j++) {
2810 int offset = i * ARRAY_SIZE(data->lunt[0]) + j;
2811 nsp32_lunt tmp = {
2812 .SCpnt = NULL,
2813 .save_datp = 0,
2814 .msgin03 = FALSE,
2815 .sg_num = 0,
2816 .cur_entry = 0,
2817 .sglun = &(data->sg_list[offset]),
2818 .sglun_paddr = data->sg_paddr + (offset * sizeof(nsp32_sglun)),
2819 };
2820
2821 data->lunt[i][j] = tmp;
2822 }
2823 }
2824
2825 /*
2826 * setup target
2827 */
2828 for (i = 0; i < ARRAY_SIZE(data->target); i++) {
2829 nsp32_target *target = &(data->target[i]);
2830
2831 target->limit_entry = 0;
2832 target->sync_flag = 0;
2833 nsp32_set_async(data, target);
2834 }
2835
2836 /*
2837 * EEPROM check
2838 */
2839 ret = nsp32_getprom_param(data);
2840 if (ret == FALSE) {
2841 data->resettime = 3; /* default 3 */
2842 }
2843
2844 /*
2845 * setup HBA
2846 */
2847 nsp32hw_init(data);
2848
2849 snprintf(data->info_str, sizeof(data->info_str),
2850 "NinjaSCSI-32Bi/UDE: irq %d, io 0x%lx+0x%x",
2851 host->irq, host->io_port, host->n_io_port);
2852
2853 /*
2854 * SCSI bus reset
2855 *
2856 * Note: It's important to reset SCSI bus in initialization phase.
2857 * NinjaSCSI-32Bi/UDE HBA EEPROM seems to exchange SDTR when
2858 * system is coming up, so SCSI devices connected to HBA is set as
2859 * un-asynchronous mode. It brings the merit that this HBA is
2860 * ready to start synchronous transfer without any preparation,
2861 * but we are difficult to control transfer speed. In addition,
2862 * it prevents device transfer speed from effecting EEPROM start-up
2863 * SDTR. NinjaSCSI-32Bi/UDE has the feature if EEPROM is set as
2864 * Auto Mode, then FAST-10M is selected when SCSI devices are
2865 * connected same or more than 4 devices. It should be avoided
2866 * depending on this specification. Thus, resetting the SCSI bus
2867 * restores all connected SCSI devices to asynchronous mode, then
2868 * this driver set SDTR safely later, and we can control all SCSI
2869 * device transfer mode.
2870 */
2871 nsp32_do_bus_reset(data);
2872
2873 ret = request_irq(host->irq, do_nsp32_isr,
2874 SA_SHIRQ | SA_SAMPLE_RANDOM, "nsp32", data);
2875 if (ret < 0) {
2876 nsp32_msg(KERN_ERR, "Unable to allocate IRQ for NinjaSCSI32 "
2877 "SCSI PCI controller. Interrupt: %d", host->irq);
2878 goto free_sg_list;
2879 }
2880
2881 /*
2882 * PCI IO register
2883 */
2884 res = request_region(host->io_port, host->n_io_port, "nsp32");
2885 if (res == NULL) {
2886 nsp32_msg(KERN_ERR,
2887 "I/O region 0x%lx+0x%lx is already used",
2888 data->BaseAddress, data->NumAddress);
2889 goto free_irq;
2890 }
2891
2892 #if (LINUX_VERSION_CODE > KERNEL_VERSION(2,5,73))
2893 scsi_add_host (host, &PCIDEV->dev);
2894 scsi_scan_host(host);
2895 #endif
2896 pci_set_drvdata(PCIDEV, host);
2897 return DETECT_OK;
2898
2899 free_irq:
2900 free_irq(host->irq, data);
2901
2902 free_sg_list:
2903 pci_free_consistent(PCIDEV, NSP32_SG_TABLE_SIZE,
2904 data->sg_list, data->sg_paddr);
2905
2906 free_autoparam:
2907 pci_free_consistent(PCIDEV, sizeof(nsp32_autoparam),
2908 data->autoparam, data->auto_paddr);
2909
2910 scsi_unregister:
2911 scsi_host_put(host);
2912
2913 err:
2914 return DETECT_NG;
2915 }
2916 #undef DETECT_OK
2917 #undef DETECT_NG
2918 #undef PCIDEV
2919
2920 static int nsp32_release(struct Scsi_Host *host)
2921 {
2922 nsp32_hw_data *data = (nsp32_hw_data *)host->hostdata;
2923
2924 if (data->autoparam) {
2925 pci_free_consistent(data->Pci, sizeof(nsp32_autoparam),
2926 data->autoparam, data->auto_paddr);
2927 }
2928
2929 if (data->sg_list) {
2930 pci_free_consistent(data->Pci, NSP32_SG_TABLE_SIZE,
2931 data->sg_list, data->sg_paddr);
2932 }
2933
2934 if (host->irq) {
2935 free_irq(host->irq, data);
2936 }
2937
2938 if (host->io_port && host->n_io_port) {
2939 release_region(host->io_port, host->n_io_port);
2940 }
2941
2942 if (data->MmioAddress) {
2943 iounmap(data->MmioAddress);
2944 }
2945
2946 return 0;
2947 }
2948
2949 static const char *nsp32_info(struct Scsi_Host *shpnt)
2950 {
2951 nsp32_hw_data *data = (nsp32_hw_data *)shpnt->hostdata;
2952
2953 return data->info_str;
2954 }
2955
2956
2957 /****************************************************************************
2958 * error handler
2959 */
2960 static int nsp32_eh_abort(struct scsi_cmnd *SCpnt)
2961 {
2962 nsp32_hw_data *data = (nsp32_hw_data *)SCpnt->device->host->hostdata;
2963 unsigned int base = SCpnt->device->host->io_port;
2964
2965 nsp32_msg(KERN_WARNING, "abort");
2966
2967 if (data->cur_lunt->SCpnt == NULL) {
2968 nsp32_dbg(NSP32_DEBUG_BUSRESET, "abort failed");
2969 return FAILED;
2970 }
2971
2972 if (data->cur_target->sync_flag & (SDTR_INITIATOR | SDTR_TARGET)) {
2973 /* reset SDTR negotiation */
2974 data->cur_target->sync_flag = 0;
2975 nsp32_set_async(data, data->cur_target);
2976 }
2977
2978 nsp32_write2(base, TRANSFER_CONTROL, 0);
2979 nsp32_write2(base, BM_CNT, 0);
2980
2981 SCpnt->result = DID_ABORT << 16;
2982 nsp32_scsi_done(SCpnt);
2983
2984 nsp32_dbg(NSP32_DEBUG_BUSRESET, "abort success");
2985 return SUCCESS;
2986 }
2987
2988 static int nsp32_eh_bus_reset(struct scsi_cmnd *SCpnt)
2989 {
2990 nsp32_hw_data *data = (nsp32_hw_data *)SCpnt->device->host->hostdata;
2991 unsigned int base = SCpnt->device->host->io_port;
2992
2993 nsp32_msg(KERN_INFO, "Bus Reset");
2994 nsp32_dbg(NSP32_DEBUG_BUSRESET, "SCpnt=0x%x", SCpnt);
2995
2996 nsp32_write2(base, IRQ_CONTROL, IRQ_CONTROL_ALL_IRQ_MASK);
2997 nsp32_do_bus_reset(data);
2998 nsp32_write2(base, IRQ_CONTROL, 0);
2999
3000 return SUCCESS; /* SCSI bus reset is succeeded at any time. */
3001 }
3002
3003 static void nsp32_do_bus_reset(nsp32_hw_data *data)
3004 {
3005 unsigned int base = data->BaseAddress;
3006 unsigned short intrdat;
3007 int i;
3008
3009 nsp32_dbg(NSP32_DEBUG_BUSRESET, "in");
3010
3011 /*
3012 * stop all transfer
3013 * clear TRANSFERCONTROL_BM_START
3014 * clear counter
3015 */
3016 nsp32_write2(base, TRANSFER_CONTROL, 0);
3017 nsp32_write4(base, BM_CNT, 0);
3018 nsp32_write4(base, CLR_COUNTER, CLRCOUNTER_ALLMASK);
3019
3020 /*
3021 * fall back to asynchronous transfer mode
3022 * initialize SDTR negotiation flag
3023 */
3024 for (i = 0; i < ARRAY_SIZE(data->target); i++) {
3025 nsp32_target *target = &data->target[i];
3026
3027 target->sync_flag = 0;
3028 nsp32_set_async(data, target);
3029 }
3030
3031 /*
3032 * reset SCSI bus
3033 */
3034 nsp32_write1(base, SCSI_BUS_CONTROL, BUSCTL_RST);
3035 udelay(RESET_HOLD_TIME);
3036 nsp32_write1(base, SCSI_BUS_CONTROL, 0);
3037 for(i = 0; i < 5; i++) {
3038 intrdat = nsp32_read2(base, IRQ_STATUS); /* dummy read */
3039 nsp32_dbg(NSP32_DEBUG_BUSRESET, "irq:1: 0x%x", intrdat);
3040 }
3041
3042 data->CurrentSC = NULL;
3043 }
3044
3045 static int nsp32_eh_host_reset(struct scsi_cmnd *SCpnt)
3046 {
3047 struct Scsi_Host *host = SCpnt->device->host;
3048 unsigned int base = SCpnt->device->host->io_port;
3049 nsp32_hw_data *data = (nsp32_hw_data *)host->hostdata;
3050
3051 nsp32_msg(KERN_INFO, "Host Reset");
3052 nsp32_dbg(NSP32_DEBUG_BUSRESET, "SCpnt=0x%x", SCpnt);
3053
3054 nsp32hw_init(data);
3055 nsp32_write2(base, IRQ_CONTROL, IRQ_CONTROL_ALL_IRQ_MASK);
3056 nsp32_do_bus_reset(data);
3057 nsp32_write2(base, IRQ_CONTROL, 0);
3058
3059 return SUCCESS; /* Host reset is succeeded at any time. */
3060 }
3061
3062
3063 /**************************************************************************
3064 * EEPROM handler
3065 */
3066
3067 /*
3068 * getting EEPROM parameter
3069 */
3070 static int nsp32_getprom_param(nsp32_hw_data *data)
3071 {
3072 int vendor = data->pci_devid->vendor;
3073 int device = data->pci_devid->device;
3074 int ret, val, i;
3075
3076 /*
3077 * EEPROM checking.
3078 */
3079 ret = nsp32_prom_read(data, 0x7e);
3080 if (ret != 0x55) {
3081 nsp32_msg(KERN_INFO, "No EEPROM detected: 0x%x", ret);
3082 return FALSE;
3083 }
3084 ret = nsp32_prom_read(data, 0x7f);
3085 if (ret != 0xaa) {
3086 nsp32_msg(KERN_INFO, "Invalid number: 0x%x", ret);
3087 return FALSE;
3088 }
3089
3090 /*
3091 * check EEPROM type
3092 */
3093 if (vendor == PCI_VENDOR_ID_WORKBIT &&
3094 device == PCI_DEVICE_ID_WORKBIT_STANDARD) {
3095 ret = nsp32_getprom_c16(data);
3096 } else if (vendor == PCI_VENDOR_ID_WORKBIT &&
3097 device == PCI_DEVICE_ID_NINJASCSI_32BIB_LOGITEC) {
3098 ret = nsp32_getprom_at24(data);
3099 } else if (vendor == PCI_VENDOR_ID_WORKBIT &&
3100 device == PCI_DEVICE_ID_NINJASCSI_32UDE_MELCO ) {
3101 ret = nsp32_getprom_at24(data);
3102 } else {
3103 nsp32_msg(KERN_WARNING, "Unknown EEPROM");
3104 ret = FALSE;
3105 }
3106
3107 /* for debug : SPROM data full checking */
3108 for (i = 0; i <= 0x1f; i++) {
3109 val = nsp32_prom_read(data, i);
3110 nsp32_dbg(NSP32_DEBUG_EEPROM,
3111 "rom address 0x%x : 0x%x", i, val);
3112 }
3113
3114 return ret;
3115 }
3116
3117
3118 /*
3119 * AT24C01A (Logitec: LHA-600S), AT24C02 (Melco Buffalo: IFC-USLP) data map:
3120 *
3121 * ROMADDR
3122 * 0x00 - 0x06 : Device Synchronous Transfer Period (SCSI ID 0 - 6)
3123 * Value 0x0: ASYNC, 0x0c: Ultra-20M, 0x19: Fast-10M
3124 * 0x07 : HBA Synchronous Transfer Period
3125 * Value 0: AutoSync, 1: Manual Setting
3126 * 0x08 - 0x0f : Not Used? (0x0)
3127 * 0x10 : Bus Termination
3128 * Value 0: Auto[ON], 1: ON, 2: OFF
3129 * 0x11 : Not Used? (0)
3130 * 0x12 : Bus Reset Delay Time (0x03)
3131 * 0x13 : Bootable CD Support
3132 * Value 0: Disable, 1: Enable
3133 * 0x14 : Device Scan
3134 * Bit 7 6 5 4 3 2 1 0
3135 * | <----------------->
3136 * | SCSI ID: Value 0: Skip, 1: YES
3137 * |-> Value 0: ALL scan, Value 1: Manual
3138 * 0x15 - 0x1b : Not Used? (0)
3139 * 0x1c : Constant? (0x01) (clock div?)
3140 * 0x1d - 0x7c : Not Used (0xff)
3141 * 0x7d : Not Used? (0xff)
3142 * 0x7e : Constant (0x55), Validity signature
3143 * 0x7f : Constant (0xaa), Validity signature
3144 */
3145 static int nsp32_getprom_at24(nsp32_hw_data *data)
3146 {
3147 int ret, i;
3148 int auto_sync;
3149 nsp32_target *target;
3150 int entry;
3151
3152 /*
3153 * Reset time which is designated by EEPROM.
3154 *
3155 * TODO: Not used yet.
3156 */
3157 data->resettime = nsp32_prom_read(data, 0x12);
3158
3159 /*
3160 * HBA Synchronous Transfer Period
3161 *
3162 * Note: auto_sync = 0: auto, 1: manual. Ninja SCSI HBA spec says
3163 * that if auto_sync is 0 (auto), and connected SCSI devices are
3164 * same or lower than 3, then transfer speed is set as ULTRA-20M.
3165 * On the contrary if connected SCSI devices are same or higher
3166 * than 4, then transfer speed is set as FAST-10M.
3167 *
3168 * I break this rule. The number of connected SCSI devices are
3169 * only ignored. If auto_sync is 0 (auto), then transfer speed is
3170 * forced as ULTRA-20M.
3171 */
3172 ret = nsp32_prom_read(data, 0x07);
3173 switch (ret) {
3174 case 0:
3175 auto_sync = TRUE;
3176 break;
3177 case 1:
3178 auto_sync = FALSE;
3179 break;
3180 default:
3181 nsp32_msg(KERN_WARNING,
3182 "Unsupported Auto Sync mode. Fall back to manual mode.");
3183 auto_sync = TRUE;
3184 }
3185
3186 if (trans_mode == ULTRA20M_MODE) {
3187 auto_sync = TRUE;
3188 }
3189
3190 /*
3191 * each device Synchronous Transfer Period
3192 */
3193 for (i = 0; i < NSP32_HOST_SCSIID; i++) {
3194 target = &data->target[i];
3195 if (auto_sync == TRUE) {
3196 target->limit_entry = 0; /* set as ULTRA20M */
3197 } else {
3198 ret = nsp32_prom_read(data, i);
3199 entry = nsp32_search_period_entry(data, target, ret);
3200 if (entry < 0) {
3201 /* search failed... set maximum speed */
3202 entry = 0;
3203 }
3204 target->limit_entry = entry;
3205 }
3206 }
3207
3208 return TRUE;
3209 }
3210
3211
3212 /*
3213 * C16 110 (I-O Data: SC-NBD) data map:
3214 *
3215 * ROMADDR
3216 * 0x00 - 0x06 : Device Synchronous Transfer Period (SCSI ID 0 - 6)
3217 * Value 0x0: 20MB/S, 0x1: 10MB/S, 0x2: 5MB/S, 0x3: ASYNC
3218 * 0x07 : 0 (HBA Synchronous Transfer Period: Auto Sync)
3219 * 0x08 - 0x0f : Not Used? (0x0)
3220 * 0x10 : Transfer Mode
3221 * Value 0: PIO, 1: Busmater
3222 * 0x11 : Bus Reset Delay Time (0x00-0x20)
3223 * 0x12 : Bus Termination
3224 * Value 0: Disable, 1: Enable
3225 * 0x13 - 0x19 : Disconnection
3226 * Value 0: Disable, 1: Enable
3227 * 0x1a - 0x7c : Not Used? (0)
3228 * 0x7d : Not Used? (0xf8)
3229 * 0x7e : Constant (0x55), Validity signature
3230 * 0x7f : Constant (0xaa), Validity signature
3231 */
3232 static int nsp32_getprom_c16(nsp32_hw_data *data)
3233 {
3234 int ret, i;
3235 nsp32_target *target;
3236 int entry, val;
3237
3238 /*
3239 * Reset time which is designated by EEPROM.
3240 *
3241 * TODO: Not used yet.
3242 */
3243 data->resettime = nsp32_prom_read(data, 0x11);
3244
3245 /*
3246 * each device Synchronous Transfer Period
3247 */
3248 for (i = 0; i < NSP32_HOST_SCSIID; i++) {
3249 target = &data->target[i];
3250 ret = nsp32_prom_read(data, i);
3251 switch (ret) {
3252 case 0: /* 20MB/s */
3253 val = 0x0c;
3254 break;
3255 case 1: /* 10MB/s */
3256 val = 0x19;
3257 break;
3258 case 2: /* 5MB/s */
3259 val = 0x32;
3260 break;
3261 case 3: /* ASYNC */
3262 val = 0x00;
3263 break;
3264 default: /* default 20MB/s */
3265 val = 0x0c;
3266 break;
3267 }
3268 entry = nsp32_search_period_entry(data, target, val);
3269 if (entry < 0 || trans_mode == ULTRA20M_MODE) {
3270 /* search failed... set maximum speed */
3271 entry = 0;
3272 }
3273 target->limit_entry = entry;
3274 }
3275
3276 return TRUE;
3277 }
3278
3279
3280 /*
3281 * Atmel AT24C01A (drived in 5V) serial EEPROM routines
3282 */
3283 static int nsp32_prom_read(nsp32_hw_data *data, int romaddr)
3284 {
3285 int i, val;
3286
3287 /* start condition */
3288 nsp32_prom_start(data);
3289
3290 /* device address */
3291 nsp32_prom_write_bit(data, 1); /* 1 */
3292 nsp32_prom_write_bit(data, 0); /* 0 */
3293 nsp32_prom_write_bit(data, 1); /* 1 */
3294 nsp32_prom_write_bit(data, 0); /* 0 */
3295 nsp32_prom_write_bit(data, 0); /* A2: 0 (GND) */
3296 nsp32_prom_write_bit(data, 0); /* A1: 0 (GND) */
3297 nsp32_prom_write_bit(data, 0); /* A0: 0 (GND) */
3298
3299 /* R/W: W for dummy write */
3300 nsp32_prom_write_bit(data, 0);
3301
3302 /* ack */
3303 nsp32_prom_write_bit(data, 0);
3304
3305 /* word address */
3306 for (i = 7; i >= 0; i--) {
3307 nsp32_prom_write_bit(data, ((romaddr >> i) & 1));
3308 }
3309
3310 /* ack */
3311 nsp32_prom_write_bit(data, 0);
3312
3313 /* start condition */
3314 nsp32_prom_start(data);
3315
3316 /* device address */
3317 nsp32_prom_write_bit(data, 1); /* 1 */
3318 nsp32_prom_write_bit(data, 0); /* 0 */
3319 nsp32_prom_write_bit(data, 1); /* 1 */
3320 nsp32_prom_write_bit(data, 0); /* 0 */
3321 nsp32_prom_write_bit(data, 0); /* A2: 0 (GND) */
3322 nsp32_prom_write_bit(data, 0); /* A1: 0 (GND) */
3323 nsp32_prom_write_bit(data, 0); /* A0: 0 (GND) */
3324
3325 /* R/W: R */
3326 nsp32_prom_write_bit(data, 1);
3327
3328 /* ack */
3329 nsp32_prom_write_bit(data, 0);
3330
3331 /* data... */
3332 val = 0;
3333 for (i = 7; i >= 0; i--) {
3334 val += (nsp32_prom_read_bit(data) << i);
3335 }
3336
3337 /* no ack */
3338 nsp32_prom_write_bit(data, 1);
3339
3340 /* stop condition */
3341 nsp32_prom_stop(data);
3342
3343 return val;
3344 }
3345
3346 static void nsp32_prom_set(nsp32_hw_data *data, int bit, int val)
3347 {
3348 int base = data->BaseAddress;
3349 int tmp;
3350
3351 tmp = nsp32_index_read1(base, SERIAL_ROM_CTL);
3352
3353 if (val == 0) {
3354 tmp &= ~bit;
3355 } else {
3356 tmp |= bit;
3357 }
3358
3359 nsp32_index_write1(base, SERIAL_ROM_CTL, tmp);
3360
3361 udelay(10);
3362 }
3363
3364 static int nsp32_prom_get(nsp32_hw_data *data, int bit)
3365 {
3366 int base = data->BaseAddress;
3367 int tmp, ret;
3368
3369 if (bit != SDA) {
3370 nsp32_msg(KERN_ERR, "return value is not appropriate");
3371 return 0;
3372 }
3373
3374
3375 tmp = nsp32_index_read1(base, SERIAL_ROM_CTL) & bit;
3376
3377 if (tmp == 0) {
3378 ret = 0;
3379 } else {
3380 ret = 1;
3381 }
3382
3383 udelay(10);
3384
3385 return ret;
3386 }
3387
3388 static void nsp32_prom_start (nsp32_hw_data *data)
3389 {
3390 /* start condition */
3391 nsp32_prom_set(data, SCL, 1);
3392 nsp32_prom_set(data, SDA, 1);
3393 nsp32_prom_set(data, ENA, 1); /* output mode */
3394 nsp32_prom_set(data, SDA, 0); /* keeping SCL=1 and transiting
3395 * SDA 1->0 is start condition */
3396 nsp32_prom_set(data, SCL, 0);
3397 }
3398
3399 static void nsp32_prom_stop (nsp32_hw_data *data)
3400 {
3401 /* stop condition */
3402 nsp32_prom_set(data, SCL, 1);
3403 nsp32_prom_set(data, SDA, 0);
3404 nsp32_prom_set(data, ENA, 1); /* output mode */
3405 nsp32_prom_set(data, SDA, 1);
3406 nsp32_prom_set(data, SCL, 0);
3407 }
3408
3409 static void nsp32_prom_write_bit(nsp32_hw_data *data, int val)
3410 {
3411 /* write */
3412 nsp32_prom_set(data, SDA, val);
3413 nsp32_prom_set(data, SCL, 1 );
3414 nsp32_prom_set(data, SCL, 0 );
3415 }
3416
3417 static int nsp32_prom_read_bit(nsp32_hw_data *data)
3418 {
3419 int val;
3420
3421 /* read */
3422 nsp32_prom_set(data, ENA, 0); /* input mode */
3423 nsp32_prom_set(data, SCL, 1);
3424
3425 val = nsp32_prom_get(data, SDA);
3426
3427 nsp32_prom_set(data, SCL, 0);
3428 nsp32_prom_set(data, ENA, 1); /* output mode */
3429
3430 return val;
3431 }
3432
3433
3434 /**************************************************************************
3435 * Power Management
3436 */
3437 #ifdef CONFIG_PM
3438
3439 /* Device suspended */
3440 static int nsp32_suspend(struct pci_dev *pdev, u32 state)
3441 {
3442 struct Scsi_Host *host = pci_get_drvdata(pdev);
3443
3444 nsp32_msg(KERN_INFO, "pci-suspend: pdev=0x%p, state=%ld, slot=%s, host=0x%p", pdev, state, pci_name(pdev), host);
3445
3446 pci_save_state (pdev);
3447 pci_disable_device (pdev);
3448 pci_set_power_state(pdev, state);
3449
3450 return 0;
3451 }
3452
3453 /* Device woken up */
3454 static int nsp32_resume(struct pci_dev *pdev)
3455 {
3456 struct Scsi_Host *host = pci_get_drvdata(pdev);
3457 nsp32_hw_data *data = (nsp32_hw_data *)host->hostdata;
3458 unsigned short reg;
3459
3460 nsp32_msg(KERN_INFO, "pci-resume: pdev=0x%p, slot=%s, host=0x%p", pdev, pci_name(pdev), host);
3461
3462 pci_set_power_state(pdev, 0);
3463 pci_enable_wake (pdev, 0, 0);
3464 pci_restore_state (pdev);
3465
3466 reg = nsp32_read2(data->BaseAddress, INDEX_REG);
3467
3468 nsp32_msg(KERN_INFO, "io=0x%x reg=0x%x", data->BaseAddress, reg);
3469
3470 if (reg == 0xffff) {
3471 nsp32_msg(KERN_INFO, "missing device. abort resume.");
3472 return 0;
3473 }
3474
3475 nsp32hw_init (data);
3476 nsp32_do_bus_reset(data);
3477
3478 nsp32_msg(KERN_INFO, "resume success");
3479
3480 return 0;
3481 }
3482
3483 /* Enable wake event */
3484 static int nsp32_enable_wake(struct pci_dev *pdev, u32 state, int enable)
3485 {
3486 struct Scsi_Host *host = pci_get_drvdata(pdev);
3487
3488 nsp32_msg(KERN_INFO, "pci-enable_wake: stub, pdev=0x%p, enable=%d, slot=%s, host=0x%p", pdev, enable, pci_name(pdev), host);
3489
3490 return 0;
3491 }
3492 #endif
3493
3494 /************************************************************************
3495 * PCI/Cardbus probe/remove routine
3496 */
3497 static int __devinit nsp32_probe(struct pci_dev *pdev, const struct pci_device_id *id)
3498 {
3499 int ret;
3500 nsp32_hw_data *data = &nsp32_data_base;
3501
3502 nsp32_dbg(NSP32_DEBUG_REGISTER, "enter");
3503
3504 ret = pci_enable_device(pdev);
3505 if (ret) {
3506 nsp32_msg(KERN_ERR, "failed to enable pci device");
3507 return ret;
3508 }
3509
3510 data->Pci = pdev;
3511 data->pci_devid = id;
3512 data->IrqNumber = pdev->irq;
3513 data->BaseAddress = pci_resource_start(pdev, 0);
3514 data->NumAddress = pci_resource_len (pdev, 0);
3515 data->MmioAddress = ioremap_nocache(pci_resource_start(pdev, 1),
3516 pci_resource_len (pdev, 1));
3517 data->MmioLength = pci_resource_len (pdev, 1);
3518
3519 pci_set_master(pdev);
3520
3521 #if (LINUX_VERSION_CODE > KERNEL_VERSION(2,5,73))
3522 ret = nsp32_detect(pdev);
3523 #else
3524 ret = scsi_register_host(&nsp32_template);
3525 #endif
3526
3527 nsp32_msg(KERN_INFO, "irq: %i mmio: %p+0x%lx slot: %s model: %s",
3528 pdev->irq,
3529 data->MmioAddress, data->MmioLength,
3530 pci_name(pdev),
3531 nsp32_model[id->driver_data]);
3532
3533 nsp32_dbg(NSP32_DEBUG_REGISTER, "exit %d", ret);
3534
3535 return ret;
3536 }
3537
3538 static void __devexit nsp32_remove(struct pci_dev *pdev)
3539 {
3540 #if (LINUX_VERSION_CODE > KERNEL_VERSION(2,5,73))
3541 struct Scsi_Host *host = pci_get_drvdata(pdev);
3542 #endif
3543
3544 nsp32_dbg(NSP32_DEBUG_REGISTER, "enter");
3545
3546 #if (LINUX_VERSION_CODE > KERNEL_VERSION(2,5,73))
3547 scsi_remove_host(host);
3548
3549 nsp32_release(host);
3550
3551 scsi_host_put(host);
3552 #else
3553 scsi_unregister_host(&nsp32_template);
3554 #endif
3555 }
3556
3557
3558
3559 static struct pci_driver nsp32_driver = {
3560 .name = "nsp32",
3561 .id_table = nsp32_pci_table,
3562 .probe = nsp32_probe,
3563 .remove = __devexit_p(nsp32_remove),
3564 #ifdef CONFIG_PM
3565 .suspend = nsp32_suspend,
3566 .resume = nsp32_resume,
3567 .enable_wake = nsp32_enable_wake,
3568 #endif
3569 };
3570
3571 /*********************************************************************
3572 * Moule entry point
3573 */
3574 static int __init init_nsp32(void) {
3575 nsp32_msg(KERN_INFO, "loading...");
3576 return pci_module_init(&nsp32_driver);
3577 }
3578
3579 static void __exit exit_nsp32(void) {
3580 nsp32_msg(KERN_INFO, "unloading...");
3581 pci_unregister_driver(&nsp32_driver);
3582 }
3583
3584 module_init(init_nsp32);
3585 module_exit(exit_nsp32);
3586
3587 /* end */
Historical 2.5/2.6 development