include/sound/vx_core.h

   1 /*
   2  * Driver for Digigram VX soundcards
   3  *
   4  * Hardware core part
   5  *
   6  * Copyright (c) 2002 by Takashi Iwai <tiwai@suse.de>
   7  *
   8  *   This program is free software; you can redistribute it and/or modify
   9  *   it under the terms of the GNU General Public License as published by
  10  *   the Free Software Foundation; either version 2 of the License, or
  11  *   (at your option) any later version.
  12  *
  13  *   This program is distributed in the hope that it will be useful,
  14  *   but WITHOUT ANY WARRANTY; without even the implied warranty of
  15  *   MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
  16  *   GNU General Public License for more details.
  17  *
  18  *   You should have received a copy of the GNU General Public License
  19  *   along with this program; if not, write to the Free Software
  20  *   Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA  02111-1307 USA
  21  */
  22
  23 #ifndef __SOUND_VX_COMMON_H
  24 #define __SOUND_VX_COMMON_H
  25
  26 #include <sound/pcm.h>
  27 #include <sound/hwdep.h>
  28 #include <linux/interrupt.h>
  29
  30 typedef struct snd_vx_core vx_core_t;
  31 typedef struct vx_pipe vx_pipe_t;
  32
  33 #define VX_DRIVER_VERSION       0x010000        /* 1.0.0 */
  34
  35 /*
  36  */
  37 #define SIZE_MAX_CMD    0x10
  38 #define SIZE_MAX_STATUS 0x10
  39
  40 struct vx_rmh {
  41         u16     LgCmd;          /* length of the command to send (WORDs) */
  42         u16     LgStat;         /* length of the status received (WORDs) */
  43         u32     Cmd[SIZE_MAX_CMD];
  44         u32     Stat[SIZE_MAX_STATUS];
  45         u16     DspStat;        /* status type, RMP_SSIZE_XXX */
  46 };
  47
  48 typedef u64 pcx_time_t;
  49
  50 #define VX_MAX_PIPES    16
  51 #define VX_MAX_PERIODS  32
  52 #define VX_MAX_CODECS   2
  53
  54 struct vx_ibl_info {
  55         int size;       /* the current IBL size (0 = query) in bytes */
  56         int max_size;   /* max. IBL size in bytes */
  57         int min_size;   /* min. IBL size in bytes */
  58         int granularity;        /* granularity */
  59 };
  60
  61 struct vx_pipe {
  62         int number;
  63         unsigned int is_capture: 1;
  64         unsigned int data_mode: 1;
  65         unsigned int running: 1;
  66         unsigned int prepared: 1;
  67         int channels;
  68         unsigned int differed_type;
  69         pcx_time_t pcx_time;
  70         snd_pcm_substream_t *substream;
  71
  72         int hbuf_size;          /* H-buffer size in bytes */
  73         int buffer_bytes;       /* the ALSA pcm buffer size in bytes */
  74         int period_bytes;       /* the ALSA pcm period size in bytes */
  75         int hw_ptr;             /* the current hardware pointer in bytes */
  76         int position;           /* the current position in frames (playback only) */
  77         int transferred;        /* the transferred size (per period) in frames */
  78         int align;              /* size of alignment */
  79         u64 cur_count;          /* current sample position (for playback) */
  80
  81         unsigned int references;     /* an output pipe may be used for monitoring and/or playback */
  82         vx_pipe_t *monitoring_pipe;  /* pointer to the monitoring pipe (capture pipe only)*/
  83
  84         struct tasklet_struct start_tq;
  85 };
  86
  87 struct snd_vx_ops {
  88         /* low-level i/o */
  89         unsigned char (*in8)(vx_core_t *chip, int reg);
  90         unsigned int (*in32)(vx_core_t *chip, int reg);
  91         void (*out8)(vx_core_t *chip, int reg, unsigned char val);
  92         void (*out32)(vx_core_t *chip, int reg, unsigned int val);
  93         /* irq */
  94         int (*test_and_ack)(vx_core_t *chip);
  95         void (*validate_irq)(vx_core_t *chip, int enable);
  96         /* codec */
  97         void (*write_codec)(vx_core_t *chip, int codec, unsigned int data);
  98         void (*akm_write)(vx_core_t *chip, int reg, unsigned int data);
  99         void (*reset_codec)(vx_core_t *chip);
 100         void (*change_audio_source)(vx_core_t *chip, int src);
 101         void (*set_clock_source)(vx_core_t *chp, int src);
 102         /* chip init */
 103         int (*load_dsp)(vx_core_t *chip, const snd_hwdep_dsp_image_t *dsp);
 104         void (*reset_dsp)(vx_core_t *chip);
 105         void (*reset_board)(vx_core_t *chip, int cold_reset);
 106         int (*add_controls)(vx_core_t *chip);
 107         /* pcm */
 108         void (*dma_write)(vx_core_t *chip, snd_pcm_runtime_t *runtime,
 109                           vx_pipe_t *pipe, int count);
 110         void (*dma_read)(vx_core_t *chip, snd_pcm_runtime_t *runtime,
 111                           vx_pipe_t *pipe, int count);
 112 };
 113
 114 struct snd_vx_hardware {
 115         const char *name;
 116         int type;       /* VX_TYPE_XXX */
 117
 118         /* hardware specs */
 119         unsigned int num_codecs;
 120         unsigned int num_ins;
 121         unsigned int num_outs;
 122         unsigned int output_level_max;
 123 };
 124
 125 /* hwdep id string */
 126 #define SND_VX_HWDEP_ID         "VX Loader"
 127
 128 /* hardware type */
 129 enum {
 130         /* VX222 PCI */
 131         VX_TYPE_BOARD,          /* old VX222 PCI */
 132         VX_TYPE_V2,             /* VX222 V2 PCI */
 133         VX_TYPE_MIC,            /* VX222 Mic PCI */
 134         /* VX-pocket */
 135         VX_TYPE_VXPOCKET,       /* VXpocket V2 */
 136         VX_TYPE_VXP440,         /* VXpocket 440 */
 137         VX_TYPE_NUMS
 138 };
 139
 140 /* chip status */
 141 enum {
 142         VX_STAT_XILINX_LOADED   = (1 << 0),     /* devices are registered */
 143         VX_STAT_DEVICE_INIT     = (1 << 1),     /* devices are registered */
 144         VX_STAT_CHIP_INIT       = (1 << 2),     /* all operational */
 145         VX_STAT_IN_SUSPEND      = (1 << 10),    /* in suspend phase */
 146         VX_STAT_IS_STALE        = (1 << 15)     /* device is stale */
 147 };
 148
 149 /* min/max values for analog output for old codecs */
 150 #define VX_ANALOG_OUT_LEVEL_MAX         0xe3
 151
 152 struct snd_vx_core {
 153         /* ALSA stuff */
 154         snd_card_t *card;
 155         snd_pcm_t *pcm[VX_MAX_CODECS];
 156         int type;       /* VX_TYPE_XXX */
 157
 158         int irq;
 159         /* ports are defined externally */
 160
 161         /* low-level functions */
 162         struct snd_vx_hardware *hw;
 163         struct snd_vx_ops *ops;
 164
 165         spinlock_t lock;
 166         spinlock_t irq_lock;
 167         struct tasklet_struct tq;
 168
 169         unsigned int chip_status;
 170         unsigned int pcm_running;
 171
 172         snd_hwdep_t *hwdep;
 173
 174         struct vx_rmh irq_rmh;  /* RMH used in interrupts */
 175
 176         unsigned int audio_info; /* see VX_AUDIO_INFO */
 177         unsigned int audio_ins;
 178         unsigned int audio_outs;
 179         struct vx_pipe **playback_pipes;
 180         struct vx_pipe **capture_pipes;
 181
 182         /* clock and audio sources */
 183         unsigned int audio_source;      /* current audio input source */
 184         unsigned int audio_source_target;
 185         unsigned int clock_source;      /* current clock source (INTERNAL_QUARTZ or UER_SYNC) */
 186         unsigned int freq;              /* current frequency */
 187         unsigned int freq_detected;     /* detected frequency from digital in */
 188         unsigned int uer_detected;      /* VX_UER_MODE_XXX */
 189         unsigned int uer_bits;  /* IEC958 status bits */
 190         struct vx_ibl_info ibl; /* IBL information */
 191
 192         /* mixer setting */
 193         int output_level[VX_MAX_CODECS][2];     /* analog output level */
 194         int audio_gain[2][4];                   /* digital audio level (playback/capture) */
 195         unsigned char audio_active[4];          /* mute/unmute on digital playback */
 196         int audio_monitor[4];                   /* playback hw-monitor level */
 197         unsigned char audio_monitor_active[4];  /* playback hw-monitor mute/unmute */
 198
 199         struct semaphore mixer_mutex;
 200 };
 201
 202
 203 /*
 204  * constructor
 205  */
 206 vx_core_t *snd_vx_create(snd_card_t *card, struct snd_vx_hardware *hw,
 207                          struct snd_vx_ops *ops, int extra_size);
 208 int snd_vx_hwdep_new(vx_core_t *chip);
 209 int snd_vx_load_boot_image(vx_core_t *chip, const snd_hwdep_dsp_image_t *boot);
 210 int snd_vx_dsp_boot(vx_core_t *chip, const snd_hwdep_dsp_image_t *boot);
 211 int snd_vx_dsp_load(vx_core_t *chip, const snd_hwdep_dsp_image_t *dsp);
 212
 213 /*
 214  * interrupt handler; exported for pcmcia
 215  */
 216 irqreturn_t snd_vx_irq_handler(int irq, void *dev, struct pt_regs *regs);
 217
 218 /*
 219  * power-management routines
 220  */
 221 #ifdef CONFIG_PM
 222 void snd_vx_suspend(vx_core_t *chip);
 223 void snd_vx_resume(vx_core_t *chip);
 224 #endif
 225
 226
 227 /*
 228  * lowlevel functions
 229  */
 230 inline static int vx_test_and_ack(vx_core_t *chip)
 231 {
 232         snd_assert(chip->ops->test_and_ack, return -ENXIO);
 233         return chip->ops->test_and_ack(chip);
 234 }
 235
 236 inline static void vx_validate_irq(vx_core_t *chip, int enable)
 237 {
 238         snd_assert(chip->ops->validate_irq, return);
 239         chip->ops->validate_irq(chip, enable);
 240 }
 241
 242 inline static unsigned char snd_vx_inb(vx_core_t *chip, int reg)
 243 {
 244         snd_assert(chip->ops->in8, return 0);
 245         return chip->ops->in8(chip, reg);
 246 }
 247
 248 inline static unsigned int snd_vx_inl(vx_core_t *chip, int reg)
 249 {
 250         snd_assert(chip->ops->in32, return 0);
 251         return chip->ops->in32(chip, reg);
 252 }
 253
 254 inline static void snd_vx_outb(vx_core_t *chip, int reg, unsigned char val)
 255 {
 256         snd_assert(chip->ops->out8, return);
 257         return chip->ops->out8(chip, reg, val);
 258 }
 259
 260 inline static void snd_vx_outl(vx_core_t *chip, int reg, unsigned int val)
 261 {
 262         snd_assert(chip->ops->out32, return);
 263         return chip->ops->out32(chip, reg, val);
 264 }
 265
 266 #define vx_inb(chip,reg)        snd_vx_inb(chip, VX_##reg)
 267 #define vx_outb(chip,reg,val)   snd_vx_outb(chip, VX_##reg,val)
 268 #define vx_inl(chip,reg)        snd_vx_inl(chip, VX_##reg)
 269 #define vx_outl(chip,reg,val)   snd_vx_outl(chip, VX_##reg,val)
 270
 271 void snd_vx_delay(vx_core_t *chip, int msec);
 272
 273 static inline void vx_reset_dsp(vx_core_t *chip)
 274 {
 275         snd_assert(chip->ops->reset_dsp, return);
 276         chip->ops->reset_dsp(chip);
 277 }
 278
 279 int vx_send_msg(vx_core_t *chip, struct vx_rmh *rmh);
 280 int vx_send_msg_nolock(vx_core_t *chip, struct vx_rmh *rmh);
 281 int vx_send_rih(vx_core_t *chip, int cmd);
 282 int vx_send_rih_nolock(vx_core_t *chip, int cmd);
 283
 284 void vx_reset_codec(vx_core_t *chip, int cold_reset);
 285
 286 /*
 287  * check the bit on the specified register
 288  * returns zero if a bit matches, or a negative error code.
 289  * exported for vxpocket driver
 290  */
 291 int snd_vx_check_reg_bit(vx_core_t *chip, int reg, int mask, int bit, int time);
 292 #define vx_check_isr(chip,mask,bit,time) snd_vx_check_reg_bit(chip, VX_ISR, mask, bit, time)
 293 #define vx_wait_isr_bit(chip,bit) vx_check_isr(chip, bit, bit, 200)
 294 #define vx_wait_for_rx_full(chip) vx_wait_isr_bit(chip, ISR_RX_FULL)
 295
 296
 297 /*
 298  * pseudo-DMA transfer
 299  */
 300 inline static void vx_pseudo_dma_write(vx_core_t *chip, snd_pcm_runtime_t *runtime,
 301                                        vx_pipe_t *pipe, int count)
 302 {
 303         snd_assert(chip->ops->dma_write, return);
 304         chip->ops->dma_write(chip, runtime, pipe, count);
 305 }
 306
 307 inline static void vx_pseudo_dma_read(vx_core_t *chip, snd_pcm_runtime_t *runtime,
 308                                       vx_pipe_t *pipe, int count)
 309 {
 310         snd_assert(chip->ops->dma_read, return);
 311         chip->ops->dma_read(chip, runtime, pipe, count);
 312 }
 313
 314
 315
 316 /* error with hardware code,
 317  * the return value is -(VX_ERR_MASK | actual-hw-error-code)
 318  */
 319 #define VX_ERR_MASK     0x1000000
 320 #define vx_get_error(err)       (-(err) & ~VX_ERR_MASK)
 321
 322
 323 /*
 324  * pcm stuff
 325  */
 326 int snd_vx_pcm_new(vx_core_t *chip);
 327 void vx_pcm_update_intr(vx_core_t *chip, unsigned int events);
 328
 329 /*
 330  * mixer stuff
 331  */
 332 int snd_vx_mixer_new(vx_core_t *chip);
 333 void vx_toggle_dac_mute(vx_core_t *chip, int mute);
 334 int vx_sync_audio_source(vx_core_t *chip);
 335 int vx_set_monitor_level(vx_core_t *chip, int audio, int level, int active);
 336
 337 /*
 338  * IEC958 & clock stuff
 339  */
 340 void vx_set_iec958_status(vx_core_t *chip, unsigned int bits);
 341 int vx_set_clock(vx_core_t *chip, unsigned int freq);
 342 void vx_change_clock_source(vx_core_t *chip, int source);
 343 void vx_set_internal_clock(vx_core_t *chip, unsigned int freq);
 344 int vx_change_frequency(vx_core_t *chip);
 345
 346
 347 /*
 348  * hardware constants
 349  */
 350
 351 #define vx_has_new_dsp(chip)    ((chip)->type != VX_TYPE_BOARD)
 352 #define vx_is_pcmcia(chip)      ((chip)->type >= VX_TYPE_VXPOCKET)
 353
 354 /* audio input source */
 355 enum {
 356         VX_AUDIO_SRC_DIGITAL,
 357         VX_AUDIO_SRC_LINE,
 358         VX_AUDIO_SRC_MIC
 359 };
 360
 361 /* clock source */
 362 enum {
 363         INTERNAL_QUARTZ,
 364         UER_SYNC
 365 };
 366
 367 /* SPDIF/UER type */
 368 enum {
 369         VX_UER_MODE_CONSUMER,
 370         VX_UER_MODE_PROFESSIONAL,
 371         VX_UER_MODE_NOT_PRESENT,
 372 };
 373
 374 /* register indices */
 375 enum {
 376         VX_ICR,
 377         VX_CVR,
 378         VX_ISR,
 379         VX_IVR,
 380         VX_RXH,
 381         VX_TXH = VX_RXH,
 382         VX_RXM,
 383         VX_TXM = VX_RXM,
 384         VX_RXL,
 385         VX_TXL = VX_RXL,
 386         VX_DMA,
 387         VX_CDSP,
 388         VX_RFREQ,
 389         VX_RUER_V2,
 390         VX_GAIN,
 391         VX_DATA = VX_GAIN,
 392         VX_MEMIRQ,
 393         VX_ACQ,
 394         VX_BIT0,
 395         VX_BIT1,
 396         VX_MIC0,
 397         VX_MIC1,
 398         VX_MIC2,
 399         VX_MIC3,
 400         VX_PLX0,
 401         VX_PLX1,
 402         VX_PLX2,
 403
 404         VX_LOFREQ,  // V2: ACQ, VP: RFREQ
 405         VX_HIFREQ,  // V2: BIT0, VP: RUER_V2
 406         VX_CSUER,   // V2: BIT1, VP: BIT0
 407         VX_RUER,    // V2: RUER_V2, VP: BIT1
 408
 409         VX_REG_MAX,
 410
 411         /* aliases for VX board */
 412         VX_RESET_DMA = VX_ISR,
 413         VX_CFG = VX_RFREQ,
 414         VX_STATUS = VX_MEMIRQ,
 415         VX_SELMIC = VX_MIC0,
 416         VX_COMPOT = VX_MIC1,
 417         VX_SCOMPR = VX_MIC2,
 418         VX_GLIMIT = VX_MIC3,
 419         VX_INTCSR = VX_PLX0,
 420         VX_CNTRL = VX_PLX1,
 421         VX_GPIOC = VX_PLX2,
 422
 423         /* aliases for VXPOCKET board */
 424         VX_MICRO = VX_MEMIRQ,
 425         VX_CODEC2 = VX_MEMIRQ,
 426         VX_DIALOG = VX_ACQ,
 427
 428 };
 429
 430 /* RMH status type */
 431 enum {
 432         RMH_SSIZE_FIXED = 0,    /* status size given by the driver (in LgStat) */
 433         RMH_SSIZE_ARG = 1,      /* status size given in the LSB byte */
 434         RMH_SSIZE_MASK = 2,     /* status size given in bitmask */
 435 };
 436
 437
 438 /* bits for ICR register */
 439 #define ICR_HF1         0x10
 440 #define ICR_HF0         0x08
 441 #define ICR_TREQ        0x02    /* Interrupt mode + HREQ set on for transfer (->DSP) request */
 442 #define ICR_RREQ        0x01    /* Interrupt mode + RREQ set on for transfer (->PC) request */
 443
 444 /* bits for CVR register */
 445 #define CVR_HC          0x80
 446
 447 /* bits for ISR register */
 448 #define ISR_HF3         0x10
 449 #define ISR_HF2         0x08
 450 #define ISR_CHK         0x10
 451 #define ISR_ERR         0x08
 452 #define ISR_TX_READY    0x04
 453 #define ISR_TX_EMPTY    0x02
 454 #define ISR_RX_FULL     0x01
 455
 456 /* Constants used to access the DATA register */
 457 #define VX_DATA_CODEC_MASK      0x80
 458 #define VX_DATA_XICOR_MASK      0x80
 459
 460 /* Constants used to access the CSUER register (both for VX2 and VXP) */
 461 #define VX_SUER_FREQ_MASK               0x0c
 462 #define VX_SUER_FREQ_32KHz_MASK         0x0c
 463 #define VX_SUER_FREQ_44KHz_MASK         0x00
 464 #define VX_SUER_FREQ_48KHz_MASK         0x04
 465 #define VX_SUER_DATA_PRESENT_MASK       0x02
 466 #define VX_SUER_CLOCK_PRESENT_MASK      0x01
 467
 468 #define VX_CUER_HH_BITC_SEL_MASK        0x08
 469 #define VX_CUER_MH_BITC_SEL_MASK        0x04
 470 #define VX_CUER_ML_BITC_SEL_MASK        0x02
 471 #define VX_CUER_LL_BITC_SEL_MASK        0x01
 472
 473 #define XX_UER_CBITS_OFFSET_MASK        0x1f
 474
 475
 476 /* bits for audio_info */
 477 #define VX_AUDIO_INFO_REAL_TIME (1<<0)  /* real-time processing available */
 478 #define VX_AUDIO_INFO_OFFLINE   (1<<1)  /* offline processing available */
 479 #define VX_AUDIO_INFO_MPEG1     (1<<5)
 480 #define VX_AUDIO_INFO_MPEG2     (1<<6)
 481 #define VX_AUDIO_INFO_LINEAR_8  (1<<7)
 482 #define VX_AUDIO_INFO_LINEAR_16 (1<<8)
 483 #define VX_AUDIO_INFO_LINEAR_24 (1<<9)
 484
 485 /* DSP Interrupt Request values */
 486 #define VXP_IRQ_OFFSET          0x40 /* add 0x40 offset for vxpocket and vx222/v2 */
 487 /* call with vx_send_irq_dsp() */
 488 #define IRQ_MESS_WRITE_END          0x30
 489 #define IRQ_MESS_WRITE_NEXT         0x32
 490 #define IRQ_MESS_READ_NEXT          0x34
 491 #define IRQ_MESS_READ_END           0x36
 492 #define IRQ_MESSAGE                 0x38
 493 #define IRQ_RESET_CHK               0x3A
 494 #define IRQ_CONNECT_STREAM_NEXT     0x26
 495 #define IRQ_CONNECT_STREAM_END      0x28
 496 #define IRQ_PAUSE_START_CONNECT     0x2A
 497 #define IRQ_END_CONNECTION          0x2C
 498
 499 /* Is there async. events pending ( IT Source Test ) */
 500 #define ASYNC_EVENTS_PENDING            0x008000
 501 #define HBUFFER_EVENTS_PENDING          0x004000   // Not always accurate
 502 #define NOTIF_EVENTS_PENDING            0x002000
 503 #define TIME_CODE_EVENT_PENDING         0x001000
 504 #define FREQUENCY_CHANGE_EVENT_PENDING  0x000800
 505 #define END_OF_BUFFER_EVENTS_PENDING    0x000400
 506 #define FATAL_DSP_ERROR                 0xff0000
 507
 508 /* Stream Format Header Defines */
 509 #define HEADER_FMT_BASE                 0xFED00000
 510 #define HEADER_FMT_MONO                 0x000000C0
 511 #define HEADER_FMT_INTEL                0x00008000
 512 #define HEADER_FMT_16BITS               0x00002000
 513 #define HEADER_FMT_24BITS               0x00004000
 514 #define HEADER_FMT_UPTO11               0x00000200      /* frequency is less or equ. to 11k.*/
 515 #define HEADER_FMT_UPTO32               0x00000100      /* frequency is over 11k and less then 32k.*/
 516
 517 /* Constants used to access the Codec */
 518 #define XX_CODEC_SELECTOR               0x20
 519 /* codec commands */
 520 #define XX_CODEC_ADC_CONTROL_REGISTER   0x01
 521 #define XX_CODEC_DAC_CONTROL_REGISTER   0x02
 522 #define XX_CODEC_LEVEL_LEFT_REGISTER    0x03
 523 #define XX_CODEC_LEVEL_RIGHT_REGISTER   0x04
 524 #define XX_CODEC_PORT_MODE_REGISTER     0x05
 525 #define XX_CODEC_STATUS_REPORT_REGISTER 0x06
 526 #define XX_CODEC_CLOCK_CONTROL_REGISTER 0x07
 527
 528 /*
 529  * Audio-level control values
 530  */
 531 #define CVAL_M110DB             0x000   /* -110dB */
 532 #define CVAL_M99DB              0x02C
 533 #define CVAL_M21DB              0x163
 534 #define CVAL_M18DB              0x16F
 535 #define CVAL_M10DB              0x18F
 536 #define CVAL_0DB                0x1B7
 537 #define CVAL_18DB               0x1FF   /* +18dB */
 538 #define CVAL_MAX                0x1FF
 539
 540 #define AUDIO_IO_HAS_MUTE_LEVEL                 0x400000
 541 #define AUDIO_IO_HAS_MUTE_MONITORING_1          0x200000
 542 #define AUDIO_IO_HAS_MUTE_MONITORING_2          0x100000
 543 #define VALID_AUDIO_IO_DIGITAL_LEVEL            0x01
 544 #define VALID_AUDIO_IO_MONITORING_LEVEL         0x02
 545 #define VALID_AUDIO_IO_MUTE_LEVEL               0x04
 546 #define VALID_AUDIO_IO_MUTE_MONITORING_1        0x08
 547 #define VALID_AUDIO_IO_MUTE_MONITORING_2        0x10
 548
 549
 550 #endif /* __SOUND_VX_COMMON_H */