[PATCH] DVB core update
[linux-2.6/history.git] / drivers / net / saa9730.c
blob6954ba57f1b2ba6a93400ddcdc467d01f657de3c
1 /*
2 * Carsten Langgaard, carstenl@mips.com
3 * Copyright (C) 2000 MIPS Technologies, Inc. All rights reserved.
5 * ########################################################################
7 * This program is free software; you can distribute it and/or modify it
8 * under the terms of the GNU General Public License (Version 2) as
9 * published by the Free Software Foundation.
11 * This program is distributed in the hope it will be useful, but WITHOUT
12 * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
13 * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License
14 * for more details.
16 * You should have received a copy of the GNU General Public License along
17 * with this program; if not, write to the Free Software Foundation, Inc.,
18 * 59 Temple Place - Suite 330, Boston MA 02111-1307, USA.
20 * ########################################################################
22 * SAA9730 ethernet driver.
26 #include <linux/init.h>
27 #include <linux/netdevice.h>
28 #include <linux/delay.h>
29 #include <linux/etherdevice.h>
30 #include <linux/module.h>
31 #include <linux/skbuff.h>
32 #include <linux/pci.h>
34 #include <asm/addrspace.h>
35 #include <asm/mips-boards/prom.h>
37 #include "saa9730.h"
39 #ifdef LAN_SAA9730_DEBUG
40 int lan_saa9730_debug = LAN_SAA9730_DEBUG;
41 #else
42 int lan_saa9730_debug;
43 #endif
46 /* Non-zero only if the current card is a PCI with BIOS-set IRQ. */
47 static unsigned int pci_irq_line;
49 #define INL(a) inl((unsigned long)a)
50 #define OUTL(x,a) outl(x,(unsigned long)a)
52 static void evm_saa9730_enable_lan_int(struct lan_saa9730_private *lp)
54 OUTL(INL(&lp->evm_saa9730_regs->InterruptBlock1) | EVM_LAN_INT,
55 &lp->evm_saa9730_regs->InterruptBlock1);
56 OUTL(INL(&lp->evm_saa9730_regs->InterruptStatus1) | EVM_LAN_INT,
57 &lp->evm_saa9730_regs->InterruptStatus1);
58 OUTL(INL(&lp->evm_saa9730_regs->InterruptEnable1) | EVM_LAN_INT |
59 EVM_MASTER_EN, &lp->evm_saa9730_regs->InterruptEnable1);
61 static void evm_saa9730_disable_lan_int(struct lan_saa9730_private *lp)
63 OUTL(INL(&lp->evm_saa9730_regs->InterruptBlock1) & ~EVM_LAN_INT,
64 &lp->evm_saa9730_regs->InterruptBlock1);
65 OUTL(INL(&lp->evm_saa9730_regs->InterruptEnable1) & ~EVM_LAN_INT,
66 &lp->evm_saa9730_regs->InterruptEnable1);
69 static void evm_saa9730_clear_lan_int(struct lan_saa9730_private *lp)
71 OUTL(EVM_LAN_INT, &lp->evm_saa9730_regs->InterruptStatus1);
74 static void evm_saa9730_block_lan_int(struct lan_saa9730_private *lp)
76 OUTL(INL(&lp->evm_saa9730_regs->InterruptBlock1) & ~EVM_LAN_INT,
77 &lp->evm_saa9730_regs->InterruptBlock1);
80 static void evm_saa9730_unblock_lan_int(struct lan_saa9730_private *lp)
82 OUTL(INL(&lp->evm_saa9730_regs->InterruptBlock1) | EVM_LAN_INT,
83 &lp->evm_saa9730_regs->InterruptBlock1);
86 static void show_saa9730_regs(struct lan_saa9730_private *lp)
88 int i, j;
89 printk("TxmBufferA = %x\n", lp->TxmBuffer[0][0]);
90 printk("TxmBufferB = %x\n", lp->TxmBuffer[1][0]);
91 printk("RcvBufferA = %x\n", lp->RcvBuffer[0][0]);
92 printk("RcvBufferB = %x\n", lp->RcvBuffer[1][0]);
93 for (i = 0; i < LAN_SAA9730_BUFFERS; i++) {
94 for (j = 0; j < LAN_SAA9730_TXM_Q_SIZE; j++) {
95 printk("TxmBuffer[%d][%d] = %x\n", i, j,
96 le32_to_cpu(*(unsigned int *)
97 lp->TxmBuffer[i][j]));
100 for (i = 0; i < LAN_SAA9730_BUFFERS; i++) {
101 for (j = 0; j < LAN_SAA9730_RCV_Q_SIZE; j++) {
102 printk("RcvBuffer[%d][%d] = %x\n", i, j,
103 le32_to_cpu(*(unsigned int *)
104 lp->RcvBuffer[i][j]));
107 printk("lp->evm_saa9730_regs->InterruptBlock1 = %x\n",
108 INL(&lp->evm_saa9730_regs->InterruptBlock1));
109 printk("lp->evm_saa9730_regs->InterruptStatus1 = %x\n",
110 INL(&lp->evm_saa9730_regs->InterruptStatus1));
111 printk("lp->evm_saa9730_regs->InterruptEnable1 = %x\n",
112 INL(&lp->evm_saa9730_regs->InterruptEnable1));
113 printk("lp->lan_saa9730_regs->Ok2Use = %x\n",
114 INL(&lp->lan_saa9730_regs->Ok2Use));
115 printk("lp->NextTxmBufferIndex = %x\n", lp->NextTxmBufferIndex);
116 printk("lp->NextTxmPacketIndex = %x\n", lp->NextTxmPacketIndex);
117 printk("lp->PendingTxmBufferIndex = %x\n",
118 lp->PendingTxmBufferIndex);
119 printk("lp->PendingTxmPacketIndex = %x\n",
120 lp->PendingTxmPacketIndex);
121 printk("lp->lan_saa9730_regs->LanDmaCtl = %x\n",
122 INL(&lp->lan_saa9730_regs->LanDmaCtl));
123 printk("lp->lan_saa9730_regs->DmaStatus = %x\n",
124 INL(&lp->lan_saa9730_regs->DmaStatus));
125 printk("lp->lan_saa9730_regs->CamCtl = %x\n",
126 INL(&lp->lan_saa9730_regs->CamCtl));
127 printk("lp->lan_saa9730_regs->TxCtl = %x\n",
128 INL(&lp->lan_saa9730_regs->TxCtl));
129 printk("lp->lan_saa9730_regs->TxStatus = %x\n",
130 INL(&lp->lan_saa9730_regs->TxStatus));
131 printk("lp->lan_saa9730_regs->RxCtl = %x\n",
132 INL(&lp->lan_saa9730_regs->RxCtl));
133 printk("lp->lan_saa9730_regs->RxStatus = %x\n",
134 INL(&lp->lan_saa9730_regs->RxStatus));
135 for (i = 0; i < LAN_SAA9730_CAM_DWORDS; i++) {
136 OUTL(i, &lp->lan_saa9730_regs->CamAddress);
137 printk("lp->lan_saa9730_regs->CamData = %x\n",
138 INL(&lp->lan_saa9730_regs->CamData));
140 printk("lp->stats.tx_packets = %lx\n", lp->stats.tx_packets);
141 printk("lp->stats.tx_errors = %lx\n", lp->stats.tx_errors);
142 printk("lp->stats.tx_aborted_errors = %lx\n",
143 lp->stats.tx_aborted_errors);
144 printk("lp->stats.tx_window_errors = %lx\n",
145 lp->stats.tx_window_errors);
146 printk("lp->stats.tx_carrier_errors = %lx\n",
147 lp->stats.tx_carrier_errors);
148 printk("lp->stats.tx_fifo_errors = %lx\n",
149 lp->stats.tx_fifo_errors);
150 printk("lp->stats.tx_heartbeat_errors = %lx\n",
151 lp->stats.tx_heartbeat_errors);
152 printk("lp->stats.collisions = %lx\n", lp->stats.collisions);
154 printk("lp->stats.rx_packets = %lx\n", lp->stats.rx_packets);
155 printk("lp->stats.rx_errors = %lx\n", lp->stats.rx_errors);
156 printk("lp->stats.rx_dropped = %lx\n", lp->stats.rx_dropped);
157 printk("lp->stats.rx_crc_errors = %lx\n", lp->stats.rx_crc_errors);
158 printk("lp->stats.rx_frame_errors = %lx\n",
159 lp->stats.rx_frame_errors);
160 printk("lp->stats.rx_fifo_errors = %lx\n",
161 lp->stats.rx_fifo_errors);
162 printk("lp->stats.rx_length_errors = %lx\n",
163 lp->stats.rx_length_errors);
165 printk("lp->lan_saa9730_regs->DebugPCIMasterAddr = %x\n",
166 INL(&lp->lan_saa9730_regs->DebugPCIMasterAddr));
167 printk("lp->lan_saa9730_regs->DebugLanTxStateMachine = %x\n",
168 INL(&lp->lan_saa9730_regs->DebugLanTxStateMachine));
169 printk("lp->lan_saa9730_regs->DebugLanRxStateMachine = %x\n",
170 INL(&lp->lan_saa9730_regs->DebugLanRxStateMachine));
171 printk("lp->lan_saa9730_regs->DebugLanTxFifoPointers = %x\n",
172 INL(&lp->lan_saa9730_regs->DebugLanTxFifoPointers));
173 printk("lp->lan_saa9730_regs->DebugLanRxFifoPointers = %x\n",
174 INL(&lp->lan_saa9730_regs->DebugLanRxFifoPointers));
175 printk("lp->lan_saa9730_regs->DebugLanCtlStateMachine = %x\n",
176 INL(&lp->lan_saa9730_regs->DebugLanCtlStateMachine));
179 static void lan_saa9730_buffer_init(struct lan_saa9730_private *lp)
181 int i, j;
183 /* Init RX buffers */
184 for (i = 0; i < LAN_SAA9730_BUFFERS; i++) {
185 for (j = 0; j < LAN_SAA9730_RCV_Q_SIZE; j++) {
186 *(unsigned int *) lp->RcvBuffer[i][j] =
187 cpu_to_le32(RXSF_READY <<
188 RX_STAT_CTL_OWNER_SHF);
192 /* Init TX buffers */
193 for (i = 0; i < LAN_SAA9730_BUFFERS; i++) {
194 for (j = 0; j < LAN_SAA9730_TXM_Q_SIZE; j++) {
195 *(unsigned int *) lp->TxmBuffer[i][j] =
196 cpu_to_le32(TXSF_EMPTY <<
197 TX_STAT_CTL_OWNER_SHF);
202 static int lan_saa9730_allocate_buffers(struct lan_saa9730_private *lp)
204 unsigned int mem_size;
205 void *Pa;
206 unsigned int i, j, RcvBufferSize, TxmBufferSize;
207 unsigned int buffer_start;
210 * Allocate all RX and TX packets in one chunk.
211 * The Rx and Tx packets must be PACKET_SIZE aligned.
213 mem_size = ((LAN_SAA9730_RCV_Q_SIZE + LAN_SAA9730_TXM_Q_SIZE) *
214 LAN_SAA9730_PACKET_SIZE * LAN_SAA9730_BUFFERS) +
215 LAN_SAA9730_PACKET_SIZE;
216 buffer_start =
217 (unsigned int) kmalloc(mem_size, GFP_DMA | GFP_KERNEL);
220 * Set DMA buffer to kseg1 (uncached).
221 * Make sure to flush before using it uncached.
223 Pa = (void *) KSEG1ADDR((buffer_start + LAN_SAA9730_PACKET_SIZE) &
224 ~(LAN_SAA9730_PACKET_SIZE - 1));
225 dma_cache_wback_inv((unsigned long) Pa, mem_size);
227 /* Initialize buffer space */
228 RcvBufferSize = LAN_SAA9730_PACKET_SIZE;
229 TxmBufferSize = LAN_SAA9730_PACKET_SIZE;
230 lp->DmaRcvPackets = LAN_SAA9730_RCV_Q_SIZE;
231 lp->DmaTxmPackets = LAN_SAA9730_TXM_Q_SIZE;
233 /* Init RX buffers */
234 for (i = 0; i < LAN_SAA9730_BUFFERS; i++) {
235 for (j = 0; j < LAN_SAA9730_RCV_Q_SIZE; j++) {
236 *(unsigned int *) Pa =
237 cpu_to_le32(RXSF_READY <<
238 RX_STAT_CTL_OWNER_SHF);
239 lp->RcvBuffer[i][j] = (unsigned int) Pa;
240 Pa += RcvBufferSize;
244 /* Init TX buffers */
245 for (i = 0; i < LAN_SAA9730_BUFFERS; i++) {
246 for (j = 0; j < LAN_SAA9730_TXM_Q_SIZE; j++) {
247 *(unsigned int *) Pa =
248 cpu_to_le32(TXSF_EMPTY <<
249 TX_STAT_CTL_OWNER_SHF);
250 lp->TxmBuffer[i][j] = (unsigned int) Pa;
251 Pa += TxmBufferSize;
256 * Set rx buffer A and rx buffer B to point to the first two buffer
257 * spaces.
259 OUTL(PHYSADDR(lp->RcvBuffer[0][0]),
260 &lp->lan_saa9730_regs->RxBuffA);
261 OUTL(PHYSADDR(lp->RcvBuffer[1][0]),
262 &lp->lan_saa9730_regs->RxBuffB);
264 /* Initialize Buffer Index */
265 lp->NextRcvPacketIndex = 0;
266 lp->NextRcvToUseIsA = 1;
268 /* Set current buffer index & next availble packet index */
269 lp->NextTxmPacketIndex = 0;
270 lp->NextTxmBufferIndex = 0;
271 lp->PendingTxmPacketIndex = 0;
272 lp->PendingTxmBufferIndex = 0;
275 * Set txm_buf_a and txm_buf_b to point to the first two buffer
276 * space
278 OUTL(PHYSADDR(lp->TxmBuffer[0][0]),
279 &lp->lan_saa9730_regs->TxBuffA);
280 OUTL(PHYSADDR(lp->TxmBuffer[1][0]),
281 &lp->lan_saa9730_regs->TxBuffB);
283 /* Set packet number */
284 OUTL((lp->DmaRcvPackets << PK_COUNT_RX_A_SHF) |
285 (lp->DmaRcvPackets << PK_COUNT_RX_B_SHF) |
286 (lp->DmaTxmPackets << PK_COUNT_TX_A_SHF) |
287 (lp->DmaTxmPackets << PK_COUNT_TX_B_SHF),
288 &lp->lan_saa9730_regs->PacketCount);
290 return 0;
293 static int lan_saa9730_cam_load(struct lan_saa9730_private *lp)
295 unsigned int i;
296 unsigned char *NetworkAddress;
298 NetworkAddress = (unsigned char *) &lp->PhysicalAddress[0][0];
300 for (i = 0; i < LAN_SAA9730_CAM_DWORDS; i++) {
301 /* First set address to where data is written */
302 OUTL(i, &lp->lan_saa9730_regs->CamAddress);
303 OUTL((NetworkAddress[0] << 24) | (NetworkAddress[1] << 16)
304 | (NetworkAddress[2] << 8) | NetworkAddress[3],
305 &lp->lan_saa9730_regs->CamData);
306 NetworkAddress += 4;
308 return 0;
311 static int lan_saa9730_cam_init(struct net_device *dev)
313 struct lan_saa9730_private *lp =
314 (struct lan_saa9730_private *) dev->priv;
315 unsigned int i;
317 /* Copy MAC-address into all entries. */
318 for (i = 0; i < LAN_SAA9730_CAM_ENTRIES; i++) {
319 memcpy((unsigned char *) lp->PhysicalAddress[i],
320 (unsigned char *) dev->dev_addr, 6);
323 return 0;
326 static int lan_saa9730_mii_init(struct lan_saa9730_private *lp)
328 int i, l;
330 /* Check link status, spin here till station is not busy. */
331 i = 0;
332 while (INL(&lp->lan_saa9730_regs->StationMgmtCtl) & MD_CA_BUSY) {
333 i++;
334 if (i > 100) {
335 printk("Error: lan_saa9730_mii_init: timeout\n");
336 return -1;
338 mdelay(1); /* wait 1 ms. */
341 /* Now set the control and address register. */
342 OUTL(MD_CA_BUSY | PHY_STATUS | PHY_ADDRESS << MD_CA_PHY_SHF,
343 &lp->lan_saa9730_regs->StationMgmtCtl);
345 /* check link status, spin here till station is not busy */
346 i = 0;
347 while (INL(&lp->lan_saa9730_regs->StationMgmtCtl) & MD_CA_BUSY) {
348 i++;
349 if (i > 100) {
350 printk("Error: lan_saa9730_mii_init: timeout\n");
351 return -1;
353 mdelay(1); /* wait 1 ms. */
356 /* Wait for 1 ms. */
357 mdelay(1);
359 /* Check the link status. */
360 if (INL(&lp->lan_saa9730_regs->StationMgmtData) &
361 PHY_STATUS_LINK_UP) {
362 /* Link is up. */
363 return 0;
364 } else {
365 /* Link is down, reset the PHY first. */
367 /* set PHY address = 'CONTROL' */
368 OUTL(PHY_ADDRESS << MD_CA_PHY_SHF | MD_CA_WR | PHY_CONTROL,
369 &lp->lan_saa9730_regs->StationMgmtCtl);
371 /* Wait for 1 ms. */
372 mdelay(1);
374 /* set 'CONTROL' = force reset and renegotiate */
375 OUTL(PHY_CONTROL_RESET | PHY_CONTROL_AUTO_NEG |
376 PHY_CONTROL_RESTART_AUTO_NEG,
377 &lp->lan_saa9730_regs->StationMgmtData);
379 /* Wait for 50 ms. */
380 mdelay(50);
382 /* set 'BUSY' to start operation */
383 OUTL(MD_CA_BUSY | PHY_ADDRESS << MD_CA_PHY_SHF | MD_CA_WR |
384 PHY_CONTROL, &lp->lan_saa9730_regs->StationMgmtCtl);
386 /* await completion */
387 i = 0;
388 while (INL(&lp->lan_saa9730_regs->StationMgmtCtl) &
389 MD_CA_BUSY) {
390 i++;
391 if (i > 100) {
392 printk
393 ("Error: lan_saa9730_mii_init: timeout\n");
394 return -1;
396 mdelay(1); /* wait 1 ms. */
399 /* Wait for 1 ms. */
400 mdelay(1);
402 for (l = 0; l < 2; l++) {
403 /* set PHY address = 'STATUS' */
404 OUTL(MD_CA_BUSY | PHY_ADDRESS << MD_CA_PHY_SHF |
405 PHY_STATUS,
406 &lp->lan_saa9730_regs->StationMgmtCtl);
408 /* await completion */
409 i = 0;
410 while (INL(&lp->lan_saa9730_regs->StationMgmtCtl) &
411 MD_CA_BUSY) {
412 i++;
413 if (i > 100) {
414 printk
415 ("Error: lan_saa9730_mii_init: timeout\n");
416 return -1;
418 mdelay(1); /* wait 1 ms. */
421 /* wait for 3 sec. */
422 mdelay(3000);
424 /* check the link status */
425 if (INL(&lp->lan_saa9730_regs->StationMgmtData) &
426 PHY_STATUS_LINK_UP) {
427 /* link is up */
428 break;
433 return 0;
436 static int lan_saa9730_control_init(struct lan_saa9730_private *lp)
438 /* Initialize DMA control register. */
439 OUTL((LANMB_ANY << DMA_CTL_MAX_XFER_SHF) |
440 (LANEND_LITTLE << DMA_CTL_ENDIAN_SHF) |
441 (LAN_SAA9730_RCV_Q_INT_THRESHOLD << DMA_CTL_RX_INT_COUNT_SHF)
442 | DMA_CTL_RX_INT_TO_EN | DMA_CTL_RX_INT_EN |
443 DMA_CTL_MAC_RX_INT_EN | DMA_CTL_MAC_TX_INT_EN,
444 &lp->lan_saa9730_regs->LanDmaCtl);
446 /* Initial MAC control register. */
447 OUTL((MACCM_MII << MAC_CONTROL_CONN_SHF) | MAC_CONTROL_FULL_DUP,
448 &lp->lan_saa9730_regs->MacCtl);
450 /* Initialize CAM control register. */
451 OUTL(CAM_CONTROL_COMP_EN | CAM_CONTROL_BROAD_ACC,
452 &lp->lan_saa9730_regs->CamCtl);
455 * Initialize CAM enable register, only turn on first entry, should
456 * contain own addr.
458 OUTL(0x0001, &lp->lan_saa9730_regs->CamEnable);
460 /* Initialize Tx control register */
461 OUTL(TX_CTL_EN_COMP, &lp->lan_saa9730_regs->TxCtl);
463 /* Initialize Rcv control register */
464 OUTL(RX_CTL_STRIP_CRC, &lp->lan_saa9730_regs->RxCtl);
466 /* Reset DMA engine */
467 OUTL(DMA_TEST_SW_RESET, &lp->lan_saa9730_regs->DmaTest);
469 return 0;
472 static int lan_saa9730_stop(struct lan_saa9730_private *lp)
474 int i;
476 /* Stop DMA first */
477 OUTL(INL(&lp->lan_saa9730_regs->LanDmaCtl) &
478 ~(DMA_CTL_EN_TX_DMA | DMA_CTL_EN_RX_DMA),
479 &lp->lan_saa9730_regs->LanDmaCtl);
481 /* Set the SW Reset bits in DMA and MAC control registers */
482 OUTL(DMA_TEST_SW_RESET, &lp->lan_saa9730_regs->DmaTest);
483 OUTL(INL(&lp->lan_saa9730_regs->MacCtl) | MAC_CONTROL_RESET,
484 &lp->lan_saa9730_regs->MacCtl);
487 * Wait for MAC reset to have finished. The reset bit is auto cleared
488 * when the reset is done.
490 i = 0;
491 while (INL(&lp->lan_saa9730_regs->MacCtl) & MAC_CONTROL_RESET) {
492 i++;
493 if (i > 100) {
494 printk
495 ("Error: lan_sa9730_stop: MAC reset timeout\n");
496 return -1;
498 mdelay(1); /* wait 1 ms. */
501 return 0;
504 static int lan_saa9730_dma_init(struct lan_saa9730_private *lp)
506 /* Stop lan controller. */
507 lan_saa9730_stop(lp);
509 OUTL(LAN_SAA9730_DEFAULT_TIME_OUT_CNT,
510 &lp->lan_saa9730_regs->Timeout);
512 return 0;
515 static int lan_saa9730_start(struct lan_saa9730_private *lp)
517 lan_saa9730_buffer_init(lp);
519 /* Initialize Rx Buffer Index */
520 lp->NextRcvPacketIndex = 0;
521 lp->NextRcvToUseIsA = 1;
523 /* Set current buffer index & next availble packet index */
524 lp->NextTxmPacketIndex = 0;
525 lp->NextTxmBufferIndex = 0;
526 lp->PendingTxmPacketIndex = 0;
527 lp->PendingTxmBufferIndex = 0;
529 OUTL(INL(&lp->lan_saa9730_regs->LanDmaCtl) | DMA_CTL_EN_TX_DMA |
530 DMA_CTL_EN_RX_DMA, &lp->lan_saa9730_regs->LanDmaCtl);
532 /* For Tx, turn on MAC then DMA */
533 OUTL(INL(&lp->lan_saa9730_regs->TxCtl) | TX_CTL_TX_EN,
534 &lp->lan_saa9730_regs->TxCtl);
536 /* For Rx, turn on DMA then MAC */
537 OUTL(INL(&lp->lan_saa9730_regs->RxCtl) | RX_CTL_RX_EN,
538 &lp->lan_saa9730_regs->RxCtl);
540 /* Set Ok2Use to let hardware owns the buffers */
541 OUTL(OK2USE_RX_A | OK2USE_RX_B | OK2USE_TX_A | OK2USE_TX_B,
542 &lp->lan_saa9730_regs->Ok2Use);
544 return 0;
547 static int lan_saa9730_restart(struct lan_saa9730_private *lp)
549 lan_saa9730_stop(lp);
550 lan_saa9730_start(lp);
552 return 0;
555 static int lan_saa9730_tx(struct net_device *dev)
557 struct lan_saa9730_private *lp =
558 (struct lan_saa9730_private *) dev->priv;
559 unsigned int *pPacket;
560 unsigned int tx_status;
562 if (lan_saa9730_debug > 5)
563 printk("lan_saa9730_tx interrupt\n");
565 /* Clear interrupt. */
566 OUTL(DMA_STATUS_MAC_TX_INT, &lp->lan_saa9730_regs->DmaStatus);
568 while (1) {
569 pPacket =
570 (unsigned int *) lp->TxmBuffer[lp->
571 PendingTxmBufferIndex]
572 [lp->PendingTxmPacketIndex];
574 /* Get status of first packet transmitted. */
575 tx_status = le32_to_cpu(*pPacket);
577 /* Check ownership. */
578 if ((tx_status & TX_STAT_CTL_OWNER_MSK) !=
579 (TXSF_HWDONE << TX_STAT_CTL_OWNER_SHF)) break;
581 /* Check for error. */
582 if (tx_status & TX_STAT_CTL_ERROR_MSK) {
583 if (lan_saa9730_debug > 1)
584 printk("lan_saa9730_tx: tx error = %x\n",
585 tx_status);
587 lp->stats.tx_errors++;
588 if (tx_status &
589 (TX_STATUS_EX_COLL << TX_STAT_CTL_STATUS_SHF))
590 lp->stats.tx_aborted_errors++;
591 if (tx_status &
592 (TX_STATUS_LATE_COLL <<
593 TX_STAT_CTL_STATUS_SHF)) lp->stats.
594 tx_window_errors++;
595 if (tx_status &
596 (TX_STATUS_L_CARR << TX_STAT_CTL_STATUS_SHF))
597 lp->stats.tx_carrier_errors++;
598 if (tx_status &
599 (TX_STATUS_UNDER << TX_STAT_CTL_STATUS_SHF))
600 lp->stats.tx_fifo_errors++;
601 if (tx_status &
602 (TX_STATUS_SQ_ERR << TX_STAT_CTL_STATUS_SHF))
603 lp->stats.tx_heartbeat_errors++;
605 lp->stats.collisions +=
606 tx_status & TX_STATUS_TX_COLL_MSK;
609 /* Free buffer. */
610 *pPacket =
611 cpu_to_le32(TXSF_EMPTY << TX_STAT_CTL_OWNER_SHF);
613 /* Update pending index pointer. */
614 lp->PendingTxmPacketIndex++;
615 if (lp->PendingTxmPacketIndex >= LAN_SAA9730_TXM_Q_SIZE) {
616 lp->PendingTxmPacketIndex = 0;
617 lp->PendingTxmBufferIndex ^= 1;
621 /* Make sure A and B are available to hardware. */
622 OUTL(OK2USE_TX_A | OK2USE_TX_B, &lp->lan_saa9730_regs->Ok2Use);
624 if (netif_queue_stopped(dev)) {
625 /* The tx buffer is no longer full. */
626 netif_wake_queue(dev);
629 return 0;
632 static int lan_saa9730_rx(struct net_device *dev)
634 struct lan_saa9730_private *lp =
635 (struct lan_saa9730_private *) dev->priv;
636 int len = 0;
637 struct sk_buff *skb = 0;
638 unsigned int rx_status;
639 int BufferIndex;
640 int PacketIndex;
641 unsigned int *pPacket;
642 unsigned char *pData;
644 if (lan_saa9730_debug > 5)
645 printk("lan_saa9730_rx interrupt\n");
647 /* Clear receive interrupts. */
648 OUTL(DMA_STATUS_MAC_RX_INT | DMA_STATUS_RX_INT |
649 DMA_STATUS_RX_TO_INT, &lp->lan_saa9730_regs->DmaStatus);
651 /* Address next packet */
652 if (lp->NextRcvToUseIsA)
653 BufferIndex = 0;
654 else
655 BufferIndex = 1;
656 PacketIndex = lp->NextRcvPacketIndex;
657 pPacket = (unsigned int *) lp->RcvBuffer[BufferIndex][PacketIndex];
658 rx_status = le32_to_cpu(*pPacket);
660 /* Process each packet. */
661 while ((rx_status & RX_STAT_CTL_OWNER_MSK) ==
662 (RXSF_HWDONE << RX_STAT_CTL_OWNER_SHF)) {
663 /* Check the rx status. */
664 if (rx_status & (RX_STATUS_GOOD << RX_STAT_CTL_STATUS_SHF)) {
665 /* Received packet is good. */
666 len = (rx_status & RX_STAT_CTL_LENGTH_MSK) >>
667 RX_STAT_CTL_LENGTH_SHF;
669 pData = (unsigned char *) pPacket;
670 pData += 4;
671 skb = dev_alloc_skb(len + 2);
672 if (skb == 0) {
673 printk
674 ("%s: Memory squeeze, deferring packet.\n",
675 dev->name);
676 lp->stats.rx_dropped++;
677 } else {
678 lp->stats.rx_bytes += len;
679 lp->stats.rx_packets++;
680 skb->dev = dev;
681 skb_reserve(skb, 2); /* 16 byte align */
682 skb_put(skb, len); /* make room */
683 eth_copy_and_sum(skb,
684 (unsigned char *) pData,
685 len, 0);
686 skb->protocol = eth_type_trans(skb, dev);
687 netif_rx(skb);
688 dev->last_rx = jiffies;
690 } else {
691 /* We got an error packet. */
692 if (lan_saa9730_debug > 2)
693 printk
694 ("lan_saa9730_rx: We got an error packet = %x\n",
695 rx_status);
697 lp->stats.rx_errors++;
698 if (rx_status &
699 (RX_STATUS_CRC_ERR << RX_STAT_CTL_STATUS_SHF))
700 lp->stats.rx_crc_errors++;
701 if (rx_status &
702 (RX_STATUS_ALIGN_ERR <<
703 RX_STAT_CTL_STATUS_SHF)) lp->stats.
704 rx_frame_errors++;
705 if (rx_status &
706 (RX_STATUS_OVERFLOW << RX_STAT_CTL_STATUS_SHF))
707 lp->stats.rx_fifo_errors++;
708 if (rx_status &
709 (RX_STATUS_LONG_ERR << RX_STAT_CTL_STATUS_SHF))
710 lp->stats.rx_length_errors++;
713 /* Indicate we have processed the buffer. */
714 *pPacket =
715 cpu_to_le32(RXSF_READY << RX_STAT_CTL_OWNER_SHF);
717 /* Go to next packet in sequence. */
718 lp->NextRcvPacketIndex++;
719 if (lp->NextRcvPacketIndex >= LAN_SAA9730_RCV_Q_SIZE) {
720 lp->NextRcvPacketIndex = 0;
721 if (BufferIndex) {
722 lp->NextRcvToUseIsA = 1;
723 } else {
724 lp->NextRcvToUseIsA = 0;
727 OUTL(OK2USE_RX_A | OK2USE_RX_B,
728 &lp->lan_saa9730_regs->Ok2Use);
730 /* Address next packet */
731 if (lp->NextRcvToUseIsA)
732 BufferIndex = 0;
733 else
734 BufferIndex = 1;
735 PacketIndex = lp->NextRcvPacketIndex;
736 pPacket =
737 (unsigned int *) lp->
738 RcvBuffer[BufferIndex][PacketIndex];
739 rx_status = le32_to_cpu(*pPacket);
742 /* Make sure A and B are available to hardware. */
743 OUTL(OK2USE_RX_A | OK2USE_RX_B, &lp->lan_saa9730_regs->Ok2Use);
745 return 0;
748 static irqreturn_t lan_saa9730_interrupt(const int irq, void *dev_id,
749 struct pt_regs *regs)
751 struct net_device *dev = (struct net_device *) dev_id;
752 struct lan_saa9730_private *lp =
753 (struct lan_saa9730_private *) dev->priv;
755 if (lan_saa9730_debug > 5)
756 printk("lan_saa9730_interrupt\n");
758 /* Disable the EVM LAN interrupt. */
759 evm_saa9730_block_lan_int(lp);
761 /* Clear the EVM LAN interrupt. */
762 evm_saa9730_clear_lan_int(lp);
764 /* Service pending transmit interrupts. */
765 if (INL(&lp->lan_saa9730_regs->DmaStatus) & DMA_STATUS_MAC_TX_INT)
766 lan_saa9730_tx(dev);
768 /* Service pending receive interrupts. */
769 if (INL(&lp->lan_saa9730_regs->DmaStatus) &
770 (DMA_STATUS_MAC_RX_INT | DMA_STATUS_RX_INT |
771 DMA_STATUS_RX_TO_INT)) lan_saa9730_rx(dev);
773 /* Enable the EVM LAN interrupt. */
774 evm_saa9730_unblock_lan_int(lp);
776 return IRQ_HANDLED;
779 static int lan_saa9730_open_fail(struct net_device *dev)
781 return -ENODEV;
784 static int lan_saa9730_open(struct net_device *dev)
786 struct lan_saa9730_private *lp =
787 (struct lan_saa9730_private *) dev->priv;
789 /* Associate IRQ with lan_saa9730_interrupt */
790 if (request_irq(dev->irq, &lan_saa9730_interrupt, 0, "SAA9730 Eth",
791 dev)) {
792 printk("lan_saa9730_open: Can't get irq %d\n", dev->irq);
793 return -EAGAIN;
796 /* Enable the Lan interrupt in the event manager. */
797 evm_saa9730_enable_lan_int(lp);
799 /* Start the LAN controller */
800 if (lan_saa9730_start(lp))
801 return -1;
803 netif_start_queue(dev);
805 return 0;
808 static int lan_saa9730_write(struct lan_saa9730_private *lp,
809 struct sk_buff *skb, int skblen)
811 unsigned char *pbData = skb->data;
812 unsigned int len = skblen;
813 unsigned char *pbPacketData;
814 unsigned int tx_status;
815 int BufferIndex;
816 int PacketIndex;
818 if (lan_saa9730_debug > 5)
819 printk("lan_saa9730_write: skb=%08x\n",
820 (unsigned int) skb);
822 BufferIndex = lp->NextTxmBufferIndex;
823 PacketIndex = lp->NextTxmPacketIndex;
825 tx_status =
826 le32_to_cpu(*(unsigned int *) lp->
827 TxmBuffer[BufferIndex][PacketIndex]);
828 if ((tx_status & TX_STAT_CTL_OWNER_MSK) !=
829 (TXSF_EMPTY << TX_STAT_CTL_OWNER_SHF)) {
830 if (lan_saa9730_debug > 4)
831 printk
832 ("lan_saa9730_write: Tx buffer not available: tx_status = %x\n",
833 tx_status);
834 return -1;
837 lp->NextTxmPacketIndex++;
838 if (lp->NextTxmPacketIndex >= LAN_SAA9730_TXM_Q_SIZE) {
839 lp->NextTxmPacketIndex = 0;
840 lp->NextTxmBufferIndex ^= 1;
843 pbPacketData =
844 (unsigned char *) lp->TxmBuffer[BufferIndex][PacketIndex];
845 pbPacketData += 4;
847 /* copy the bits */
848 memcpy(pbPacketData, pbData, len);
850 /* Set transmit status for hardware */
851 *(unsigned int *) lp->TxmBuffer[BufferIndex][PacketIndex] =
852 cpu_to_le32((TXSF_READY << TX_STAT_CTL_OWNER_SHF) |
853 (TX_STAT_CTL_INT_AFTER_TX << TX_STAT_CTL_FRAME_SHF)
854 | (len << TX_STAT_CTL_LENGTH_SHF));
856 /* Set hardware tx buffer. */
857 OUTL(OK2USE_TX_A | OK2USE_TX_B, &lp->lan_saa9730_regs->Ok2Use);
859 return 0;
862 static void lan_saa9730_tx_timeout(struct net_device *dev)
864 struct lan_saa9730_private *lp =
865 (struct lan_saa9730_private *) dev->priv;
867 /* Transmitter timeout, serious problems */
868 lp->stats.tx_errors++;
869 printk("%s: transmit timed out, reset\n", dev->name);
870 /*show_saa9730_regs(lp); */
871 lan_saa9730_restart(lp);
873 dev->trans_start = jiffies;
874 netif_start_queue(dev);
877 static int lan_saa9730_start_xmit(struct sk_buff *skb,
878 struct net_device *dev)
880 struct lan_saa9730_private *lp =
881 (struct lan_saa9730_private *) dev->priv;
882 unsigned long flags;
883 int skblen;
884 int len;
886 if (lan_saa9730_debug > 4)
887 printk("Send packet: skb=%08x\n", (unsigned int) skb);
889 skblen = skb->len;
890 save_and_cli(flags);
891 len = (skblen <= ETH_ZLEN) ? ETH_ZLEN : skblen;
893 if (lan_saa9730_write(lp, skb, skblen)) {
894 restore_flags(flags);
895 printk
896 ("Error when writing packet to controller: skb=%08x\n",
897 (unsigned int) skb);
898 netif_stop_queue(dev);
899 return -1;
902 lp->stats.tx_bytes += len;
903 lp->stats.tx_packets++;
905 dev->trans_start = jiffies;
906 netif_start_queue(dev);
907 dev_kfree_skb(skb);
909 restore_flags(flags);
911 return 0;
914 static int lan_saa9730_close(struct net_device *dev)
916 struct lan_saa9730_private *lp =
917 (struct lan_saa9730_private *) dev->priv;
919 if (lan_saa9730_debug > 1)
920 printk("lan_saa9730_close:\n");
922 netif_stop_queue(dev);
924 /* Disable the Lan interrupt in the event manager. */
925 evm_saa9730_disable_lan_int(lp);
927 /* Stop the controller */
928 if (lan_saa9730_stop(lp))
929 return -1;
931 free_irq(dev->irq, (void *) dev);
933 return 0;
936 static struct net_device_stats *lan_saa9730_get_stats(struct net_device
937 *dev)
939 struct lan_saa9730_private *lp =
940 (struct lan_saa9730_private *) dev->priv;
942 return &lp->stats;
945 static void lan_saa9730_set_multicast(struct net_device *dev)
947 struct lan_saa9730_private *lp =
948 (struct lan_saa9730_private *) dev->priv;
950 /* Stop the controller */
951 lan_saa9730_stop(lp);
953 if (dev->flags & IFF_PROMISC) {
954 /* accept all packets */
955 OUTL(CAM_CONTROL_COMP_EN | CAM_CONTROL_STATION_ACC |
956 CAM_CONTROL_GROUP_ACC | CAM_CONTROL_BROAD_ACC,
957 &lp->lan_saa9730_regs->CamCtl);
958 } else {
959 if (dev->flags & IFF_ALLMULTI) {
960 /* accept all multicast packets */
961 OUTL(CAM_CONTROL_COMP_EN | CAM_CONTROL_GROUP_ACC |
962 CAM_CONTROL_BROAD_ACC,
963 &lp->lan_saa9730_regs->CamCtl);
964 } else {
966 * Will handle the multicast stuff later. -carstenl
971 lan_saa9730_restart(lp);
974 static int lan_saa9730_init(struct net_device *dev, int ioaddr, int irq)
976 struct lan_saa9730_private *lp;
977 unsigned char ethernet_addr[6];
979 dev = init_etherdev(dev, 0);
981 dev->open = lan_saa9730_open_fail;
982 if (get_ethernet_addr(ethernet_addr))
983 return -1;
985 memcpy(dev->dev_addr, ethernet_addr, 6);
986 dev->base_addr = ioaddr;
987 dev->irq = irq;
990 * Make certain the data structures used by the controller are aligned
991 * and DMAble.
993 lp = (struct lan_saa9730_private *) (((unsigned long)
994 kmalloc(sizeof(*lp) + 7,
995 GFP_DMA | GFP_KERNEL)
996 + 7) & ~7);
998 dev->priv = lp;
999 memset(lp, 0, sizeof(*lp));
1001 /* Set SAA9730 LAN base address. */
1002 lp->lan_saa9730_regs = (t_lan_saa9730_regmap *) (ioaddr +
1003 SAA9730_LAN_REGS_ADDR);
1005 /* Set SAA9730 EVM base address. */
1006 lp->evm_saa9730_regs = (t_evm_saa9730_regmap *) (ioaddr +
1007 SAA9730_EVM_REGS_ADDR);
1009 /* Allocate LAN RX/TX frame buffer space. */
1010 if (lan_saa9730_allocate_buffers(lp))
1011 return -1;
1013 /* Stop LAN controller. */
1014 if (lan_saa9730_stop(lp))
1015 return -1;
1017 /* Initialize CAM registers. */
1018 if (lan_saa9730_cam_init(dev))
1019 return -1;
1021 /* Initialize MII registers. */
1022 if (lan_saa9730_mii_init(lp))
1023 return -1;
1025 /* Initialize control registers. */
1026 if (lan_saa9730_control_init(lp))
1027 return -1;
1029 /* Load CAM registers. */
1030 if (lan_saa9730_cam_load(lp))
1031 return -1;
1033 /* Initialize DMA context registers. */
1034 if (lan_saa9730_dma_init(lp))
1035 return -1;
1037 dev->open = lan_saa9730_open;
1038 dev->hard_start_xmit = lan_saa9730_start_xmit;
1039 dev->stop = lan_saa9730_close;
1040 dev->get_stats = lan_saa9730_get_stats;
1041 dev->set_multicast_list = lan_saa9730_set_multicast;
1042 dev->tx_timeout = lan_saa9730_tx_timeout;
1043 dev->watchdog_timeo = (HZ >> 1);
1044 dev->dma = 0;
1046 return 0;
1050 static int __init saa9730_probe(void)
1052 struct net_device *dev = NULL;
1053 struct pci_dev *pdev = NULL;
1055 if (lan_saa9730_debug > 1)
1056 printk
1057 ("saa9730.c: PCI bios is present, checking for devices...\n");
1059 while ((pdev = pci_find_device(PCI_VENDOR_ID_PHILIPS,
1060 PCI_DEVICE_ID_PHILIPS_SAA9730,
1061 pdev))) {
1062 unsigned int pci_ioaddr;
1064 pci_irq_line = pdev->irq;
1065 /* LAN base address in located at BAR 1. */
1067 pci_ioaddr = pci_resource_start(pdev, 1);
1068 pci_set_master(pdev);
1070 printk("Found SAA9730 (PCI) at %#x, irq %d.\n",
1071 pci_ioaddr, pci_irq_line);
1072 if (!lan_saa9730_init
1073 (dev, pci_ioaddr, pci_irq_line))
1074 return 0;
1075 else
1076 printk("Lan init failed.\n");
1079 return -ENODEV;
1082 module_init(saa9730_probe);
1083 MODULE_LICENSE("GPL");