ARM: omap: update GPIO chained IRQ handler to use entry/exit functions
[linux-2.6/cjktty.git] / drivers / scsi / gvp11.h
blob852913cde5dd9a5b5bdf43722d76613ef68c12d2
1 #ifndef GVP11_H
3 /* $Id: gvp11.h,v 1.4 1997/01/19 23:07:12 davem Exp $
5 * Header file for the GVP Series II SCSI controller for Linux
7 * Written and (C) 1993, Ralf Baechle, see gvp11.c for more info
8 * based on a2091.h (C) 1993 by Hamish Macdonald
12 #include <linux/types.h>
14 #ifndef CMD_PER_LUN
15 #define CMD_PER_LUN 2
16 #endif
18 #ifndef CAN_QUEUE
19 #define CAN_QUEUE 16
20 #endif
23 * if the transfer address ANDed with this results in a non-zero
24 * result, then we can't use DMA.
26 #define GVP11_XFER_MASK (0xff000001)
28 struct gvp11_scsiregs {
29 unsigned char pad1[64];
30 volatile unsigned short CNTR;
31 unsigned char pad2[31];
32 volatile unsigned char SASR;
33 unsigned char pad3;
34 volatile unsigned char SCMD;
35 unsigned char pad4[4];
36 volatile unsigned short BANK;
37 unsigned char pad5[6];
38 volatile unsigned long ACR;
39 volatile unsigned short secret1; /* store 0 here */
40 volatile unsigned short ST_DMA;
41 volatile unsigned short SP_DMA;
42 volatile unsigned short secret2; /* store 1 here */
43 volatile unsigned short secret3; /* store 15 here */
46 /* bits in CNTR */
47 #define GVP11_DMAC_BUSY (1<<0)
48 #define GVP11_DMAC_INT_PENDING (1<<1)
49 #define GVP11_DMAC_INT_ENABLE (1<<3)
50 #define GVP11_DMAC_DIR_WRITE (1<<4)
52 #endif /* GVP11_H */