sparc32: Implement hard_smp_processor_id() via instruction patching.
[linux-2.6/cjktty.git] / arch / sparc / include / asm / smp_32.h
blobf5b325e731dd5754eaee4d8c7e90e81033b03c1e
1 /* smp.h: Sparc specific SMP stuff.
3 * Copyright (C) 1996 David S. Miller (davem@caip.rutgers.edu)
4 */
6 #ifndef _SPARC_SMP_H
7 #define _SPARC_SMP_H
9 #include <linux/threads.h>
10 #include <asm/head.h>
11 #include <asm/btfixup.h>
13 #ifndef __ASSEMBLY__
15 #include <linux/cpumask.h>
17 #endif /* __ASSEMBLY__ */
19 #ifdef CONFIG_SMP
21 #ifndef __ASSEMBLY__
23 #include <asm/ptrace.h>
24 #include <asm/asi.h>
25 #include <linux/atomic.h>
28 * Private routines/data
31 extern unsigned char boot_cpu_id;
32 extern volatile unsigned long cpu_callin_map[NR_CPUS];
33 extern cpumask_t smp_commenced_mask;
34 extern struct linux_prom_registers smp_penguin_ctable;
36 typedef void (*smpfunc_t)(unsigned long, unsigned long, unsigned long,
37 unsigned long, unsigned long);
39 void cpu_panic(void);
40 extern void smp4m_irq_rotate(int cpu);
43 * General functions that each host system must provide.
46 void sun4m_init_smp(void);
47 void sun4d_init_smp(void);
49 void smp_callin(void);
50 void smp_boot_cpus(void);
51 void smp_store_cpu_info(int);
53 void smp_resched_interrupt(void);
54 void smp_call_function_single_interrupt(void);
55 void smp_call_function_interrupt(void);
57 struct seq_file;
58 void smp_bogo(struct seq_file *);
59 void smp_info(struct seq_file *);
61 BTFIXUPDEF_CALL(void, smp_cross_call, smpfunc_t, cpumask_t, unsigned long, unsigned long, unsigned long, unsigned long)
62 BTFIXUPDEF_CALL(void, smp_ipi_resched, int);
63 BTFIXUPDEF_CALL(void, smp_ipi_single, int);
64 BTFIXUPDEF_CALL(void, smp_ipi_mask_one, int);
66 #define smp_cross_call(func,mask,arg1,arg2,arg3,arg4) BTFIXUP_CALL(smp_cross_call)(func,mask,arg1,arg2,arg3,arg4)
68 static inline void xc0(smpfunc_t func) { smp_cross_call(func, *cpu_online_mask, 0, 0, 0, 0); }
69 static inline void xc1(smpfunc_t func, unsigned long arg1)
70 { smp_cross_call(func, *cpu_online_mask, arg1, 0, 0, 0); }
71 static inline void xc2(smpfunc_t func, unsigned long arg1, unsigned long arg2)
72 { smp_cross_call(func, *cpu_online_mask, arg1, arg2, 0, 0); }
73 static inline void xc3(smpfunc_t func, unsigned long arg1, unsigned long arg2,
74 unsigned long arg3)
75 { smp_cross_call(func, *cpu_online_mask, arg1, arg2, arg3, 0); }
76 static inline void xc4(smpfunc_t func, unsigned long arg1, unsigned long arg2,
77 unsigned long arg3, unsigned long arg4)
78 { smp_cross_call(func, *cpu_online_mask, arg1, arg2, arg3, arg4); }
80 extern void arch_send_call_function_single_ipi(int cpu);
81 extern void arch_send_call_function_ipi_mask(const struct cpumask *mask);
83 static inline int cpu_logical_map(int cpu)
85 return cpu;
88 static inline int hard_smp4m_processor_id(void)
90 int cpuid;
92 __asm__ __volatile__("rd %%tbr, %0\n\t"
93 "srl %0, 12, %0\n\t"
94 "and %0, 3, %0\n\t" :
95 "=&r" (cpuid));
96 return cpuid;
99 static inline int hard_smp4d_processor_id(void)
101 int cpuid;
103 __asm__ __volatile__("lda [%%g0] %1, %0\n\t" :
104 "=&r" (cpuid) : "i" (ASI_M_VIKING_TMP1));
105 return cpuid;
108 extern inline int hard_smpleon_processor_id(void)
110 int cpuid;
111 __asm__ __volatile__("rd %%asr17,%0\n\t"
112 "srl %0,28,%0" :
113 "=&r" (cpuid) : );
114 return cpuid;
117 extern int hard_smp_processor_id(void);
119 #define raw_smp_processor_id() (current_thread_info()->cpu)
121 #define prof_multiplier(__cpu) cpu_data(__cpu).multiplier
122 #define prof_counter(__cpu) cpu_data(__cpu).counter
124 void smp_setup_cpu_possible_map(void);
126 #endif /* !(__ASSEMBLY__) */
128 /* Sparc specific messages. */
129 #define MSG_CROSS_CALL 0x0005 /* run func on cpus */
131 /* Empirical PROM processor mailbox constants. If the per-cpu mailbox
132 * contains something other than one of these then the ipi is from
133 * Linux's active_kernel_processor. This facility exists so that
134 * the boot monitor can capture all the other cpus when one catches
135 * a watchdog reset or the user enters the monitor using L1-A keys.
137 #define MBOX_STOPCPU 0xFB
138 #define MBOX_IDLECPU 0xFC
139 #define MBOX_IDLECPU2 0xFD
140 #define MBOX_STOPCPU2 0xFE
142 #else /* SMP */
144 #define hard_smp_processor_id() 0
145 #define smp_setup_cpu_possible_map() do { } while (0)
147 #endif /* !(SMP) */
148 #endif /* !(_SPARC_SMP_H) */