2 * CAN bus driver for the alone generic (as possible as) MSCAN controller.
4 * Copyright (C) 2005-2006 Andrey Volkov <avolkov@varma-el.com>,
6 * Copyright (C) 2008-2009 Wolfgang Grandegger <wg@grandegger.com>
7 * Copytight (C) 2008-2009 Pengutronix <kernel@pengutronix.de>
9 * This program is free software; you can redistribute it and/or modify
10 * it under the terms of the version 2 of the GNU General Public License
11 * as published by the Free Software Foundation
13 * This program is distributed in the hope that it will be useful,
14 * but WITHOUT ANY WARRANTY; without even the implied warranty of
15 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
16 * GNU General Public License for more details.
18 * You should have received a copy of the GNU General Public License
19 * along with this program; if not, write to the Free Software
20 * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
23 #include <linux/kernel.h>
24 #include <linux/module.h>
25 #include <linux/interrupt.h>
26 #include <linux/delay.h>
27 #include <linux/netdevice.h>
28 #include <linux/if_arp.h>
29 #include <linux/if_ether.h>
30 #include <linux/list.h>
31 #include <linux/can.h>
32 #include <linux/can/dev.h>
33 #include <linux/can/error.h>
38 #define MSCAN_NORMAL_MODE 0
39 #define MSCAN_SLEEP_MODE MSCAN_SLPRQ
40 #define MSCAN_INIT_MODE (MSCAN_INITRQ | MSCAN_SLPRQ)
41 #define MSCAN_POWEROFF_MODE (MSCAN_CSWAI | MSCAN_SLPRQ)
42 #define MSCAN_SET_MODE_RETRIES 255
43 #define MSCAN_ECHO_SKB_MAX 3
45 #define BTR0_BRP_MASK 0x3f
46 #define BTR0_SJW_SHIFT 6
47 #define BTR0_SJW_MASK (0x3 << BTR0_SJW_SHIFT)
49 #define BTR1_TSEG1_MASK 0xf
50 #define BTR1_TSEG2_SHIFT 4
51 #define BTR1_TSEG2_MASK (0x7 << BTR1_TSEG2_SHIFT)
52 #define BTR1_SAM_SHIFT 7
54 #define BTR0_SET_BRP(brp) (((brp) - 1) & BTR0_BRP_MASK)
55 #define BTR0_SET_SJW(sjw) ((((sjw) - 1) << BTR0_SJW_SHIFT) & \
58 #define BTR1_SET_TSEG1(tseg1) (((tseg1) - 1) & BTR1_TSEG1_MASK)
59 #define BTR1_SET_TSEG2(tseg2) ((((tseg2) - 1) << BTR1_TSEG2_SHIFT) & \
61 #define BTR1_SET_SAM(sam) ((sam) ? 1 << BTR1_SAM_SHIFT : 0)
63 static struct can_bittiming_const mscan_bittiming_const
= {
81 #define F_RX_PROGRESS 0
82 #define F_TX_PROGRESS 1
83 #define F_TX_WAIT_ALL 2
85 static enum can_state state_map
[] = {
86 CAN_STATE_ERROR_ACTIVE
,
87 CAN_STATE_ERROR_WARNING
,
88 CAN_STATE_ERROR_PASSIVE
,
92 static int mscan_set_mode(struct net_device
*dev
, u8 mode
)
94 struct mscan_priv
*priv
= netdev_priv(dev
);
95 struct mscan_regs
*regs
= (struct mscan_regs
*)priv
->reg_base
;
100 if (mode
!= MSCAN_NORMAL_MODE
) {
102 if (priv
->tx_active
) {
103 /* Abort transfers before going to sleep */#
104 out_8(®s
->cantarq
, priv
->tx_active
);
105 /* Suppress TX done interrupts */
106 out_8(®s
->cantier
, 0);
109 canctl1
= in_8(®s
->canctl1
);
110 if ((mode
& MSCAN_SLPRQ
) && (canctl1
& MSCAN_SLPAK
) == 0) {
111 out_8(®s
->canctl0
,
112 in_8(®s
->canctl0
) | MSCAN_SLPRQ
);
113 for (i
= 0; i
< MSCAN_SET_MODE_RETRIES
; i
++) {
114 if (in_8(®s
->canctl1
) & MSCAN_SLPAK
)
119 * The mscan controller will fail to enter sleep mode,
120 * while there are irregular activities on bus, like
121 * somebody keeps retransmitting. This behavior is
122 * undocumented and seems to differ between mscan built
123 * in mpc5200b and mpc5200. We proceed in that case,
124 * since otherwise the slprq will be kept set and the
125 * controller will get stuck. NOTE: INITRQ or CSWAI
126 * will abort all active transmit actions, if still
129 if (i
>= MSCAN_SET_MODE_RETRIES
)
130 dev_dbg(dev
->dev
.parent
,
131 "device failed to enter sleep mode. "
132 "We proceed anyhow.\n");
134 priv
->can
.state
= CAN_STATE_SLEEPING
;
137 if ((mode
& MSCAN_INITRQ
) && (canctl1
& MSCAN_INITAK
) == 0) {
138 out_8(®s
->canctl0
,
139 in_8(®s
->canctl0
) | MSCAN_INITRQ
);
140 for (i
= 0; i
< MSCAN_SET_MODE_RETRIES
; i
++) {
141 if (in_8(®s
->canctl1
) & MSCAN_INITAK
)
144 if (i
>= MSCAN_SET_MODE_RETRIES
)
148 priv
->can
.state
= CAN_STATE_STOPPED
;
150 if (mode
& MSCAN_CSWAI
)
151 out_8(®s
->canctl0
,
152 in_8(®s
->canctl0
) | MSCAN_CSWAI
);
155 canctl1
= in_8(®s
->canctl1
);
156 if (canctl1
& (MSCAN_SLPAK
| MSCAN_INITAK
)) {
157 out_8(®s
->canctl0
, in_8(®s
->canctl0
) &
158 ~(MSCAN_SLPRQ
| MSCAN_INITRQ
));
159 for (i
= 0; i
< MSCAN_SET_MODE_RETRIES
; i
++) {
160 canctl1
= in_8(®s
->canctl1
);
161 if (!(canctl1
& (MSCAN_INITAK
| MSCAN_SLPAK
)))
164 if (i
>= MSCAN_SET_MODE_RETRIES
)
167 priv
->can
.state
= CAN_STATE_ERROR_ACTIVE
;
173 static int mscan_start(struct net_device
*dev
)
175 struct mscan_priv
*priv
= netdev_priv(dev
);
176 struct mscan_regs
*regs
= (struct mscan_regs
*)priv
->reg_base
;
180 out_8(®s
->canrier
, 0);
182 INIT_LIST_HEAD(&priv
->tx_head
);
183 priv
->prev_buf_id
= 0;
186 priv
->shadow_canrier
= 0;
189 err
= mscan_set_mode(dev
, MSCAN_NORMAL_MODE
);
193 canrflg
= in_8(®s
->canrflg
);
194 priv
->shadow_statflg
= canrflg
& MSCAN_STAT_MSK
;
195 priv
->can
.state
= state_map
[max(MSCAN_STATE_RX(canrflg
),
196 MSCAN_STATE_TX(canrflg
))];
197 out_8(®s
->cantier
, 0);
199 /* Enable receive interrupts. */
200 out_8(®s
->canrier
, MSCAN_OVRIE
| MSCAN_RXFIE
| MSCAN_CSCIE
|
201 MSCAN_RSTATE1
| MSCAN_RSTATE0
| MSCAN_TSTATE1
| MSCAN_TSTATE0
);
206 static netdev_tx_t
mscan_start_xmit(struct sk_buff
*skb
, struct net_device
*dev
)
208 struct can_frame
*frame
= (struct can_frame
*)skb
->data
;
209 struct mscan_priv
*priv
= netdev_priv(dev
);
210 struct mscan_regs
*regs
= (struct mscan_regs
*)priv
->reg_base
;
214 if (frame
->can_dlc
> 8)
217 out_8(®s
->cantier
, 0);
219 i
= ~priv
->tx_active
& MSCAN_TXE
;
221 switch (hweight8(i
)) {
223 netif_stop_queue(dev
);
224 dev_err(dev
->dev
.parent
, "Tx Ring full when queue awake!\n");
225 return NETDEV_TX_BUSY
;
228 * if buf_id < 3, then current frame will be send out of order,
229 * since buffer with lower id have higher priority (hell..)
231 netif_stop_queue(dev
);
233 if (buf_id
< priv
->prev_buf_id
) {
235 if (priv
->cur_pri
== 0xff) {
236 set_bit(F_TX_WAIT_ALL
, &priv
->flags
);
237 netif_stop_queue(dev
);
240 set_bit(F_TX_PROGRESS
, &priv
->flags
);
243 priv
->prev_buf_id
= buf_id
;
244 out_8(®s
->cantbsel
, i
);
246 rtr
= frame
->can_id
& CAN_RTR_FLAG
;
248 if (frame
->can_id
& CAN_EFF_FLAG
) {
249 can_id
= (frame
->can_id
& CAN_EFF_MASK
) << 1;
252 out_be16(®s
->tx
.idr3_2
, can_id
);
255 can_id
= (can_id
& 0x7) | ((can_id
<< 2) & 0xffe0) | (3 << 3);
257 can_id
= (frame
->can_id
& CAN_SFF_MASK
) << 5;
261 out_be16(®s
->tx
.idr1_0
, can_id
);
264 void __iomem
*data
= ®s
->tx
.dsr1_0
;
265 u16
*payload
= (u16
*) frame
->data
;
266 /* It is safe to write into dsr[dlc+1] */
267 for (i
= 0; i
< (frame
->can_dlc
+ 1) / 2; i
++) {
268 out_be16(data
, *payload
++);
269 data
+= 2 + _MSCAN_RESERVED_DSR_SIZE
;
273 out_8(®s
->tx
.dlr
, frame
->can_dlc
);
274 out_8(®s
->tx
.tbpr
, priv
->cur_pri
);
276 /* Start transmission. */
277 out_8(®s
->cantflg
, 1 << buf_id
);
279 if (!test_bit(F_TX_PROGRESS
, &priv
->flags
))
280 dev
->trans_start
= jiffies
;
282 list_add_tail(&priv
->tx_queue
[buf_id
].list
, &priv
->tx_head
);
284 can_put_echo_skb(skb
, dev
, buf_id
);
286 /* Enable interrupt. */
287 priv
->tx_active
|= 1 << buf_id
;
288 out_8(®s
->cantier
, priv
->tx_active
);
293 /* This function returns the old state to see where we came from */
294 static enum can_state
check_set_state(struct net_device
*dev
, u8 canrflg
)
296 struct mscan_priv
*priv
= netdev_priv(dev
);
297 enum can_state state
, old_state
= priv
->can
.state
;
299 if (canrflg
& MSCAN_CSCIF
&& old_state
<= CAN_STATE_BUS_OFF
) {
300 state
= state_map
[max(MSCAN_STATE_RX(canrflg
),
301 MSCAN_STATE_TX(canrflg
))];
302 priv
->can
.state
= state
;
307 static void mscan_get_rx_frame(struct net_device
*dev
, struct can_frame
*frame
)
309 struct mscan_priv
*priv
= netdev_priv(dev
);
310 struct mscan_regs
*regs
= (struct mscan_regs
*)priv
->reg_base
;
314 can_id
= in_be16(®s
->rx
.idr1_0
);
315 if (can_id
& (1 << 3)) {
316 frame
->can_id
= CAN_EFF_FLAG
;
317 can_id
= ((can_id
<< 16) | in_be16(®s
->rx
.idr3_2
));
318 can_id
= ((can_id
& 0xffe00000) |
319 ((can_id
& 0x7ffff) << 2)) >> 2;
325 frame
->can_id
|= can_id
>> 1;
327 frame
->can_id
|= CAN_RTR_FLAG
;
328 frame
->can_dlc
= in_8(®s
->rx
.dlr
) & 0xf;
330 if (!(frame
->can_id
& CAN_RTR_FLAG
)) {
331 void __iomem
*data
= ®s
->rx
.dsr1_0
;
332 u16
*payload
= (u16
*) frame
->data
;
333 for (i
= 0; i
< (frame
->can_dlc
+ 1) / 2; i
++) {
334 *payload
++ = in_be16(data
);
335 data
+= 2 + _MSCAN_RESERVED_DSR_SIZE
;
339 out_8(®s
->canrflg
, MSCAN_RXF
);
342 static void mscan_get_err_frame(struct net_device
*dev
, struct can_frame
*frame
,
345 struct mscan_priv
*priv
= netdev_priv(dev
);
346 struct mscan_regs
*regs
= (struct mscan_regs
*)priv
->reg_base
;
347 struct net_device_stats
*stats
= &dev
->stats
;
348 enum can_state old_state
;
350 dev_dbg(dev
->dev
.parent
, "error interrupt (canrflg=%#x)\n", canrflg
);
351 frame
->can_id
= CAN_ERR_FLAG
;
353 if (canrflg
& MSCAN_OVRIF
) {
354 frame
->can_id
|= CAN_ERR_CRTL
;
355 frame
->data
[1] = CAN_ERR_CRTL_RX_OVERFLOW
;
356 stats
->rx_over_errors
++;
361 old_state
= check_set_state(dev
, canrflg
);
363 if (old_state
!= priv
->can
.state
) {
364 switch (priv
->can
.state
) {
365 case CAN_STATE_ERROR_WARNING
:
366 frame
->can_id
|= CAN_ERR_CRTL
;
367 priv
->can
.can_stats
.error_warning
++;
368 if ((priv
->shadow_statflg
& MSCAN_RSTAT_MSK
) <
369 (canrflg
& MSCAN_RSTAT_MSK
))
370 frame
->data
[1] |= CAN_ERR_CRTL_RX_WARNING
;
372 if ((priv
->shadow_statflg
& MSCAN_TSTAT_MSK
) <
373 (canrflg
& MSCAN_TSTAT_MSK
))
374 frame
->data
[1] |= CAN_ERR_CRTL_TX_WARNING
;
376 case CAN_STATE_ERROR_PASSIVE
:
377 frame
->can_id
|= CAN_ERR_CRTL
;
378 priv
->can
.can_stats
.error_passive
++;
379 frame
->data
[1] |= CAN_ERR_CRTL_RX_PASSIVE
;
381 case CAN_STATE_BUS_OFF
:
382 frame
->can_id
|= CAN_ERR_BUSOFF
;
384 * The MSCAN on the MPC5200 does recover from bus-off
385 * automatically. To avoid that we stop the chip doing
386 * a light-weight stop (we are in irq-context).
388 out_8(®s
->cantier
, 0);
389 out_8(®s
->canrier
, 0);
390 out_8(®s
->canctl0
, in_8(®s
->canctl0
) |
391 MSCAN_SLPRQ
| MSCAN_INITRQ
);
398 priv
->shadow_statflg
= canrflg
& MSCAN_STAT_MSK
;
399 frame
->can_dlc
= CAN_ERR_DLC
;
400 out_8(®s
->canrflg
, MSCAN_ERR_IF
);
403 static int mscan_rx_poll(struct napi_struct
*napi
, int quota
)
405 struct mscan_priv
*priv
= container_of(napi
, struct mscan_priv
, napi
);
406 struct net_device
*dev
= napi
->dev
;
407 struct mscan_regs
*regs
= (struct mscan_regs
*)priv
->reg_base
;
408 struct net_device_stats
*stats
= &dev
->stats
;
412 struct can_frame
*frame
;
415 while (npackets
< quota
&& ((canrflg
= in_8(®s
->canrflg
)) &
416 (MSCAN_RXF
| MSCAN_ERR_IF
))) {
418 skb
= alloc_can_skb(dev
, &frame
);
420 if (printk_ratelimit())
421 dev_notice(dev
->dev
.parent
, "packet dropped\n");
423 out_8(®s
->canrflg
, canrflg
);
427 if (canrflg
& MSCAN_RXF
)
428 mscan_get_rx_frame(dev
, frame
);
429 else if (canrflg
& MSCAN_ERR_IF
)
430 mscan_get_err_frame(dev
, frame
, canrflg
);
433 stats
->rx_bytes
+= frame
->can_dlc
;
435 netif_receive_skb(skb
);
438 if (!(in_8(®s
->canrflg
) & (MSCAN_RXF
| MSCAN_ERR_IF
))) {
439 napi_complete(&priv
->napi
);
440 clear_bit(F_RX_PROGRESS
, &priv
->flags
);
441 if (priv
->can
.state
< CAN_STATE_BUS_OFF
)
442 out_8(®s
->canrier
, priv
->shadow_canrier
);
448 static irqreturn_t
mscan_isr(int irq
, void *dev_id
)
450 struct net_device
*dev
= (struct net_device
*)dev_id
;
451 struct mscan_priv
*priv
= netdev_priv(dev
);
452 struct mscan_regs
*regs
= (struct mscan_regs
*)priv
->reg_base
;
453 struct net_device_stats
*stats
= &dev
->stats
;
454 u8 cantier
, cantflg
, canrflg
;
455 irqreturn_t ret
= IRQ_NONE
;
457 cantier
= in_8(®s
->cantier
) & MSCAN_TXE
;
458 cantflg
= in_8(®s
->cantflg
) & cantier
;
460 if (cantier
&& cantflg
) {
462 struct list_head
*tmp
, *pos
;
464 list_for_each_safe(pos
, tmp
, &priv
->tx_head
) {
465 struct tx_queue_entry
*entry
=
466 list_entry(pos
, struct tx_queue_entry
, list
);
467 u8 mask
= entry
->mask
;
469 if (!(cantflg
& mask
))
472 out_8(®s
->cantbsel
, mask
);
473 stats
->tx_bytes
+= in_8(®s
->tx
.dlr
);
475 can_get_echo_skb(dev
, entry
->id
);
476 priv
->tx_active
&= ~mask
;
480 if (list_empty(&priv
->tx_head
)) {
481 clear_bit(F_TX_WAIT_ALL
, &priv
->flags
);
482 clear_bit(F_TX_PROGRESS
, &priv
->flags
);
485 dev
->trans_start
= jiffies
;
487 if (!test_bit(F_TX_WAIT_ALL
, &priv
->flags
))
488 netif_wake_queue(dev
);
490 out_8(®s
->cantier
, priv
->tx_active
);
494 canrflg
= in_8(®s
->canrflg
);
495 if ((canrflg
& ~MSCAN_STAT_MSK
) &&
496 !test_and_set_bit(F_RX_PROGRESS
, &priv
->flags
)) {
497 if (canrflg
& ~MSCAN_STAT_MSK
) {
498 priv
->shadow_canrier
= in_8(®s
->canrier
);
499 out_8(®s
->canrier
, 0);
500 napi_schedule(&priv
->napi
);
503 clear_bit(F_RX_PROGRESS
, &priv
->flags
);
508 static int mscan_do_set_mode(struct net_device
*dev
, enum can_mode mode
)
511 struct mscan_priv
*priv
= netdev_priv(dev
);
514 if (!priv
->open_time
)
520 netif_stop_queue(dev
);
523 CAN_MODE_STOP
) ? MSCAN_INIT_MODE
:
527 if (priv
->can
.state
<= CAN_STATE_BUS_OFF
)
528 mscan_set_mode(dev
, MSCAN_INIT_MODE
);
529 ret
= mscan_start(dev
);
532 if (netif_queue_stopped(dev
))
533 netif_wake_queue(dev
);
543 static int mscan_do_set_bittiming(struct net_device
*dev
)
545 struct mscan_priv
*priv
= netdev_priv(dev
);
546 struct mscan_regs
*regs
= (struct mscan_regs
*)priv
->reg_base
;
547 struct can_bittiming
*bt
= &priv
->can
.bittiming
;
550 btr0
= BTR0_SET_BRP(bt
->brp
) | BTR0_SET_SJW(bt
->sjw
);
551 btr1
= (BTR1_SET_TSEG1(bt
->prop_seg
+ bt
->phase_seg1
) |
552 BTR1_SET_TSEG2(bt
->phase_seg2
) |
553 BTR1_SET_SAM(priv
->can
.ctrlmode
& CAN_CTRLMODE_3_SAMPLES
));
555 dev_info(dev
->dev
.parent
, "setting BTR0=0x%02x BTR1=0x%02x\n",
558 out_8(®s
->canbtr0
, btr0
);
559 out_8(®s
->canbtr1
, btr1
);
564 static int mscan_open(struct net_device
*dev
)
567 struct mscan_priv
*priv
= netdev_priv(dev
);
568 struct mscan_regs
*regs
= (struct mscan_regs
*)priv
->reg_base
;
571 ret
= open_candev(dev
);
575 napi_enable(&priv
->napi
);
577 ret
= request_irq(dev
->irq
, mscan_isr
, 0, dev
->name
, dev
);
579 napi_disable(&priv
->napi
);
580 printk(KERN_ERR
"%s - failed to attach interrupt\n",
585 priv
->open_time
= jiffies
;
587 out_8(®s
->canctl1
, in_8(®s
->canctl1
) & ~MSCAN_LISTEN
);
589 ret
= mscan_start(dev
);
593 netif_start_queue(dev
);
598 static int mscan_close(struct net_device
*dev
)
600 struct mscan_priv
*priv
= netdev_priv(dev
);
601 struct mscan_regs
*regs
= (struct mscan_regs
*)priv
->reg_base
;
603 netif_stop_queue(dev
);
604 napi_disable(&priv
->napi
);
606 out_8(®s
->cantier
, 0);
607 out_8(®s
->canrier
, 0);
608 mscan_set_mode(dev
, MSCAN_INIT_MODE
);
610 free_irq(dev
->irq
, dev
);
616 static const struct net_device_ops mscan_netdev_ops
= {
617 .ndo_open
= mscan_open
,
618 .ndo_stop
= mscan_close
,
619 .ndo_start_xmit
= mscan_start_xmit
,
622 int register_mscandev(struct net_device
*dev
, int clock_src
)
624 struct mscan_priv
*priv
= netdev_priv(dev
);
625 struct mscan_regs
*regs
= (struct mscan_regs
*)priv
->reg_base
;
628 ctl1
= in_8(®s
->canctl1
);
630 ctl1
|= MSCAN_CLKSRC
;
632 ctl1
&= ~MSCAN_CLKSRC
;
635 out_8(®s
->canctl1
, ctl1
);
638 /* acceptance mask/acceptance code (accept everything) */
639 out_be16(®s
->canidar1_0
, 0);
640 out_be16(®s
->canidar3_2
, 0);
641 out_be16(®s
->canidar5_4
, 0);
642 out_be16(®s
->canidar7_6
, 0);
644 out_be16(®s
->canidmr1_0
, 0xffff);
645 out_be16(®s
->canidmr3_2
, 0xffff);
646 out_be16(®s
->canidmr5_4
, 0xffff);
647 out_be16(®s
->canidmr7_6
, 0xffff);
648 /* Two 32 bit Acceptance Filters */
649 out_8(®s
->canidac
, MSCAN_AF_32BIT
);
651 mscan_set_mode(dev
, MSCAN_INIT_MODE
);
653 return register_candev(dev
);
655 EXPORT_SYMBOL_GPL(register_mscandev
);
657 void unregister_mscandev(struct net_device
*dev
)
659 struct mscan_priv
*priv
= netdev_priv(dev
);
660 struct mscan_regs
*regs
= (struct mscan_regs
*)priv
->reg_base
;
661 mscan_set_mode(dev
, MSCAN_INIT_MODE
);
662 out_8(®s
->canctl1
, in_8(®s
->canctl1
) & ~MSCAN_CANE
);
663 unregister_candev(dev
);
665 EXPORT_SYMBOL_GPL(unregister_mscandev
);
667 struct net_device
*alloc_mscandev(void)
669 struct net_device
*dev
;
670 struct mscan_priv
*priv
;
673 dev
= alloc_candev(sizeof(struct mscan_priv
), MSCAN_ECHO_SKB_MAX
);
676 priv
= netdev_priv(dev
);
678 dev
->netdev_ops
= &mscan_netdev_ops
;
680 dev
->flags
|= IFF_ECHO
; /* we support local echo */
682 netif_napi_add(dev
, &priv
->napi
, mscan_rx_poll
, 8);
684 priv
->can
.bittiming_const
= &mscan_bittiming_const
;
685 priv
->can
.do_set_bittiming
= mscan_do_set_bittiming
;
686 priv
->can
.do_set_mode
= mscan_do_set_mode
;
688 for (i
= 0; i
< TX_QUEUE_SIZE
; i
++) {
689 priv
->tx_queue
[i
].id
= i
;
690 priv
->tx_queue
[i
].mask
= 1 << i
;
695 EXPORT_SYMBOL_GPL(alloc_mscandev
);
697 MODULE_AUTHOR("Andrey Volkov <avolkov@varma-el.com>");
698 MODULE_LICENSE("GPL v2");
699 MODULE_DESCRIPTION("CAN port driver for a MSCAN based chips");