drivers/staging/msm/mdp_dma_s.c

   1 /* Copyright (c) 2008-2009, Code Aurora Forum. All rights reserved.
   2  *
   3  * This program is free software; you can redistribute it and/or modify
   4  * it under the terms of the GNU General Public License version 2 and
   5  * only version 2 as published by the Free Software Foundation.
   6  *
   7  * This program is distributed in the hope that it will be useful,
   8  * but WITHOUT ANY WARRANTY; without even the implied warranty of
   9  * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
  10  * GNU General Public License for more details.
  11  *
  12  * You should have received a copy of the GNU General Public License
  13  * along with this program; if not, write to the Free Software
  14  * Foundation, Inc., 51 Franklin Street, Fifth Floor, Boston, MA
  15  * 02110-1301, USA.
  16  */
  17
  18 #include <linux/module.h>
  19 #include <linux/kernel.h>
  20 #include <linux/sched.h>
  21 #include <linux/time.h>
  22 #include <linux/init.h>
  23 #include <linux/interrupt.h>
  24 #include <linux/hrtimer.h>
  25
  26 #include <mach/hardware.h>
  27 #include <linux/io.h>
  28
  29 #include <asm/system.h>
  30 #include <asm/mach-types.h>
  31 #include <linux/semaphore.h>
  32 #include <linux/spinlock.h>
  33
  34 #include <linux/fb.h>
  35
  36 #include "mdp.h"
  37 #include "msm_fb.h"
  38
  39 static void mdp_dma_s_update_lcd(struct msm_fb_data_type *mfd)
  40 {
  41         MDPIBUF *iBuf = &mfd->ibuf;
  42         int mddi_dest = FALSE;
  43         uint32 outBpp = iBuf->bpp;
  44         uint32 dma_s_cfg_reg;
  45         uint8 *src;
  46         struct msm_fb_panel_data *pdata =
  47             (struct msm_fb_panel_data *)mfd->pdev->dev.platform_data;
  48
  49         dma_s_cfg_reg = DMA_PACK_TIGHT | DMA_PACK_ALIGN_LSB |
  50             DMA_OUT_SEL_AHB | DMA_IBUF_NONCONTIGUOUS;
  51
  52         if (mfd->fb_imgType == MDP_BGR_565)
  53                 dma_s_cfg_reg |= DMA_PACK_PATTERN_BGR;
  54         else
  55                 dma_s_cfg_reg |= DMA_PACK_PATTERN_RGB;
  56
  57         if (outBpp == 4)
  58                 dma_s_cfg_reg |= DMA_IBUF_C3ALPHA_EN;
  59
  60         if (outBpp == 2)
  61                 dma_s_cfg_reg |= DMA_IBUF_FORMAT_RGB565;
  62
  63         if (mfd->panel_info.pdest != DISPLAY_2) {
  64                 printk(KERN_ERR "error: non-secondary type through dma_s!\n");
  65                 return;
  66         }
  67
  68         if (mfd->panel_info.type == MDDI_PANEL) {
  69                 dma_s_cfg_reg |= DMA_OUT_SEL_MDDI;
  70                 mddi_dest = TRUE;
  71         } else {
  72                 dma_s_cfg_reg |= DMA_AHBM_LCD_SEL_SECONDARY;
  73                 outp32(MDP_EBI2_LCD1, mfd->data_port_phys);
  74         }
  75
  76         dma_s_cfg_reg |= DMA_DITHER_EN;
  77
  78         src = (uint8 *) iBuf->buf;
  79         /* starting input address */
  80         src += (iBuf->dma_x + iBuf->dma_y * iBuf->ibuf_width) * outBpp;
  81
  82         /* MDP cmd block enable */
  83         mdp_pipe_ctrl(MDP_CMD_BLOCK, MDP_BLOCK_POWER_ON, FALSE);
  84         /* PIXELSIZE */
  85         MDP_OUTP(MDP_BASE + 0xa0004, (iBuf->dma_h << 16 | iBuf->dma_w));
  86         MDP_OUTP(MDP_BASE + 0xa0008, src);      /* ibuf address */
  87         MDP_OUTP(MDP_BASE + 0xa000c, iBuf->ibuf_width * outBpp);/* ystride */
  88
  89         if (mfd->panel_info.bpp == 18) {
  90                 dma_s_cfg_reg |= DMA_DSTC0G_6BITS |     /* 666 18BPP */
  91                     DMA_DSTC1B_6BITS | DMA_DSTC2R_6BITS;
  92         } else {
  93                 dma_s_cfg_reg |= DMA_DSTC0G_6BITS |     /* 565 16BPP */
  94                     DMA_DSTC1B_5BITS | DMA_DSTC2R_5BITS;
  95         }
  96
  97         if (mddi_dest) {
  98                 MDP_OUTP(MDP_BASE + 0xa0010, (iBuf->dma_y << 16) | iBuf->dma_x);
  99                 MDP_OUTP(MDP_BASE + 0x00090, 1);
 100                 MDP_OUTP(MDP_BASE + 0x00094,
 101                                 (MDDI_VDO_PACKET_DESC << 16) |
 102                                 mfd->panel_info.mddi.vdopkt);
 103         } else {
 104                 /* setting LCDC write window */
 105                 pdata->set_rect(iBuf->dma_x, iBuf->dma_y, iBuf->dma_w,
 106                                 iBuf->dma_h);
 107         }
 108
 109         MDP_OUTP(MDP_BASE + 0xa0000, dma_s_cfg_reg);
 110
 111         /* MDP cmd block disable */
 112         mdp_pipe_ctrl(MDP_CMD_BLOCK, MDP_BLOCK_POWER_OFF, FALSE);
 113         mdp_pipe_kickoff(MDP_DMA_S_TERM, mfd);
 114 }
 115
 116 void mdp_dma_s_update(struct msm_fb_data_type *mfd)
 117 {
 118         down(&mfd->dma->mutex);
 119         if ((mfd) && (!mfd->dma->busy) && (mfd->panel_power_on)) {
 120                 down(&mfd->sem);
 121                 mdp_enable_irq(MDP_DMA_S_TERM);
 122                 mfd->dma->busy = TRUE;
 123                 INIT_COMPLETION(mfd->dma->comp);
 124                 mfd->ibuf_flushed = TRUE;
 125                 mdp_dma_s_update_lcd(mfd);
 126                 up(&mfd->sem);
 127
 128                 /* wait until DMA finishes the current job */
 129                 wait_for_completion_killable(&mfd->dma->comp);
 130                 mdp_disable_irq(MDP_DMA_S_TERM);
 131
 132         /* signal if pan function is waiting for the update completion */
 133                 if (mfd->pan_waiting) {
 134                         mfd->pan_waiting = FALSE;
 135                         complete(&mfd->pan_comp);
 136                 }
 137         }
 138         up(&mfd->dma->mutex);
 139 }