1 /***************************************************************************
2 * Copyright (C) 2006 by Hans Edgington <hans@edgington.nl> *
3 * Copyright (C) 2007-2009 Hans de Goede <hdegoede@redhat.com> *
4 * Copyright (C) 2010 Giel van Schijndel <me@mortis.eu> *
6 * This program is free software; you can redistribute it and/or modify *
7 * it under the terms of the GNU General Public License as published by *
8 * the Free Software Foundation; either version 2 of the License, or *
9 * (at your option) any later version. *
11 * This program is distributed in the hope that it will be useful, *
12 * but WITHOUT ANY WARRANTY; without even the implied warranty of *
13 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the *
14 * GNU General Public License for more details. *
16 * You should have received a copy of the GNU General Public License *
17 * along with this program; if not, write to the *
18 * Free Software Foundation, Inc., *
19 * 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA. *
20 ***************************************************************************/
22 #define pr_fmt(fmt) KBUILD_MODNAME ": " fmt
24 #include <linux/err.h>
26 #include <linux/init.h>
28 #include <linux/ioport.h>
29 #include <linux/miscdevice.h>
30 #include <linux/module.h>
31 #include <linux/mutex.h>
32 #include <linux/notifier.h>
33 #include <linux/reboot.h>
34 #include <linux/uaccess.h>
35 #include <linux/watchdog.h>
37 #define DRVNAME "f71808e_wdt"
39 #define SIO_F71808FG_LD_WDT 0x07 /* Watchdog timer logical device */
40 #define SIO_UNLOCK_KEY 0x87 /* Key to enable Super-I/O */
41 #define SIO_LOCK_KEY 0xAA /* Key to diasble Super-I/O */
43 #define SIO_REG_LDSEL 0x07 /* Logical device select */
44 #define SIO_REG_DEVID 0x20 /* Device ID (2 bytes) */
45 #define SIO_REG_DEVREV 0x22 /* Device revision */
46 #define SIO_REG_MANID 0x23 /* Fintek ID (2 bytes) */
47 #define SIO_REG_ROM_ADDR_SEL 0x27 /* ROM address select */
48 #define SIO_REG_MFUNCT1 0x29 /* Multi function select 1 */
49 #define SIO_REG_MFUNCT2 0x2a /* Multi function select 2 */
50 #define SIO_REG_MFUNCT3 0x2b /* Multi function select 3 */
51 #define SIO_REG_ENABLE 0x30 /* Logical device enable */
52 #define SIO_REG_ADDR 0x60 /* Logical device address (2 bytes) */
54 #define SIO_FINTEK_ID 0x1934 /* Manufacturers ID */
55 #define SIO_F71808_ID 0x0901 /* Chipset ID */
56 #define SIO_F71858_ID 0x0507 /* Chipset ID */
57 #define SIO_F71862_ID 0x0601 /* Chipset ID */
58 #define SIO_F71869_ID 0x0814 /* Chipset ID */
59 #define SIO_F71882_ID 0x0541 /* Chipset ID */
60 #define SIO_F71889_ID 0x0723 /* Chipset ID */
62 #define F71808FG_REG_WDO_CONF 0xf0
63 #define F71808FG_REG_WDT_CONF 0xf5
64 #define F71808FG_REG_WD_TIME 0xf6
66 #define F71808FG_FLAG_WDOUT_EN 7
68 #define F71808FG_FLAG_WDTMOUT_STS 5
69 #define F71808FG_FLAG_WD_EN 5
70 #define F71808FG_FLAG_WD_PULSE 4
71 #define F71808FG_FLAG_WD_UNIT 3
74 #define WATCHDOG_TIMEOUT 60 /* 1 minute default timeout */
75 #define WATCHDOG_MAX_TIMEOUT (60 * 255)
76 #define WATCHDOG_PULSE_WIDTH 125 /* 125 ms, default pulse width for
78 #define WATCHDOG_F71862FG_PIN 63 /* default watchdog reset output
81 static unsigned short force_id
;
82 module_param(force_id
, ushort
, 0);
83 MODULE_PARM_DESC(force_id
, "Override the detected device ID");
85 static const int max_timeout
= WATCHDOG_MAX_TIMEOUT
;
86 static int timeout
= WATCHDOG_TIMEOUT
; /* default timeout in seconds */
87 module_param(timeout
, int, 0);
88 MODULE_PARM_DESC(timeout
,
89 "Watchdog timeout in seconds. 1<= timeout <="
90 __MODULE_STRING(WATCHDOG_MAX_TIMEOUT
) " (default="
91 __MODULE_STRING(WATCHDOG_TIMEOUT
) ")");
93 static unsigned int pulse_width
= WATCHDOG_PULSE_WIDTH
;
94 module_param(pulse_width
, uint
, 0);
95 MODULE_PARM_DESC(pulse_width
,
96 "Watchdog signal pulse width. 0(=level), 1 ms, 25 ms, 125 ms or 5000 ms"
97 " (default=" __MODULE_STRING(WATCHDOG_PULSE_WIDTH
) ")");
99 static unsigned int f71862fg_pin
= WATCHDOG_F71862FG_PIN
;
100 module_param(f71862fg_pin
, uint
, 0);
101 MODULE_PARM_DESC(f71862fg_pin
,
102 "Watchdog f71862fg reset output pin configuration. Choose pin 56 or 63"
103 " (default=" __MODULE_STRING(WATCHDOG_F71862FG_PIN
)")");
105 static bool nowayout
= WATCHDOG_NOWAYOUT
;
106 module_param(nowayout
, bool, 0444);
107 MODULE_PARM_DESC(nowayout
, "Disable watchdog shutdown on close");
109 static unsigned int start_withtimeout
;
110 module_param(start_withtimeout
, uint
, 0);
111 MODULE_PARM_DESC(start_withtimeout
, "Start watchdog timer on module load with"
112 " given initial timeout. Zero (default) disables this feature.");
114 enum chips
{ f71808fg
, f71858fg
, f71862fg
, f71869
, f71882fg
, f71889fg
};
116 static const char *f71808e_names
[] = {
125 /* Super-I/O Function prototypes */
126 static inline int superio_inb(int base
, int reg
);
127 static inline int superio_inw(int base
, int reg
);
128 static inline void superio_outb(int base
, int reg
, u8 val
);
129 static inline void superio_set_bit(int base
, int reg
, int bit
);
130 static inline void superio_clear_bit(int base
, int reg
, int bit
);
131 static inline int superio_enter(int base
);
132 static inline void superio_select(int base
, int ld
);
133 static inline void superio_exit(int base
);
135 struct watchdog_data
{
136 unsigned short sioaddr
;
138 unsigned long opened
;
141 struct watchdog_info ident
;
143 unsigned short timeout
;
144 u8 timer_val
; /* content for the wd_time register */
146 u8 pulse_val
; /* pulse width flag */
147 char pulse_mode
; /* enable pulse output mode? */
148 char caused_reboot
; /* last reboot was by the watchdog */
151 static struct watchdog_data watchdog
= {
152 .lock
= __MUTEX_INITIALIZER(watchdog
.lock
),
155 /* Super I/O functions */
156 static inline int superio_inb(int base
, int reg
)
159 return inb(base
+ 1);
162 static int superio_inw(int base
, int reg
)
165 val
= superio_inb(base
, reg
) << 8;
166 val
|= superio_inb(base
, reg
+ 1);
170 static inline void superio_outb(int base
, int reg
, u8 val
)
176 static inline void superio_set_bit(int base
, int reg
, int bit
)
178 unsigned long val
= superio_inb(base
, reg
);
179 __set_bit(bit
, &val
);
180 superio_outb(base
, reg
, val
);
183 static inline void superio_clear_bit(int base
, int reg
, int bit
)
185 unsigned long val
= superio_inb(base
, reg
);
186 __clear_bit(bit
, &val
);
187 superio_outb(base
, reg
, val
);
190 static inline int superio_enter(int base
)
192 /* Don't step on other drivers' I/O space by accident */
193 if (!request_muxed_region(base
, 2, DRVNAME
)) {
194 pr_err("I/O address 0x%04x already in use\n", (int)base
);
198 /* according to the datasheet the key must be send twice! */
199 outb(SIO_UNLOCK_KEY
, base
);
200 outb(SIO_UNLOCK_KEY
, base
);
205 static inline void superio_select(int base
, int ld
)
207 outb(SIO_REG_LDSEL
, base
);
211 static inline void superio_exit(int base
)
213 outb(SIO_LOCK_KEY
, base
);
214 release_region(base
, 2);
217 static int watchdog_set_timeout(int timeout
)
220 || timeout
> max_timeout
) {
221 pr_err("watchdog timeout out of range\n");
225 mutex_lock(&watchdog
.lock
);
227 watchdog
.timeout
= timeout
;
228 if (timeout
> 0xff) {
229 watchdog
.timer_val
= DIV_ROUND_UP(timeout
, 60);
230 watchdog
.minutes_mode
= true;
232 watchdog
.timer_val
= timeout
;
233 watchdog
.minutes_mode
= false;
236 mutex_unlock(&watchdog
.lock
);
241 static int watchdog_set_pulse_width(unsigned int pw
)
245 mutex_lock(&watchdog
.lock
);
248 watchdog
.pulse_val
= 0;
249 } else if (pw
<= 25) {
250 watchdog
.pulse_val
= 1;
251 } else if (pw
<= 125) {
252 watchdog
.pulse_val
= 2;
253 } else if (pw
<= 5000) {
254 watchdog
.pulse_val
= 3;
256 pr_err("pulse width out of range\n");
261 watchdog
.pulse_mode
= pw
;
264 mutex_unlock(&watchdog
.lock
);
268 static int watchdog_keepalive(void)
272 mutex_lock(&watchdog
.lock
);
273 err
= superio_enter(watchdog
.sioaddr
);
276 superio_select(watchdog
.sioaddr
, SIO_F71808FG_LD_WDT
);
278 if (watchdog
.minutes_mode
)
279 /* select minutes for timer units */
280 superio_set_bit(watchdog
.sioaddr
, F71808FG_REG_WDT_CONF
,
281 F71808FG_FLAG_WD_UNIT
);
283 /* select seconds for timer units */
284 superio_clear_bit(watchdog
.sioaddr
, F71808FG_REG_WDT_CONF
,
285 F71808FG_FLAG_WD_UNIT
);
287 /* Set timer value */
288 superio_outb(watchdog
.sioaddr
, F71808FG_REG_WD_TIME
,
291 superio_exit(watchdog
.sioaddr
);
294 mutex_unlock(&watchdog
.lock
);
298 static int f71862fg_pin_configure(unsigned short ioaddr
)
300 /* When ioaddr is non-zero the calling function has to take care of
301 mutex handling and superio preparation! */
303 if (f71862fg_pin
== 63) {
305 /* SPI must be disabled first to use this pin! */
306 superio_clear_bit(ioaddr
, SIO_REG_ROM_ADDR_SEL
, 6);
307 superio_set_bit(ioaddr
, SIO_REG_MFUNCT3
, 4);
309 } else if (f71862fg_pin
== 56) {
311 superio_set_bit(ioaddr
, SIO_REG_MFUNCT1
, 1);
313 pr_err("Invalid argument f71862fg_pin=%d\n", f71862fg_pin
);
319 static int watchdog_start(void)
321 /* Make sure we don't die as soon as the watchdog is enabled below */
322 int err
= watchdog_keepalive();
326 mutex_lock(&watchdog
.lock
);
327 err
= superio_enter(watchdog
.sioaddr
);
330 superio_select(watchdog
.sioaddr
, SIO_F71808FG_LD_WDT
);
332 /* Watchdog pin configuration */
333 switch (watchdog
.type
) {
335 /* Set pin 21 to GPIO23/WDTRST#, then to WDTRST# */
336 superio_clear_bit(watchdog
.sioaddr
, SIO_REG_MFUNCT2
, 3);
337 superio_clear_bit(watchdog
.sioaddr
, SIO_REG_MFUNCT3
, 3);
341 err
= f71862fg_pin_configure(watchdog
.sioaddr
);
347 /* GPIO14 --> WDTRST# */
348 superio_clear_bit(watchdog
.sioaddr
, SIO_REG_MFUNCT1
, 4);
352 /* Set pin 56 to WDTRST# */
353 superio_set_bit(watchdog
.sioaddr
, SIO_REG_MFUNCT1
, 1);
357 /* set pin 40 to WDTRST# */
358 superio_outb(watchdog
.sioaddr
, SIO_REG_MFUNCT3
,
359 superio_inb(watchdog
.sioaddr
, SIO_REG_MFUNCT3
) & 0xcf);
364 * 'default' label to shut up the compiler and catch
371 superio_select(watchdog
.sioaddr
, SIO_F71808FG_LD_WDT
);
372 superio_set_bit(watchdog
.sioaddr
, SIO_REG_ENABLE
, 0);
373 superio_set_bit(watchdog
.sioaddr
, F71808FG_REG_WDO_CONF
,
374 F71808FG_FLAG_WDOUT_EN
);
376 superio_set_bit(watchdog
.sioaddr
, F71808FG_REG_WDT_CONF
,
377 F71808FG_FLAG_WD_EN
);
379 if (watchdog
.pulse_mode
) {
380 /* Select "pulse" output mode with given duration */
381 u8 wdt_conf
= superio_inb(watchdog
.sioaddr
,
382 F71808FG_REG_WDT_CONF
);
384 /* Set WD_PSWIDTH bits (1:0) */
385 wdt_conf
= (wdt_conf
& 0xfc) | (watchdog
.pulse_val
& 0x03);
386 /* Set WD_PULSE to "pulse" mode */
387 wdt_conf
|= BIT(F71808FG_FLAG_WD_PULSE
);
389 superio_outb(watchdog
.sioaddr
, F71808FG_REG_WDT_CONF
,
392 /* Select "level" output mode */
393 superio_clear_bit(watchdog
.sioaddr
, F71808FG_REG_WDT_CONF
,
394 F71808FG_FLAG_WD_PULSE
);
398 superio_exit(watchdog
.sioaddr
);
400 mutex_unlock(&watchdog
.lock
);
405 static int watchdog_stop(void)
409 mutex_lock(&watchdog
.lock
);
410 err
= superio_enter(watchdog
.sioaddr
);
413 superio_select(watchdog
.sioaddr
, SIO_F71808FG_LD_WDT
);
415 superio_clear_bit(watchdog
.sioaddr
, F71808FG_REG_WDT_CONF
,
416 F71808FG_FLAG_WD_EN
);
418 superio_exit(watchdog
.sioaddr
);
421 mutex_unlock(&watchdog
.lock
);
426 static int watchdog_get_status(void)
430 mutex_lock(&watchdog
.lock
);
431 status
= (watchdog
.caused_reboot
) ? WDIOF_CARDRESET
: 0;
432 mutex_unlock(&watchdog
.lock
);
437 static bool watchdog_is_running(void)
440 * if we fail to determine the watchdog's status assume it to be
441 * running to be on the safe side
443 bool is_running
= true;
445 mutex_lock(&watchdog
.lock
);
446 if (superio_enter(watchdog
.sioaddr
))
448 superio_select(watchdog
.sioaddr
, SIO_F71808FG_LD_WDT
);
450 is_running
= (superio_inb(watchdog
.sioaddr
, SIO_REG_ENABLE
) & BIT(0))
451 && (superio_inb(watchdog
.sioaddr
, F71808FG_REG_WDT_CONF
)
452 & F71808FG_FLAG_WD_EN
);
454 superio_exit(watchdog
.sioaddr
);
457 mutex_unlock(&watchdog
.lock
);
461 /* /dev/watchdog api */
463 static int watchdog_open(struct inode
*inode
, struct file
*file
)
467 /* If the watchdog is alive we don't need to start it again */
468 if (test_and_set_bit(0, &watchdog
.opened
))
471 err
= watchdog_start();
473 clear_bit(0, &watchdog
.opened
);
478 __module_get(THIS_MODULE
);
480 watchdog
.expect_close
= 0;
481 return nonseekable_open(inode
, file
);
484 static int watchdog_release(struct inode
*inode
, struct file
*file
)
486 clear_bit(0, &watchdog
.opened
);
488 if (!watchdog
.expect_close
) {
489 watchdog_keepalive();
490 pr_crit("Unexpected close, not stopping watchdog!\n");
491 } else if (!nowayout
) {
499 * @file: file handle to the watchdog
500 * @buf: buffer to write
501 * @count: count of bytes
502 * @ppos: pointer to the position to write. No seeks allowed
504 * A write to a watchdog device is defined as a keepalive signal. Any
505 * write of data will do, as we we don't define content meaning.
508 static ssize_t
watchdog_write(struct file
*file
, const char __user
*buf
,
509 size_t count
, loff_t
*ppos
)
515 /* In case it was set long ago */
516 bool expect_close
= false;
518 for (i
= 0; i
!= count
; i
++) {
520 if (get_user(c
, buf
+ i
))
522 expect_close
= (c
== 'V');
525 /* Properly order writes across fork()ed processes */
526 mutex_lock(&watchdog
.lock
);
527 watchdog
.expect_close
= expect_close
;
528 mutex_unlock(&watchdog
.lock
);
531 /* someone wrote to us, we should restart timer */
532 watchdog_keepalive();
539 * @inode: inode of the device
540 * @file: file handle to the device
541 * @cmd: watchdog command
542 * @arg: argument pointer
544 * The watchdog API defines a common set of functions for all watchdogs
545 * according to their available features.
547 static long watchdog_ioctl(struct file
*file
, unsigned int cmd
,
554 struct watchdog_info __user
*ident
;
558 uarg
.i
= (int __user
*)arg
;
561 case WDIOC_GETSUPPORT
:
562 return copy_to_user(uarg
.ident
, &watchdog
.ident
,
563 sizeof(watchdog
.ident
)) ? -EFAULT
: 0;
565 case WDIOC_GETSTATUS
:
566 status
= watchdog_get_status();
569 return put_user(status
, uarg
.i
);
571 case WDIOC_GETBOOTSTATUS
:
572 return put_user(0, uarg
.i
);
574 case WDIOC_SETOPTIONS
:
575 if (get_user(new_options
, uarg
.i
))
578 if (new_options
& WDIOS_DISABLECARD
)
581 if (new_options
& WDIOS_ENABLECARD
)
582 return watchdog_start();
585 case WDIOC_KEEPALIVE
:
586 watchdog_keepalive();
589 case WDIOC_SETTIMEOUT
:
590 if (get_user(new_timeout
, uarg
.i
))
593 if (watchdog_set_timeout(new_timeout
))
596 watchdog_keepalive();
599 case WDIOC_GETTIMEOUT
:
600 return put_user(watchdog
.timeout
, uarg
.i
);
608 static int watchdog_notify_sys(struct notifier_block
*this, unsigned long code
,
611 if (code
== SYS_DOWN
|| code
== SYS_HALT
)
616 static const struct file_operations watchdog_fops
= {
617 .owner
= THIS_MODULE
,
619 .open
= watchdog_open
,
620 .release
= watchdog_release
,
621 .write
= watchdog_write
,
622 .unlocked_ioctl
= watchdog_ioctl
,
625 static struct miscdevice watchdog_miscdev
= {
626 .minor
= WATCHDOG_MINOR
,
628 .fops
= &watchdog_fops
,
631 static struct notifier_block watchdog_notifier
= {
632 .notifier_call
= watchdog_notify_sys
,
635 static int __init
watchdog_init(int sioaddr
)
637 int wdt_conf
, err
= 0;
639 /* No need to lock watchdog.lock here because no entry points
640 * into the module have been registered yet.
642 watchdog
.sioaddr
= sioaddr
;
643 watchdog
.ident
.options
= WDIOC_SETTIMEOUT
645 | WDIOF_KEEPALIVEPING
;
647 snprintf(watchdog
.ident
.identity
,
648 sizeof(watchdog
.ident
.identity
), "%s watchdog",
649 f71808e_names
[watchdog
.type
]);
651 err
= superio_enter(sioaddr
);
654 superio_select(watchdog
.sioaddr
, SIO_F71808FG_LD_WDT
);
656 wdt_conf
= superio_inb(sioaddr
, F71808FG_REG_WDT_CONF
);
657 watchdog
.caused_reboot
= wdt_conf
& F71808FG_FLAG_WDTMOUT_STS
;
659 superio_exit(sioaddr
);
661 err
= watchdog_set_timeout(timeout
);
664 err
= watchdog_set_pulse_width(pulse_width
);
668 err
= register_reboot_notifier(&watchdog_notifier
);
672 err
= misc_register(&watchdog_miscdev
);
674 pr_err("cannot register miscdev on minor=%d\n",
675 watchdog_miscdev
.minor
);
679 if (start_withtimeout
) {
680 if (start_withtimeout
<= 0
681 || start_withtimeout
> max_timeout
) {
682 pr_err("starting timeout out of range\n");
687 err
= watchdog_start();
689 pr_err("cannot start watchdog timer\n");
693 mutex_lock(&watchdog
.lock
);
694 err
= superio_enter(sioaddr
);
697 superio_select(watchdog
.sioaddr
, SIO_F71808FG_LD_WDT
);
699 if (start_withtimeout
> 0xff) {
700 /* select minutes for timer units */
701 superio_set_bit(sioaddr
, F71808FG_REG_WDT_CONF
,
702 F71808FG_FLAG_WD_UNIT
);
703 superio_outb(sioaddr
, F71808FG_REG_WD_TIME
,
704 DIV_ROUND_UP(start_withtimeout
, 60));
706 /* select seconds for timer units */
707 superio_clear_bit(sioaddr
, F71808FG_REG_WDT_CONF
,
708 F71808FG_FLAG_WD_UNIT
);
709 superio_outb(sioaddr
, F71808FG_REG_WD_TIME
,
713 superio_exit(sioaddr
);
714 mutex_unlock(&watchdog
.lock
);
717 __module_get(THIS_MODULE
);
719 pr_info("watchdog started with initial timeout of %u sec\n",
726 mutex_unlock(&watchdog
.lock
);
728 misc_deregister(&watchdog_miscdev
);
730 unregister_reboot_notifier(&watchdog_notifier
);
735 static int __init
f71808e_find(int sioaddr
)
738 int err
= superio_enter(sioaddr
);
742 devid
= superio_inw(sioaddr
, SIO_REG_MANID
);
743 if (devid
!= SIO_FINTEK_ID
) {
744 pr_debug("Not a Fintek device\n");
749 devid
= force_id
? force_id
: superio_inw(sioaddr
, SIO_REG_DEVID
);
752 watchdog
.type
= f71808fg
;
755 watchdog
.type
= f71862fg
;
756 err
= f71862fg_pin_configure(0); /* validate module parameter */
759 watchdog
.type
= f71869
;
762 watchdog
.type
= f71882fg
;
765 watchdog
.type
= f71889fg
;
768 /* Confirmed (by datasheet) not to have a watchdog. */
772 pr_info("Unrecognized Fintek device: %04x\n",
773 (unsigned int)devid
);
778 pr_info("Found %s watchdog chip, revision %d\n",
779 f71808e_names
[watchdog
.type
],
780 (int)superio_inb(sioaddr
, SIO_REG_DEVREV
));
782 superio_exit(sioaddr
);
786 static int __init
f71808e_init(void)
788 static const unsigned short addrs
[] = { 0x2e, 0x4e };
792 for (i
= 0; i
< ARRAY_SIZE(addrs
); i
++) {
793 err
= f71808e_find(addrs
[i
]);
797 if (i
== ARRAY_SIZE(addrs
))
800 return watchdog_init(addrs
[i
]);
803 static void __exit
f71808e_exit(void)
805 if (watchdog_is_running()) {
806 pr_warn("Watchdog timer still running, stopping it\n");
809 misc_deregister(&watchdog_miscdev
);
810 unregister_reboot_notifier(&watchdog_notifier
);
813 MODULE_DESCRIPTION("F71808E Watchdog Driver");
814 MODULE_AUTHOR("Giel van Schijndel <me@mortis.eu>");
815 MODULE_LICENSE("GPL");
817 module_init(f71808e_init
);
818 module_exit(f71808e_exit
);