2 * omap-usb3 - USB PHY, talking to dwc3 controller in OMAP.
4 * Copyright (C) 2013 Texas Instruments Incorporated - http://www.ti.com
5 * This program is free software; you can redistribute it and/or modify
6 * it under the terms of the GNU General Public License as published by
7 * the Free Software Foundation; either version 2 of the License, or
8 * (at your option) any later version.
10 * Author: Kishon Vijay Abraham I <kishon@ti.com>
12 * This program is distributed in the hope that it will be useful,
13 * but WITHOUT ANY WARRANTY; without even the implied warranty of
14 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
15 * GNU General Public License for more details.
19 #include <linux/module.h>
20 #include <linux/platform_device.h>
21 #include <linux/slab.h>
22 #include <linux/usb/omap_usb.h>
24 #include <linux/clk.h>
25 #include <linux/err.h>
26 #include <linux/pm_runtime.h>
27 #include <linux/delay.h>
28 #include <linux/usb/omap_control_usb.h>
30 #define NUM_SYS_CLKS 5
31 #define PLL_STATUS 0x00000004
32 #define PLL_GO 0x00000008
33 #define PLL_CONFIGURATION1 0x0000000C
34 #define PLL_CONFIGURATION2 0x00000010
35 #define PLL_CONFIGURATION3 0x00000014
36 #define PLL_CONFIGURATION4 0x00000020
38 #define PLL_REGM_MASK 0x001FFE00
39 #define PLL_REGM_SHIFT 0x9
40 #define PLL_REGM_F_MASK 0x0003FFFF
41 #define PLL_REGM_F_SHIFT 0x0
42 #define PLL_REGN_MASK 0x000001FE
43 #define PLL_REGN_SHIFT 0x1
44 #define PLL_SELFREQDCO_MASK 0x0000000E
45 #define PLL_SELFREQDCO_SHIFT 0x1
46 #define PLL_SD_MASK 0x0003FC00
47 #define PLL_SD_SHIFT 0x9
48 #define SET_PLL_GO 0x1
49 #define PLL_TICOPWDN 0x10000
54 * This is an Empirical value that works, need to confirm the actual
55 * value required for the USB3PHY_PLL_CONFIGURATION2.PLL_IDLE status
56 * to be correctly reflected in the USB3PHY_PLL_STATUS register.
58 # define PLL_IDLE_TIME 100;
61 CLK_RATE_UNDEFINED
= -1,
69 static struct usb_dpll_params omap_usb3_dpll_params
[NUM_SYS_CLKS
] = {
70 {1250, 5, 4, 20, 0}, /* 12 MHz */
71 {3125, 20, 4, 20, 0}, /* 16.8 MHz */
72 {1172, 8, 4, 20, 65537}, /* 19.2 MHz */
73 {1250, 12, 4, 20, 0}, /* 26 MHz */
74 {3125, 47, 4, 20, 92843}, /* 38.4 MHz */
77 static int omap_usb3_suspend(struct usb_phy
*x
, int suspend
)
79 struct omap_usb
*phy
= phy_to_omapusb(x
);
81 int timeout
= PLL_IDLE_TIME
;
83 if (suspend
&& !phy
->is_suspended
) {
84 val
= omap_usb_readl(phy
->pll_ctrl_base
, PLL_CONFIGURATION2
);
86 omap_usb_writel(phy
->pll_ctrl_base
, PLL_CONFIGURATION2
, val
);
89 val
= omap_usb_readl(phy
->pll_ctrl_base
, PLL_STATUS
);
90 if (val
& PLL_TICOPWDN
)
95 omap_control_usb3_phy_power(phy
->control_dev
, 0);
97 phy
->is_suspended
= 1;
98 } else if (!suspend
&& phy
->is_suspended
) {
99 phy
->is_suspended
= 0;
101 val
= omap_usb_readl(phy
->pll_ctrl_base
, PLL_CONFIGURATION2
);
103 omap_usb_writel(phy
->pll_ctrl_base
, PLL_CONFIGURATION2
, val
);
106 val
= omap_usb_readl(phy
->pll_ctrl_base
, PLL_STATUS
);
107 if (!(val
& PLL_TICOPWDN
))
116 static inline enum sys_clk_rate
__get_sys_clk_index(unsigned long rate
)
120 return CLK_RATE_12MHZ
;
122 return CLK_RATE_16MHZ
;
124 return CLK_RATE_19MHZ
;
126 return CLK_RATE_26MHZ
;
128 return CLK_RATE_38MHZ
;
130 return CLK_RATE_UNDEFINED
;
134 static void omap_usb_dpll_relock(struct omap_usb
*phy
)
137 unsigned long timeout
;
139 omap_usb_writel(phy
->pll_ctrl_base
, PLL_GO
, SET_PLL_GO
);
141 timeout
= jiffies
+ msecs_to_jiffies(20);
143 val
= omap_usb_readl(phy
->pll_ctrl_base
, PLL_STATUS
);
146 } while (!WARN_ON(time_after(jiffies
, timeout
)));
149 static int omap_usb_dpll_lock(struct omap_usb
*phy
)
153 enum sys_clk_rate clk_index
;
155 rate
= clk_get_rate(phy
->sys_clk
);
156 clk_index
= __get_sys_clk_index(rate
);
158 if (clk_index
== CLK_RATE_UNDEFINED
) {
159 pr_err("dpll cannot be locked for sys clk freq:%luHz\n", rate
);
163 val
= omap_usb_readl(phy
->pll_ctrl_base
, PLL_CONFIGURATION1
);
164 val
&= ~PLL_REGN_MASK
;
165 val
|= omap_usb3_dpll_params
[clk_index
].n
<< PLL_REGN_SHIFT
;
166 omap_usb_writel(phy
->pll_ctrl_base
, PLL_CONFIGURATION1
, val
);
168 val
= omap_usb_readl(phy
->pll_ctrl_base
, PLL_CONFIGURATION2
);
169 val
&= ~PLL_SELFREQDCO_MASK
;
170 val
|= omap_usb3_dpll_params
[clk_index
].freq
<< PLL_SELFREQDCO_SHIFT
;
171 omap_usb_writel(phy
->pll_ctrl_base
, PLL_CONFIGURATION2
, val
);
173 val
= omap_usb_readl(phy
->pll_ctrl_base
, PLL_CONFIGURATION1
);
174 val
&= ~PLL_REGM_MASK
;
175 val
|= omap_usb3_dpll_params
[clk_index
].m
<< PLL_REGM_SHIFT
;
176 omap_usb_writel(phy
->pll_ctrl_base
, PLL_CONFIGURATION1
, val
);
178 val
= omap_usb_readl(phy
->pll_ctrl_base
, PLL_CONFIGURATION4
);
179 val
&= ~PLL_REGM_F_MASK
;
180 val
|= omap_usb3_dpll_params
[clk_index
].mf
<< PLL_REGM_F_SHIFT
;
181 omap_usb_writel(phy
->pll_ctrl_base
, PLL_CONFIGURATION4
, val
);
183 val
= omap_usb_readl(phy
->pll_ctrl_base
, PLL_CONFIGURATION3
);
185 val
|= omap_usb3_dpll_params
[clk_index
].sd
<< PLL_SD_SHIFT
;
186 omap_usb_writel(phy
->pll_ctrl_base
, PLL_CONFIGURATION3
, val
);
188 omap_usb_dpll_relock(phy
);
193 static int omap_usb3_init(struct usb_phy
*x
)
195 struct omap_usb
*phy
= phy_to_omapusb(x
);
197 omap_usb_dpll_lock(phy
);
198 omap_control_usb3_phy_power(phy
->control_dev
, 1);
203 static int omap_usb3_probe(struct platform_device
*pdev
)
205 struct omap_usb
*phy
;
206 struct resource
*res
;
208 phy
= devm_kzalloc(&pdev
->dev
, sizeof(*phy
), GFP_KERNEL
);
210 dev_err(&pdev
->dev
, "unable to alloc mem for OMAP USB3 PHY\n");
214 res
= platform_get_resource_byname(pdev
, IORESOURCE_MEM
, "pll_ctrl");
215 phy
->pll_ctrl_base
= devm_ioremap_resource(&pdev
->dev
, res
);
216 if (IS_ERR(phy
->pll_ctrl_base
))
217 return PTR_ERR(phy
->pll_ctrl_base
);
219 phy
->dev
= &pdev
->dev
;
221 phy
->phy
.dev
= phy
->dev
;
222 phy
->phy
.label
= "omap-usb3";
223 phy
->phy
.init
= omap_usb3_init
;
224 phy
->phy
.set_suspend
= omap_usb3_suspend
;
225 phy
->phy
.type
= USB_PHY_TYPE_USB3
;
227 phy
->is_suspended
= 1;
228 phy
->wkupclk
= devm_clk_get(phy
->dev
, "usb_phy_cm_clk32k");
229 if (IS_ERR(phy
->wkupclk
)) {
230 dev_err(&pdev
->dev
, "unable to get usb_phy_cm_clk32k\n");
231 return PTR_ERR(phy
->wkupclk
);
233 clk_prepare(phy
->wkupclk
);
235 phy
->optclk
= devm_clk_get(phy
->dev
, "usb_otg_ss_refclk960m");
236 if (IS_ERR(phy
->optclk
)) {
237 dev_err(&pdev
->dev
, "unable to get usb_otg_ss_refclk960m\n");
238 return PTR_ERR(phy
->optclk
);
240 clk_prepare(phy
->optclk
);
242 phy
->sys_clk
= devm_clk_get(phy
->dev
, "sys_clkin");
243 if (IS_ERR(phy
->sys_clk
)) {
244 pr_err("%s: unable to get sys_clkin\n", __func__
);
248 phy
->control_dev
= omap_get_control_dev();
249 if (IS_ERR(phy
->control_dev
)) {
250 dev_dbg(&pdev
->dev
, "Failed to get control device\n");
254 omap_control_usb3_phy_power(phy
->control_dev
, 0);
255 usb_add_phy_dev(&phy
->phy
);
257 platform_set_drvdata(pdev
, phy
);
259 pm_runtime_enable(phy
->dev
);
260 pm_runtime_get(&pdev
->dev
);
265 static int omap_usb3_remove(struct platform_device
*pdev
)
267 struct omap_usb
*phy
= platform_get_drvdata(pdev
);
269 clk_unprepare(phy
->wkupclk
);
270 clk_unprepare(phy
->optclk
);
271 usb_remove_phy(&phy
->phy
);
272 if (!pm_runtime_suspended(&pdev
->dev
))
273 pm_runtime_put(&pdev
->dev
);
274 pm_runtime_disable(&pdev
->dev
);
279 #ifdef CONFIG_PM_RUNTIME
281 static int omap_usb3_runtime_suspend(struct device
*dev
)
283 struct platform_device
*pdev
= to_platform_device(dev
);
284 struct omap_usb
*phy
= platform_get_drvdata(pdev
);
286 clk_disable(phy
->wkupclk
);
287 clk_disable(phy
->optclk
);
292 static int omap_usb3_runtime_resume(struct device
*dev
)
295 struct platform_device
*pdev
= to_platform_device(dev
);
296 struct omap_usb
*phy
= platform_get_drvdata(pdev
);
298 ret
= clk_enable(phy
->optclk
);
300 dev_err(phy
->dev
, "Failed to enable optclk %d\n", ret
);
304 ret
= clk_enable(phy
->wkupclk
);
306 dev_err(phy
->dev
, "Failed to enable wkupclk %d\n", ret
);
313 clk_disable(phy
->optclk
);
319 static const struct dev_pm_ops omap_usb3_pm_ops
= {
320 SET_RUNTIME_PM_OPS(omap_usb3_runtime_suspend
, omap_usb3_runtime_resume
,
324 #define DEV_PM_OPS (&omap_usb3_pm_ops)
326 #define DEV_PM_OPS NULL
330 static const struct of_device_id omap_usb3_id_table
[] = {
331 { .compatible
= "ti,omap-usb3" },
334 MODULE_DEVICE_TABLE(of
, omap_usb3_id_table
);
337 static struct platform_driver omap_usb3_driver
= {
338 .probe
= omap_usb3_probe
,
339 .remove
= omap_usb3_remove
,
342 .owner
= THIS_MODULE
,
344 .of_match_table
= of_match_ptr(omap_usb3_id_table
),
348 module_platform_driver(omap_usb3_driver
);
350 MODULE_ALIAS("platform: omap_usb3");
351 MODULE_AUTHOR("Texas Instruments Inc.");
352 MODULE_DESCRIPTION("OMAP USB3 phy driver");
353 MODULE_LICENSE("GPL v2");