2 * Implement the default iomap interfaces
4 * (C) Copyright 2004 Linus Torvalds
5 * (C) Copyright 2006 Ralf Baechle <ralf@linux-mips.org>
6 * (C) Copyright 2007 MIPS Technologies, Inc.
7 * written by Ralf Baechle <ralf@linux-mips.org>
9 #include <linux/module.h>
13 * Read/write from/to an (offsettable) iomem cookie. It might be a PIO
14 * access or a MMIO access, these functions don't care. The info is
15 * encoded in the hardware mapping set up by the mapping functions
16 * (or the cookie itself, depending on implementation and hw).
18 * The generic routines don't assume any hardware mappings, and just
19 * encode the PIO/MMIO as part of the cookie. They coldly assume that
20 * the MMIO IO mappings are not in the low address range.
22 * Architectures for which this is not true can't use this generic
23 * implementation and should do their own copy.
26 #define PIO_MASK 0x0ffffUL
28 unsigned int ioread8(void __iomem
*addr
)
33 EXPORT_SYMBOL(ioread8
);
35 unsigned int ioread16(void __iomem
*addr
)
40 EXPORT_SYMBOL(ioread16
);
42 unsigned int ioread16be(void __iomem
*addr
)
44 return be16_to_cpu(__raw_readw(addr
));
47 EXPORT_SYMBOL(ioread16be
);
49 unsigned int ioread32(void __iomem
*addr
)
54 EXPORT_SYMBOL(ioread32
);
56 unsigned int ioread32be(void __iomem
*addr
)
58 return be32_to_cpu(__raw_readl(addr
));
61 EXPORT_SYMBOL(ioread32be
);
63 void iowrite8(u8 val
, void __iomem
*addr
)
68 EXPORT_SYMBOL(iowrite8
);
70 void iowrite16(u16 val
, void __iomem
*addr
)
75 EXPORT_SYMBOL(iowrite16
);
77 void iowrite16be(u16 val
, void __iomem
*addr
)
79 __raw_writew(cpu_to_be16(val
), addr
);
82 EXPORT_SYMBOL(iowrite16be
);
84 void iowrite32(u32 val
, void __iomem
*addr
)
89 EXPORT_SYMBOL(iowrite32
);
91 void iowrite32be(u32 val
, void __iomem
*addr
)
93 __raw_writel(cpu_to_be32(val
), addr
);
96 EXPORT_SYMBOL(iowrite32be
);
99 * These are the "repeat MMIO read/write" functions.
100 * Note the "__raw" accesses, since we don't want to
101 * convert to CPU byte order. We write in "IO byte
102 * order" (we also don't have IO barriers).
104 static inline void mmio_insb(void __iomem
*addr
, u8
*dst
, int count
)
106 while (--count
>= 0) {
107 u8 data
= __raw_readb(addr
);
113 static inline void mmio_insw(void __iomem
*addr
, u16
*dst
, int count
)
115 while (--count
>= 0) {
116 u16 data
= __raw_readw(addr
);
122 static inline void mmio_insl(void __iomem
*addr
, u32
*dst
, int count
)
124 while (--count
>= 0) {
125 u32 data
= __raw_readl(addr
);
131 static inline void mmio_outsb(void __iomem
*addr
, const u8
*src
, int count
)
133 while (--count
>= 0) {
134 __raw_writeb(*src
, addr
);
139 static inline void mmio_outsw(void __iomem
*addr
, const u16
*src
, int count
)
141 while (--count
>= 0) {
142 __raw_writew(*src
, addr
);
147 static inline void mmio_outsl(void __iomem
*addr
, const u32
*src
, int count
)
149 while (--count
>= 0) {
150 __raw_writel(*src
, addr
);
155 void ioread8_rep(void __iomem
*addr
, void *dst
, unsigned long count
)
157 mmio_insb(addr
, dst
, count
);
160 EXPORT_SYMBOL(ioread8_rep
);
162 void ioread16_rep(void __iomem
*addr
, void *dst
, unsigned long count
)
164 mmio_insw(addr
, dst
, count
);
167 EXPORT_SYMBOL(ioread16_rep
);
169 void ioread32_rep(void __iomem
*addr
, void *dst
, unsigned long count
)
171 mmio_insl(addr
, dst
, count
);
174 EXPORT_SYMBOL(ioread32_rep
);
176 void iowrite8_rep(void __iomem
*addr
, const void *src
, unsigned long count
)
178 mmio_outsb(addr
, src
, count
);
181 EXPORT_SYMBOL(iowrite8_rep
);
183 void iowrite16_rep(void __iomem
*addr
, const void *src
, unsigned long count
)
185 mmio_outsw(addr
, src
, count
);
188 EXPORT_SYMBOL(iowrite16_rep
);
190 void iowrite32_rep(void __iomem
*addr
, const void *src
, unsigned long count
)
192 mmio_outsl(addr
, src
, count
);
195 EXPORT_SYMBOL(iowrite32_rep
);
198 * Create a virtual mapping cookie for an IO port range
200 * This uses the same mapping are as the in/out family which has to be setup
201 * by the platform initialization code.
203 * Just to make matters somewhat more interesting on MIPS systems with
204 * multiple host bridge each will have it's own ioport address space.
206 static void __iomem
*ioport_map_legacy(unsigned long port
, unsigned int nr
)
208 return (void __iomem
*) (mips_io_port_base
+ port
);
211 void __iomem
*ioport_map(unsigned long port
, unsigned int nr
)
216 return ioport_map_legacy(port
, nr
);
219 EXPORT_SYMBOL(ioport_map
);
221 void ioport_unmap(void __iomem
*addr
)
226 EXPORT_SYMBOL(ioport_unmap
);