arch/arm/mach-pxa/smemc.c

   1 /*
   2  * Static Memory Controller
   3  */
   4
   5 #include <linux/module.h>
   6 #include <linux/kernel.h>
   7 #include <linux/init.h>
   8 #include <linux/io.h>
   9 #include <linux/syscore_ops.h>
  10
  11 #include <mach/hardware.h>
  12 #include <mach/smemc.h>
  13
  14 #ifdef CONFIG_PM
  15 static unsigned long msc[2];
  16 static unsigned long sxcnfg, memclkcfg;
  17 static unsigned long csadrcfg[4];
  18
  19 static int pxa3xx_smemc_suspend(void)
  20 {
  21         msc[0] = __raw_readl(MSC0);
  22         msc[1] = __raw_readl(MSC1);
  23         sxcnfg = __raw_readl(SXCNFG);
  24         memclkcfg = __raw_readl(MEMCLKCFG);
  25         csadrcfg[0] = __raw_readl(CSADRCFG0);
  26         csadrcfg[1] = __raw_readl(CSADRCFG1);
  27         csadrcfg[2] = __raw_readl(CSADRCFG2);
  28         csadrcfg[3] = __raw_readl(CSADRCFG3);
  29
  30         return 0;
  31 }
  32
  33 static void pxa3xx_smemc_resume(void)
  34 {
  35         __raw_writel(msc[0], MSC0);
  36         __raw_writel(msc[1], MSC1);
  37         __raw_writel(sxcnfg, SXCNFG);
  38         __raw_writel(memclkcfg, MEMCLKCFG);
  39         __raw_writel(csadrcfg[0], CSADRCFG0);
  40         __raw_writel(csadrcfg[1], CSADRCFG1);
  41         __raw_writel(csadrcfg[2], CSADRCFG2);
  42         __raw_writel(csadrcfg[3], CSADRCFG3);
  43         /* CSMSADRCFG wakes up in its default state (0), so we need to set it */
  44         __raw_writel(0x2, CSMSADRCFG);
  45 }
  46
  47 static struct syscore_ops smemc_syscore_ops = {
  48         .suspend        = pxa3xx_smemc_suspend,
  49         .resume         = pxa3xx_smemc_resume,
  50 };
  51
  52 static int __init smemc_init(void)
  53 {
  54         if (cpu_is_pxa3xx()) {
  55                 /*
  56                  * The only documentation we have on the
  57                  * Chip Select Configuration Register (CSMSADRCFG) is that
  58                  * it must be programmed to 0x2.
  59                  * Moreover, in the bit definitions, the second bit
  60                  * (CSMSADRCFG[1]) is called "SETALWAYS".
  61                  * Other bits are reserved in this register.
  62                  */
  63                 __raw_writel(0x2, CSMSADRCFG);
  64
  65                 register_syscore_ops(&smemc_syscore_ops);
  66         }
  67
  68         return 0;
  69 }
  70 subsys_initcall(smemc_init);
  71 #endif