arch/arm/mach-at91/at91sam9263.c

   1 /*
   2  * arch/arm/mach-at91/at91sam9263.c
   3  *
   4  *  Copyright (C) 2007 Atmel Corporation.
   5  *
   6  * This program is free software; you can redistribute it and/or modify
   7  * it under the terms of the GNU General Public License as published by
   8  * the Free Software Foundation; either version 2 of the License, or
   9  * (at your option) any later version.
  10  *
  11  */
  12
  13 #include <linux/module.h>
  14
  15 #include <asm/mach/arch.h>
  16 #include <asm/mach/map.h>
  17 #include <asm/arch/at91sam9263.h>
  18 #include <asm/arch/at91_pmc.h>
  19 #include <asm/arch/at91_rstc.h>
  20
  21 #include "generic.h"
  22 #include "clock.h"
  23
  24 static struct map_desc at91sam9263_io_desc[] __initdata = {
  25         {
  26                 .virtual        = AT91_VA_BASE_SYS,
  27                 .pfn            = __phys_to_pfn(AT91_BASE_SYS),
  28                 .length         = SZ_16K,
  29                 .type           = MT_DEVICE,
  30         }, {
  31                 .virtual        = AT91_IO_VIRT_BASE - AT91SAM9263_SRAM0_SIZE,
  32                 .pfn            = __phys_to_pfn(AT91SAM9263_SRAM0_BASE),
  33                 .length         = AT91SAM9263_SRAM0_SIZE,
  34                 .type           = MT_DEVICE,
  35         }, {
  36                 .virtual        = AT91_IO_VIRT_BASE - AT91SAM9263_SRAM0_SIZE - AT91SAM9263_SRAM1_SIZE,
  37                 .pfn            = __phys_to_pfn(AT91SAM9263_SRAM1_BASE),
  38                 .length         = AT91SAM9263_SRAM1_SIZE,
  39                 .type           = MT_DEVICE,
  40         },
  41 };
  42
  43 /* --------------------------------------------------------------------
  44  *  Clocks
  45  * -------------------------------------------------------------------- */
  46
  47 /*
  48  * The peripheral clocks.
  49  */
  50 static struct clk pioA_clk = {
  51         .name           = "pioA_clk",
  52         .pmc_mask       = 1 << AT91SAM9263_ID_PIOA,
  53         .type           = CLK_TYPE_PERIPHERAL,
  54 };
  55 static struct clk pioB_clk = {
  56         .name           = "pioB_clk",
  57         .pmc_mask       = 1 << AT91SAM9263_ID_PIOB,
  58         .type           = CLK_TYPE_PERIPHERAL,
  59 };
  60 static struct clk pioCDE_clk = {
  61         .name           = "pioCDE_clk",
  62         .pmc_mask       = 1 << AT91SAM9263_ID_PIOCDE,
  63         .type           = CLK_TYPE_PERIPHERAL,
  64 };
  65 static struct clk usart0_clk = {
  66         .name           = "usart0_clk",
  67         .pmc_mask       = 1 << AT91SAM9263_ID_US0,
  68         .type           = CLK_TYPE_PERIPHERAL,
  69 };
  70 static struct clk usart1_clk = {
  71         .name           = "usart1_clk",
  72         .pmc_mask       = 1 << AT91SAM9263_ID_US1,
  73         .type           = CLK_TYPE_PERIPHERAL,
  74 };
  75 static struct clk usart2_clk = {
  76         .name           = "usart2_clk",
  77         .pmc_mask       = 1 << AT91SAM9263_ID_US2,
  78         .type           = CLK_TYPE_PERIPHERAL,
  79 };
  80 static struct clk mmc0_clk = {
  81         .name           = "mci0_clk",
  82         .pmc_mask       = 1 << AT91SAM9263_ID_MCI0,
  83         .type           = CLK_TYPE_PERIPHERAL,
  84 };
  85 static struct clk mmc1_clk = {
  86         .name           = "mci1_clk",
  87         .pmc_mask       = 1 << AT91SAM9263_ID_MCI1,
  88         .type           = CLK_TYPE_PERIPHERAL,
  89 };
  90 static struct clk twi_clk = {
  91         .name           = "twi_clk",
  92         .pmc_mask       = 1 << AT91SAM9263_ID_TWI,
  93         .type           = CLK_TYPE_PERIPHERAL,
  94 };
  95 static struct clk spi0_clk = {
  96         .name           = "spi0_clk",
  97         .pmc_mask       = 1 << AT91SAM9263_ID_SPI0,
  98         .type           = CLK_TYPE_PERIPHERAL,
  99 };
 100 static struct clk spi1_clk = {
 101         .name           = "spi1_clk",
 102         .pmc_mask       = 1 << AT91SAM9263_ID_SPI1,
 103         .type           = CLK_TYPE_PERIPHERAL,
 104 };
 105 static struct clk tcb_clk = {
 106         .name           = "tcb_clk",
 107         .pmc_mask       = 1 << AT91SAM9263_ID_TCB,
 108         .type           = CLK_TYPE_PERIPHERAL,
 109 };
 110 static struct clk macb_clk = {
 111         .name           = "macb_clk",
 112         .pmc_mask       = 1 << AT91SAM9263_ID_EMAC,
 113         .type           = CLK_TYPE_PERIPHERAL,
 114 };
 115 static struct clk udc_clk = {
 116         .name           = "udc_clk",
 117         .pmc_mask       = 1 << AT91SAM9263_ID_UDP,
 118         .type           = CLK_TYPE_PERIPHERAL,
 119 };
 120 static struct clk isi_clk = {
 121         .name           = "isi_clk",
 122         .pmc_mask       = 1 << AT91SAM9263_ID_ISI,
 123         .type           = CLK_TYPE_PERIPHERAL,
 124 };
 125 static struct clk lcdc_clk = {
 126         .name           = "lcdc_clk",
 127         .pmc_mask       = 1 << AT91SAM9263_ID_LCDC,
 128         .type           = CLK_TYPE_PERIPHERAL,
 129 };
 130 static struct clk ohci_clk = {
 131         .name           = "ohci_clk",
 132         .pmc_mask       = 1 << AT91SAM9263_ID_UHP,
 133         .type           = CLK_TYPE_PERIPHERAL,
 134 };
 135
 136 static struct clk *periph_clocks[] __initdata = {
 137         &pioA_clk,
 138         &pioB_clk,
 139         &pioCDE_clk,
 140         &usart0_clk,
 141         &usart1_clk,
 142         &usart2_clk,
 143         &mmc0_clk,
 144         &mmc1_clk,
 145         // can
 146         &twi_clk,
 147         &spi0_clk,
 148         &spi1_clk,
 149         // ssc0 .. ssc1
 150         // ac97
 151         &tcb_clk,
 152         // pwmc
 153         &macb_clk,
 154         // 2dge
 155         &udc_clk,
 156         &isi_clk,
 157         &lcdc_clk,
 158         // dma
 159         &ohci_clk,
 160         // irq0 .. irq1
 161 };
 162
 163 /*
 164  * The four programmable clocks.
 165  * You must configure pin multiplexing to bring these signals out.
 166  */
 167 static struct clk pck0 = {
 168         .name           = "pck0",
 169         .pmc_mask       = AT91_PMC_PCK0,
 170         .type           = CLK_TYPE_PROGRAMMABLE,
 171         .id             = 0,
 172 };
 173 static struct clk pck1 = {
 174         .name           = "pck1",
 175         .pmc_mask       = AT91_PMC_PCK1,
 176         .type           = CLK_TYPE_PROGRAMMABLE,
 177         .id             = 1,
 178 };
 179 static struct clk pck2 = {
 180         .name           = "pck2",
 181         .pmc_mask       = AT91_PMC_PCK2,
 182         .type           = CLK_TYPE_PROGRAMMABLE,
 183         .id             = 2,
 184 };
 185 static struct clk pck3 = {
 186         .name           = "pck3",
 187         .pmc_mask       = AT91_PMC_PCK3,
 188         .type           = CLK_TYPE_PROGRAMMABLE,
 189         .id             = 3,
 190 };
 191
 192 static void __init at91sam9263_register_clocks(void)
 193 {
 194         int i;
 195
 196         for (i = 0; i < ARRAY_SIZE(periph_clocks); i++)
 197                 clk_register(periph_clocks[i]);
 198
 199         clk_register(&pck0);
 200         clk_register(&pck1);
 201         clk_register(&pck2);
 202         clk_register(&pck3);
 203 }
 204
 205 /* --------------------------------------------------------------------
 206  *  GPIO
 207  * -------------------------------------------------------------------- */
 208
 209 static struct at91_gpio_bank at91sam9263_gpio[] = {
 210         {
 211                 .id             = AT91SAM9263_ID_PIOA,
 212                 .offset         = AT91_PIOA,
 213                 .clock          = &pioA_clk,
 214         }, {
 215                 .id             = AT91SAM9263_ID_PIOB,
 216                 .offset         = AT91_PIOB,
 217                 .clock          = &pioB_clk,
 218         }, {
 219                 .id             = AT91SAM9263_ID_PIOCDE,
 220                 .offset         = AT91_PIOC,
 221                 .clock          = &pioCDE_clk,
 222         }, {
 223                 .id             = AT91SAM9263_ID_PIOCDE,
 224                 .offset         = AT91_PIOD,
 225                 .clock          = &pioCDE_clk,
 226         }, {
 227                 .id             = AT91SAM9263_ID_PIOCDE,
 228                 .offset         = AT91_PIOE,
 229                 .clock          = &pioCDE_clk,
 230         }
 231 };
 232
 233 static void at91sam9263_reset(void)
 234 {
 235         at91_sys_write(AT91_RSTC_CR, AT91_RSTC_KEY | AT91_RSTC_PROCRST | AT91_RSTC_PERRST);
 236 }
 237
 238
 239 /* --------------------------------------------------------------------
 240  *  AT91SAM9263 processor initialization
 241  * -------------------------------------------------------------------- */
 242
 243 void __init at91sam9263_initialize(unsigned long main_clock)
 244 {
 245         /* Map peripherals */
 246         iotable_init(at91sam9263_io_desc, ARRAY_SIZE(at91sam9263_io_desc));
 247
 248         at91_arch_reset = at91sam9263_reset;
 249         at91_extern_irq = (1 << AT91SAM9263_ID_IRQ0) | (1 << AT91SAM9263_ID_IRQ1);
 250
 251         /* Init clock subsystem */
 252         at91_clock_init(main_clock);
 253
 254         /* Register the processor-specific clocks */
 255         at91sam9263_register_clocks();
 256
 257         /* Register GPIO subsystem */
 258         at91_gpio_init(at91sam9263_gpio, 5);
 259 }
 260
 261 /* --------------------------------------------------------------------
 262  *  Interrupt initialization
 263  * -------------------------------------------------------------------- */
 264
 265 /*
 266  * The default interrupt priority levels (0 = lowest, 7 = highest).
 267  */
 268 static unsigned int at91sam9263_default_irq_priority[NR_AIC_IRQS] __initdata = {
 269         7,      /* Advanced Interrupt Controller (FIQ) */
 270         7,      /* System Peripherals */
 271         0,      /* Parallel IO Controller A */
 272         0,      /* Parallel IO Controller B */
 273         0,      /* Parallel IO Controller C, D and E */
 274         0,
 275         0,
 276         6,      /* USART 0 */
 277         6,      /* USART 1 */
 278         6,      /* USART 2 */
 279         0,      /* Multimedia Card Interface 0 */
 280         0,      /* Multimedia Card Interface 1 */
 281         4,      /* CAN */
 282         0,      /* Two-Wire Interface */
 283         6,      /* Serial Peripheral Interface 0 */
 284         6,      /* Serial Peripheral Interface 1 */
 285         5,      /* Serial Synchronous Controller 0 */
 286         5,      /* Serial Synchronous Controller 1 */
 287         6,      /* AC97 Controller */
 288         0,      /* Timer Counter 0, 1 and 2 */
 289         0,      /* Pulse Width Modulation Controller */
 290         3,      /* Ethernet */
 291         0,
 292         0,      /* 2D Graphic Engine */
 293         3,      /* USB Device Port */
 294         0,      /* Image Sensor Interface */
 295         3,      /* LDC Controller */
 296         0,      /* DMA Controller */
 297         0,
 298         3,      /* USB Host port */
 299         0,      /* Advanced Interrupt Controller (IRQ0) */
 300         0,      /* Advanced Interrupt Controller (IRQ1) */
 301 };
 302
 303 void __init at91sam9263_init_interrupts(unsigned int priority[NR_AIC_IRQS])
 304 {
 305         if (!priority)
 306                 priority = at91sam9263_default_irq_priority;
 307
 308         /* Initialize the AIC interrupt controller */
 309         at91_aic_init(priority);
 310
 311         /* Enable GPIO interrupts */
 312         at91_gpio_irq_setup();
 313 }