?  search:
summary | log | graphiclog1 | graphiclog2 | commit | commitdiff | tree | refs | edit | fork
blame | history | raw | HEAD
Char: mxser, prints cleanup
[linux-2.6/cjktty.git] / drivers / char / mxser.c
blob57570f7db2be0d1388ac6b2c326c31bdcf1534d5
1 /*
2 * mxser.c -- MOXA Smartio/Industio family multiport serial driver.
3 *
4 * Copyright (C) 1999-2006 Moxa Technologies (support@moxa.com).
5 * Copyright (C) 2006-2008 Jiri Slaby <jirislaby@gmail.com>
6 *
7 * This code is loosely based on the 1.8 moxa driver which is based on
8 * Linux serial driver, written by Linus Torvalds, Theodore T'so and
9 * others.
10 *
11 * This program is free software; you can redistribute it and/or modify
12 * it under the terms of the GNU General Public License as published by
13 * the Free Software Foundation; either version 2 of the License, or
14 * (at your option) any later version.
15 *
16 * Fed through a cleanup, indent and remove of non 2.6 code by Alan Cox
17 * <alan@redhat.com>. The original 1.8 code is available on www.moxa.com.
18 * - Fixed x86_64 cleanness
19 */
20
21 #include <linux/module.h>
22 #include <linux/errno.h>
23 #include <linux/signal.h>
24 #include <linux/sched.h>
25 #include <linux/timer.h>
26 #include <linux/interrupt.h>
27 #include <linux/tty.h>
28 #include <linux/tty_flip.h>
29 #include <linux/serial.h>
30 #include <linux/serial_reg.h>
31 #include <linux/major.h>
32 #include <linux/string.h>
33 #include <linux/fcntl.h>
34 #include <linux/ptrace.h>
35 #include <linux/gfp.h>
36 #include <linux/ioport.h>
37 #include <linux/mm.h>
38 #include <linux/delay.h>
39 #include <linux/pci.h>
40 #include <linux/bitops.h>
41
42 #include <asm/system.h>
43 #include <asm/io.h>
44 #include <asm/irq.h>
45 #include <asm/uaccess.h>
46
47 #include "mxser.h"
48
49 #define MXSER_VERSION "2.0.4" /* 1.12 */
50 #define MXSERMAJOR 174
51 #define MXSERCUMAJOR 175
52
53 #define MXSER_BOARDS 4 /* Max. boards */
54 #define MXSER_PORTS_PER_BOARD 8 /* Max. ports per board */
55 #define MXSER_PORTS (MXSER_BOARDS * MXSER_PORTS_PER_BOARD)
56 #define MXSER_ISR_PASS_LIMIT 100
57
58 /*CheckIsMoxaMust return value*/
59 #define MOXA_OTHER_UART 0x00
60 #define MOXA_MUST_MU150_HWID 0x01
61 #define MOXA_MUST_MU860_HWID 0x02
62
63 #define WAKEUP_CHARS 256
64
65 #define UART_MCR_AFE 0x20
66 #define UART_LSR_SPECIAL 0x1E
67
68 #define PCI_DEVICE_ID_POS104UL 0x1044
69 #define PCI_DEVICE_ID_CB108 0x1080
70 #define PCI_DEVICE_ID_CP102UF 0x1023
71 #define PCI_DEVICE_ID_CB114 0x1142
72 #define PCI_DEVICE_ID_CP114UL 0x1143
73 #define PCI_DEVICE_ID_CB134I 0x1341
74 #define PCI_DEVICE_ID_CP138U 0x1380
75
76
77 #define C168_ASIC_ID 1
78 #define C104_ASIC_ID 2
79 #define C102_ASIC_ID 0xB
80 #define CI132_ASIC_ID 4
81 #define CI134_ASIC_ID 3
82 #define CI104J_ASIC_ID 5
83
84 #define MXSER_HIGHBAUD 1
85 #define MXSER_HAS2 2
86
87 /* This is only for PCI */
88 static const struct {
89 int type;
90 int tx_fifo;
91 int rx_fifo;
92 int xmit_fifo_size;
93 int rx_high_water;
94 int rx_trigger;
95 int rx_low_water;
96 long max_baud;
97 } Gpci_uart_info[] = {
98 {MOXA_OTHER_UART, 16, 16, 16, 14, 14, 1, 921600L},
99 {MOXA_MUST_MU150_HWID, 64, 64, 64, 48, 48, 16, 230400L},
100 {MOXA_MUST_MU860_HWID, 128, 128, 128, 96, 96, 32, 921600L}
101 };
102 #define UART_INFO_NUM ARRAY_SIZE(Gpci_uart_info)
103
104 struct mxser_cardinfo {
105 char *name;
106 unsigned int nports;
107 unsigned int flags;
108 };
109
110 static const struct mxser_cardinfo mxser_cards[] = {
111 /* 0*/ { "C168 series", 8, },
112 { "C104 series", 4, },
113 { "CI-104J series", 4, },
114 { "C168H/PCI series", 8, },
115 { "C104H/PCI series", 4, },
116 /* 5*/ { "C102 series", 4, MXSER_HAS2 }, /* C102-ISA */
117 { "CI-132 series", 4, MXSER_HAS2 },
118 { "CI-134 series", 4, },
119 { "CP-132 series", 2, },
120 { "CP-114 series", 4, },
121 /*10*/ { "CT-114 series", 4, },
122 { "CP-102 series", 2, MXSER_HIGHBAUD },
123 { "CP-104U series", 4, },
124 { "CP-168U series", 8, },
125 { "CP-132U series", 2, },
126 /*15*/ { "CP-134U series", 4, },
127 { "CP-104JU series", 4, },
128 { "Moxa UC7000 Serial", 8, }, /* RC7000 */
129 { "CP-118U series", 8, },
130 { "CP-102UL series", 2, },
131 /*20*/ { "CP-102U series", 2, },
132 { "CP-118EL series", 8, },
133 { "CP-168EL series", 8, },
134 { "CP-104EL series", 4, },
135 { "CB-108 series", 8, },
136 /*25*/ { "CB-114 series", 4, },
137 { "CB-134I series", 4, },
138 { "CP-138U series", 8, },
139 { "POS-104UL series", 4, },
140 { "CP-114UL series", 4, },
141 /*30*/ { "CP-102UF series", 2, }
142 };
143
144 /* driver_data correspond to the lines in the structure above
145 see also ISA probe function before you change something */
146 static struct pci_device_id mxser_pcibrds[] = {
147 { PCI_VDEVICE(MOXA, PCI_DEVICE_ID_MOXA_C168), .driver_data = 3 },
148 { PCI_VDEVICE(MOXA, PCI_DEVICE_ID_MOXA_C104), .driver_data = 4 },
149 { PCI_VDEVICE(MOXA, PCI_DEVICE_ID_MOXA_CP132), .driver_data = 8 },
150 { PCI_VDEVICE(MOXA, PCI_DEVICE_ID_MOXA_CP114), .driver_data = 9 },
151 { PCI_VDEVICE(MOXA, PCI_DEVICE_ID_MOXA_CT114), .driver_data = 10 },
152 { PCI_VDEVICE(MOXA, PCI_DEVICE_ID_MOXA_CP102), .driver_data = 11 },
153 { PCI_VDEVICE(MOXA, PCI_DEVICE_ID_MOXA_CP104U), .driver_data = 12 },
154 { PCI_VDEVICE(MOXA, PCI_DEVICE_ID_MOXA_CP168U), .driver_data = 13 },
155 { PCI_VDEVICE(MOXA, PCI_DEVICE_ID_MOXA_CP132U), .driver_data = 14 },
156 { PCI_VDEVICE(MOXA, PCI_DEVICE_ID_MOXA_CP134U), .driver_data = 15 },
157 { PCI_VDEVICE(MOXA, PCI_DEVICE_ID_MOXA_CP104JU),.driver_data = 16 },
158 { PCI_VDEVICE(MOXA, PCI_DEVICE_ID_MOXA_RC7000), .driver_data = 17 },
159 { PCI_VDEVICE(MOXA, PCI_DEVICE_ID_MOXA_CP118U), .driver_data = 18 },
160 { PCI_VDEVICE(MOXA, PCI_DEVICE_ID_MOXA_CP102UL),.driver_data = 19 },
161 { PCI_VDEVICE(MOXA, PCI_DEVICE_ID_MOXA_CP102U), .driver_data = 20 },
162 { PCI_VDEVICE(MOXA, PCI_DEVICE_ID_MOXA_CP118EL),.driver_data = 21 },
163 { PCI_VDEVICE(MOXA, PCI_DEVICE_ID_MOXA_CP168EL),.driver_data = 22 },
164 { PCI_VDEVICE(MOXA, PCI_DEVICE_ID_MOXA_CP104EL),.driver_data = 23 },
165 { PCI_VDEVICE(MOXA, PCI_DEVICE_ID_CB108), .driver_data = 24 },
166 { PCI_VDEVICE(MOXA, PCI_DEVICE_ID_CB114), .driver_data = 25 },
167 { PCI_VDEVICE(MOXA, PCI_DEVICE_ID_CB134I), .driver_data = 26 },
168 { PCI_VDEVICE(MOXA, PCI_DEVICE_ID_CP138U), .driver_data = 27 },
169 { PCI_VDEVICE(MOXA, PCI_DEVICE_ID_POS104UL), .driver_data = 28 },
170 { PCI_VDEVICE(MOXA, PCI_DEVICE_ID_CP114UL), .driver_data = 29 },
171 { PCI_VDEVICE(MOXA, PCI_DEVICE_ID_CP102UF), .driver_data = 30 },
172 { }
173 };
174 MODULE_DEVICE_TABLE(pci, mxser_pcibrds);
175
176 static int ioaddr[MXSER_BOARDS] = { 0, 0, 0, 0 };
177 static int ttymajor = MXSERMAJOR;
178
179 /* Variables for insmod */
180
181 MODULE_AUTHOR("Casper Yang");
182 MODULE_DESCRIPTION("MOXA Smartio/Industio Family Multiport Board Device Driver");
183 module_param_array(ioaddr, int, NULL, 0);
184 module_param(ttymajor, int, 0);
185 MODULE_LICENSE("GPL");
186
187 struct mxser_log {
188 int tick;
189 unsigned long rxcnt[MXSER_PORTS];
190 unsigned long txcnt[MXSER_PORTS];
191 };
192
193
194 struct mxser_mon {
195 unsigned long rxcnt;
196 unsigned long txcnt;
197 unsigned long up_rxcnt;
198 unsigned long up_txcnt;
199 int modem_status;
200 unsigned char hold_reason;
201 };
202
203 struct mxser_mon_ext {
204 unsigned long rx_cnt[32];
205 unsigned long tx_cnt[32];
206 unsigned long up_rxcnt[32];
207 unsigned long up_txcnt[32];
208 int modem_status[32];
209
210 long baudrate[32];
211 int databits[32];
212 int stopbits[32];
213 int parity[32];
214 int flowctrl[32];
215 int fifo[32];
216 int iftype[32];
217 };
218
219 struct mxser_board;
220
221 struct mxser_port {
222 struct tty_port port;
223 struct mxser_board *board;
224
225 unsigned long ioaddr;
226 unsigned long opmode_ioaddr;
227 int max_baud;
228
229 int rx_high_water;
230 int rx_trigger; /* Rx fifo trigger level */
231 int rx_low_water;
232 int baud_base; /* max. speed */
233 int type; /* UART type */
234
235 int x_char; /* xon/xoff character */
236 int IER; /* Interrupt Enable Register */
237 int MCR; /* Modem control register */
238
239 unsigned char stop_rx;
240 unsigned char ldisc_stop_rx;
241
242 int custom_divisor;
243 unsigned char err_shadow;
244
245 struct async_icount icount; /* kernel counters for 4 input interrupts */
246 int timeout;
247
248 int read_status_mask;
249 int ignore_status_mask;
250 int xmit_fifo_size;
251 int xmit_head;
252 int xmit_tail;
253 int xmit_cnt;
254
255 struct ktermios normal_termios;
256
257 struct mxser_mon mon_data;
258
259 spinlock_t slock;
260 wait_queue_head_t delta_msr_wait;
261 };
262
263 struct mxser_board {
264 unsigned int idx;
265 int irq;
266 const struct mxser_cardinfo *info;
267 unsigned long vector;
268 unsigned long vector_mask;
269
270 int chip_flag;
271 int uart_type;
272
273 struct mxser_port ports[MXSER_PORTS_PER_BOARD];
274 };
275
276 struct mxser_mstatus {
277 tcflag_t cflag;
278 int cts;
279 int dsr;
280 int ri;
281 int dcd;
282 };
283
284 static int mxserBoardCAP[MXSER_BOARDS] = {
285 0, 0, 0, 0
286 /* 0x180, 0x280, 0x200, 0x320 */
287 };
288
289 static struct mxser_board mxser_boards[MXSER_BOARDS];
290 static struct tty_driver *mxvar_sdriver;
291 static struct mxser_log mxvar_log;
292 static int mxser_set_baud_method[MXSER_PORTS + 1];
293
294 static void mxser_enable_must_enchance_mode(unsigned long baseio)
295 {
296 u8 oldlcr;
297 u8 efr;
298
299 oldlcr = inb(baseio + UART_LCR);
300 outb(MOXA_MUST_ENTER_ENCHANCE, baseio + UART_LCR);
301
302 efr = inb(baseio + MOXA_MUST_EFR_REGISTER);
303 efr |= MOXA_MUST_EFR_EFRB_ENABLE;
304
305 outb(efr, baseio + MOXA_MUST_EFR_REGISTER);
306 outb(oldlcr, baseio + UART_LCR);
307 }
308
309 static void mxser_disable_must_enchance_mode(unsigned long baseio)
310 {
311 u8 oldlcr;
312 u8 efr;
313
314 oldlcr = inb(baseio + UART_LCR);
315 outb(MOXA_MUST_ENTER_ENCHANCE, baseio + UART_LCR);
316
317 efr = inb(baseio + MOXA_MUST_EFR_REGISTER);
318 efr &= ~MOXA_MUST_EFR_EFRB_ENABLE;
319
320 outb(efr, baseio + MOXA_MUST_EFR_REGISTER);
321 outb(oldlcr, baseio + UART_LCR);
322 }
323
324 static void mxser_set_must_xon1_value(unsigned long baseio, u8 value)
325 {
326 u8 oldlcr;
327 u8 efr;
328
329 oldlcr = inb(baseio + UART_LCR);
330 outb(MOXA_MUST_ENTER_ENCHANCE, baseio + UART_LCR);
331
332 efr = inb(baseio + MOXA_MUST_EFR_REGISTER);
333 efr &= ~MOXA_MUST_EFR_BANK_MASK;
334 efr |= MOXA_MUST_EFR_BANK0;
335
336 outb(efr, baseio + MOXA_MUST_EFR_REGISTER);
337 outb(value, baseio + MOXA_MUST_XON1_REGISTER);
338 outb(oldlcr, baseio + UART_LCR);
339 }
340
341 static void mxser_set_must_xoff1_value(unsigned long baseio, u8 value)
342 {
343 u8 oldlcr;
344 u8 efr;
345
346 oldlcr = inb(baseio + UART_LCR);
347 outb(MOXA_MUST_ENTER_ENCHANCE, baseio + UART_LCR);
348
349 efr = inb(baseio + MOXA_MUST_EFR_REGISTER);
350 efr &= ~MOXA_MUST_EFR_BANK_MASK;
351 efr |= MOXA_MUST_EFR_BANK0;
352
353 outb(efr, baseio + MOXA_MUST_EFR_REGISTER);
354 outb(value, baseio + MOXA_MUST_XOFF1_REGISTER);
355 outb(oldlcr, baseio + UART_LCR);
356 }
357
358 static void mxser_set_must_fifo_value(struct mxser_port *info)
359 {
360 u8 oldlcr;
361 u8 efr;
362
363 oldlcr = inb(info->ioaddr + UART_LCR);
364 outb(MOXA_MUST_ENTER_ENCHANCE, info->ioaddr + UART_LCR);
365
366 efr = inb(info->ioaddr + MOXA_MUST_EFR_REGISTER);
367 efr &= ~MOXA_MUST_EFR_BANK_MASK;
368 efr |= MOXA_MUST_EFR_BANK1;
369
370 outb(efr, info->ioaddr + MOXA_MUST_EFR_REGISTER);
371 outb((u8)info->rx_high_water, info->ioaddr + MOXA_MUST_RBRTH_REGISTER);
372 outb((u8)info->rx_trigger, info->ioaddr + MOXA_MUST_RBRTI_REGISTER);
373 outb((u8)info->rx_low_water, info->ioaddr + MOXA_MUST_RBRTL_REGISTER);
374 outb(oldlcr, info->ioaddr + UART_LCR);
375 }
376
377 static void mxser_set_must_enum_value(unsigned long baseio, u8 value)
378 {
379 u8 oldlcr;
380 u8 efr;
381
382 oldlcr = inb(baseio + UART_LCR);
383 outb(MOXA_MUST_ENTER_ENCHANCE, baseio + UART_LCR);
384
385 efr = inb(baseio + MOXA_MUST_EFR_REGISTER);
386 efr &= ~MOXA_MUST_EFR_BANK_MASK;
387 efr |= MOXA_MUST_EFR_BANK2;
388
389 outb(efr, baseio + MOXA_MUST_EFR_REGISTER);
390 outb(value, baseio + MOXA_MUST_ENUM_REGISTER);
391 outb(oldlcr, baseio + UART_LCR);
392 }
393
394 static void mxser_get_must_hardware_id(unsigned long baseio, u8 *pId)
395 {
396 u8 oldlcr;
397 u8 efr;
398
399 oldlcr = inb(baseio + UART_LCR);
400 outb(MOXA_MUST_ENTER_ENCHANCE, baseio + UART_LCR);
401
402 efr = inb(baseio + MOXA_MUST_EFR_REGISTER);
403 efr &= ~MOXA_MUST_EFR_BANK_MASK;
404 efr |= MOXA_MUST_EFR_BANK2;
405
406 outb(efr, baseio + MOXA_MUST_EFR_REGISTER);
407 *pId = inb(baseio + MOXA_MUST_HWID_REGISTER);
408 outb(oldlcr, baseio + UART_LCR);
409 }
410
411 static void SET_MOXA_MUST_NO_SOFTWARE_FLOW_CONTROL(unsigned long baseio)
412 {
413 u8 oldlcr;
414 u8 efr;
415
416 oldlcr = inb(baseio + UART_LCR);
417 outb(MOXA_MUST_ENTER_ENCHANCE, baseio + UART_LCR);
418
419 efr = inb(baseio + MOXA_MUST_EFR_REGISTER);
420 efr &= ~MOXA_MUST_EFR_SF_MASK;
421
422 outb(efr, baseio + MOXA_MUST_EFR_REGISTER);
423 outb(oldlcr, baseio + UART_LCR);
424 }
425
426 static void mxser_enable_must_tx_software_flow_control(unsigned long baseio)
427 {
428 u8 oldlcr;
429 u8 efr;
430
431 oldlcr = inb(baseio + UART_LCR);
432 outb(MOXA_MUST_ENTER_ENCHANCE, baseio + UART_LCR);
433
434 efr = inb(baseio + MOXA_MUST_EFR_REGISTER);
435 efr &= ~MOXA_MUST_EFR_SF_TX_MASK;
436 efr |= MOXA_MUST_EFR_SF_TX1;
437
438 outb(efr, baseio + MOXA_MUST_EFR_REGISTER);
439 outb(oldlcr, baseio + UART_LCR);
440 }
441
442 static void mxser_disable_must_tx_software_flow_control(unsigned long baseio)
443 {
444 u8 oldlcr;
445 u8 efr;
446
447 oldlcr = inb(baseio + UART_LCR);
448 outb(MOXA_MUST_ENTER_ENCHANCE, baseio + UART_LCR);
449
450 efr = inb(baseio + MOXA_MUST_EFR_REGISTER);
451 efr &= ~MOXA_MUST_EFR_SF_TX_MASK;
452
453 outb(efr, baseio + MOXA_MUST_EFR_REGISTER);
454 outb(oldlcr, baseio + UART_LCR);
455 }
456
457 static void mxser_enable_must_rx_software_flow_control(unsigned long baseio)
458 {
459 u8 oldlcr;
460 u8 efr;
461
462 oldlcr = inb(baseio + UART_LCR);
463 outb(MOXA_MUST_ENTER_ENCHANCE, baseio + UART_LCR);
464
465 efr = inb(baseio + MOXA_MUST_EFR_REGISTER);
466 efr &= ~MOXA_MUST_EFR_SF_RX_MASK;
467 efr |= MOXA_MUST_EFR_SF_RX1;
468
469 outb(efr, baseio + MOXA_MUST_EFR_REGISTER);
470 outb(oldlcr, baseio + UART_LCR);
471 }
472
473 static void mxser_disable_must_rx_software_flow_control(unsigned long baseio)
474 {
475 u8 oldlcr;
476 u8 efr;
477
478 oldlcr = inb(baseio + UART_LCR);
479 outb(MOXA_MUST_ENTER_ENCHANCE, baseio + UART_LCR);
480
481 efr = inb(baseio + MOXA_MUST_EFR_REGISTER);
482 efr &= ~MOXA_MUST_EFR_SF_RX_MASK;
483
484 outb(efr, baseio + MOXA_MUST_EFR_REGISTER);
485 outb(oldlcr, baseio + UART_LCR);
486 }
487
488 #ifdef CONFIG_PCI
489 static int __devinit CheckIsMoxaMust(unsigned long io)
490 {
491 u8 oldmcr, hwid;
492 int i;
493
494 outb(0, io + UART_LCR);
495 mxser_disable_must_enchance_mode(io);
496 oldmcr = inb(io + UART_MCR);
497 outb(0, io + UART_MCR);
498 mxser_set_must_xon1_value(io, 0x11);
499 if ((hwid = inb(io + UART_MCR)) != 0) {
500 outb(oldmcr, io + UART_MCR);
501 return MOXA_OTHER_UART;
502 }
503
504 mxser_get_must_hardware_id(io, &hwid);
505 for (i = 1; i < UART_INFO_NUM; i++) { /* 0 = OTHER_UART */
506 if (hwid == Gpci_uart_info[i].type)
507 return (int)hwid;
508 }
509 return MOXA_OTHER_UART;
510 }
511 #endif
512
513 static void process_txrx_fifo(struct mxser_port *info)
514 {
515 int i;
516
517 if ((info->type == PORT_16450) || (info->type == PORT_8250)) {
518 info->rx_trigger = 1;
519 info->rx_high_water = 1;
520 info->rx_low_water = 1;
521 info->xmit_fifo_size = 1;
522 } else
523 for (i = 0; i < UART_INFO_NUM; i++)
524 if (info->board->chip_flag == Gpci_uart_info[i].type) {
525 info->rx_trigger = Gpci_uart_info[i].rx_trigger;
526 info->rx_low_water = Gpci_uart_info[i].rx_low_water;
527 info->rx_high_water = Gpci_uart_info[i].rx_high_water;
528 info->xmit_fifo_size = Gpci_uart_info[i].xmit_fifo_size;
529 break;
530 }
531 }
532
533 static unsigned char mxser_get_msr(int baseaddr, int mode, int port)
534 {
535 static unsigned char mxser_msr[MXSER_PORTS + 1];
536 unsigned char status = 0;
537
538 status = inb(baseaddr + UART_MSR);
539
540 mxser_msr[port] &= 0x0F;
541 mxser_msr[port] |= status;
542 status = mxser_msr[port];
543 if (mode)
544 mxser_msr[port] = 0;
545
546 return status;
547 }
548
549 static int mxser_block_til_ready(struct tty_struct *tty, struct file *filp,
550 struct mxser_port *port)
551 {
552 DECLARE_WAITQUEUE(wait, current);
553 int retval;
554 int do_clocal = 0;
555 unsigned long flags;
556
557 /*
558 * If non-blocking mode is set, or the port is not enabled,
559 * then make the check up front and then exit.
560 */
561 if ((filp->f_flags & O_NONBLOCK) ||
562 test_bit(TTY_IO_ERROR, &tty->flags)) {
563 port->port.flags |= ASYNC_NORMAL_ACTIVE;
564 return 0;
565 }
566
567 if (tty->termios->c_cflag & CLOCAL)
568 do_clocal = 1;
569
570 /*
571 * Block waiting for the carrier detect and the line to become
572 * free (i.e., not in use by the callout). While we are in
573 * this loop, port->port.count is dropped by one, so that
574 * mxser_close() knows when to free things. We restore it upon
575 * exit, either normal or abnormal.
576 */
577 retval = 0;
578 add_wait_queue(&port->port.open_wait, &wait);
579
580 spin_lock_irqsave(&port->slock, flags);
581 if (!tty_hung_up_p(filp))
582 port->port.count--;
583 spin_unlock_irqrestore(&port->slock, flags);
584 port->port.blocked_open++;
585 while (1) {
586 spin_lock_irqsave(&port->slock, flags);
587 outb(inb(port->ioaddr + UART_MCR) |
588 UART_MCR_DTR | UART_MCR_RTS, port->ioaddr + UART_MCR);
589 spin_unlock_irqrestore(&port->slock, flags);
590 set_current_state(TASK_INTERRUPTIBLE);
591 if (tty_hung_up_p(filp) || !(port->port.flags & ASYNC_INITIALIZED)) {
592 if (port->port.flags & ASYNC_HUP_NOTIFY)
593 retval = -EAGAIN;
594 else
595 retval = -ERESTARTSYS;
596 break;
597 }
598 if (!(port->port.flags & ASYNC_CLOSING) &&
599 (do_clocal ||
600 (inb(port->ioaddr + UART_MSR) & UART_MSR_DCD)))
601 break;
602 if (signal_pending(current)) {
603 retval = -ERESTARTSYS;
604 break;
605 }
606 schedule();
607 }
608 set_current_state(TASK_RUNNING);
609 remove_wait_queue(&port->port.open_wait, &wait);
610 if (!tty_hung_up_p(filp))
611 port->port.count++;
612 port->port.blocked_open--;
613 if (retval)
614 return retval;
615 port->port.flags |= ASYNC_NORMAL_ACTIVE;
616 return 0;
617 }
618
619 static int mxser_set_baud(struct mxser_port *info, long newspd)
620 {
621 int quot = 0, baud;
622 unsigned char cval;
623
624 if (!info->port.tty || !info->port.tty->termios)
625 return -1;
626
627 if (!(info->ioaddr))
628 return -1;
629
630 if (newspd > info->max_baud)
631 return -1;
632
633 if (newspd == 134) {
634 quot = 2 * info->baud_base / 269;
635 tty_encode_baud_rate(info->port.tty, 134, 134);
636 } else if (newspd) {
637 quot = info->baud_base / newspd;
638 if (quot == 0)
639 quot = 1;
640 baud = info->baud_base/quot;
641 tty_encode_baud_rate(info->port.tty, baud, baud);
642 } else {
643 quot = 0;
644 }
645
646 info->timeout = ((info->xmit_fifo_size * HZ * 10 * quot) / info->baud_base);
647 info->timeout += HZ / 50; /* Add .02 seconds of slop */
648
649 if (quot) {
650 info->MCR |= UART_MCR_DTR;
651 outb(info->MCR, info->ioaddr + UART_MCR);
652 } else {
653 info->MCR &= ~UART_MCR_DTR;
654 outb(info->MCR, info->ioaddr + UART_MCR);
655 return 0;
656 }
657
658 cval = inb(info->ioaddr + UART_LCR);
659
660 outb(cval | UART_LCR_DLAB, info->ioaddr + UART_LCR); /* set DLAB */
661
662 outb(quot & 0xff, info->ioaddr + UART_DLL); /* LS of divisor */
663 outb(quot >> 8, info->ioaddr + UART_DLM); /* MS of divisor */
664 outb(cval, info->ioaddr + UART_LCR); /* reset DLAB */
665
666 #ifdef BOTHER
667 if (C_BAUD(info->port.tty) == BOTHER) {
668 quot = info->baud_base % newspd;
669 quot *= 8;
670 if (quot % newspd > newspd / 2) {
671 quot /= newspd;
672 quot++;
673 } else
674 quot /= newspd;
675
676 mxser_set_must_enum_value(info->ioaddr, quot);
677 } else
678 #endif
679 mxser_set_must_enum_value(info->ioaddr, 0);
680
681 return 0;
682 }
683
684 /*
685 * This routine is called to set the UART divisor registers to match
686 * the specified baud rate for a serial port.
687 */
688 static int mxser_change_speed(struct mxser_port *info,
689 struct ktermios *old_termios)
690 {
691 unsigned cflag, cval, fcr;
692 int ret = 0;
693 unsigned char status;
694
695 if (!info->port.tty || !info->port.tty->termios)
696 return ret;
697 cflag = info->port.tty->termios->c_cflag;
698 if (!(info->ioaddr))
699 return ret;
700
701 if (mxser_set_baud_method[info->port.tty->index] == 0)
702 mxser_set_baud(info, tty_get_baud_rate(info->port.tty));
703
704 /* byte size and parity */
705 switch (cflag & CSIZE) {
706 case CS5:
707 cval = 0x00;
708 break;
709 case CS6:
710 cval = 0x01;
711 break;
712 case CS7:
713 cval = 0x02;
714 break;
715 case CS8:
716 cval = 0x03;
717 break;
718 default:
719 cval = 0x00;
720 break; /* too keep GCC shut... */
721 }
722 if (cflag & CSTOPB)
723 cval |= 0x04;
724 if (cflag & PARENB)
725 cval |= UART_LCR_PARITY;
726 if (!(cflag & PARODD))
727 cval |= UART_LCR_EPAR;
728 if (cflag & CMSPAR)
729 cval |= UART_LCR_SPAR;
730
731 if ((info->type == PORT_8250) || (info->type == PORT_16450)) {
732 if (info->board->chip_flag) {
733 fcr = UART_FCR_ENABLE_FIFO;
734 fcr |= MOXA_MUST_FCR_GDA_MODE_ENABLE;
735 mxser_set_must_fifo_value(info);
736 } else
737 fcr = 0;
738 } else {
739 fcr = UART_FCR_ENABLE_FIFO;
740 if (info->board->chip_flag) {
741 fcr |= MOXA_MUST_FCR_GDA_MODE_ENABLE;
742 mxser_set_must_fifo_value(info);
743 } else {
744 switch (info->rx_trigger) {
745 case 1:
746 fcr |= UART_FCR_TRIGGER_1;
747 break;
748 case 4:
749 fcr |= UART_FCR_TRIGGER_4;
750 break;
751 case 8:
752 fcr |= UART_FCR_TRIGGER_8;
753 break;
754 default:
755 fcr |= UART_FCR_TRIGGER_14;
756 break;
757 }
758 }
759 }
760
761 /* CTS flow control flag and modem status interrupts */
762 info->IER &= ~UART_IER_MSI;
763 info->MCR &= ~UART_MCR_AFE;
764 if (cflag & CRTSCTS) {
765 info->port.flags |= ASYNC_CTS_FLOW;
766 info->IER |= UART_IER_MSI;
767 if ((info->type == PORT_16550A) || (info->board->chip_flag)) {
768 info->MCR |= UART_MCR_AFE;
769 } else {
770 status = inb(info->ioaddr + UART_MSR);
771 if (info->port.tty->hw_stopped) {
772 if (status & UART_MSR_CTS) {
773 info->port.tty->hw_stopped = 0;
774 if (info->type != PORT_16550A &&
775 !info->board->chip_flag) {
776 outb(info->IER & ~UART_IER_THRI,
777 info->ioaddr +
778 UART_IER);
779 info->IER |= UART_IER_THRI;
780 outb(info->IER, info->ioaddr +
781 UART_IER);
782 }
783 tty_wakeup(info->port.tty);
784 }
785 } else {
786 if (!(status & UART_MSR_CTS)) {
787 info->port.tty->hw_stopped = 1;
788 if ((info->type != PORT_16550A) &&
789 (!info->board->chip_flag)) {
790 info->IER &= ~UART_IER_THRI;
791 outb(info->IER, info->ioaddr +
792 UART_IER);
793 }
794 }
795 }
796 }
797 } else {
798 info->port.flags &= ~ASYNC_CTS_FLOW;
799 }
800 outb(info->MCR, info->ioaddr + UART_MCR);
801 if (cflag & CLOCAL) {
802 info->port.flags &= ~ASYNC_CHECK_CD;
803 } else {
804 info->port.flags |= ASYNC_CHECK_CD;
805 info->IER |= UART_IER_MSI;
806 }
807 outb(info->IER, info->ioaddr + UART_IER);
808
809 /*
810 * Set up parity check flag
811 */
812 info->read_status_mask = UART_LSR_OE | UART_LSR_THRE | UART_LSR_DR;
813 if (I_INPCK(info->port.tty))
814 info->read_status_mask |= UART_LSR_FE | UART_LSR_PE;
815 if (I_BRKINT(info->port.tty) || I_PARMRK(info->port.tty))
816 info->read_status_mask |= UART_LSR_BI;
817
818 info->ignore_status_mask = 0;
819
820 if (I_IGNBRK(info->port.tty)) {
821 info->ignore_status_mask |= UART_LSR_BI;
822 info->read_status_mask |= UART_LSR_BI;
823 /*
824 * If we're ignore parity and break indicators, ignore
825 * overruns too. (For real raw support).
826 */
827 if (I_IGNPAR(info->port.tty)) {
828 info->ignore_status_mask |=
829 UART_LSR_OE |
830 UART_LSR_PE |
831 UART_LSR_FE;
832 info->read_status_mask |=
833 UART_LSR_OE |
834 UART_LSR_PE |
835 UART_LSR_FE;
836 }
837 }
838 if (info->board->chip_flag) {
839 mxser_set_must_xon1_value(info->ioaddr, START_CHAR(info->port.tty));
840 mxser_set_must_xoff1_value(info->ioaddr, STOP_CHAR(info->port.tty));
841 if (I_IXON(info->port.tty)) {
842 mxser_enable_must_rx_software_flow_control(
843 info->ioaddr);
844 } else {
845 mxser_disable_must_rx_software_flow_control(
846 info->ioaddr);
847 }
848 if (I_IXOFF(info->port.tty)) {
849 mxser_enable_must_tx_software_flow_control(
850 info->ioaddr);
851 } else {
852 mxser_disable_must_tx_software_flow_control(
853 info->ioaddr);
854 }
855 }
856
857
858 outb(fcr, info->ioaddr + UART_FCR); /* set fcr */
859 outb(cval, info->ioaddr + UART_LCR);
860
861 return ret;
862 }
863
864 static void mxser_check_modem_status(struct mxser_port *port, int status)
865 {
866 /* update input line counters */
867 if (status & UART_MSR_TERI)
868 port->icount.rng++;
869 if (status & UART_MSR_DDSR)
870 port->icount.dsr++;
871 if (status & UART_MSR_DDCD)
872 port->icount.dcd++;
873 if (status & UART_MSR_DCTS)
874 port->icount.cts++;
875 port->mon_data.modem_status = status;
876 wake_up_interruptible(&port->delta_msr_wait);
877
878 if ((port->port.flags & ASYNC_CHECK_CD) && (status & UART_MSR_DDCD)) {
879 if (status & UART_MSR_DCD)
880 wake_up_interruptible(&port->port.open_wait);
881 }
882
883 if (port->port.flags & ASYNC_CTS_FLOW) {
884 if (port->port.tty->hw_stopped) {
885 if (status & UART_MSR_CTS) {
886 port->port.tty->hw_stopped = 0;
887
888 if ((port->type != PORT_16550A) &&
889 (!port->board->chip_flag)) {
890 outb(port->IER & ~UART_IER_THRI,
891 port->ioaddr + UART_IER);
892 port->IER |= UART_IER_THRI;
893 outb(port->IER, port->ioaddr +
894 UART_IER);
895 }
896 tty_wakeup(port->port.tty);
897 }
898 } else {
899 if (!(status & UART_MSR_CTS)) {
900 port->port.tty->hw_stopped = 1;
901 if (port->type != PORT_16550A &&
902 !port->board->chip_flag) {
903 port->IER &= ~UART_IER_THRI;
904 outb(port->IER, port->ioaddr +
905 UART_IER);
906 }
907 }
908 }
909 }
910 }
911
912 static int mxser_startup(struct mxser_port *info)
913 {
914 unsigned long page;
915 unsigned long flags;
916
917 page = __get_free_page(GFP_KERNEL);
918 if (!page)
919 return -ENOMEM;
920
921 spin_lock_irqsave(&info->slock, flags);
922
923 if (info->port.flags & ASYNC_INITIALIZED) {
924 free_page(page);
925 spin_unlock_irqrestore(&info->slock, flags);
926 return 0;
927 }
928
929 if (!info->ioaddr || !info->type) {
930 if (info->port.tty)
931 set_bit(TTY_IO_ERROR, &info->port.tty->flags);
932 free_page(page);
933 spin_unlock_irqrestore(&info->slock, flags);
934 return 0;
935 }
936 if (info->port.xmit_buf)
937 free_page(page);
938 else
939 info->port.xmit_buf = (unsigned char *) page;
940
941 /*
942 * Clear the FIFO buffers and disable them
943 * (they will be reenabled in mxser_change_speed())
944 */
945 if (info->board->chip_flag)
946 outb((UART_FCR_CLEAR_RCVR |
947 UART_FCR_CLEAR_XMIT |
948 MOXA_MUST_FCR_GDA_MODE_ENABLE), info->ioaddr + UART_FCR);
949 else
950 outb((UART_FCR_CLEAR_RCVR | UART_FCR_CLEAR_XMIT),
951 info->ioaddr + UART_FCR);
952
953 /*
954 * At this point there's no way the LSR could still be 0xFF;
955 * if it is, then bail out, because there's likely no UART
956 * here.
957 */
958 if (inb(info->ioaddr + UART_LSR) == 0xff) {
959 spin_unlock_irqrestore(&info->slock, flags);
960 if (capable(CAP_SYS_ADMIN)) {
961 if (info->port.tty)
962 set_bit(TTY_IO_ERROR, &info->port.tty->flags);
963 return 0;
964 } else
965 return -ENODEV;
966 }
967
968 /*
969 * Clear the interrupt registers.
970 */
971 (void) inb(info->ioaddr + UART_LSR);
972 (void) inb(info->ioaddr + UART_RX);
973 (void) inb(info->ioaddr + UART_IIR);
974 (void) inb(info->ioaddr + UART_MSR);
975
976 /*
977 * Now, initialize the UART
978 */
979 outb(UART_LCR_WLEN8, info->ioaddr + UART_LCR); /* reset DLAB */
980 info->MCR = UART_MCR_DTR | UART_MCR_RTS;
981 outb(info->MCR, info->ioaddr + UART_MCR);
982
983 /*
984 * Finally, enable interrupts
985 */
986 info->IER = UART_IER_MSI | UART_IER_RLSI | UART_IER_RDI;
987
988 if (info->board->chip_flag)
989 info->IER |= MOXA_MUST_IER_EGDAI;
990 outb(info->IER, info->ioaddr + UART_IER); /* enable interrupts */
991
992 /*
993 * And clear the interrupt registers again for luck.
994 */
995 (void) inb(info->ioaddr + UART_LSR);
996 (void) inb(info->ioaddr + UART_RX);
997 (void) inb(info->ioaddr + UART_IIR);
998 (void) inb(info->ioaddr + UART_MSR);
999
1000 if (info->port.tty)
1001 clear_bit(TTY_IO_ERROR, &info->port.tty->flags);
1002 info->xmit_cnt = info->xmit_head = info->xmit_tail = 0;
1003
1004 /*
1005 * and set the speed of the serial port
1006 */
1007 mxser_change_speed(info, NULL);
1008 info->port.flags |= ASYNC_INITIALIZED;
1009 spin_unlock_irqrestore(&info->slock, flags);
1010
1011 return 0;
1012 }
1013
1014 /*
1015 * This routine will shutdown a serial port; interrupts maybe disabled, and
1016 * DTR is dropped if the hangup on close termio flag is on.
1017 */
1018 static void mxser_shutdown(struct mxser_port *info)
1019 {
1020 unsigned long flags;
1021
1022 if (!(info->port.flags & ASYNC_INITIALIZED))
1023 return;
1024
1025 spin_lock_irqsave(&info->slock, flags);
1026
1027 /*
1028 * clear delta_msr_wait queue to avoid mem leaks: we may free the irq
1029 * here so the queue might never be waken up
1030 */
1031 wake_up_interruptible(&info->delta_msr_wait);
1032
1033 /*
1034 * Free the IRQ, if necessary
1035 */
1036 if (info->port.xmit_buf) {
1037 free_page((unsigned long) info->port.xmit_buf);
1038 info->port.xmit_buf = NULL;
1039 }
1040
1041 info->IER = 0;
1042 outb(0x00, info->ioaddr + UART_IER);
1043
1044 if (!info->port.tty || (info->port.tty->termios->c_cflag & HUPCL))
1045 info->MCR &= ~(UART_MCR_DTR | UART_MCR_RTS);
1046 outb(info->MCR, info->ioaddr + UART_MCR);
1047
1048 /* clear Rx/Tx FIFO's */
1049 if (info->board->chip_flag)
1050 outb(UART_FCR_CLEAR_RCVR | UART_FCR_CLEAR_XMIT |
1051 MOXA_MUST_FCR_GDA_MODE_ENABLE,
1052 info->ioaddr + UART_FCR);
1053 else
1054 outb(UART_FCR_CLEAR_RCVR | UART_FCR_CLEAR_XMIT,
1055 info->ioaddr + UART_FCR);
1056
1057 /* read data port to reset things */
1058 (void) inb(info->ioaddr + UART_RX);
1059
1060 if (info->port.tty)
1061 set_bit(TTY_IO_ERROR, &info->port.tty->flags);
1062
1063 info->port.flags &= ~ASYNC_INITIALIZED;
1064
1065 if (info->board->chip_flag)
1066 SET_MOXA_MUST_NO_SOFTWARE_FLOW_CONTROL(info->ioaddr);
1067
1068 spin_unlock_irqrestore(&info->slock, flags);
1069 }
1070
1071 /*
1072 * This routine is called whenever a serial port is opened. It
1073 * enables interrupts for a serial port, linking in its async structure into
1074 * the IRQ chain. It also performs the serial-specific
1075 * initialization for the tty structure.
1076 */
1077 static int mxser_open(struct tty_struct *tty, struct file *filp)
1078 {
1079 struct mxser_port *info;
1080 unsigned long flags;
1081 int retval, line;
1082
1083 line = tty->index;
1084 if (line == MXSER_PORTS)
1085 return 0;
1086 if (line < 0 || line > MXSER_PORTS)
1087 return -ENODEV;
1088 info = &mxser_boards[line / MXSER_PORTS_PER_BOARD].ports[line % MXSER_PORTS_PER_BOARD];
1089 if (!info->ioaddr)
1090 return -ENODEV;
1091
1092 tty->driver_data = info;
1093 info->port.tty = tty;
1094 /*
1095 * Start up serial port
1096 */
1097 spin_lock_irqsave(&info->slock, flags);
1098 info->port.count++;
1099 spin_unlock_irqrestore(&info->slock, flags);
1100 retval = mxser_startup(info);
1101 if (retval)
1102 return retval;
1103
1104 retval = mxser_block_til_ready(tty, filp, info);
1105 if (retval)
1106 return retval;
1107
1108 /* unmark here for very high baud rate (ex. 921600 bps) used */
1109 tty->low_latency = 1;
1110 return 0;
1111 }
1112
1113 static void mxser_flush_buffer(struct tty_struct *tty)
1114 {
1115 struct mxser_port *info = tty->driver_data;
1116 char fcr;
1117 unsigned long flags;
1118
1119
1120 spin_lock_irqsave(&info->slock, flags);
1121 info->xmit_cnt = info->xmit_head = info->xmit_tail = 0;
1122
1123 fcr = inb(info->ioaddr + UART_FCR);
1124 outb((fcr | UART_FCR_CLEAR_RCVR | UART_FCR_CLEAR_XMIT),
1125 info->ioaddr + UART_FCR);
1126 outb(fcr, info->ioaddr + UART_FCR);
1127
1128 spin_unlock_irqrestore(&info->slock, flags);
1129
1130 tty_wakeup(tty);
1131 }
1132
1133
1134 /*
1135 * This routine is called when the serial port gets closed. First, we
1136 * wait for the last remaining data to be sent. Then, we unlink its
1137 * async structure from the interrupt chain if necessary, and we free
1138 * that IRQ if nothing is left in the chain.
1139 */
1140 static void mxser_close(struct tty_struct *tty, struct file *filp)
1141 {
1142 struct mxser_port *info = tty->driver_data;
1143
1144 unsigned long timeout;
1145 unsigned long flags;
1146
1147 if (tty->index == MXSER_PORTS)
1148 return;
1149 if (!info)
1150 return;
1151
1152 spin_lock_irqsave(&info->slock, flags);
1153
1154 if (tty_hung_up_p(filp)) {
1155 spin_unlock_irqrestore(&info->slock, flags);
1156 return;
1157 }
1158 if ((tty->count == 1) && (info->port.count != 1)) {
1159 /*
1160 * Uh, oh. tty->count is 1, which means that the tty
1161 * structure will be freed. Info->port.count should always
1162 * be one in these conditions. If it's greater than
1163 * one, we've got real problems, since it means the
1164 * serial port won't be shutdown.
1165 */
1166 printk(KERN_ERR "mxser_close: bad serial port count; "
1167 "tty->count is 1, info->port.count is %d\n", info->port.count);
1168 info->port.count = 1;
1169 }
1170 if (--info->port.count < 0) {
1171 printk(KERN_ERR "mxser_close: bad serial port count for "
1172 "ttys%d: %d\n", tty->index, info->port.count);
1173 info->port.count = 0;
1174 }
1175 if (info->port.count) {
1176 spin_unlock_irqrestore(&info->slock, flags);
1177 return;
1178 }
1179 info->port.flags |= ASYNC_CLOSING;
1180 spin_unlock_irqrestore(&info->slock, flags);
1181 /*
1182 * Save the termios structure, since this port may have
1183 * separate termios for callout and dialin.
1184 */
1185 if (info->port.flags & ASYNC_NORMAL_ACTIVE)
1186 info->normal_termios = *tty->termios;
1187 /*
1188 * Now we wait for the transmit buffer to clear; and we notify
1189 * the line discipline to only process XON/XOFF characters.
1190 */
1191 tty->closing = 1;
1192 if (info->port.closing_wait != ASYNC_CLOSING_WAIT_NONE)
1193 tty_wait_until_sent(tty, info->port.closing_wait);
1194 /*
1195 * At this point we stop accepting input. To do this, we
1196 * disable the receive line status interrupts, and tell the
1197 * interrupt driver to stop checking the data ready bit in the
1198 * line status register.
1199 */
1200 info->IER &= ~UART_IER_RLSI;
1201 if (info->board->chip_flag)
1202 info->IER &= ~MOXA_MUST_RECV_ISR;
1203
1204 if (info->port.flags & ASYNC_INITIALIZED) {
1205 outb(info->IER, info->ioaddr + UART_IER);
1206 /*
1207 * Before we drop DTR, make sure the UART transmitter
1208 * has completely drained; this is especially
1209 * important if there is a transmit FIFO!
1210 */
1211 timeout = jiffies + HZ;
1212 while (!(inb(info->ioaddr + UART_LSR) & UART_LSR_TEMT)) {
1213 schedule_timeout_interruptible(5);
1214 if (time_after(jiffies, timeout))
1215 break;
1216 }
1217 }
1218 mxser_shutdown(info);
1219
1220 mxser_flush_buffer(tty);
1221 tty_ldisc_flush(tty);
1222
1223 tty->closing = 0;
1224 info->port.tty = NULL;
1225 if (info->port.blocked_open) {
1226 if (info->port.close_delay)
1227 schedule_timeout_interruptible(info->port.close_delay);
1228 wake_up_interruptible(&info->port.open_wait);
1229 }
1230
1231 info->port.flags &= ~(ASYNC_NORMAL_ACTIVE | ASYNC_CLOSING);
1232 }
1233
1234 static int mxser_write(struct tty_struct *tty, const unsigned char *buf, int count)
1235 {
1236 int c, total = 0;
1237 struct mxser_port *info = tty->driver_data;
1238 unsigned long flags;
1239
1240 if (!info->port.xmit_buf)
1241 return 0;
1242
1243 while (1) {
1244 c = min_t(int, count, min(SERIAL_XMIT_SIZE - info->xmit_cnt - 1,
1245 SERIAL_XMIT_SIZE - info->xmit_head));
1246 if (c <= 0)
1247 break;
1248
1249 memcpy(info->port.xmit_buf + info->xmit_head, buf, c);
1250 spin_lock_irqsave(&info->slock, flags);
1251 info->xmit_head = (info->xmit_head + c) &
1252 (SERIAL_XMIT_SIZE - 1);
1253 info->xmit_cnt += c;
1254 spin_unlock_irqrestore(&info->slock, flags);
1255
1256 buf += c;
1257 count -= c;
1258 total += c;
1259 }
1260
1261 if (info->xmit_cnt && !tty->stopped) {
1262 if (!tty->hw_stopped ||
1263 (info->type == PORT_16550A) ||
1264 (info->board->chip_flag)) {
1265 spin_lock_irqsave(&info->slock, flags);
1266 outb(info->IER & ~UART_IER_THRI, info->ioaddr +
1267 UART_IER);
1268 info->IER |= UART_IER_THRI;
1269 outb(info->IER, info->ioaddr + UART_IER);
1270 spin_unlock_irqrestore(&info->slock, flags);
1271 }
1272 }
1273 return total;
1274 }
1275
1276 static int mxser_put_char(struct tty_struct *tty, unsigned char ch)
1277 {
1278 struct mxser_port *info = tty->driver_data;
1279 unsigned long flags;
1280
1281 if (!info->port.xmit_buf)
1282 return 0;
1283
1284 if (info->xmit_cnt >= SERIAL_XMIT_SIZE - 1)
1285 return 0;
1286
1287 spin_lock_irqsave(&info->slock, flags);
1288 info->port.xmit_buf[info->xmit_head++] = ch;
1289 info->xmit_head &= SERIAL_XMIT_SIZE - 1;
1290 info->xmit_cnt++;
1291 spin_unlock_irqrestore(&info->slock, flags);
1292 if (!tty->stopped) {
1293 if (!tty->hw_stopped ||
1294 (info->type == PORT_16550A) ||
1295 info->board->chip_flag) {
1296 spin_lock_irqsave(&info->slock, flags);
1297 outb(info->IER & ~UART_IER_THRI, info->ioaddr + UART_IER);
1298 info->IER |= UART_IER_THRI;
1299 outb(info->IER, info->ioaddr + UART_IER);
1300 spin_unlock_irqrestore(&info->slock, flags);
1301 }
1302 }
1303 return 1;
1304 }
1305
1306
1307 static void mxser_flush_chars(struct tty_struct *tty)
1308 {
1309 struct mxser_port *info = tty->driver_data;
1310 unsigned long flags;
1311
1312 if (info->xmit_cnt <= 0 ||
1313 tty->stopped ||
1314 !info->port.xmit_buf ||
1315 (tty->hw_stopped &&
1316 (info->type != PORT_16550A) &&
1317 (!info->board->chip_flag)
1318 ))
1319 return;
1320
1321 spin_lock_irqsave(&info->slock, flags);
1322
1323 outb(info->IER & ~UART_IER_THRI, info->ioaddr + UART_IER);
1324 info->IER |= UART_IER_THRI;
1325 outb(info->IER, info->ioaddr + UART_IER);
1326
1327 spin_unlock_irqrestore(&info->slock, flags);
1328 }
1329
1330 static int mxser_write_room(struct tty_struct *tty)
1331 {
1332 struct mxser_port *info = tty->driver_data;
1333 int ret;
1334
1335 ret = SERIAL_XMIT_SIZE - info->xmit_cnt - 1;
1336 if (ret < 0)
1337 ret = 0;
1338 return ret;
1339 }
1340
1341 static int mxser_chars_in_buffer(struct tty_struct *tty)
1342 {
1343 struct mxser_port *info = tty->driver_data;
1344 return info->xmit_cnt;
1345 }
1346
1347 /*
1348 * ------------------------------------------------------------
1349 * friends of mxser_ioctl()
1350 * ------------------------------------------------------------
1351 */
1352 static int mxser_get_serial_info(struct mxser_port *info,
1353 struct serial_struct __user *retinfo)
1354 {
1355 struct serial_struct tmp = {
1356 .type = info->type,
1357 .line = info->port.tty->index,
1358 .port = info->ioaddr,
1359 .irq = info->board->irq,
1360 .flags = info->port.flags,
1361 .baud_base = info->baud_base,
1362 .close_delay = info->port.close_delay,
1363 .closing_wait = info->port.closing_wait,
1364 .custom_divisor = info->custom_divisor,
1365 .hub6 = 0
1366 };
1367 if (copy_to_user(retinfo, &tmp, sizeof(*retinfo)))
1368 return -EFAULT;
1369 return 0;
1370 }
1371
1372 static int mxser_set_serial_info(struct mxser_port *info,
1373 struct serial_struct __user *new_info)
1374 {
1375 struct serial_struct new_serial;
1376 speed_t baud;
1377 unsigned long sl_flags;
1378 unsigned int flags;
1379 int retval = 0;
1380
1381 if (!new_info || !info->ioaddr)
1382 return -ENODEV;
1383 if (copy_from_user(&new_serial, new_info, sizeof(new_serial)))
1384 return -EFAULT;
1385
1386 if (new_serial.irq != info->board->irq ||
1387 new_serial.port != info->ioaddr)
1388 return -EINVAL;
1389
1390 flags = info->port.flags & ASYNC_SPD_MASK;
1391
1392 if (!capable(CAP_SYS_ADMIN)) {
1393 if ((new_serial.baud_base != info->baud_base) ||
1394 (new_serial.close_delay != info->port.close_delay) ||
1395 ((new_serial.flags & ~ASYNC_USR_MASK) != (info->port.flags & ~ASYNC_USR_MASK)))
1396 return -EPERM;
1397 info->port.flags = ((info->port.flags & ~ASYNC_USR_MASK) |
1398 (new_serial.flags & ASYNC_USR_MASK));
1399 } else {
1400 /*
1401 * OK, past this point, all the error checking has been done.
1402 * At this point, we start making changes.....
1403 */
1404 info->port.flags = ((info->port.flags & ~ASYNC_FLAGS) |
1405 (new_serial.flags & ASYNC_FLAGS));
1406 info->port.close_delay = new_serial.close_delay * HZ / 100;
1407 info->port.closing_wait = new_serial.closing_wait * HZ / 100;
1408 info->port.tty->low_latency =
1409 (info->port.flags & ASYNC_LOW_LATENCY) ? 1 : 0;
1410 if ((info->port.flags & ASYNC_SPD_MASK) == ASYNC_SPD_CUST &&
1411 (new_serial.baud_base != info->baud_base ||
1412 new_serial.custom_divisor !=
1413 info->custom_divisor)) {
1414 baud = new_serial.baud_base / new_serial.custom_divisor;
1415 tty_encode_baud_rate(info->port.tty, baud, baud);
1416 }
1417 }
1418
1419 info->type = new_serial.type;
1420
1421 process_txrx_fifo(info);
1422
1423 if (info->port.flags & ASYNC_INITIALIZED) {
1424 if (flags != (info->port.flags & ASYNC_SPD_MASK)) {
1425 spin_lock_irqsave(&info->slock, sl_flags);
1426 mxser_change_speed(info, NULL);
1427 spin_unlock_irqrestore(&info->slock, sl_flags);
1428 }
1429 } else
1430 retval = mxser_startup(info);
1431
1432 return retval;
1433 }
1434
1435 /*
1436 * mxser_get_lsr_info - get line status register info
1437 *
1438 * Purpose: Let user call ioctl() to get info when the UART physically
1439 * is emptied. On bus types like RS485, the transmitter must
1440 * release the bus after transmitting. This must be done when
1441 * the transmit shift register is empty, not be done when the
1442 * transmit holding register is empty. This functionality
1443 * allows an RS485 driver to be written in user space.
1444 */
1445 static int mxser_get_lsr_info(struct mxser_port *info,
1446 unsigned int __user *value)
1447 {
1448 unsigned char status;
1449 unsigned int result;
1450 unsigned long flags;
1451
1452 spin_lock_irqsave(&info->slock, flags);
1453 status = inb(info->ioaddr + UART_LSR);
1454 spin_unlock_irqrestore(&info->slock, flags);
1455 result = ((status & UART_LSR_TEMT) ? TIOCSER_TEMT : 0);
1456 return put_user(result, value);
1457 }
1458
1459 static int mxser_tiocmget(struct tty_struct *tty, struct file *file)
1460 {
1461 struct mxser_port *info = tty->driver_data;
1462 unsigned char control, status;
1463 unsigned long flags;
1464
1465
1466 if (tty->index == MXSER_PORTS)
1467 return -ENOIOCTLCMD;
1468 if (test_bit(TTY_IO_ERROR, &tty->flags))
1469 return -EIO;
1470
1471 control = info->MCR;
1472
1473 spin_lock_irqsave(&info->slock, flags);
1474 status = inb(info->ioaddr + UART_MSR);
1475 if (status & UART_MSR_ANY_DELTA)
1476 mxser_check_modem_status(info, status);
1477 spin_unlock_irqrestore(&info->slock, flags);
1478 return ((control & UART_MCR_RTS) ? TIOCM_RTS : 0) |
1479 ((control & UART_MCR_DTR) ? TIOCM_DTR : 0) |
1480 ((status & UART_MSR_DCD) ? TIOCM_CAR : 0) |
1481 ((status & UART_MSR_RI) ? TIOCM_RNG : 0) |
1482 ((status & UART_MSR_DSR) ? TIOCM_DSR : 0) |
1483 ((status & UART_MSR_CTS) ? TIOCM_CTS : 0);
1484 }
1485
1486 static int mxser_tiocmset(struct tty_struct *tty, struct file *file,
1487 unsigned int set, unsigned int clear)
1488 {
1489 struct mxser_port *info = tty->driver_data;
1490 unsigned long flags;
1491
1492
1493 if (tty->index == MXSER_PORTS)
1494 return -ENOIOCTLCMD;
1495 if (test_bit(TTY_IO_ERROR, &tty->flags))
1496 return -EIO;
1497
1498 spin_lock_irqsave(&info->slock, flags);
1499
1500 if (set & TIOCM_RTS)
1501 info->MCR |= UART_MCR_RTS;
1502 if (set & TIOCM_DTR)
1503 info->MCR |= UART_MCR_DTR;
1504
1505 if (clear & TIOCM_RTS)
1506 info->MCR &= ~UART_MCR_RTS;
1507 if (clear & TIOCM_DTR)
1508 info->MCR &= ~UART_MCR_DTR;
1509
1510 outb(info->MCR, info->ioaddr + UART_MCR);
1511 spin_unlock_irqrestore(&info->slock, flags);
1512 return 0;
1513 }
1514
1515 static int __init mxser_program_mode(int port)
1516 {
1517 int id, i, j, n;
1518
1519 outb(0, port);
1520 outb(0, port);
1521 outb(0, port);
1522 (void)inb(port);
1523 (void)inb(port);
1524 outb(0, port);
1525 (void)inb(port);
1526
1527 id = inb(port + 1) & 0x1F;
1528 if ((id != C168_ASIC_ID) &&
1529 (id != C104_ASIC_ID) &&
1530 (id != C102_ASIC_ID) &&
1531 (id != CI132_ASIC_ID) &&
1532 (id != CI134_ASIC_ID) &&
1533 (id != CI104J_ASIC_ID))
1534 return -1;
1535 for (i = 0, j = 0; i < 4; i++) {
1536 n = inb(port + 2);
1537 if (n == 'M') {
1538 j = 1;
1539 } else if ((j == 1) && (n == 1)) {
1540 j = 2;
1541 break;
1542 } else
1543 j = 0;
1544 }
1545 if (j != 2)
1546 id = -2;
1547 return id;
1548 }
1549
1550 static void __init mxser_normal_mode(int port)
1551 {
1552 int i, n;
1553
1554 outb(0xA5, port + 1);
1555 outb(0x80, port + 3);
1556 outb(12, port + 0); /* 9600 bps */
1557 outb(0, port + 1);
1558 outb(0x03, port + 3); /* 8 data bits */
1559 outb(0x13, port + 4); /* loop back mode */
1560 for (i = 0; i < 16; i++) {
1561 n = inb(port + 5);
1562 if ((n & 0x61) == 0x60)
1563 break;
1564 if ((n & 1) == 1)
1565 (void)inb(port);
1566 }
1567 outb(0x00, port + 4);
1568 }
1569
1570 #define CHIP_SK 0x01 /* Serial Data Clock in Eprom */
1571 #define CHIP_DO 0x02 /* Serial Data Output in Eprom */
1572 #define CHIP_CS 0x04 /* Serial Chip Select in Eprom */
1573 #define CHIP_DI 0x08 /* Serial Data Input in Eprom */
1574 #define EN_CCMD 0x000 /* Chip's command register */
1575 #define EN0_RSARLO 0x008 /* Remote start address reg 0 */
1576 #define EN0_RSARHI 0x009 /* Remote start address reg 1 */
1577 #define EN0_RCNTLO 0x00A /* Remote byte count reg WR */
1578 #define EN0_RCNTHI 0x00B /* Remote byte count reg WR */
1579 #define EN0_DCFG 0x00E /* Data configuration reg WR */
1580 #define EN0_PORT 0x010 /* Rcv missed frame error counter RD */
1581 #define ENC_PAGE0 0x000 /* Select page 0 of chip registers */
1582 #define ENC_PAGE3 0x0C0 /* Select page 3 of chip registers */
1583 static int __init mxser_read_register(int port, unsigned short *regs)
1584 {
1585 int i, k, value, id;
1586 unsigned int j;
1587
1588 id = mxser_program_mode(port);
1589 if (id < 0)
1590 return id;
1591 for (i = 0; i < 14; i++) {
1592 k = (i & 0x3F) | 0x180;
1593 for (j = 0x100; j > 0; j >>= 1) {
1594 outb(CHIP_CS, port);
1595 if (k & j) {
1596 outb(CHIP_CS | CHIP_DO, port);
1597 outb(CHIP_CS | CHIP_DO | CHIP_SK, port); /* A? bit of read */
1598 } else {
1599 outb(CHIP_CS, port);
1600 outb(CHIP_CS | CHIP_SK, port); /* A? bit of read */
1601 }
1602 }
1603 (void)inb(port);
1604 value = 0;
1605 for (k = 0, j = 0x8000; k < 16; k++, j >>= 1) {
1606 outb(CHIP_CS, port);
1607 outb(CHIP_CS | CHIP_SK, port);
1608 if (inb(port) & CHIP_DI)
1609 value |= j;
1610 }
1611 regs[i] = value;
1612 outb(0, port);
1613 }
1614 mxser_normal_mode(port);
1615 return id;
1616 }
1617
1618 static int mxser_ioctl_special(unsigned int cmd, void __user *argp)
1619 {
1620 struct mxser_port *port;
1621 int result, status;
1622 unsigned int i, j;
1623 int ret = 0;
1624
1625 switch (cmd) {
1626 case MOXA_GET_MAJOR:
1627 printk(KERN_WARNING "mxser: '%s' uses deprecated ioctl %x, fix "
1628 "your userspace\n", current->comm, cmd);
1629 return put_user(ttymajor, (int __user *)argp);
1630
1631 case MOXA_CHKPORTENABLE:
1632 result = 0;
1633 lock_kernel();
1634 for (i = 0; i < MXSER_BOARDS; i++)
1635 for (j = 0; j < MXSER_PORTS_PER_BOARD; j++)
1636 if (mxser_boards[i].ports[j].ioaddr)
1637 result |= (1 << i);
1638 unlock_kernel();
1639 return put_user(result, (unsigned long __user *)argp);
1640 case MOXA_GETDATACOUNT:
1641 lock_kernel();
1642 if (copy_to_user(argp, &mxvar_log, sizeof(mxvar_log)))
1643 ret = -EFAULT;
1644 unlock_kernel();
1645 return ret;
1646 case MOXA_GETMSTATUS: {
1647 struct mxser_mstatus ms, __user *msu = argp;
1648 lock_kernel();
1649 for (i = 0; i < MXSER_BOARDS; i++)
1650 for (j = 0; j < MXSER_PORTS_PER_BOARD; j++) {
1651 port = &mxser_boards[i].ports[j];
1652 memset(&ms, 0, sizeof(ms));
1653
1654 if (!port->ioaddr)
1655 goto copy;
1656
1657 if (!port->port.tty || !port->port.tty->termios)
1658 ms.cflag = port->normal_termios.c_cflag;
1659 else
1660 ms.cflag = port->port.tty->termios->c_cflag;
1661
1662 status = inb(port->ioaddr + UART_MSR);
1663 if (status & UART_MSR_DCD)
1664 ms.dcd = 1;
1665 if (status & UART_MSR_DSR)
1666 ms.dsr = 1;
1667 if (status & UART_MSR_CTS)
1668 ms.cts = 1;
1669 copy:
1670 if (copy_to_user(msu, &ms, sizeof(ms))) {
1671 unlock_kernel();
1672 return -EFAULT;
1673 }
1674 msu++;
1675 }
1676 unlock_kernel();
1677 return 0;
1678 }
1679 case MOXA_ASPP_MON_EXT: {
1680 struct mxser_mon_ext *me; /* it's 2k, stack unfriendly */
1681 unsigned int cflag, iflag, p;
1682 u8 opmode;
1683
1684 me = kzalloc(sizeof(*me), GFP_KERNEL);
1685 if (!me)
1686 return -ENOMEM;
1687
1688 lock_kernel();
1689 for (i = 0, p = 0; i < MXSER_BOARDS; i++) {
1690 for (j = 0; j < MXSER_PORTS_PER_BOARD; j++, p++) {
1691 if (p >= ARRAY_SIZE(me->rx_cnt)) {
1692 i = MXSER_BOARDS;
1693 break;
1694 }
1695 port = &mxser_boards[i].ports[j];
1696 if (!port->ioaddr)
1697 continue;
1698
1699 status = mxser_get_msr(port->ioaddr, 0, p);
1700
1701 if (status & UART_MSR_TERI)
1702 port->icount.rng++;
1703 if (status & UART_MSR_DDSR)
1704 port->icount.dsr++;
1705 if (status & UART_MSR_DDCD)
1706 port->icount.dcd++;
1707 if (status & UART_MSR_DCTS)
1708 port->icount.cts++;
1709
1710 port->mon_data.modem_status = status;
1711 me->rx_cnt[p] = port->mon_data.rxcnt;
1712 me->tx_cnt[p] = port->mon_data.txcnt;
1713 me->up_rxcnt[p] = port->mon_data.up_rxcnt;
1714 me->up_txcnt[p] = port->mon_data.up_txcnt;
1715 me->modem_status[p] =
1716 port->mon_data.modem_status;
1717 me->baudrate[p] = tty_get_baud_rate(port->port.tty);
1718
1719 if (!port->port.tty || !port->port.tty->termios) {
1720 cflag = port->normal_termios.c_cflag;
1721 iflag = port->normal_termios.c_iflag;
1722 } else {
1723 cflag = port->port.tty->termios->c_cflag;
1724 iflag = port->port.tty->termios->c_iflag;
1725 }
1726
1727 me->databits[p] = cflag & CSIZE;
1728 me->stopbits[p] = cflag & CSTOPB;
1729 me->parity[p] = cflag & (PARENB | PARODD |
1730 CMSPAR);
1731
1732 if (cflag & CRTSCTS)
1733 me->flowctrl[p] |= 0x03;
1734
1735 if (iflag & (IXON | IXOFF))
1736 me->flowctrl[p] |= 0x0C;
1737
1738 if (port->type == PORT_16550A)
1739 me->fifo[p] = 1;
1740
1741 opmode = inb(port->opmode_ioaddr) >>
1742 ((p % 4) * 2);
1743 opmode &= OP_MODE_MASK;
1744 me->iftype[p] = opmode;
1745 }
1746 }
1747 unlock_kernel();
1748 if (copy_to_user(argp, me, sizeof(*me)))
1749 ret = -EFAULT;
1750 kfree(me);
1751 return ret;
1752 }
1753 default:
1754 return -ENOIOCTLCMD;
1755 }
1756 return 0;
1757 }
1758
1759 static int mxser_cflags_changed(struct mxser_port *info, unsigned long arg,
1760 struct async_icount *cprev)
1761 {
1762 struct async_icount cnow;
1763 unsigned long flags;
1764 int ret;
1765
1766 spin_lock_irqsave(&info->slock, flags);
1767 cnow = info->icount; /* atomic copy */
1768 spin_unlock_irqrestore(&info->slock, flags);
1769
1770 ret = ((arg & TIOCM_RNG) && (cnow.rng != cprev->rng)) ||
1771 ((arg & TIOCM_DSR) && (cnow.dsr != cprev->dsr)) ||
1772 ((arg & TIOCM_CD) && (cnow.dcd != cprev->dcd)) ||
1773 ((arg & TIOCM_CTS) && (cnow.cts != cprev->cts));
1774
1775 *cprev = cnow;
1776
1777 return ret;
1778 }
1779
1780 static int mxser_ioctl(struct tty_struct *tty, struct file *file,
1781 unsigned int cmd, unsigned long arg)
1782 {
1783 struct mxser_port *info = tty->driver_data;
1784 struct async_icount cnow;
1785 unsigned long flags;
1786 void __user *argp = (void __user *)arg;
1787 int retval;
1788
1789 if (tty->index == MXSER_PORTS)
1790 return mxser_ioctl_special(cmd, argp);
1791
1792 if (cmd == MOXA_SET_OP_MODE || cmd == MOXA_GET_OP_MODE) {
1793 int p;
1794 unsigned long opmode;
1795 static unsigned char ModeMask[] = { 0xfc, 0xf3, 0xcf, 0x3f };
1796 int shiftbit;
1797 unsigned char val, mask;
1798
1799 p = tty->index % 4;
1800 if (cmd == MOXA_SET_OP_MODE) {
1801 if (get_user(opmode, (int __user *) argp))
1802 return -EFAULT;
1803 if (opmode != RS232_MODE &&
1804 opmode != RS485_2WIRE_MODE &&
1805 opmode != RS422_MODE &&
1806 opmode != RS485_4WIRE_MODE)
1807 return -EFAULT;
1808 lock_kernel();
1809 mask = ModeMask[p];
1810 shiftbit = p * 2;
1811 val = inb(info->opmode_ioaddr);
1812 val &= mask;
1813 val |= (opmode << shiftbit);
1814 outb(val, info->opmode_ioaddr);
1815 unlock_kernel();
1816 } else {
1817 lock_kernel();
1818 shiftbit = p * 2;
1819 opmode = inb(info->opmode_ioaddr) >> shiftbit;
1820 opmode &= OP_MODE_MASK;
1821 unlock_kernel();
1822 if (put_user(opmode, (int __user *)argp))
1823 return -EFAULT;
1824 }
1825 return 0;
1826 }
1827
1828 if (cmd != TIOCGSERIAL && cmd != TIOCMIWAIT && cmd != TIOCGICOUNT &&
1829 test_bit(TTY_IO_ERROR, &tty->flags))
1830 return -EIO;
1831
1832 switch (cmd) {
1833 case TIOCGSERIAL:
1834 lock_kernel();
1835 retval = mxser_get_serial_info(info, argp);
1836 unlock_kernel();
1837 return retval;
1838 case TIOCSSERIAL:
1839 lock_kernel();
1840 retval = mxser_set_serial_info(info, argp);
1841 unlock_kernel();
1842 return retval;
1843 case TIOCSERGETLSR: /* Get line status register */
1844 return mxser_get_lsr_info(info, argp);
1845 /*
1846 * Wait for any of the 4 modem inputs (DCD,RI,DSR,CTS) to change
1847 * - mask passed in arg for lines of interest
1848 * (use |'ed TIOCM_RNG/DSR/CD/CTS for masking)
1849 * Caller should use TIOCGICOUNT to see which one it was
1850 */
1851 case TIOCMIWAIT:
1852 spin_lock_irqsave(&info->slock, flags);
1853 cnow = info->icount; /* note the counters on entry */
1854 spin_unlock_irqrestore(&info->slock, flags);
1855
1856 return wait_event_interruptible(info->delta_msr_wait,
1857 mxser_cflags_changed(info, arg, &cnow));
1858 /*
1859 * Get counter of input serial line interrupts (DCD,RI,DSR,CTS)
1860 * Return: write counters to the user passed counter struct
1861 * NB: both 1->0 and 0->1 transitions are counted except for
1862 * RI where only 0->1 is counted.
1863 */
1864 case TIOCGICOUNT: {
1865 struct serial_icounter_struct icnt = { 0 };
1866 spin_lock_irqsave(&info->slock, flags);
1867 cnow = info->icount;
1868 spin_unlock_irqrestore(&info->slock, flags);
1869
1870 icnt.frame = cnow.frame;
1871 icnt.brk = cnow.brk;
1872 icnt.overrun = cnow.overrun;
1873 icnt.buf_overrun = cnow.buf_overrun;
1874 icnt.parity = cnow.parity;
1875 icnt.rx = cnow.rx;
1876 icnt.tx = cnow.tx;
1877 icnt.cts = cnow.cts;
1878 icnt.dsr = cnow.dsr;
1879 icnt.rng = cnow.rng;
1880 icnt.dcd = cnow.dcd;
1881
1882 return copy_to_user(argp, &icnt, sizeof(icnt)) ? -EFAULT : 0;
1883 }
1884 case MOXA_HighSpeedOn:
1885 return put_user(info->baud_base != 115200 ? 1 : 0, (int __user *)argp);
1886 case MOXA_SDS_RSTICOUNTER:
1887 lock_kernel();
1888 info->mon_data.rxcnt = 0;
1889 info->mon_data.txcnt = 0;
1890 unlock_kernel();
1891 return 0;
1892
1893 case MOXA_ASPP_OQUEUE:{
1894 int len, lsr;
1895
1896 lock_kernel();
1897 len = mxser_chars_in_buffer(tty);
1898 lsr = inb(info->ioaddr + UART_LSR) & UART_LSR_TEMT;
1899 len += (lsr ? 0 : 1);
1900 unlock_kernel();
1901
1902 return put_user(len, (int __user *)argp);
1903 }
1904 case MOXA_ASPP_MON: {
1905 int mcr, status;
1906
1907 lock_kernel();
1908 status = mxser_get_msr(info->ioaddr, 1, tty->index);
1909 mxser_check_modem_status(info, status);
1910
1911 mcr = inb(info->ioaddr + UART_MCR);
1912 if (mcr & MOXA_MUST_MCR_XON_FLAG)
1913 info->mon_data.hold_reason &= ~NPPI_NOTIFY_XOFFHOLD;
1914 else
1915 info->mon_data.hold_reason |= NPPI_NOTIFY_XOFFHOLD;
1916
1917 if (mcr & MOXA_MUST_MCR_TX_XON)
1918 info->mon_data.hold_reason &= ~NPPI_NOTIFY_XOFFXENT;
1919 else
1920 info->mon_data.hold_reason |= NPPI_NOTIFY_XOFFXENT;
1921
1922 if (info->port.tty->hw_stopped)
1923 info->mon_data.hold_reason |= NPPI_NOTIFY_CTSHOLD;
1924 else
1925 info->mon_data.hold_reason &= ~NPPI_NOTIFY_CTSHOLD;
1926 unlock_kernel();
1927 if (copy_to_user(argp, &info->mon_data,
1928 sizeof(struct mxser_mon)))
1929 return -EFAULT;
1930
1931 return 0;
1932 }
1933 case MOXA_ASPP_LSTATUS: {
1934 if (put_user(info->err_shadow, (unsigned char __user *)argp))
1935 return -EFAULT;
1936
1937 info->err_shadow = 0;
1938 return 0;
1939 }
1940 case MOXA_SET_BAUD_METHOD: {
1941 int method;
1942
1943 if (get_user(method, (int __user *)argp))
1944 return -EFAULT;
1945 mxser_set_baud_method[tty->index] = method;
1946 return put_user(method, (int __user *)argp);
1947 }
1948 default:
1949 return -ENOIOCTLCMD;
1950 }
1951 return 0;
1952 }
1953
1954 static void mxser_stoprx(struct tty_struct *tty)
1955 {
1956 struct mxser_port *info = tty->driver_data;
1957
1958 info->ldisc_stop_rx = 1;
1959 if (I_IXOFF(tty)) {
1960 if (info->board->chip_flag) {
1961 info->IER &= ~MOXA_MUST_RECV_ISR;
1962 outb(info->IER, info->ioaddr + UART_IER);
1963 } else {
1964 info->x_char = STOP_CHAR(tty);
1965 outb(0, info->ioaddr + UART_IER);
1966 info->IER |= UART_IER_THRI;
1967 outb(info->IER, info->ioaddr + UART_IER);
1968 }
1969 }
1970
1971 if (info->port.tty->termios->c_cflag & CRTSCTS) {
1972 info->MCR &= ~UART_MCR_RTS;
1973 outb(info->MCR, info->ioaddr + UART_MCR);
1974 }
1975 }
1976
1977 /*
1978 * This routine is called by the upper-layer tty layer to signal that
1979 * incoming characters should be throttled.
1980 */
1981 static void mxser_throttle(struct tty_struct *tty)
1982 {
1983 mxser_stoprx(tty);
1984 }
1985
1986 static void mxser_unthrottle(struct tty_struct *tty)
1987 {
1988 struct mxser_port *info = tty->driver_data;
1989
1990 /* startrx */
1991 info->ldisc_stop_rx = 0;
1992 if (I_IXOFF(tty)) {
1993 if (info->x_char)
1994 info->x_char = 0;
1995 else {
1996 if (info->board->chip_flag) {
1997 info->IER |= MOXA_MUST_RECV_ISR;
1998 outb(info->IER, info->ioaddr + UART_IER);
1999 } else {
2000 info->x_char = START_CHAR(tty);
2001 outb(0, info->ioaddr + UART_IER);
2002 info->IER |= UART_IER_THRI;
2003 outb(info->IER, info->ioaddr + UART_IER);
2004 }
2005 }
2006 }
2007
2008 if (info->port.tty->termios->c_cflag & CRTSCTS) {
2009 info->MCR |= UART_MCR_RTS;
2010 outb(info->MCR, info->ioaddr + UART_MCR);
2011 }
2012 }
2013
2014 /*
2015 * mxser_stop() and mxser_start()
2016 *
2017 * This routines are called before setting or resetting tty->stopped.
2018 * They enable or disable transmitter interrupts, as necessary.
2019 */
2020 static void mxser_stop(struct tty_struct *tty)
2021 {
2022 struct mxser_port *info = tty->driver_data;
2023 unsigned long flags;
2024
2025 spin_lock_irqsave(&info->slock, flags);
2026 if (info->IER & UART_IER_THRI) {
2027 info->IER &= ~UART_IER_THRI;
2028 outb(info->IER, info->ioaddr + UART_IER);
2029 }
2030 spin_unlock_irqrestore(&info->slock, flags);
2031 }
2032
2033 static void mxser_start(struct tty_struct *tty)
2034 {
2035 struct mxser_port *info = tty->driver_data;
2036 unsigned long flags;
2037
2038 spin_lock_irqsave(&info->slock, flags);
2039 if (info->xmit_cnt && info->port.xmit_buf) {
2040 outb(info->IER & ~UART_IER_THRI, info->ioaddr + UART_IER);
2041 info->IER |= UART_IER_THRI;
2042 outb(info->IER, info->ioaddr + UART_IER);
2043 }
2044 spin_unlock_irqrestore(&info->slock, flags);
2045 }
2046
2047 static void mxser_set_termios(struct tty_struct *tty, struct ktermios *old_termios)
2048 {
2049 struct mxser_port *info = tty->driver_data;
2050 unsigned long flags;
2051
2052 spin_lock_irqsave(&info->slock, flags);
2053 mxser_change_speed(info, old_termios);
2054 spin_unlock_irqrestore(&info->slock, flags);
2055
2056 if ((old_termios->c_cflag & CRTSCTS) &&
2057 !(tty->termios->c_cflag & CRTSCTS)) {
2058 tty->hw_stopped = 0;
2059 mxser_start(tty);
2060 }
2061
2062 /* Handle sw stopped */
2063 if ((old_termios->c_iflag & IXON) &&
2064 !(tty->termios->c_iflag & IXON)) {
2065 tty->stopped = 0;
2066
2067 if (info->board->chip_flag) {
2068 spin_lock_irqsave(&info->slock, flags);
2069 mxser_disable_must_rx_software_flow_control(
2070 info->ioaddr);
2071 spin_unlock_irqrestore(&info->slock, flags);
2072 }
2073
2074 mxser_start(tty);
2075 }
2076 }
2077
2078 /*
2079 * mxser_wait_until_sent() --- wait until the transmitter is empty
2080 */
2081 static void mxser_wait_until_sent(struct tty_struct *tty, int timeout)
2082 {
2083 struct mxser_port *info = tty->driver_data;
2084 unsigned long orig_jiffies, char_time;
2085 int lsr;
2086
2087 if (info->type == PORT_UNKNOWN)
2088 return;
2089
2090 if (info->xmit_fifo_size == 0)
2091 return; /* Just in case.... */
2092
2093 orig_jiffies = jiffies;
2094 /*
2095 * Set the check interval to be 1/5 of the estimated time to
2096 * send a single character, and make it at least 1. The check
2097 * interval should also be less than the timeout.
2098 *
2099 * Note: we have to use pretty tight timings here to satisfy
2100 * the NIST-PCTS.
2101 */
2102 char_time = (info->timeout - HZ / 50) / info->xmit_fifo_size;
2103 char_time = char_time / 5;
2104 if (char_time == 0)
2105 char_time = 1;
2106 if (timeout && timeout < char_time)
2107 char_time = timeout;
2108 /*
2109 * If the transmitter hasn't cleared in twice the approximate
2110 * amount of time to send the entire FIFO, it probably won't
2111 * ever clear. This assumes the UART isn't doing flow
2112 * control, which is currently the case. Hence, if it ever
2113 * takes longer than info->timeout, this is probably due to a
2114 * UART bug of some kind. So, we clamp the timeout parameter at
2115 * 2*info->timeout.
2116 */
2117 if (!timeout || timeout > 2 * info->timeout)
2118 timeout = 2 * info->timeout;
2119 #ifdef SERIAL_DEBUG_RS_WAIT_UNTIL_SENT
2120 printk(KERN_DEBUG "In rs_wait_until_sent(%d) check=%lu...",
2121 timeout, char_time);
2122 printk("jiff=%lu...", jiffies);
2123 #endif
2124 lock_kernel();
2125 while (!((lsr = inb(info->ioaddr + UART_LSR)) & UART_LSR_TEMT)) {
2126 #ifdef SERIAL_DEBUG_RS_WAIT_UNTIL_SENT
2127 printk("lsr = %d (jiff=%lu)...", lsr, jiffies);
2128 #endif
2129 schedule_timeout_interruptible(char_time);
2130 if (signal_pending(current))
2131 break;
2132 if (timeout && time_after(jiffies, orig_jiffies + timeout))
2133 break;
2134 }
2135 set_current_state(TASK_RUNNING);
2136 unlock_kernel();
2137
2138 #ifdef SERIAL_DEBUG_RS_WAIT_UNTIL_SENT
2139 printk("lsr = %d (jiff=%lu)...done\n", lsr, jiffies);
2140 #endif
2141 }
2142
2143 /*
2144 * This routine is called by tty_hangup() when a hangup is signaled.
2145 */
2146 static void mxser_hangup(struct tty_struct *tty)
2147 {
2148 struct mxser_port *info = tty->driver_data;
2149
2150 mxser_flush_buffer(tty);
2151 mxser_shutdown(info);
2152 info->port.count = 0;
2153 info->port.flags &= ~ASYNC_NORMAL_ACTIVE;
2154 info->port.tty = NULL;
2155 wake_up_interruptible(&info->port.open_wait);
2156 }
2157
2158 /*
2159 * mxser_rs_break() --- routine which turns the break handling on or off
2160 */
2161 static int mxser_rs_break(struct tty_struct *tty, int break_state)
2162 {
2163 struct mxser_port *info = tty->driver_data;
2164 unsigned long flags;
2165
2166 spin_lock_irqsave(&info->slock, flags);
2167 if (break_state == -1)
2168 outb(inb(info->ioaddr + UART_LCR) | UART_LCR_SBC,
2169 info->ioaddr + UART_LCR);
2170 else
2171 outb(inb(info->ioaddr + UART_LCR) & ~UART_LCR_SBC,
2172 info->ioaddr + UART_LCR);
2173 spin_unlock_irqrestore(&info->slock, flags);
2174 return 0;
2175 }
2176
2177 static void mxser_receive_chars(struct mxser_port *port, int *status)
2178 {
2179 struct tty_struct *tty = port->port.tty;
2180 unsigned char ch, gdl;
2181 int ignored = 0;
2182 int cnt = 0;
2183 int recv_room;
2184 int max = 256;
2185
2186 recv_room = tty->receive_room;
2187 if ((recv_room == 0) && (!port->ldisc_stop_rx))
2188 mxser_stoprx(tty);
2189
2190 if (port->board->chip_flag != MOXA_OTHER_UART) {
2191
2192 if (*status & UART_LSR_SPECIAL)
2193 goto intr_old;
2194 if (port->board->chip_flag == MOXA_MUST_MU860_HWID &&
2195 (*status & MOXA_MUST_LSR_RERR))
2196 goto intr_old;
2197 if (*status & MOXA_MUST_LSR_RERR)
2198 goto intr_old;
2199
2200 gdl = inb(port->ioaddr + MOXA_MUST_GDL_REGISTER);
2201
2202 if (port->board->chip_flag == MOXA_MUST_MU150_HWID)
2203 gdl &= MOXA_MUST_GDL_MASK;
2204 if (gdl >= recv_room) {
2205 if (!port->ldisc_stop_rx)
2206 mxser_stoprx(tty);
2207 }
2208 while (gdl--) {
2209 ch = inb(port->ioaddr + UART_RX);
2210 tty_insert_flip_char(tty, ch, 0);
2211 cnt++;
2212 }
2213 goto end_intr;
2214 }
2215 intr_old:
2216
2217 do {
2218 if (max-- < 0)
2219 break;
2220
2221 ch = inb(port->ioaddr + UART_RX);
2222 if (port->board->chip_flag && (*status & UART_LSR_OE))
2223 outb(0x23, port->ioaddr + UART_FCR);
2224 *status &= port->read_status_mask;
2225 if (*status & port->ignore_status_mask) {
2226 if (++ignored > 100)
2227 break;
2228 } else {
2229 char flag = 0;
2230 if (*status & UART_LSR_SPECIAL) {
2231 if (*status & UART_LSR_BI) {
2232 flag = TTY_BREAK;
2233 port->icount.brk++;
2234
2235 if (port->port.flags & ASYNC_SAK)
2236 do_SAK(tty);
2237 } else if (*status & UART_LSR_PE) {
2238 flag = TTY_PARITY;
2239 port->icount.parity++;
2240 } else if (*status & UART_LSR_FE) {
2241 flag = TTY_FRAME;
2242 port->icount.frame++;
2243 } else if (*status & UART_LSR_OE) {
2244 flag = TTY_OVERRUN;
2245 port->icount.overrun++;
2246 } else
2247 flag = TTY_BREAK;
2248 }
2249 tty_insert_flip_char(tty, ch, flag);
2250 cnt++;
2251 if (cnt >= recv_room) {
2252 if (!port->ldisc_stop_rx)
2253 mxser_stoprx(tty);
2254 break;
2255 }
2256
2257 }
2258
2259 if (port->board->chip_flag)
2260 break;
2261
2262 *status = inb(port->ioaddr + UART_LSR);
2263 } while (*status & UART_LSR_DR);
2264
2265 end_intr:
2266 mxvar_log.rxcnt[port->port.tty->index] += cnt;
2267 port->mon_data.rxcnt += cnt;
2268 port->mon_data.up_rxcnt += cnt;
2269
2270 /*
2271 * We are called from an interrupt context with &port->slock
2272 * being held. Drop it temporarily in order to prevent
2273 * recursive locking.
2274 */
2275 spin_unlock(&port->slock);
2276 tty_flip_buffer_push(tty);
2277 spin_lock(&port->slock);
2278 }
2279
2280 static void mxser_transmit_chars(struct mxser_port *port)
2281 {
2282 int count, cnt;
2283
2284 if (port->x_char) {
2285 outb(port->x_char, port->ioaddr + UART_TX);
2286 port->x_char = 0;
2287 mxvar_log.txcnt[port->port.tty->index]++;
2288 port->mon_data.txcnt++;
2289 port->mon_data.up_txcnt++;
2290 port->icount.tx++;
2291 return;
2292 }
2293
2294 if (port->port.xmit_buf == NULL)
2295 return;
2296
2297 if ((port->xmit_cnt <= 0) || port->port.tty->stopped ||
2298 (port->port.tty->hw_stopped &&
2299 (port->type != PORT_16550A) &&
2300 (!port->board->chip_flag))) {
2301 port->IER &= ~UART_IER_THRI;
2302 outb(port->IER, port->ioaddr + UART_IER);
2303 return;
2304 }
2305
2306 cnt = port->xmit_cnt;
2307 count = port->xmit_fifo_size;
2308 do {
2309 outb(port->port.xmit_buf[port->xmit_tail++],
2310 port->ioaddr + UART_TX);
2311 port->xmit_tail = port->xmit_tail & (SERIAL_XMIT_SIZE - 1);
2312 if (--port->xmit_cnt <= 0)
2313 break;
2314 } while (--count > 0);
2315 mxvar_log.txcnt[port->port.tty->index] += (cnt - port->xmit_cnt);
2316
2317 port->mon_data.txcnt += (cnt - port->xmit_cnt);
2318 port->mon_data.up_txcnt += (cnt - port->xmit_cnt);
2319 port->icount.tx += (cnt - port->xmit_cnt);
2320
2321 if (port->xmit_cnt < WAKEUP_CHARS)
2322 tty_wakeup(port->port.tty);
2323
2324 if (port->xmit_cnt <= 0) {
2325 port->IER &= ~UART_IER_THRI;
2326 outb(port->IER, port->ioaddr + UART_IER);
2327 }
2328 }
2329
2330 /*
2331 * This is the serial driver's generic interrupt routine
2332 */
2333 static irqreturn_t mxser_interrupt(int irq, void *dev_id)
2334 {
2335 int status, iir, i;
2336 struct mxser_board *brd = NULL;
2337 struct mxser_port *port;
2338 int max, irqbits, bits, msr;
2339 unsigned int int_cnt, pass_counter = 0;
2340 int handled = IRQ_NONE;
2341
2342 for (i = 0; i < MXSER_BOARDS; i++)
2343 if (dev_id == &mxser_boards[i]) {
2344 brd = dev_id;
2345 break;
2346 }
2347
2348 if (i == MXSER_BOARDS)
2349 goto irq_stop;
2350 if (brd == NULL)
2351 goto irq_stop;
2352 max = brd->info->nports;
2353 while (pass_counter++ < MXSER_ISR_PASS_LIMIT) {
2354 irqbits = inb(brd->vector) & brd->vector_mask;
2355 if (irqbits == brd->vector_mask)
2356 break;
2357
2358 handled = IRQ_HANDLED;
2359 for (i = 0, bits = 1; i < max; i++, irqbits |= bits, bits <<= 1) {
2360 if (irqbits == brd->vector_mask)
2361 break;
2362 if (bits & irqbits)
2363 continue;
2364 port = &brd->ports[i];
2365
2366 int_cnt = 0;
2367 spin_lock(&port->slock);
2368 do {
2369 iir = inb(port->ioaddr + UART_IIR);
2370 if (iir & UART_IIR_NO_INT)
2371 break;
2372 iir &= MOXA_MUST_IIR_MASK;
2373 if (!port->port.tty ||
2374 (port->port.flags & ASYNC_CLOSING) ||
2375 !(port->port.flags &
2376 ASYNC_INITIALIZED)) {
2377 status = inb(port->ioaddr + UART_LSR);
2378 outb(0x27, port->ioaddr + UART_FCR);
2379 inb(port->ioaddr + UART_MSR);
2380 break;
2381 }
2382
2383 status = inb(port->ioaddr + UART_LSR);
2384
2385 if (status & UART_LSR_PE)
2386 port->err_shadow |= NPPI_NOTIFY_PARITY;
2387 if (status & UART_LSR_FE)
2388 port->err_shadow |= NPPI_NOTIFY_FRAMING;
2389 if (status & UART_LSR_OE)
2390 port->err_shadow |=
2391 NPPI_NOTIFY_HW_OVERRUN;
2392 if (status & UART_LSR_BI)
2393 port->err_shadow |= NPPI_NOTIFY_BREAK;
2394
2395 if (port->board->chip_flag) {
2396 if (iir == MOXA_MUST_IIR_GDA ||
2397 iir == MOXA_MUST_IIR_RDA ||
2398 iir == MOXA_MUST_IIR_RTO ||
2399 iir == MOXA_MUST_IIR_LSR)
2400 mxser_receive_chars(port,
2401 &status);
2402
2403 } else {
2404 status &= port->read_status_mask;
2405 if (status & UART_LSR_DR)
2406 mxser_receive_chars(port,
2407 &status);
2408 }
2409 msr = inb(port->ioaddr + UART_MSR);
2410 if (msr & UART_MSR_ANY_DELTA)
2411 mxser_check_modem_status(port, msr);
2412
2413 if (port->board->chip_flag) {
2414 if (iir == 0x02 && (status &
2415 UART_LSR_THRE))
2416 mxser_transmit_chars(port);
2417 } else {
2418 if (status & UART_LSR_THRE)
2419 mxser_transmit_chars(port);
2420 }
2421 } while (int_cnt++ < MXSER_ISR_PASS_LIMIT);
2422 spin_unlock(&port->slock);
2423 }
2424 }
2425
2426 irq_stop:
2427 return handled;
2428 }
2429
2430 static const struct tty_operations mxser_ops = {
2431 .open = mxser_open,
2432 .close = mxser_close,
2433 .write = mxser_write,
2434 .put_char = mxser_put_char,
2435 .flush_chars = mxser_flush_chars,
2436 .write_room = mxser_write_room,
2437 .chars_in_buffer = mxser_chars_in_buffer,
2438 .flush_buffer = mxser_flush_buffer,
2439 .ioctl = mxser_ioctl,
2440 .throttle = mxser_throttle,
2441 .unthrottle = mxser_unthrottle,
2442 .set_termios = mxser_set_termios,
2443 .stop = mxser_stop,
2444 .start = mxser_start,
2445 .hangup = mxser_hangup,
2446 .break_ctl = mxser_rs_break,
2447 .wait_until_sent = mxser_wait_until_sent,
2448 .tiocmget = mxser_tiocmget,
2449 .tiocmset = mxser_tiocmset,
2450 };
2451
2452 /*
2453 * The MOXA Smartio/Industio serial driver boot-time initialization code!
2454 */
2455
2456 static void mxser_release_res(struct mxser_board *brd, struct pci_dev *pdev,
2457 unsigned int irq)
2458 {
2459 if (irq)
2460 free_irq(brd->irq, brd);
2461 if (pdev != NULL) { /* PCI */
2462 #ifdef CONFIG_PCI
2463 pci_release_region(pdev, 2);
2464 pci_release_region(pdev, 3);
2465 #endif
2466 } else {
2467 release_region(brd->ports[0].ioaddr, 8 * brd->info->nports);
2468 release_region(brd->vector, 1);
2469 }
2470 }
2471
2472 static int __devinit mxser_initbrd(struct mxser_board *brd,
2473 struct pci_dev *pdev)
2474 {
2475 struct mxser_port *info;
2476 unsigned int i;
2477 int retval;
2478
2479 printk(KERN_INFO "mxser: max. baud rate = %d bps\n",
2480 brd->ports[0].max_baud);
2481
2482 for (i = 0; i < brd->info->nports; i++) {
2483 info = &brd->ports[i];
2484 tty_port_init(&info->port);
2485 info->board = brd;
2486 info->stop_rx = 0;
2487 info->ldisc_stop_rx = 0;
2488
2489 /* Enhance mode enabled here */
2490 if (brd->chip_flag != MOXA_OTHER_UART)
2491 mxser_enable_must_enchance_mode(info->ioaddr);
2492
2493 info->port.flags = ASYNC_SHARE_IRQ;
2494 info->type = brd->uart_type;
2495
2496 process_txrx_fifo(info);
2497
2498 info->custom_divisor = info->baud_base * 16;
2499 info->port.close_delay = 5 * HZ / 10;
2500 info->port.closing_wait = 30 * HZ;
2501 info->normal_termios = mxvar_sdriver->init_termios;
2502 init_waitqueue_head(&info->delta_msr_wait);
2503 memset(&info->mon_data, 0, sizeof(struct mxser_mon));
2504 info->err_shadow = 0;
2505 spin_lock_init(&info->slock);
2506
2507 /* before set INT ISR, disable all int */
2508 outb(inb(info->ioaddr + UART_IER) & 0xf0,
2509 info->ioaddr + UART_IER);
2510 }
2511
2512 retval = request_irq(brd->irq, mxser_interrupt, IRQF_SHARED, "mxser",
2513 brd);
2514 if (retval) {
2515 printk(KERN_ERR "Board %s: Request irq failed, IRQ (%d) may "
2516 "conflict with another device.\n",
2517 brd->info->name, brd->irq);
2518 /* We hold resources, we need to release them. */
2519 mxser_release_res(brd, pdev, 0);
2520 }
2521 return retval;
2522 }
2523
2524 static int __init mxser_get_ISA_conf(int cap, struct mxser_board *brd)
2525 {
2526 int id, i, bits;
2527 unsigned short regs[16], irq;
2528 unsigned char scratch, scratch2;
2529
2530 brd->chip_flag = MOXA_OTHER_UART;
2531
2532 id = mxser_read_register(cap, regs);
2533 switch (id) {
2534 case C168_ASIC_ID:
2535 brd->info = &mxser_cards[0];
2536 break;
2537 case C104_ASIC_ID:
2538 brd->info = &mxser_cards[1];
2539 break;
2540 case CI104J_ASIC_ID:
2541 brd->info = &mxser_cards[2];
2542 break;
2543 case C102_ASIC_ID:
2544 brd->info = &mxser_cards[5];
2545 break;
2546 case CI132_ASIC_ID:
2547 brd->info = &mxser_cards[6];
2548 break;
2549 case CI134_ASIC_ID:
2550 brd->info = &mxser_cards[7];
2551 break;
2552 default:
2553 return 0;
2554 }
2555
2556 irq = 0;
2557 /* some ISA cards have 2 ports, but we want to see them as 4-port (why?)
2558 Flag-hack checks if configuration should be read as 2-port here. */
2559 if (brd->info->nports == 2 || (brd->info->flags & MXSER_HAS2)) {
2560 irq = regs[9] & 0xF000;
2561 irq = irq | (irq >> 4);
2562 if (irq != (regs[9] & 0xFF00))
2563 goto err_irqconflict;
2564 } else if (brd->info->nports == 4) {
2565 irq = regs[9] & 0xF000;
2566 irq = irq | (irq >> 4);
2567 irq = irq | (irq >> 8);
2568 if (irq != regs[9])
2569 goto err_irqconflict;
2570 } else if (brd->info->nports == 8) {
2571 irq = regs[9] & 0xF000;
2572 irq = irq | (irq >> 4);
2573 irq = irq | (irq >> 8);
2574 if ((irq != regs[9]) || (irq != regs[10]))
2575 goto err_irqconflict;
2576 }
2577
2578 if (!irq) {
2579 printk(KERN_ERR "mxser: interrupt number unset\n");
2580 return -EIO;
2581 }
2582 brd->irq = ((int)(irq & 0xF000) >> 12);
2583 for (i = 0; i < 8; i++)
2584 brd->ports[i].ioaddr = (int) regs[i + 1] & 0xFFF8;
2585 if ((regs[12] & 0x80) == 0) {
2586 printk(KERN_ERR "mxser: invalid interrupt vector\n");
2587 return -EIO;
2588 }
2589 brd->vector = (int)regs[11]; /* interrupt vector */
2590 if (id == 1)
2591 brd->vector_mask = 0x00FF;
2592 else
2593 brd->vector_mask = 0x000F;
2594 for (i = 7, bits = 0x0100; i >= 0; i--, bits <<= 1) {
2595 if (regs[12] & bits) {
2596 brd->ports[i].baud_base = 921600;
2597 brd->ports[i].max_baud = 921600;
2598 } else {
2599 brd->ports[i].baud_base = 115200;
2600 brd->ports[i].max_baud = 115200;
2601 }
2602 }
2603 scratch2 = inb(cap + UART_LCR) & (~UART_LCR_DLAB);
2604 outb(scratch2 | UART_LCR_DLAB, cap + UART_LCR);
2605 outb(0, cap + UART_EFR); /* EFR is the same as FCR */
2606 outb(scratch2, cap + UART_LCR);
2607 outb(UART_FCR_ENABLE_FIFO, cap + UART_FCR);
2608 scratch = inb(cap + UART_IIR);
2609
2610 if (scratch & 0xC0)
2611 brd->uart_type = PORT_16550A;
2612 else
2613 brd->uart_type = PORT_16450;
2614 if (!request_region(brd->ports[0].ioaddr, 8 * brd->info->nports,
2615 "mxser(IO)")) {
2616 printk(KERN_ERR "mxser: can't request ports I/O region: "
2617 "0x%.8lx-0x%.8lx\n",
2618 brd->ports[0].ioaddr, brd->ports[0].ioaddr +
2619 8 * brd->info->nports - 1);
2620 return -EIO;
2621 }
2622 if (!request_region(brd->vector, 1, "mxser(vector)")) {
2623 release_region(brd->ports[0].ioaddr, 8 * brd->info->nports);
2624 printk(KERN_ERR "mxser: can't request interrupt vector region: "
2625 "0x%.8lx-0x%.8lx\n",
2626 brd->ports[0].ioaddr, brd->ports[0].ioaddr +
2627 8 * brd->info->nports - 1);
2628 return -EIO;
2629 }
2630 return brd->info->nports;
2631
2632 err_irqconflict:
2633 printk(KERN_ERR "mxser: invalid interrupt number\n");
2634 return -EIO;
2635 }
2636
2637 static int __devinit mxser_probe(struct pci_dev *pdev,
2638 const struct pci_device_id *ent)
2639 {
2640 #ifdef CONFIG_PCI
2641 struct mxser_board *brd;
2642 unsigned int i, j;
2643 unsigned long ioaddress;
2644 int retval = -EINVAL;
2645
2646 for (i = 0; i < MXSER_BOARDS; i++)
2647 if (mxser_boards[i].info == NULL)
2648 break;
2649
2650 if (i >= MXSER_BOARDS) {
2651 dev_err(&pdev->dev, "too many boards found (maximum %d), board "
2652 "not configured\n", MXSER_BOARDS);
2653 goto err;
2654 }
2655
2656 brd = &mxser_boards[i];
2657 brd->idx = i * MXSER_PORTS_PER_BOARD;
2658 dev_info(&pdev->dev, "found MOXA %s board (BusNo=%d, DevNo=%d)\n",
2659 mxser_cards[ent->driver_data].name,
2660 pdev->bus->number, PCI_SLOT(pdev->devfn));
2661
2662 retval = pci_enable_device(pdev);
2663 if (retval) {
2664 dev_err(&pdev->dev, "PCI enable failed\n");
2665 goto err;
2666 }
2667
2668 /* io address */
2669 ioaddress = pci_resource_start(pdev, 2);
2670 retval = pci_request_region(pdev, 2, "mxser(IO)");
2671 if (retval)
2672 goto err;
2673
2674 brd->info = &mxser_cards[ent->driver_data];
2675 for (i = 0; i < brd->info->nports; i++)
2676 brd->ports[i].ioaddr = ioaddress + 8 * i;
2677
2678 /* vector */
2679 ioaddress = pci_resource_start(pdev, 3);
2680 retval = pci_request_region(pdev, 3, "mxser(vector)");
2681 if (retval)
2682 goto err_relio;
2683 brd->vector = ioaddress;
2684
2685 /* irq */
2686 brd->irq = pdev->irq;
2687
2688 brd->chip_flag = CheckIsMoxaMust(brd->ports[0].ioaddr);
2689 brd->uart_type = PORT_16550A;
2690 brd->vector_mask = 0;
2691
2692 for (i = 0; i < brd->info->nports; i++) {
2693 for (j = 0; j < UART_INFO_NUM; j++) {
2694 if (Gpci_uart_info[j].type == brd->chip_flag) {
2695 brd->ports[i].max_baud =
2696 Gpci_uart_info[j].max_baud;
2697
2698 /* exception....CP-102 */
2699 if (brd->info->flags & MXSER_HIGHBAUD)
2700 brd->ports[i].max_baud = 921600;
2701 break;
2702 }
2703 }
2704 }
2705
2706 if (brd->chip_flag == MOXA_MUST_MU860_HWID) {
2707 for (i = 0; i < brd->info->nports; i++) {
2708 if (i < 4)
2709 brd->ports[i].opmode_ioaddr = ioaddress + 4;
2710 else
2711 brd->ports[i].opmode_ioaddr = ioaddress + 0x0c;
2712 }
2713 outb(0, ioaddress + 4); /* default set to RS232 mode */
2714 outb(0, ioaddress + 0x0c); /* default set to RS232 mode */
2715 }
2716
2717 for (i = 0; i < brd->info->nports; i++) {
2718 brd->vector_mask |= (1 << i);
2719 brd->ports[i].baud_base = 921600;
2720 }
2721
2722 /* mxser_initbrd will hook ISR. */
2723 retval = mxser_initbrd(brd, pdev);
2724 if (retval)
2725 goto err_null;
2726
2727 for (i = 0; i < brd->info->nports; i++)
2728 tty_register_device(mxvar_sdriver, brd->idx + i, &pdev->dev);
2729
2730 pci_set_drvdata(pdev, brd);
2731
2732 return 0;
2733 err_relio:
2734 pci_release_region(pdev, 2);
2735 err_null:
2736 brd->info = NULL;
2737 err:
2738 return retval;
2739 #else
2740 return -ENODEV;
2741 #endif
2742 }
2743
2744 static void __devexit mxser_remove(struct pci_dev *pdev)
2745 {
2746 struct mxser_board *brd = pci_get_drvdata(pdev);
2747 unsigned int i;
2748
2749 for (i = 0; i < brd->info->nports; i++)
2750 tty_unregister_device(mxvar_sdriver, brd->idx + i);
2751
2752 mxser_release_res(brd, pdev, 1);
2753 brd->info = NULL;
2754 }
2755
2756 static struct pci_driver mxser_driver = {
2757 .name = "mxser",
2758 .id_table = mxser_pcibrds,
2759 .probe = mxser_probe,
2760 .remove = __devexit_p(mxser_remove)
2761 };
2762
2763 static int __init mxser_module_init(void)
2764 {
2765 struct mxser_board *brd;
2766 unsigned long cap;
2767 unsigned int i, m, isaloop;
2768 int retval, b;
2769
2770 pr_debug("Loading module mxser ...\n");
2771
2772 mxvar_sdriver = alloc_tty_driver(MXSER_PORTS + 1);
2773 if (!mxvar_sdriver)
2774 return -ENOMEM;
2775
2776 printk(KERN_INFO "MOXA Smartio/Industio family driver version %s\n",
2777 MXSER_VERSION);
2778
2779 /* Initialize the tty_driver structure */
2780 mxvar_sdriver->owner = THIS_MODULE;
2781 mxvar_sdriver->magic = TTY_DRIVER_MAGIC;
2782 mxvar_sdriver->name = "ttyMI";
2783 mxvar_sdriver->major = ttymajor;
2784 mxvar_sdriver->minor_start = 0;
2785 mxvar_sdriver->num = MXSER_PORTS + 1;
2786 mxvar_sdriver->type = TTY_DRIVER_TYPE_SERIAL;
2787 mxvar_sdriver->subtype = SERIAL_TYPE_NORMAL;
2788 mxvar_sdriver->init_termios = tty_std_termios;
2789 mxvar_sdriver->init_termios.c_cflag = B9600|CS8|CREAD|HUPCL|CLOCAL;
2790 mxvar_sdriver->flags = TTY_DRIVER_REAL_RAW|TTY_DRIVER_DYNAMIC_DEV;
2791 tty_set_operations(mxvar_sdriver, &mxser_ops);
2792
2793 retval = tty_register_driver(mxvar_sdriver);
2794 if (retval) {
2795 printk(KERN_ERR "Couldn't install MOXA Smartio/Industio family "
2796 "tty driver !\n");
2797 goto err_put;
2798 }
2799
2800 m = 0;
2801 /* Start finding ISA boards here */
2802 for (isaloop = 0; isaloop < 2; isaloop++)
2803 for (b = 0; b < MXSER_BOARDS && m < MXSER_BOARDS; b++) {
2804 if (!isaloop)
2805 cap = mxserBoardCAP[b]; /* predefined */
2806 else
2807 cap = ioaddr[b]; /* module param */
2808
2809 if (!cap)
2810 continue;
2811
2812 brd = &mxser_boards[m];
2813 retval = mxser_get_ISA_conf(cap, brd);
2814 if (retval <= 0) {
2815 brd->info = NULL;
2816 continue;
2817 }
2818
2819 printk(KERN_INFO "mxser: found MOXA %s board "
2820 "(CAP=0x%x)\n", brd->info->name, ioaddr[b]);
2821
2822 /* mxser_initbrd will hook ISR. */
2823 if (mxser_initbrd(brd, NULL) < 0) {
2824 brd->info = NULL;
2825 continue;
2826 }
2827
2828 brd->idx = m * MXSER_PORTS_PER_BOARD;
2829 for (i = 0; i < brd->info->nports; i++)
2830 tty_register_device(mxvar_sdriver, brd->idx + i,
2831 NULL);
2832
2833 m++;
2834 }
2835
2836 retval = pci_register_driver(&mxser_driver);
2837 if (retval) {
2838 printk(KERN_ERR "mxser: can't register pci driver\n");
2839 if (!m) {
2840 retval = -ENODEV;
2841 goto err_unr;
2842 } /* else: we have some ISA cards under control */
2843 }
2844
2845 pr_debug("Done.\n");
2846
2847 return 0;
2848 err_unr:
2849 tty_unregister_driver(mxvar_sdriver);
2850 err_put:
2851 put_tty_driver(mxvar_sdriver);
2852 return retval;
2853 }
2854
2855 static void __exit mxser_module_exit(void)
2856 {
2857 unsigned int i, j;
2858
2859 pr_debug("Unloading module mxser ...\n");
2860
2861 pci_unregister_driver(&mxser_driver);
2862
2863 for (i = 0; i < MXSER_BOARDS; i++) /* ISA remains */
2864 if (mxser_boards[i].info != NULL)
2865 for (j = 0; j < mxser_boards[i].info->nports; j++)
2866 tty_unregister_device(mxvar_sdriver,
2867 mxser_boards[i].idx + j);
2868 tty_unregister_driver(mxvar_sdriver);
2869 put_tty_driver(mxvar_sdriver);
2870
2871 for (i = 0; i < MXSER_BOARDS; i++)
2872 if (mxser_boards[i].info != NULL)
2873 mxser_release_res(&mxser_boards[i], NULL, 1);
2874
2875 pr_debug("Done.\n");
2876 }
2877
2878 module_init(mxser_module_init);
2879 module_exit(mxser_module_exit);
CJK support for tty framebuffer vt