2 * linux/arch/x86-64/kernel/setup.c
4 * Copyright (C) 1995 Linus Torvalds
6 * Nov 2001 Dave Jones <davej@suse.de>
7 * Forked from i386 setup code.
11 * This file handles the architecture-dependent parts of initialization
14 #include <linux/errno.h>
15 #include <linux/sched.h>
16 #include <linux/kernel.h>
18 #include <linux/stddef.h>
19 #include <linux/unistd.h>
20 #include <linux/ptrace.h>
21 #include <linux/slab.h>
22 #include <linux/user.h>
23 #include <linux/a.out.h>
24 #include <linux/screen_info.h>
25 #include <linux/ioport.h>
26 #include <linux/delay.h>
27 #include <linux/init.h>
28 #include <linux/initrd.h>
29 #include <linux/highmem.h>
30 #include <linux/bootmem.h>
31 #include <linux/module.h>
32 #include <asm/processor.h>
33 #include <linux/console.h>
34 #include <linux/seq_file.h>
35 #include <linux/crash_dump.h>
36 #include <linux/root_dev.h>
37 #include <linux/pci.h>
38 #include <linux/acpi.h>
39 #include <linux/kallsyms.h>
40 #include <linux/edd.h>
41 #include <linux/mmzone.h>
42 #include <linux/kexec.h>
43 #include <linux/cpufreq.h>
44 #include <linux/dmi.h>
45 #include <linux/dma-mapping.h>
46 #include <linux/ctype.h>
49 #include <asm/uaccess.h>
50 #include <asm/system.h>
55 #include <video/edid.h>
58 #include <asm/mpspec.h>
59 #include <asm/mmu_context.h>
60 #include <asm/bootsetup.h>
61 #include <asm/proto.h>
62 #include <asm/setup.h>
63 #include <asm/mach_apic.h>
65 #include <asm/sections.h>
72 struct cpuinfo_x86 boot_cpu_data __read_mostly
;
73 EXPORT_SYMBOL(boot_cpu_data
);
75 unsigned long mmu_cr4_features
;
78 EXPORT_SYMBOL(acpi_disabled
);
80 extern int __initdata acpi_ht
;
81 extern acpi_interrupt_flags acpi_sci_flags
;
82 int __initdata acpi_force
= 0;
85 int acpi_numa __initdata
;
87 /* Boot loader ID as an integer, for the benefit of proc_dointvec */
90 unsigned long saved_video_mode
;
96 char dmi_alloc_data
[DMI_MAX_DATA
];
101 struct screen_info screen_info
;
102 EXPORT_SYMBOL(screen_info
);
103 struct sys_desc_table_struct
{
104 unsigned short length
;
105 unsigned char table
[0];
108 struct edid_info edid_info
;
109 EXPORT_SYMBOL_GPL(edid_info
);
112 extern int root_mountflags
;
114 char command_line
[COMMAND_LINE_SIZE
];
116 struct resource standard_io_resources
[] = {
117 { .name
= "dma1", .start
= 0x00, .end
= 0x1f,
118 .flags
= IORESOURCE_BUSY
| IORESOURCE_IO
},
119 { .name
= "pic1", .start
= 0x20, .end
= 0x21,
120 .flags
= IORESOURCE_BUSY
| IORESOURCE_IO
},
121 { .name
= "timer0", .start
= 0x40, .end
= 0x43,
122 .flags
= IORESOURCE_BUSY
| IORESOURCE_IO
},
123 { .name
= "timer1", .start
= 0x50, .end
= 0x53,
124 .flags
= IORESOURCE_BUSY
| IORESOURCE_IO
},
125 { .name
= "keyboard", .start
= 0x60, .end
= 0x6f,
126 .flags
= IORESOURCE_BUSY
| IORESOURCE_IO
},
127 { .name
= "dma page reg", .start
= 0x80, .end
= 0x8f,
128 .flags
= IORESOURCE_BUSY
| IORESOURCE_IO
},
129 { .name
= "pic2", .start
= 0xa0, .end
= 0xa1,
130 .flags
= IORESOURCE_BUSY
| IORESOURCE_IO
},
131 { .name
= "dma2", .start
= 0xc0, .end
= 0xdf,
132 .flags
= IORESOURCE_BUSY
| IORESOURCE_IO
},
133 { .name
= "fpu", .start
= 0xf0, .end
= 0xff,
134 .flags
= IORESOURCE_BUSY
| IORESOURCE_IO
}
137 #define STANDARD_IO_RESOURCES \
138 (sizeof standard_io_resources / sizeof standard_io_resources[0])
140 #define IORESOURCE_RAM (IORESOURCE_BUSY | IORESOURCE_MEM)
142 struct resource data_resource
= {
143 .name
= "Kernel data",
146 .flags
= IORESOURCE_RAM
,
148 struct resource code_resource
= {
149 .name
= "Kernel code",
152 .flags
= IORESOURCE_RAM
,
155 #define IORESOURCE_ROM (IORESOURCE_BUSY | IORESOURCE_READONLY | IORESOURCE_MEM)
157 static struct resource system_rom_resource
= {
158 .name
= "System ROM",
161 .flags
= IORESOURCE_ROM
,
164 static struct resource extension_rom_resource
= {
165 .name
= "Extension ROM",
168 .flags
= IORESOURCE_ROM
,
171 static struct resource adapter_rom_resources
[] = {
172 { .name
= "Adapter ROM", .start
= 0xc8000, .end
= 0,
173 .flags
= IORESOURCE_ROM
},
174 { .name
= "Adapter ROM", .start
= 0, .end
= 0,
175 .flags
= IORESOURCE_ROM
},
176 { .name
= "Adapter ROM", .start
= 0, .end
= 0,
177 .flags
= IORESOURCE_ROM
},
178 { .name
= "Adapter ROM", .start
= 0, .end
= 0,
179 .flags
= IORESOURCE_ROM
},
180 { .name
= "Adapter ROM", .start
= 0, .end
= 0,
181 .flags
= IORESOURCE_ROM
},
182 { .name
= "Adapter ROM", .start
= 0, .end
= 0,
183 .flags
= IORESOURCE_ROM
}
186 #define ADAPTER_ROM_RESOURCES \
187 (sizeof adapter_rom_resources / sizeof adapter_rom_resources[0])
189 static struct resource video_rom_resource
= {
193 .flags
= IORESOURCE_ROM
,
196 static struct resource video_ram_resource
= {
197 .name
= "Video RAM area",
200 .flags
= IORESOURCE_RAM
,
203 #define romsignature(x) (*(unsigned short *)(x) == 0xaa55)
205 static int __init
romchecksum(unsigned char *rom
, unsigned long length
)
207 unsigned char *p
, sum
= 0;
209 for (p
= rom
; p
< rom
+ length
; p
++)
214 static void __init
probe_roms(void)
216 unsigned long start
, length
, upper
;
221 upper
= adapter_rom_resources
[0].start
;
222 for (start
= video_rom_resource
.start
; start
< upper
; start
+= 2048) {
223 rom
= isa_bus_to_virt(start
);
224 if (!romsignature(rom
))
227 video_rom_resource
.start
= start
;
229 /* 0 < length <= 0x7f * 512, historically */
230 length
= rom
[2] * 512;
232 /* if checksum okay, trust length byte */
233 if (length
&& romchecksum(rom
, length
))
234 video_rom_resource
.end
= start
+ length
- 1;
236 request_resource(&iomem_resource
, &video_rom_resource
);
240 start
= (video_rom_resource
.end
+ 1 + 2047) & ~2047UL;
245 request_resource(&iomem_resource
, &system_rom_resource
);
246 upper
= system_rom_resource
.start
;
248 /* check for extension rom (ignore length byte!) */
249 rom
= isa_bus_to_virt(extension_rom_resource
.start
);
250 if (romsignature(rom
)) {
251 length
= extension_rom_resource
.end
- extension_rom_resource
.start
+ 1;
252 if (romchecksum(rom
, length
)) {
253 request_resource(&iomem_resource
, &extension_rom_resource
);
254 upper
= extension_rom_resource
.start
;
258 /* check for adapter roms on 2k boundaries */
259 for (i
= 0; i
< ADAPTER_ROM_RESOURCES
&& start
< upper
; start
+= 2048) {
260 rom
= isa_bus_to_virt(start
);
261 if (!romsignature(rom
))
264 /* 0 < length <= 0x7f * 512, historically */
265 length
= rom
[2] * 512;
267 /* but accept any length that fits if checksum okay */
268 if (!length
|| start
+ length
> upper
|| !romchecksum(rom
, length
))
271 adapter_rom_resources
[i
].start
= start
;
272 adapter_rom_resources
[i
].end
= start
+ length
- 1;
273 request_resource(&iomem_resource
, &adapter_rom_resources
[i
]);
275 start
= adapter_rom_resources
[i
++].end
& ~2047UL;
279 /* Check for full argument with no trailing characters */
280 static int fullarg(char *p
, char *arg
)
283 return !memcmp(p
, arg
, l
) && (p
[l
] == 0 || isspace(p
[l
]));
286 static __init
void parse_cmdline_early (char ** cmdline_p
)
288 char c
= ' ', *to
= command_line
, *from
= COMMAND_LINE
;
298 * If the BIOS enumerates physical processors before logical,
299 * maxcpus=N at enumeration-time can be used to disable HT.
301 else if (!memcmp(from
, "maxcpus=", 8)) {
302 extern unsigned int maxcpus
;
304 maxcpus
= simple_strtoul(from
+ 8, NULL
, 0);
308 /* "acpi=off" disables both ACPI table parsing and interpreter init */
309 if (fullarg(from
,"acpi=off"))
312 if (fullarg(from
, "acpi=force")) {
313 /* add later when we do DMI horrors: */
318 /* acpi=ht just means: do ACPI MADT parsing
319 at bootup, but don't enable the full ACPI interpreter */
320 if (fullarg(from
, "acpi=ht")) {
325 else if (fullarg(from
, "pci=noacpi"))
327 else if (fullarg(from
, "acpi=noirq"))
330 else if (fullarg(from
, "acpi_sci=edge"))
331 acpi_sci_flags
.trigger
= 1;
332 else if (fullarg(from
, "acpi_sci=level"))
333 acpi_sci_flags
.trigger
= 3;
334 else if (fullarg(from
, "acpi_sci=high"))
335 acpi_sci_flags
.polarity
= 1;
336 else if (fullarg(from
, "acpi_sci=low"))
337 acpi_sci_flags
.polarity
= 3;
339 /* acpi=strict disables out-of-spec workarounds */
340 else if (fullarg(from
, "acpi=strict")) {
343 else if (fullarg(from
, "acpi_skip_timer_override"))
344 acpi_skip_timer_override
= 1;
347 if (fullarg(from
, "disable_timer_pin_1"))
348 disable_timer_pin_1
= 1;
349 if (fullarg(from
, "enable_timer_pin_1"))
350 disable_timer_pin_1
= -1;
352 if (fullarg(from
, "nolapic") || fullarg(from
, "disableapic")) {
353 clear_bit(X86_FEATURE_APIC
, boot_cpu_data
.x86_capability
);
357 if (fullarg(from
, "noapic"))
358 skip_ioapic_setup
= 1;
360 if (fullarg(from
,"apic")) {
361 skip_ioapic_setup
= 0;
365 if (!memcmp(from
, "mem=", 4))
366 parse_memopt(from
+4, &from
);
368 if (!memcmp(from
, "memmap=", 7)) {
369 /* exactmap option is for used defined memory */
370 if (!memcmp(from
+7, "exactmap", 8)) {
371 #ifdef CONFIG_CRASH_DUMP
372 /* If we are doing a crash dump, we
373 * still need to know the real mem
374 * size before original memory map is
377 saved_max_pfn
= e820_end_of_ram();
385 parse_memmapopt(from
+7, &from
);
391 if (!memcmp(from
, "numa=", 5))
395 if (!memcmp(from
,"iommu=",6)) {
399 if (fullarg(from
,"oops=panic"))
402 if (!memcmp(from
, "noexec=", 7))
403 nonx_setup(from
+ 7);
406 /* crashkernel=size@addr specifies the location to reserve for
407 * a crash kernel. By reserving this memory we guarantee
408 * that linux never set's it up as a DMA target.
409 * Useful for holding code to do something appropriate
410 * after a kernel panic.
412 else if (!memcmp(from
, "crashkernel=", 12)) {
413 unsigned long size
, base
;
414 size
= memparse(from
+12, &from
);
416 base
= memparse(from
+1, &from
);
417 /* FIXME: Do I want a sanity check
418 * to validate the memory range?
420 crashk_res
.start
= base
;
421 crashk_res
.end
= base
+ size
- 1;
426 #ifdef CONFIG_PROC_VMCORE
427 /* elfcorehdr= specifies the location of elf core header
428 * stored by the crashed kernel. This option will be passed
429 * by kexec loader to the capture kernel.
431 else if(!memcmp(from
, "elfcorehdr=", 11))
432 elfcorehdr_addr
= memparse(from
+11, &from
);
435 #ifdef CONFIG_HOTPLUG_CPU
436 else if (!memcmp(from
, "additional_cpus=", 16))
437 setup_additional_cpus(from
+16);
444 if (COMMAND_LINE_SIZE
<= ++len
)
449 printk(KERN_INFO
"user-defined physical RAM map:\n");
450 e820_print_map("user");
453 *cmdline_p
= command_line
;
458 contig_initmem_init(unsigned long start_pfn
, unsigned long end_pfn
)
460 unsigned long bootmap_size
, bootmap
;
462 bootmap_size
= bootmem_bootmap_pages(end_pfn
)<<PAGE_SHIFT
;
463 bootmap
= find_e820_area(0, end_pfn
<<PAGE_SHIFT
, bootmap_size
);
465 panic("Cannot find bootmem map of size %ld\n",bootmap_size
);
466 bootmap_size
= init_bootmem(bootmap
>> PAGE_SHIFT
, end_pfn
);
467 e820_bootmem_free(NODE_DATA(0), 0, end_pfn
<< PAGE_SHIFT
);
468 reserve_bootmem(bootmap
, bootmap_size
);
472 #if defined(CONFIG_EDD) || defined(CONFIG_EDD_MODULE)
474 #ifdef CONFIG_EDD_MODULE
478 * copy_edd() - Copy the BIOS EDD information
479 * from boot_params into a safe place.
482 static inline void copy_edd(void)
484 memcpy(edd
.mbr_signature
, EDD_MBR_SIGNATURE
, sizeof(edd
.mbr_signature
));
485 memcpy(edd
.edd_info
, EDD_BUF
, sizeof(edd
.edd_info
));
486 edd
.mbr_signature_nr
= EDD_MBR_SIG_NR
;
487 edd
.edd_info_nr
= EDD_NR
;
490 static inline void copy_edd(void)
495 #define EBDA_ADDR_POINTER 0x40E
497 unsigned __initdata ebda_addr
;
498 unsigned __initdata ebda_size
;
500 static void discover_ebda(void)
503 * there is a real-mode segmented pointer pointing to the
504 * 4K EBDA area at 0x40E
506 ebda_addr
= *(unsigned short *)EBDA_ADDR_POINTER
;
509 ebda_size
= *(unsigned short *)(unsigned long)ebda_addr
;
511 /* Round EBDA up to pages */
515 ebda_size
= round_up(ebda_size
+ (ebda_addr
& ~PAGE_MASK
), PAGE_SIZE
);
516 if (ebda_size
> 64*1024)
520 void __init
setup_arch(char **cmdline_p
)
522 ROOT_DEV
= old_decode_dev(ORIG_ROOT_DEV
);
523 screen_info
= SCREEN_INFO
;
524 edid_info
= EDID_INFO
;
525 saved_video_mode
= SAVED_VIDEO_MODE
;
526 bootloader_type
= LOADER_TYPE
;
528 #ifdef CONFIG_BLK_DEV_RAM
529 rd_image_start
= RAMDISK_FLAGS
& RAMDISK_IMAGE_START_MASK
;
530 rd_prompt
= ((RAMDISK_FLAGS
& RAMDISK_PROMPT_FLAG
) != 0);
531 rd_doload
= ((RAMDISK_FLAGS
& RAMDISK_LOAD_FLAG
) != 0);
533 setup_memory_region();
536 if (!MOUNT_ROOT_RDONLY
)
537 root_mountflags
&= ~MS_RDONLY
;
538 init_mm
.start_code
= (unsigned long) &_text
;
539 init_mm
.end_code
= (unsigned long) &_etext
;
540 init_mm
.end_data
= (unsigned long) &_edata
;
541 init_mm
.brk
= (unsigned long) &_end
;
543 code_resource
.start
= virt_to_phys(&_text
);
544 code_resource
.end
= virt_to_phys(&_etext
)-1;
545 data_resource
.start
= virt_to_phys(&_etext
);
546 data_resource
.end
= virt_to_phys(&_edata
)-1;
548 parse_cmdline_early(cmdline_p
);
550 early_identify_cpu(&boot_cpu_data
);
553 * partially used pages are not usable - thus
554 * we are rounding upwards:
556 end_pfn
= e820_end_of_ram();
557 num_physpages
= end_pfn
; /* for pfn_valid */
563 init_memory_mapping(0, (end_pfn_map
<< PAGE_SHIFT
));
571 * Initialize the ACPI boot-time table parser (gets the RSDP and SDT).
572 * Call this early for SRAT node setup.
574 acpi_boot_table_init();
577 #ifdef CONFIG_ACPI_NUMA
579 * Parse SRAT to discover nodes.
585 numa_initmem_init(0, end_pfn
);
587 contig_initmem_init(0, end_pfn
);
590 /* Reserve direct mapping */
591 reserve_bootmem_generic(table_start
<< PAGE_SHIFT
,
592 (table_end
- table_start
) << PAGE_SHIFT
);
595 reserve_bootmem_generic(__pa_symbol(&_text
),
596 __pa_symbol(&_end
) - __pa_symbol(&_text
));
599 * reserve physical page 0 - it's a special BIOS page on many boxes,
600 * enabling clean reboots, SMP operation, laptop functions.
602 reserve_bootmem_generic(0, PAGE_SIZE
);
604 /* reserve ebda region */
606 reserve_bootmem_generic(ebda_addr
, ebda_size
);
610 * But first pinch a few for the stack/trampoline stuff
611 * FIXME: Don't need the extra page at 4K, but need to fix
612 * trampoline before removing it. (see the GDT stuff)
614 reserve_bootmem_generic(PAGE_SIZE
, PAGE_SIZE
);
616 /* Reserve SMP trampoline */
617 reserve_bootmem_generic(SMP_TRAMPOLINE_BASE
, PAGE_SIZE
);
620 #ifdef CONFIG_ACPI_SLEEP
622 * Reserve low memory region for sleep support.
624 acpi_reserve_bootmem();
627 * Find and reserve possible boot-time SMP configuration:
630 #ifdef CONFIG_BLK_DEV_INITRD
631 if (LOADER_TYPE
&& INITRD_START
) {
632 if (INITRD_START
+ INITRD_SIZE
<= (end_pfn
<< PAGE_SHIFT
)) {
633 reserve_bootmem_generic(INITRD_START
, INITRD_SIZE
);
635 INITRD_START
? INITRD_START
+ PAGE_OFFSET
: 0;
636 initrd_end
= initrd_start
+INITRD_SIZE
;
639 printk(KERN_ERR
"initrd extends beyond end of memory "
640 "(0x%08lx > 0x%08lx)\ndisabling initrd\n",
641 (unsigned long)(INITRD_START
+ INITRD_SIZE
),
642 (unsigned long)(end_pfn
<< PAGE_SHIFT
));
648 if (crashk_res
.start
!= crashk_res
.end
) {
649 reserve_bootmem_generic(crashk_res
.start
,
650 crashk_res
.end
- crashk_res
.start
+ 1);
659 * set this early, so we dont allocate cpu0
660 * if MADT list doesnt list BSP first
661 * mpparse.c/MP_processor_info() allocates logical cpu numbers.
663 cpu_set(0, cpu_present_map
);
666 * Read APIC and some other early information from ACPI tables.
674 * get boot-time SMP configuration:
676 if (smp_found_config
)
678 init_apic_mappings();
681 * Request address space for all standard RAM and ROM resources
682 * and also for regions reported as reserved by the e820.
685 e820_reserve_resources();
687 request_resource(&iomem_resource
, &video_ram_resource
);
691 /* request I/O space for devices used on all i[345]86 PCs */
692 for (i
= 0; i
< STANDARD_IO_RESOURCES
; i
++)
693 request_resource(&ioport_resource
, &standard_io_resources
[i
]);
699 #if defined(CONFIG_VGA_CONSOLE)
700 conswitchp
= &vga_con
;
701 #elif defined(CONFIG_DUMMY_CONSOLE)
702 conswitchp
= &dummy_con
;
707 static int __cpuinit
get_model_name(struct cpuinfo_x86
*c
)
711 if (c
->extended_cpuid_level
< 0x80000004)
714 v
= (unsigned int *) c
->x86_model_id
;
715 cpuid(0x80000002, &v
[0], &v
[1], &v
[2], &v
[3]);
716 cpuid(0x80000003, &v
[4], &v
[5], &v
[6], &v
[7]);
717 cpuid(0x80000004, &v
[8], &v
[9], &v
[10], &v
[11]);
718 c
->x86_model_id
[48] = 0;
723 static void __cpuinit
display_cacheinfo(struct cpuinfo_x86
*c
)
725 unsigned int n
, dummy
, eax
, ebx
, ecx
, edx
;
727 n
= c
->extended_cpuid_level
;
729 if (n
>= 0x80000005) {
730 cpuid(0x80000005, &dummy
, &ebx
, &ecx
, &edx
);
731 printk(KERN_INFO
"CPU: L1 I Cache: %dK (%d bytes/line), D cache %dK (%d bytes/line)\n",
732 edx
>>24, edx
&0xFF, ecx
>>24, ecx
&0xFF);
733 c
->x86_cache_size
=(ecx
>>24)+(edx
>>24);
734 /* On K8 L1 TLB is inclusive, so don't count it */
738 if (n
>= 0x80000006) {
739 cpuid(0x80000006, &dummy
, &ebx
, &ecx
, &edx
);
740 ecx
= cpuid_ecx(0x80000006);
741 c
->x86_cache_size
= ecx
>> 16;
742 c
->x86_tlbsize
+= ((ebx
>> 16) & 0xfff) + (ebx
& 0xfff);
744 printk(KERN_INFO
"CPU: L2 Cache: %dK (%d bytes/line)\n",
745 c
->x86_cache_size
, ecx
& 0xFF);
749 cpuid(0x80000007, &dummy
, &dummy
, &dummy
, &c
->x86_power
);
750 if (n
>= 0x80000008) {
751 cpuid(0x80000008, &eax
, &dummy
, &dummy
, &dummy
);
752 c
->x86_virt_bits
= (eax
>> 8) & 0xff;
753 c
->x86_phys_bits
= eax
& 0xff;
758 static int nearby_node(int apicid
)
761 for (i
= apicid
- 1; i
>= 0; i
--) {
762 int node
= apicid_to_node
[i
];
763 if (node
!= NUMA_NO_NODE
&& node_online(node
))
766 for (i
= apicid
+ 1; i
< MAX_LOCAL_APIC
; i
++) {
767 int node
= apicid_to_node
[i
];
768 if (node
!= NUMA_NO_NODE
&& node_online(node
))
771 return first_node(node_online_map
); /* Shouldn't happen */
776 * On a AMD dual core setup the lower bits of the APIC id distingush the cores.
777 * Assumes number of cores is a power of two.
779 static void __init
amd_detect_cmp(struct cpuinfo_x86
*c
)
784 int cpu
= smp_processor_id();
786 unsigned apicid
= hard_smp_processor_id();
788 unsigned ecx
= cpuid_ecx(0x80000008);
790 c
->x86_max_cores
= (ecx
& 0xff) + 1;
792 /* CPU telling us the core id bits shift? */
793 bits
= (ecx
>> 12) & 0xF;
795 /* Otherwise recompute */
797 while ((1 << bits
) < c
->x86_max_cores
)
801 /* Low order bits define the core id (index of core in socket) */
802 c
->cpu_core_id
= c
->phys_proc_id
& ((1 << bits
)-1);
803 /* Convert the APIC ID into the socket ID */
804 c
->phys_proc_id
= phys_pkg_id(bits
);
807 node
= c
->phys_proc_id
;
808 if (apicid_to_node
[apicid
] != NUMA_NO_NODE
)
809 node
= apicid_to_node
[apicid
];
810 if (!node_online(node
)) {
811 /* Two possibilities here:
812 - The CPU is missing memory and no node was created.
813 In that case try picking one from a nearby CPU
814 - The APIC IDs differ from the HyperTransport node IDs
815 which the K8 northbridge parsing fills in.
816 Assume they are all increased by a constant offset,
817 but in the same order as the HT nodeids.
818 If that doesn't result in a usable node fall back to the
819 path for the previous case. */
820 int ht_nodeid
= apicid
- (cpu_data
[0].phys_proc_id
<< bits
);
821 if (ht_nodeid
>= 0 &&
822 apicid_to_node
[ht_nodeid
] != NUMA_NO_NODE
)
823 node
= apicid_to_node
[ht_nodeid
];
824 /* Pick a nearby node */
825 if (!node_online(node
))
826 node
= nearby_node(apicid
);
828 numa_set_node(cpu
, node
);
830 printk(KERN_INFO
"CPU %d/%x -> Node %d\n", cpu
, apicid
, node
);
835 static void __init
init_amd(struct cpuinfo_x86
*c
)
843 * Disable TLB flush filter by setting HWCR.FFDIS on K8
844 * bit 6 of msr C001_0015
846 * Errata 63 for SH-B3 steppings
847 * Errata 122 for all steppings (F+ have it disabled by default)
850 rdmsrl(MSR_K8_HWCR
, value
);
852 wrmsrl(MSR_K8_HWCR
, value
);
856 /* Bit 31 in normal CPUID used for nonstandard 3DNow ID;
857 3DNow is IDd by bit 31 in extended CPUID (1*32+31) anyway */
858 clear_bit(0*32+31, &c
->x86_capability
);
860 /* On C+ stepping K8 rep microcode works well for copy/memset */
861 level
= cpuid_eax(1);
862 if (c
->x86
== 15 && ((level
>= 0x0f48 && level
< 0x0f50) || level
>= 0x0f58))
863 set_bit(X86_FEATURE_REP_GOOD
, &c
->x86_capability
);
865 /* Enable workaround for FXSAVE leak */
867 set_bit(X86_FEATURE_FXSAVE_LEAK
, &c
->x86_capability
);
869 level
= get_model_name(c
);
873 /* Should distinguish Models here, but this is only
874 a fallback anyways. */
875 strcpy(c
->x86_model_id
, "Hammer");
879 display_cacheinfo(c
);
881 /* c->x86_power is 8000_0007 edx. Bit 8 is constant TSC */
882 if (c
->x86_power
& (1<<8))
883 set_bit(X86_FEATURE_CONSTANT_TSC
, &c
->x86_capability
);
885 /* Multi core CPU? */
886 if (c
->extended_cpuid_level
>= 0x80000008)
889 /* Fix cpuid4 emulation for more */
890 num_cache_leaves
= 3;
893 static void __cpuinit
detect_ht(struct cpuinfo_x86
*c
)
896 u32 eax
, ebx
, ecx
, edx
;
897 int index_msb
, core_bits
;
899 cpuid(1, &eax
, &ebx
, &ecx
, &edx
);
902 if (!cpu_has(c
, X86_FEATURE_HT
))
904 if (cpu_has(c
, X86_FEATURE_CMP_LEGACY
))
907 smp_num_siblings
= (ebx
& 0xff0000) >> 16;
909 if (smp_num_siblings
== 1) {
910 printk(KERN_INFO
"CPU: Hyper-Threading is disabled\n");
911 } else if (smp_num_siblings
> 1 ) {
913 if (smp_num_siblings
> NR_CPUS
) {
914 printk(KERN_WARNING
"CPU: Unsupported number of the siblings %d", smp_num_siblings
);
915 smp_num_siblings
= 1;
919 index_msb
= get_count_order(smp_num_siblings
);
920 c
->phys_proc_id
= phys_pkg_id(index_msb
);
922 smp_num_siblings
= smp_num_siblings
/ c
->x86_max_cores
;
924 index_msb
= get_count_order(smp_num_siblings
) ;
926 core_bits
= get_count_order(c
->x86_max_cores
);
928 c
->cpu_core_id
= phys_pkg_id(index_msb
) &
929 ((1 << core_bits
) - 1);
932 if ((c
->x86_max_cores
* smp_num_siblings
) > 1) {
933 printk(KERN_INFO
"CPU: Physical Processor ID: %d\n", c
->phys_proc_id
);
934 printk(KERN_INFO
"CPU: Processor Core ID: %d\n", c
->cpu_core_id
);
941 * find out the number of processor cores on the die
943 static int __cpuinit
intel_num_cpu_cores(struct cpuinfo_x86
*c
)
947 if (c
->cpuid_level
< 4)
950 cpuid_count(4, 0, &eax
, &t
, &t
, &t
);
953 return ((eax
>> 26) + 1);
958 static void srat_detect_node(void)
962 int cpu
= smp_processor_id();
963 int apicid
= hard_smp_processor_id();
965 /* Don't do the funky fallback heuristics the AMD version employs
967 node
= apicid_to_node
[apicid
];
968 if (node
== NUMA_NO_NODE
)
969 node
= first_node(node_online_map
);
970 numa_set_node(cpu
, node
);
973 printk(KERN_INFO
"CPU %d/%x -> Node %d\n", cpu
, apicid
, node
);
977 static void __cpuinit
init_intel(struct cpuinfo_x86
*c
)
982 init_intel_cacheinfo(c
);
983 if (c
->cpuid_level
> 9 ) {
984 unsigned eax
= cpuid_eax(10);
985 /* Check for version and the number of counters */
986 if ((eax
& 0xff) && (((eax
>>8) & 0xff) > 1))
987 set_bit(X86_FEATURE_ARCH_PERFMON
, &c
->x86_capability
);
990 n
= c
->extended_cpuid_level
;
991 if (n
>= 0x80000008) {
992 unsigned eax
= cpuid_eax(0x80000008);
993 c
->x86_virt_bits
= (eax
>> 8) & 0xff;
994 c
->x86_phys_bits
= eax
& 0xff;
995 /* CPUID workaround for Intel 0F34 CPU */
996 if (c
->x86_vendor
== X86_VENDOR_INTEL
&&
997 c
->x86
== 0xF && c
->x86_model
== 0x3 &&
999 c
->x86_phys_bits
= 36;
1003 c
->x86_cache_alignment
= c
->x86_clflush_size
* 2;
1004 if ((c
->x86
== 0xf && c
->x86_model
>= 0x03) ||
1005 (c
->x86
== 0x6 && c
->x86_model
>= 0x0e))
1006 set_bit(X86_FEATURE_CONSTANT_TSC
, &c
->x86_capability
);
1007 set_bit(X86_FEATURE_SYNC_RDTSC
, &c
->x86_capability
);
1008 c
->x86_max_cores
= intel_num_cpu_cores(c
);
1013 static void __cpuinit
get_cpu_vendor(struct cpuinfo_x86
*c
)
1015 char *v
= c
->x86_vendor_id
;
1017 if (!strcmp(v
, "AuthenticAMD"))
1018 c
->x86_vendor
= X86_VENDOR_AMD
;
1019 else if (!strcmp(v
, "GenuineIntel"))
1020 c
->x86_vendor
= X86_VENDOR_INTEL
;
1022 c
->x86_vendor
= X86_VENDOR_UNKNOWN
;
1025 struct cpu_model_info
{
1028 char *model_names
[16];
1031 /* Do some early cpuid on the boot CPU to get some parameter that are
1032 needed before check_bugs. Everything advanced is in identify_cpu
1034 void __cpuinit
early_identify_cpu(struct cpuinfo_x86
*c
)
1038 c
->loops_per_jiffy
= loops_per_jiffy
;
1039 c
->x86_cache_size
= -1;
1040 c
->x86_vendor
= X86_VENDOR_UNKNOWN
;
1041 c
->x86_model
= c
->x86_mask
= 0; /* So far unknown... */
1042 c
->x86_vendor_id
[0] = '\0'; /* Unset */
1043 c
->x86_model_id
[0] = '\0'; /* Unset */
1044 c
->x86_clflush_size
= 64;
1045 c
->x86_cache_alignment
= c
->x86_clflush_size
;
1046 c
->x86_max_cores
= 1;
1047 c
->extended_cpuid_level
= 0;
1048 memset(&c
->x86_capability
, 0, sizeof c
->x86_capability
);
1050 /* Get vendor name */
1051 cpuid(0x00000000, (unsigned int *)&c
->cpuid_level
,
1052 (unsigned int *)&c
->x86_vendor_id
[0],
1053 (unsigned int *)&c
->x86_vendor_id
[8],
1054 (unsigned int *)&c
->x86_vendor_id
[4]);
1058 /* Initialize the standard set of capabilities */
1059 /* Note that the vendor-specific code below might override */
1061 /* Intel-defined flags: level 0x00000001 */
1062 if (c
->cpuid_level
>= 0x00000001) {
1064 cpuid(0x00000001, &tfms
, &misc
, &c
->x86_capability
[4],
1065 &c
->x86_capability
[0]);
1066 c
->x86
= (tfms
>> 8) & 0xf;
1067 c
->x86_model
= (tfms
>> 4) & 0xf;
1068 c
->x86_mask
= tfms
& 0xf;
1070 c
->x86
+= (tfms
>> 20) & 0xff;
1072 c
->x86_model
+= ((tfms
>> 16) & 0xF) << 4;
1073 if (c
->x86_capability
[0] & (1<<19))
1074 c
->x86_clflush_size
= ((misc
>> 8) & 0xff) * 8;
1076 /* Have CPUID level 0 only - unheard of */
1081 c
->phys_proc_id
= (cpuid_ebx(1) >> 24) & 0xff;
1086 * This does the hard work of actually picking apart the CPU stuff...
1088 void __cpuinit
identify_cpu(struct cpuinfo_x86
*c
)
1093 early_identify_cpu(c
);
1095 /* AMD-defined flags: level 0x80000001 */
1096 xlvl
= cpuid_eax(0x80000000);
1097 c
->extended_cpuid_level
= xlvl
;
1098 if ((xlvl
& 0xffff0000) == 0x80000000) {
1099 if (xlvl
>= 0x80000001) {
1100 c
->x86_capability
[1] = cpuid_edx(0x80000001);
1101 c
->x86_capability
[6] = cpuid_ecx(0x80000001);
1103 if (xlvl
>= 0x80000004)
1104 get_model_name(c
); /* Default name */
1107 /* Transmeta-defined flags: level 0x80860001 */
1108 xlvl
= cpuid_eax(0x80860000);
1109 if ((xlvl
& 0xffff0000) == 0x80860000) {
1110 /* Don't set x86_cpuid_level here for now to not confuse. */
1111 if (xlvl
>= 0x80860001)
1112 c
->x86_capability
[2] = cpuid_edx(0x80860001);
1115 c
->apicid
= phys_pkg_id(0);
1118 * Vendor-specific initialization. In this section we
1119 * canonicalize the feature flags, meaning if there are
1120 * features a certain CPU supports which CPUID doesn't
1121 * tell us, CPUID claiming incorrect flags, or other bugs,
1122 * we handle them here.
1124 * At the end of this section, c->x86_capability better
1125 * indicate the features this CPU genuinely supports!
1127 switch (c
->x86_vendor
) {
1128 case X86_VENDOR_AMD
:
1132 case X86_VENDOR_INTEL
:
1136 case X86_VENDOR_UNKNOWN
:
1138 display_cacheinfo(c
);
1142 select_idle_routine(c
);
1146 * On SMP, boot_cpu_data holds the common feature set between
1147 * all CPUs; so make sure that we indicate which features are
1148 * common between the CPUs. The first time this routine gets
1149 * executed, c == &boot_cpu_data.
1151 if (c
!= &boot_cpu_data
) {
1152 /* AND the already accumulated flags with these */
1153 for (i
= 0 ; i
< NCAPINTS
; i
++)
1154 boot_cpu_data
.x86_capability
[i
] &= c
->x86_capability
[i
];
1157 #ifdef CONFIG_X86_MCE
1160 if (c
== &boot_cpu_data
)
1165 numa_add_cpu(smp_processor_id());
1170 void __cpuinit
print_cpu_info(struct cpuinfo_x86
*c
)
1172 if (c
->x86_model_id
[0])
1173 printk("%s", c
->x86_model_id
);
1175 if (c
->x86_mask
|| c
->cpuid_level
>= 0)
1176 printk(" stepping %02x\n", c
->x86_mask
);
1182 * Get CPU information for use by the procfs.
1185 static int show_cpuinfo(struct seq_file
*m
, void *v
)
1187 struct cpuinfo_x86
*c
= v
;
1190 * These flag bits must match the definitions in <asm/cpufeature.h>.
1191 * NULL means this bit is undefined or reserved; either way it doesn't
1192 * have meaning as far as Linux is concerned. Note that it's important
1193 * to realize there is a difference between this table and CPUID -- if
1194 * applications want to get the raw CPUID data, they should access
1195 * /dev/cpu/<cpu_nr>/cpuid instead.
1197 static char *x86_cap_flags
[] = {
1199 "fpu", "vme", "de", "pse", "tsc", "msr", "pae", "mce",
1200 "cx8", "apic", NULL
, "sep", "mtrr", "pge", "mca", "cmov",
1201 "pat", "pse36", "pn", "clflush", NULL
, "dts", "acpi", "mmx",
1202 "fxsr", "sse", "sse2", "ss", "ht", "tm", "ia64", NULL
,
1205 NULL
, NULL
, NULL
, NULL
, NULL
, NULL
, NULL
, NULL
,
1206 NULL
, NULL
, NULL
, "syscall", NULL
, NULL
, NULL
, NULL
,
1207 NULL
, NULL
, NULL
, NULL
, "nx", NULL
, "mmxext", NULL
,
1208 NULL
, "fxsr_opt", NULL
, "rdtscp", NULL
, "lm", "3dnowext", "3dnow",
1210 /* Transmeta-defined */
1211 "recovery", "longrun", NULL
, "lrti", NULL
, NULL
, NULL
, NULL
,
1212 NULL
, NULL
, NULL
, NULL
, NULL
, NULL
, NULL
, NULL
,
1213 NULL
, NULL
, NULL
, NULL
, NULL
, NULL
, NULL
, NULL
,
1214 NULL
, NULL
, NULL
, NULL
, NULL
, NULL
, NULL
, NULL
,
1216 /* Other (Linux-defined) */
1217 "cxmmx", NULL
, "cyrix_arr", "centaur_mcr", NULL
,
1218 "constant_tsc", NULL
, NULL
,
1219 "up", NULL
, NULL
, NULL
, NULL
, NULL
, NULL
, NULL
,
1220 NULL
, NULL
, NULL
, NULL
, NULL
, NULL
, NULL
, NULL
,
1221 NULL
, NULL
, NULL
, NULL
, NULL
, NULL
, NULL
, NULL
,
1223 /* Intel-defined (#2) */
1224 "pni", NULL
, NULL
, "monitor", "ds_cpl", "vmx", "smx", "est",
1225 "tm2", NULL
, "cid", NULL
, NULL
, "cx16", "xtpr", NULL
,
1226 NULL
, NULL
, NULL
, NULL
, NULL
, NULL
, NULL
, NULL
,
1227 NULL
, NULL
, NULL
, NULL
, NULL
, NULL
, NULL
, NULL
,
1229 /* VIA/Cyrix/Centaur-defined */
1230 NULL
, NULL
, "rng", "rng_en", NULL
, NULL
, "ace", "ace_en",
1231 NULL
, NULL
, NULL
, NULL
, NULL
, NULL
, NULL
, NULL
,
1232 NULL
, NULL
, NULL
, NULL
, NULL
, NULL
, NULL
, NULL
,
1233 NULL
, NULL
, NULL
, NULL
, NULL
, NULL
, NULL
, NULL
,
1235 /* AMD-defined (#2) */
1236 "lahf_lm", "cmp_legacy", "svm", NULL
, "cr8_legacy", NULL
, NULL
, NULL
,
1237 NULL
, NULL
, NULL
, NULL
, NULL
, NULL
, NULL
, NULL
,
1238 NULL
, NULL
, NULL
, NULL
, NULL
, NULL
, NULL
, NULL
,
1239 NULL
, NULL
, NULL
, NULL
, NULL
, NULL
, NULL
, NULL
,
1241 static char *x86_power_flags
[] = {
1242 "ts", /* temperature sensor */
1243 "fid", /* frequency id control */
1244 "vid", /* voltage id control */
1245 "ttp", /* thermal trip */
1249 /* nothing */ /* constant_tsc - moved to flags */
1254 if (!cpu_online(c
-cpu_data
))
1258 seq_printf(m
,"processor\t: %u\n"
1260 "cpu family\t: %d\n"
1262 "model name\t: %s\n",
1263 (unsigned)(c
-cpu_data
),
1264 c
->x86_vendor_id
[0] ? c
->x86_vendor_id
: "unknown",
1267 c
->x86_model_id
[0] ? c
->x86_model_id
: "unknown");
1269 if (c
->x86_mask
|| c
->cpuid_level
>= 0)
1270 seq_printf(m
, "stepping\t: %d\n", c
->x86_mask
);
1272 seq_printf(m
, "stepping\t: unknown\n");
1274 if (cpu_has(c
,X86_FEATURE_TSC
)) {
1275 unsigned int freq
= cpufreq_quick_get((unsigned)(c
-cpu_data
));
1278 seq_printf(m
, "cpu MHz\t\t: %u.%03u\n",
1279 freq
/ 1000, (freq
% 1000));
1283 if (c
->x86_cache_size
>= 0)
1284 seq_printf(m
, "cache size\t: %d KB\n", c
->x86_cache_size
);
1287 if (smp_num_siblings
* c
->x86_max_cores
> 1) {
1288 int cpu
= c
- cpu_data
;
1289 seq_printf(m
, "physical id\t: %d\n", c
->phys_proc_id
);
1290 seq_printf(m
, "siblings\t: %d\n", cpus_weight(cpu_core_map
[cpu
]));
1291 seq_printf(m
, "core id\t\t: %d\n", c
->cpu_core_id
);
1292 seq_printf(m
, "cpu cores\t: %d\n", c
->booted_cores
);
1298 "fpu_exception\t: yes\n"
1299 "cpuid level\t: %d\n"
1306 for ( i
= 0 ; i
< 32*NCAPINTS
; i
++ )
1307 if (cpu_has(c
, i
) && x86_cap_flags
[i
] != NULL
)
1308 seq_printf(m
, " %s", x86_cap_flags
[i
]);
1311 seq_printf(m
, "\nbogomips\t: %lu.%02lu\n",
1312 c
->loops_per_jiffy
/(500000/HZ
),
1313 (c
->loops_per_jiffy
/(5000/HZ
)) % 100);
1315 if (c
->x86_tlbsize
> 0)
1316 seq_printf(m
, "TLB size\t: %d 4K pages\n", c
->x86_tlbsize
);
1317 seq_printf(m
, "clflush size\t: %d\n", c
->x86_clflush_size
);
1318 seq_printf(m
, "cache_alignment\t: %d\n", c
->x86_cache_alignment
);
1320 seq_printf(m
, "address sizes\t: %u bits physical, %u bits virtual\n",
1321 c
->x86_phys_bits
, c
->x86_virt_bits
);
1323 seq_printf(m
, "power management:");
1326 for (i
= 0; i
< 32; i
++)
1327 if (c
->x86_power
& (1 << i
)) {
1328 if (i
< ARRAY_SIZE(x86_power_flags
) &&
1330 seq_printf(m
, "%s%s",
1331 x86_power_flags
[i
][0]?" ":"",
1332 x86_power_flags
[i
]);
1334 seq_printf(m
, " [%d]", i
);
1338 seq_printf(m
, "\n\n");
1343 static void *c_start(struct seq_file
*m
, loff_t
*pos
)
1345 return *pos
< NR_CPUS
? cpu_data
+ *pos
: NULL
;
1348 static void *c_next(struct seq_file
*m
, void *v
, loff_t
*pos
)
1351 return c_start(m
, pos
);
1354 static void c_stop(struct seq_file
*m
, void *v
)
1358 struct seq_operations cpuinfo_op
= {
1362 .show
= show_cpuinfo
,
1365 #if defined(CONFIG_INPUT_PCSPKR) || defined(CONFIG_INPUT_PCSPKR_MODULE)
1366 #include <linux/platform_device.h>
1367 static __init
int add_pcspkr(void)
1369 struct platform_device
*pd
;
1372 pd
= platform_device_alloc("pcspkr", -1);
1376 ret
= platform_device_add(pd
);
1378 platform_device_put(pd
);
1382 device_initcall(add_pcspkr
);