2 * ASIX AX8817X based USB 2.0 Ethernet Devices
3 * Copyright (C) 2003-2006 David Hollis <dhollis@davehollis.com>
4 * Copyright (C) 2005 Phil Chang <pchang23@sbcglobal.net>
5 * Copyright (C) 2006 James Painter <jamie.painter@iname.com>
6 * Copyright (c) 2002-2003 TiVo Inc.
8 * This program is free software; you can redistribute it and/or modify
9 * it under the terms of the GNU General Public License as published by
10 * the Free Software Foundation; either version 2 of the License, or
11 * (at your option) any later version.
13 * This program is distributed in the hope that it will be useful,
14 * but WITHOUT ANY WARRANTY; without even the implied warranty of
15 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
16 * GNU General Public License for more details.
18 * You should have received a copy of the GNU General Public License
19 * along with this program; if not, write to the Free Software
20 * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
23 // #define DEBUG // error path messages, extra info
24 // #define VERBOSE // more; success messages
26 #include <linux/module.h>
27 #include <linux/kmod.h>
28 #include <linux/sched.h>
29 #include <linux/init.h>
30 #include <linux/netdevice.h>
31 #include <linux/etherdevice.h>
32 #include <linux/ethtool.h>
33 #include <linux/workqueue.h>
34 #include <linux/mii.h>
35 #include <linux/usb.h>
36 #include <linux/crc32.h>
40 #define DRIVER_VERSION "14-Jun-2006"
41 static const char driver_name
[] = "asix";
43 /* ASIX AX8817X based USB 2.0 Ethernet Devices */
45 #define AX_CMD_SET_SW_MII 0x06
46 #define AX_CMD_READ_MII_REG 0x07
47 #define AX_CMD_WRITE_MII_REG 0x08
48 #define AX_CMD_SET_HW_MII 0x0a
49 #define AX_CMD_READ_EEPROM 0x0b
50 #define AX_CMD_WRITE_EEPROM 0x0c
51 #define AX_CMD_WRITE_ENABLE 0x0d
52 #define AX_CMD_WRITE_DISABLE 0x0e
53 #define AX_CMD_READ_RX_CTL 0x0f
54 #define AX_CMD_WRITE_RX_CTL 0x10
55 #define AX_CMD_READ_IPG012 0x11
56 #define AX_CMD_WRITE_IPG0 0x12
57 #define AX_CMD_WRITE_IPG1 0x13
58 #define AX_CMD_READ_NODE_ID 0x13
59 #define AX_CMD_WRITE_IPG2 0x14
60 #define AX_CMD_WRITE_MULTI_FILTER 0x16
61 #define AX88172_CMD_READ_NODE_ID 0x17
62 #define AX_CMD_READ_PHY_ID 0x19
63 #define AX_CMD_READ_MEDIUM_STATUS 0x1a
64 #define AX_CMD_WRITE_MEDIUM_MODE 0x1b
65 #define AX_CMD_READ_MONITOR_MODE 0x1c
66 #define AX_CMD_WRITE_MONITOR_MODE 0x1d
67 #define AX_CMD_READ_GPIOS 0x1e
68 #define AX_CMD_WRITE_GPIOS 0x1f
69 #define AX_CMD_SW_RESET 0x20
70 #define AX_CMD_SW_PHY_STATUS 0x21
71 #define AX_CMD_SW_PHY_SELECT 0x22
73 #define AX_MONITOR_MODE 0x01
74 #define AX_MONITOR_LINK 0x02
75 #define AX_MONITOR_MAGIC 0x04
76 #define AX_MONITOR_HSFS 0x10
78 /* AX88172 Medium Status Register values */
79 #define AX88172_MEDIUM_FD 0x02
80 #define AX88172_MEDIUM_TX 0x04
81 #define AX88172_MEDIUM_FC 0x10
82 #define AX88172_MEDIUM_DEFAULT \
83 ( AX88172_MEDIUM_FD | AX88172_MEDIUM_TX | AX88172_MEDIUM_FC )
85 #define AX_MCAST_FILTER_SIZE 8
86 #define AX_MAX_MCAST 64
88 #define AX_SWRESET_CLEAR 0x00
89 #define AX_SWRESET_RR 0x01
90 #define AX_SWRESET_RT 0x02
91 #define AX_SWRESET_PRTE 0x04
92 #define AX_SWRESET_PRL 0x08
93 #define AX_SWRESET_BZ 0x10
94 #define AX_SWRESET_IPRL 0x20
95 #define AX_SWRESET_IPPD 0x40
97 #define AX88772_IPG0_DEFAULT 0x15
98 #define AX88772_IPG1_DEFAULT 0x0c
99 #define AX88772_IPG2_DEFAULT 0x12
101 /* AX88772 & AX88178 Medium Mode Register */
102 #define AX_MEDIUM_PF 0x0080
103 #define AX_MEDIUM_JFE 0x0040
104 #define AX_MEDIUM_TFC 0x0020
105 #define AX_MEDIUM_RFC 0x0010
106 #define AX_MEDIUM_ENCK 0x0008
107 #define AX_MEDIUM_AC 0x0004
108 #define AX_MEDIUM_FD 0x0002
109 #define AX_MEDIUM_GM 0x0001
110 #define AX_MEDIUM_SM 0x1000
111 #define AX_MEDIUM_SBP 0x0800
112 #define AX_MEDIUM_PS 0x0200
113 #define AX_MEDIUM_RE 0x0100
115 #define AX88178_MEDIUM_DEFAULT \
116 (AX_MEDIUM_PS | AX_MEDIUM_FD | AX_MEDIUM_AC | \
117 AX_MEDIUM_RFC | AX_MEDIUM_TFC | AX_MEDIUM_JFE | \
120 #define AX88772_MEDIUM_DEFAULT \
121 (AX_MEDIUM_FD | AX_MEDIUM_RFC | \
122 AX_MEDIUM_TFC | AX_MEDIUM_PS | \
123 AX_MEDIUM_AC | AX_MEDIUM_RE )
125 /* AX88772 & AX88178 RX_CTL values */
126 #define AX_RX_CTL_SO 0x0080
127 #define AX_RX_CTL_AP 0x0020
128 #define AX_RX_CTL_AM 0x0010
129 #define AX_RX_CTL_AB 0x0008
130 #define AX_RX_CTL_SEP 0x0004
131 #define AX_RX_CTL_AMALL 0x0002
132 #define AX_RX_CTL_PRO 0x0001
133 #define AX_RX_CTL_MFB_2048 0x0000
134 #define AX_RX_CTL_MFB_4096 0x0100
135 #define AX_RX_CTL_MFB_8192 0x0200
136 #define AX_RX_CTL_MFB_16384 0x0300
138 #define AX_DEFAULT_RX_CTL \
139 (AX_RX_CTL_SO | AX_RX_CTL_AB )
141 /* GPIO 0 .. 2 toggles */
142 #define AX_GPIO_GPO0EN 0x01 /* GPIO0 Output enable */
143 #define AX_GPIO_GPO_0 0x02 /* GPIO0 Output value */
144 #define AX_GPIO_GPO1EN 0x04 /* GPIO1 Output enable */
145 #define AX_GPIO_GPO_1 0x08 /* GPIO1 Output value */
146 #define AX_GPIO_GPO2EN 0x10 /* GPIO2 Output enable */
147 #define AX_GPIO_GPO_2 0x20 /* GPIO2 Output value */
148 #define AX_GPIO_RESERVED 0x40 /* Reserved */
149 #define AX_GPIO_RSE 0x80 /* Reload serial EEPROM */
151 #define AX_EEPROM_MAGIC 0xdeadbeef
152 #define AX88172_EEPROM_LEN 0x40
153 #define AX88772_EEPROM_LEN 0xff
155 #define PHY_MODE_MARVELL 0x0000
156 #define MII_MARVELL_LED_CTRL 0x0018
157 #define MII_MARVELL_STATUS 0x001b
158 #define MII_MARVELL_CTRL 0x0014
160 #define MARVELL_LED_MANUAL 0x0019
162 #define MARVELL_STATUS_HWCFG 0x0004
164 #define MARVELL_CTRL_TXDELAY 0x0002
165 #define MARVELL_CTRL_RXDELAY 0x0080
167 /* This structure cannot exceed sizeof(unsigned long [5]) AKA 20 bytes */
169 u8 multi_filter
[AX_MCAST_FILTER_SIZE
];
175 struct ax88172_int_data
{
181 } __attribute__ ((packed
));
183 static int asix_read_cmd(struct usbnet
*dev
, u8 cmd
, u16 value
, u16 index
,
184 u16 size
, void *data
)
186 devdbg(dev
,"asix_read_cmd() cmd=0x%02x value=0x%04x index=0x%04x size=%d",
187 cmd
, value
, index
, size
);
188 return usb_control_msg(
190 usb_rcvctrlpipe(dev
->udev
, 0),
192 USB_DIR_IN
| USB_TYPE_VENDOR
| USB_RECIP_DEVICE
,
197 USB_CTRL_GET_TIMEOUT
);
200 static int asix_write_cmd(struct usbnet
*dev
, u8 cmd
, u16 value
, u16 index
,
201 u16 size
, void *data
)
203 devdbg(dev
,"asix_write_cmd() cmd=0x%02x value=0x%04x index=0x%04x size=%d",
204 cmd
, value
, index
, size
);
205 return usb_control_msg(
207 usb_sndctrlpipe(dev
->udev
, 0),
209 USB_DIR_OUT
| USB_TYPE_VENDOR
| USB_RECIP_DEVICE
,
214 USB_CTRL_SET_TIMEOUT
);
217 static void asix_async_cmd_callback(struct urb
*urb
)
219 struct usb_ctrlrequest
*req
= (struct usb_ctrlrequest
*)urb
->context
;
222 printk(KERN_DEBUG
"asix_async_cmd_callback() failed with %d",
230 asix_write_cmd_async(struct usbnet
*dev
, u8 cmd
, u16 value
, u16 index
,
231 u16 size
, void *data
)
233 struct usb_ctrlrequest
*req
;
237 devdbg(dev
,"asix_write_cmd_async() cmd=0x%02x value=0x%04x index=0x%04x size=%d",
238 cmd
, value
, index
, size
);
239 if ((urb
= usb_alloc_urb(0, GFP_ATOMIC
)) == NULL
) {
240 deverr(dev
, "Error allocating URB in write_cmd_async!");
244 if ((req
= kmalloc(sizeof(struct usb_ctrlrequest
), GFP_ATOMIC
)) == NULL
) {
245 deverr(dev
, "Failed to allocate memory for control request");
250 req
->bRequestType
= USB_DIR_OUT
| USB_TYPE_VENDOR
| USB_RECIP_DEVICE
;
256 usb_fill_control_urb(urb
, dev
->udev
,
257 usb_sndctrlpipe(dev
->udev
, 0),
258 (void *)req
, data
, size
,
259 asix_async_cmd_callback
, req
);
261 if((status
= usb_submit_urb(urb
, GFP_ATOMIC
)) < 0) {
262 deverr(dev
, "Error submitting the control message: status=%d",
269 static int asix_rx_fixup(struct usbnet
*dev
, struct sk_buff
*skb
)
274 struct sk_buff
*ax_skb
;
277 head
= (u8
*) skb
->data
;
278 memcpy(&header
, head
, sizeof(header
));
279 le32_to_cpus(&header
);
280 packet
= head
+ sizeof(header
);
284 while (skb
->len
> 0) {
285 if ((short)(header
& 0x0000ffff) !=
286 ~((short)((header
& 0xffff0000) >> 16))) {
287 deverr(dev
,"asix_rx_fixup() Bad Header Length");
289 /* get the packet length */
290 size
= (u16
) (header
& 0x0000ffff);
292 if ((skb
->len
) - ((size
+ 1) & 0xfffe) == 0)
294 if (size
> ETH_FRAME_LEN
) {
295 deverr(dev
,"asix_rx_fixup() Bad RX Length %d", size
);
298 ax_skb
= skb_clone(skb
, GFP_ATOMIC
);
301 ax_skb
->data
= packet
;
302 ax_skb
->tail
= packet
+ size
;
303 usbnet_skb_return(dev
, ax_skb
);
308 skb_pull(skb
, (size
+ 1) & 0xfffe);
313 head
= (u8
*) skb
->data
;
314 memcpy(&header
, head
, sizeof(header
));
315 le32_to_cpus(&header
);
316 packet
= head
+ sizeof(header
);
321 deverr(dev
,"asix_rx_fixup() Bad SKB Length %d", skb
->len
);
327 static struct sk_buff
*asix_tx_fixup(struct usbnet
*dev
, struct sk_buff
*skb
,
331 int headroom
= skb_headroom(skb
);
332 int tailroom
= skb_tailroom(skb
);
334 u32 padbytes
= 0xffff0000;
336 padlen
= ((skb
->len
+ 4) % 512) ? 0 : 4;
338 if ((!skb_cloned(skb
))
339 && ((headroom
+ tailroom
) >= (4 + padlen
))) {
340 if ((headroom
< 4) || (tailroom
< padlen
)) {
341 skb
->data
= memmove(skb
->head
+ 4, skb
->data
, skb
->len
);
342 skb
->tail
= skb
->data
+ skb
->len
;
345 struct sk_buff
*skb2
;
346 skb2
= skb_copy_expand(skb
, 4, padlen
, flags
);
347 dev_kfree_skb_any(skb
);
354 packet_len
= (((skb
->len
- 4) ^ 0x0000ffff) << 16) + (skb
->len
- 4);
355 memcpy(skb
->data
, &packet_len
, sizeof(packet_len
));
357 if ((skb
->len
% 512) == 0) {
358 memcpy( skb
->tail
, &padbytes
, sizeof(padbytes
));
359 skb_put(skb
, sizeof(padbytes
));
364 static void asix_status(struct usbnet
*dev
, struct urb
*urb
)
366 struct ax88172_int_data
*event
;
369 if (urb
->actual_length
< 8)
372 event
= urb
->transfer_buffer
;
373 link
= event
->link
& 0x01;
374 if (netif_carrier_ok(dev
->net
) != link
) {
376 netif_carrier_on(dev
->net
);
377 usbnet_defer_kevent (dev
, EVENT_LINK_RESET
);
379 netif_carrier_off(dev
->net
);
380 devdbg(dev
, "Link Status is: %d", link
);
384 static inline int asix_set_sw_mii(struct usbnet
*dev
)
387 ret
= asix_write_cmd(dev
, AX_CMD_SET_SW_MII
, 0x0000, 0, 0, NULL
);
389 deverr(dev
, "Failed to enable software MII access");
393 static inline int asix_set_hw_mii(struct usbnet
*dev
)
396 ret
= asix_write_cmd(dev
, AX_CMD_SET_HW_MII
, 0x0000, 0, 0, NULL
);
398 deverr(dev
, "Failed to enable hardware MII access");
402 static inline int asix_get_phy_addr(struct usbnet
*dev
)
407 devdbg(dev
, "asix_get_phy_addr()");
409 buf
= kmalloc(2, GFP_KERNEL
);
413 if ((ret
= asix_read_cmd(dev
, AX_CMD_READ_PHY_ID
,
414 0, 0, 2, buf
)) < 2) {
415 deverr(dev
, "Error reading PHYID register: %02x", ret
);
418 devdbg(dev
, "asix_get_phy_addr() returning 0x%04x", *((u16
*)buf
));
419 ret
= *((u8
*)buf
+ 1);
426 static int asix_sw_reset(struct usbnet
*dev
, u8 flags
)
430 ret
= asix_write_cmd(dev
, AX_CMD_SW_RESET
, flags
, 0, 0, NULL
);
432 deverr(dev
,"Failed to send software reset: %02x", ret
);
437 static u16
asix_read_rx_ctl(struct usbnet
*dev
)
442 buf
= kmalloc(2, GFP_KERNEL
);
446 if ((ret
= asix_read_cmd(dev
, AX_CMD_READ_RX_CTL
,
447 0, 0, 2, buf
)) < 2) {
448 deverr(dev
, "Error reading RX_CTL register: %02x", ret
);
451 ret
= le16_to_cpu(*((u16
*)buf
));
458 static int asix_write_rx_ctl(struct usbnet
*dev
, u16 mode
)
462 devdbg(dev
,"asix_write_rx_ctl() - mode = 0x%04x", mode
);
463 ret
= asix_write_cmd(dev
, AX_CMD_WRITE_RX_CTL
, mode
, 0, 0, NULL
);
465 deverr(dev
, "Failed to write RX_CTL mode to 0x%04x: %02x",
471 static u16
asix_read_medium_status(struct usbnet
*dev
)
476 buf
= kmalloc(2, GFP_KERNEL
);
480 if ((ret
= asix_read_cmd(dev
, AX_CMD_READ_MEDIUM_STATUS
,
481 0, 0, 2, buf
)) < 2) {
482 deverr(dev
, "Error reading Medium Status register: %02x", ret
);
485 ret
= le16_to_cpu(*((u16
*)buf
));
492 static int asix_write_medium_mode(struct usbnet
*dev
, u16 mode
)
496 devdbg(dev
,"asix_write_medium_mode() - mode = 0x%04x", mode
);
497 ret
= asix_write_cmd(dev
, AX_CMD_WRITE_MEDIUM_MODE
, mode
, 0, 0, NULL
);
499 deverr(dev
, "Failed to write Medium Mode mode to 0x%04x: %02x",
505 static int asix_write_gpio(struct usbnet
*dev
, u16 value
, int sleep
)
509 devdbg(dev
,"asix_write_gpio() - value = 0x%04x", value
);
510 ret
= asix_write_cmd(dev
, AX_CMD_WRITE_GPIOS
, value
, 0, 0, NULL
);
512 deverr(dev
, "Failed to write GPIO value 0x%04x: %02x",
522 * AX88772 & AX88178 have a 16-bit RX_CTL value
524 static void asix_set_multicast(struct net_device
*net
)
526 struct usbnet
*dev
= netdev_priv(net
);
527 struct asix_data
*data
= (struct asix_data
*)&dev
->data
;
528 u16 rx_ctl
= AX_DEFAULT_RX_CTL
;
530 if (net
->flags
& IFF_PROMISC
) {
531 rx_ctl
|= AX_RX_CTL_PRO
;
532 } else if (net
->flags
& IFF_ALLMULTI
533 || net
->mc_count
> AX_MAX_MCAST
) {
534 rx_ctl
|= AX_RX_CTL_AMALL
;
535 } else if (net
->mc_count
== 0) {
536 /* just broadcast and directed */
538 /* We use the 20 byte dev->data
539 * for our 8 byte filter buffer
540 * to avoid allocating memory that
541 * is tricky to free later */
542 struct dev_mc_list
*mc_list
= net
->mc_list
;
546 memset(data
->multi_filter
, 0, AX_MCAST_FILTER_SIZE
);
548 /* Build the multicast hash filter. */
549 for (i
= 0; i
< net
->mc_count
; i
++) {
552 mc_list
->dmi_addr
) >> 26;
553 data
->multi_filter
[crc_bits
>> 3] |=
555 mc_list
= mc_list
->next
;
558 asix_write_cmd_async(dev
, AX_CMD_WRITE_MULTI_FILTER
, 0, 0,
559 AX_MCAST_FILTER_SIZE
, data
->multi_filter
);
561 rx_ctl
|= AX_RX_CTL_AM
;
564 asix_write_cmd_async(dev
, AX_CMD_WRITE_RX_CTL
, rx_ctl
, 0, 0, NULL
);
567 static int asix_mdio_read(struct net_device
*netdev
, int phy_id
, int loc
)
569 struct usbnet
*dev
= netdev_priv(netdev
);
572 asix_set_sw_mii(dev
);
573 asix_read_cmd(dev
, AX_CMD_READ_MII_REG
, phy_id
,
574 (__u16
)loc
, 2, (u16
*)&res
);
575 asix_set_hw_mii(dev
);
577 devdbg(dev
, "asix_mdio_read() phy_id=0x%02x, loc=0x%02x, returns=0x%04x", phy_id
, loc
, le16_to_cpu(res
& 0xffff));
579 return le16_to_cpu(res
& 0xffff);
583 asix_mdio_write(struct net_device
*netdev
, int phy_id
, int loc
, int val
)
585 struct usbnet
*dev
= netdev_priv(netdev
);
586 u16 res
= cpu_to_le16(val
);
588 devdbg(dev
, "asix_mdio_write() phy_id=0x%02x, loc=0x%02x, val=0x%04x", phy_id
, loc
, val
);
589 asix_set_sw_mii(dev
);
590 asix_write_cmd(dev
, AX_CMD_WRITE_MII_REG
, phy_id
,
591 (__u16
)loc
, 2, (u16
*)&res
);
592 asix_set_hw_mii(dev
);
595 /* Get the PHY Identifier from the PHYSID1 & PHYSID2 MII registers */
596 static u32
asix_get_phyid(struct usbnet
*dev
)
601 phy_reg
= asix_mdio_read(dev
->net
, dev
->mii
.phy_id
, MII_PHYSID1
);
605 phy_id
= (phy_reg
& 0xffff) << 16;
607 phy_reg
= asix_mdio_read(dev
->net
, dev
->mii
.phy_id
, MII_PHYSID2
);
611 phy_id
|= (phy_reg
& 0xffff);
617 asix_get_wol(struct net_device
*net
, struct ethtool_wolinfo
*wolinfo
)
619 struct usbnet
*dev
= netdev_priv(net
);
622 if (asix_read_cmd(dev
, AX_CMD_READ_MONITOR_MODE
, 0, 0, 1, &opt
) < 0) {
623 wolinfo
->supported
= 0;
624 wolinfo
->wolopts
= 0;
627 wolinfo
->supported
= WAKE_PHY
| WAKE_MAGIC
;
628 wolinfo
->wolopts
= 0;
629 if (opt
& AX_MONITOR_MODE
) {
630 if (opt
& AX_MONITOR_LINK
)
631 wolinfo
->wolopts
|= WAKE_PHY
;
632 if (opt
& AX_MONITOR_MAGIC
)
633 wolinfo
->wolopts
|= WAKE_MAGIC
;
638 asix_set_wol(struct net_device
*net
, struct ethtool_wolinfo
*wolinfo
)
640 struct usbnet
*dev
= netdev_priv(net
);
644 if (wolinfo
->wolopts
& WAKE_PHY
)
645 opt
|= AX_MONITOR_LINK
;
646 if (wolinfo
->wolopts
& WAKE_MAGIC
)
647 opt
|= AX_MONITOR_MAGIC
;
649 opt
|= AX_MONITOR_MODE
;
651 if (asix_write_cmd(dev
, AX_CMD_WRITE_MONITOR_MODE
,
652 opt
, 0, 0, &buf
) < 0)
658 static int asix_get_eeprom_len(struct net_device
*net
)
660 struct usbnet
*dev
= netdev_priv(net
);
661 struct asix_data
*data
= (struct asix_data
*)&dev
->data
;
663 return data
->eeprom_len
;
666 static int asix_get_eeprom(struct net_device
*net
,
667 struct ethtool_eeprom
*eeprom
, u8
*data
)
669 struct usbnet
*dev
= netdev_priv(net
);
670 u16
*ebuf
= (u16
*)data
;
673 /* Crude hack to ensure that we don't overwrite memory
674 * if an odd length is supplied
679 eeprom
->magic
= AX_EEPROM_MAGIC
;
681 /* ax8817x returns 2 bytes from eeprom on read */
682 for (i
=0; i
< eeprom
->len
/ 2; i
++) {
683 if (asix_read_cmd(dev
, AX_CMD_READ_EEPROM
,
684 eeprom
->offset
+ i
, 0, 2, &ebuf
[i
]) < 0)
690 static void asix_get_drvinfo (struct net_device
*net
,
691 struct ethtool_drvinfo
*info
)
693 struct usbnet
*dev
= netdev_priv(net
);
694 struct asix_data
*data
= (struct asix_data
*)&dev
->data
;
696 /* Inherit standard device info */
697 usbnet_get_drvinfo(net
, info
);
698 strncpy (info
->driver
, driver_name
, sizeof info
->driver
);
699 strncpy (info
->version
, DRIVER_VERSION
, sizeof info
->version
);
700 info
->eedump_len
= data
->eeprom_len
;
703 static int asix_get_settings(struct net_device
*net
, struct ethtool_cmd
*cmd
)
705 struct usbnet
*dev
= netdev_priv(net
);
707 return mii_ethtool_gset(&dev
->mii
,cmd
);
710 static int asix_set_settings(struct net_device
*net
, struct ethtool_cmd
*cmd
)
712 struct usbnet
*dev
= netdev_priv(net
);
713 int res
= mii_ethtool_sset(&dev
->mii
,cmd
);
715 /* link speed/duplex might have changed */
716 if (dev
->driver_info
->link_reset
)
717 dev
->driver_info
->link_reset(dev
);
722 static int asix_nway_reset(struct net_device
*net
)
724 struct usbnet
*dev
= netdev_priv(net
);
726 return mii_nway_restart(&dev
->mii
);
729 static u32
asix_get_link(struct net_device
*net
)
731 struct usbnet
*dev
= netdev_priv(net
);
733 return mii_link_ok(&dev
->mii
);
736 static int asix_ioctl (struct net_device
*net
, struct ifreq
*rq
, int cmd
)
738 struct usbnet
*dev
= netdev_priv(net
);
740 return generic_mii_ioctl(&dev
->mii
, if_mii(rq
), cmd
, NULL
);
743 /* We need to override some ethtool_ops so we require our
744 own structure so we don't interfere with other usbnet
745 devices that may be connected at the same time. */
746 static struct ethtool_ops ax88172_ethtool_ops
= {
747 .get_drvinfo
= asix_get_drvinfo
,
748 .get_link
= asix_get_link
,
749 .nway_reset
= asix_nway_reset
,
750 .get_msglevel
= usbnet_get_msglevel
,
751 .set_msglevel
= usbnet_set_msglevel
,
752 .get_wol
= asix_get_wol
,
753 .set_wol
= asix_set_wol
,
754 .get_eeprom_len
= asix_get_eeprom_len
,
755 .get_eeprom
= asix_get_eeprom
,
756 .get_settings
= asix_get_settings
,
757 .set_settings
= asix_set_settings
,
760 static void ax88172_set_multicast(struct net_device
*net
)
762 struct usbnet
*dev
= netdev_priv(net
);
763 struct asix_data
*data
= (struct asix_data
*)&dev
->data
;
766 if (net
->flags
& IFF_PROMISC
) {
768 } else if (net
->flags
& IFF_ALLMULTI
769 || net
->mc_count
> AX_MAX_MCAST
) {
771 } else if (net
->mc_count
== 0) {
772 /* just broadcast and directed */
774 /* We use the 20 byte dev->data
775 * for our 8 byte filter buffer
776 * to avoid allocating memory that
777 * is tricky to free later */
778 struct dev_mc_list
*mc_list
= net
->mc_list
;
782 memset(data
->multi_filter
, 0, AX_MCAST_FILTER_SIZE
);
784 /* Build the multicast hash filter. */
785 for (i
= 0; i
< net
->mc_count
; i
++) {
788 mc_list
->dmi_addr
) >> 26;
789 data
->multi_filter
[crc_bits
>> 3] |=
791 mc_list
= mc_list
->next
;
794 asix_write_cmd_async(dev
, AX_CMD_WRITE_MULTI_FILTER
, 0, 0,
795 AX_MCAST_FILTER_SIZE
, data
->multi_filter
);
800 asix_write_cmd_async(dev
, AX_CMD_WRITE_RX_CTL
, rx_ctl
, 0, 0, NULL
);
803 static int ax88172_link_reset(struct usbnet
*dev
)
806 struct ethtool_cmd ecmd
;
808 mii_check_media(&dev
->mii
, 1, 1);
809 mii_ethtool_gset(&dev
->mii
, &ecmd
);
810 mode
= AX88172_MEDIUM_DEFAULT
;
812 if (ecmd
.duplex
!= DUPLEX_FULL
)
813 mode
|= ~AX88172_MEDIUM_FD
;
815 devdbg(dev
, "ax88172_link_reset() speed: %d duplex: %d setting mode to 0x%04x", ecmd
.speed
, ecmd
.duplex
, mode
);
817 asix_write_medium_mode(dev
, mode
);
822 static int ax88172_bind(struct usbnet
*dev
, struct usb_interface
*intf
)
827 unsigned long gpio_bits
= dev
->driver_info
->data
;
828 struct asix_data
*data
= (struct asix_data
*)&dev
->data
;
830 data
->eeprom_len
= AX88172_EEPROM_LEN
;
832 usbnet_get_endpoints(dev
,intf
);
834 buf
= kmalloc(ETH_ALEN
, GFP_KERNEL
);
840 /* Toggle the GPIOs in a manufacturer/model specific way */
841 for (i
= 2; i
>= 0; i
--) {
842 if ((ret
= asix_write_cmd(dev
, AX_CMD_WRITE_GPIOS
,
843 (gpio_bits
>> (i
* 8)) & 0xff, 0, 0,
849 if ((ret
= asix_write_rx_ctl(dev
, 0x80)) < 0)
852 /* Get the MAC address */
853 memset(buf
, 0, ETH_ALEN
);
854 if ((ret
= asix_read_cmd(dev
, AX88172_CMD_READ_NODE_ID
,
855 0, 0, 6, buf
)) < 0) {
856 dbg("read AX_CMD_READ_NODE_ID failed: %d", ret
);
859 memcpy(dev
->net
->dev_addr
, buf
, ETH_ALEN
);
861 /* Initialize MII structure */
862 dev
->mii
.dev
= dev
->net
;
863 dev
->mii
.mdio_read
= asix_mdio_read
;
864 dev
->mii
.mdio_write
= asix_mdio_write
;
865 dev
->mii
.phy_id_mask
= 0x3f;
866 dev
->mii
.reg_num_mask
= 0x1f;
867 dev
->mii
.phy_id
= asix_get_phy_addr(dev
);
868 dev
->net
->do_ioctl
= asix_ioctl
;
870 dev
->net
->set_multicast_list
= ax88172_set_multicast
;
871 dev
->net
->ethtool_ops
= &ax88172_ethtool_ops
;
873 asix_mdio_write(dev
->net
, dev
->mii
.phy_id
, MII_BMCR
, BMCR_RESET
);
874 asix_mdio_write(dev
->net
, dev
->mii
.phy_id
, MII_ADVERTISE
,
875 ADVERTISE_ALL
| ADVERTISE_CSMA
| ADVERTISE_PAUSE_CAP
);
876 mii_nway_restart(&dev
->mii
);
885 static struct ethtool_ops ax88772_ethtool_ops
= {
886 .get_drvinfo
= asix_get_drvinfo
,
887 .get_link
= asix_get_link
,
888 .nway_reset
= asix_nway_reset
,
889 .get_msglevel
= usbnet_get_msglevel
,
890 .set_msglevel
= usbnet_set_msglevel
,
891 .get_wol
= asix_get_wol
,
892 .set_wol
= asix_set_wol
,
893 .get_eeprom_len
= asix_get_eeprom_len
,
894 .get_eeprom
= asix_get_eeprom
,
895 .get_settings
= asix_get_settings
,
896 .set_settings
= asix_set_settings
,
899 static int ax88772_link_reset(struct usbnet
*dev
)
902 struct ethtool_cmd ecmd
;
904 mii_check_media(&dev
->mii
, 1, 1);
905 mii_ethtool_gset(&dev
->mii
, &ecmd
);
906 mode
= AX88772_MEDIUM_DEFAULT
;
908 if (ecmd
.speed
!= SPEED_100
)
909 mode
&= ~AX_MEDIUM_PS
;
911 if (ecmd
.duplex
!= DUPLEX_FULL
)
912 mode
&= ~AX_MEDIUM_FD
;
914 devdbg(dev
, "ax88772_link_reset() speed: %d duplex: %d setting mode to 0x%04x", ecmd
.speed
, ecmd
.duplex
, mode
);
916 asix_write_medium_mode(dev
, mode
);
921 static int ax88772_bind(struct usbnet
*dev
, struct usb_interface
*intf
)
926 struct asix_data
*data
= (struct asix_data
*)&dev
->data
;
929 data
->eeprom_len
= AX88772_EEPROM_LEN
;
931 usbnet_get_endpoints(dev
,intf
);
933 buf
= kmalloc(6, GFP_KERNEL
);
935 dbg ("Cannot allocate memory for buffer");
940 if ((ret
= asix_write_gpio(dev
,
941 AX_GPIO_RSE
| AX_GPIO_GPO_2
| AX_GPIO_GPO2EN
, 5)) < 0)
944 if ((ret
= asix_write_cmd(dev
, AX_CMD_SW_PHY_SELECT
,
945 0x0000, 0, 0, buf
)) < 0) {
946 dbg("Select PHY #1 failed: %d", ret
);
950 if ((ret
= asix_sw_reset(dev
, AX_SWRESET_IPPD
)) < 0)
954 if ((ret
= asix_sw_reset(dev
, AX_SWRESET_CLEAR
)) < 0)
958 if ((ret
= asix_sw_reset(dev
, AX_SWRESET_IPRL
| AX_SWRESET_PRL
)) < 0)
962 rx_ctl
= asix_read_rx_ctl(dev
);
963 dbg("RX_CTL is 0x%04x after software reset", rx_ctl
);
964 if ((ret
= asix_write_rx_ctl(dev
, 0x0000)) < 0)
967 rx_ctl
= asix_read_rx_ctl(dev
);
968 dbg("RX_CTL is 0x%04x setting to 0x0000", rx_ctl
);
970 /* Get the MAC address */
971 memset(buf
, 0, ETH_ALEN
);
972 if ((ret
= asix_read_cmd(dev
, AX_CMD_READ_NODE_ID
,
973 0, 0, ETH_ALEN
, buf
)) < 0) {
974 dbg("Failed to read MAC address: %d", ret
);
977 memcpy(dev
->net
->dev_addr
, buf
, ETH_ALEN
);
979 /* Initialize MII structure */
980 dev
->mii
.dev
= dev
->net
;
981 dev
->mii
.mdio_read
= asix_mdio_read
;
982 dev
->mii
.mdio_write
= asix_mdio_write
;
983 dev
->mii
.phy_id_mask
= 0x1f;
984 dev
->mii
.reg_num_mask
= 0x1f;
985 dev
->net
->do_ioctl
= asix_ioctl
;
986 dev
->mii
.phy_id
= asix_get_phy_addr(dev
);
988 phyid
= asix_get_phyid(dev
);
989 dbg("PHYID=0x%08x", phyid
);
991 if ((ret
= asix_sw_reset(dev
, AX_SWRESET_PRL
)) < 0)
996 if ((ret
= asix_sw_reset(dev
, AX_SWRESET_IPRL
| AX_SWRESET_PRL
)) < 0)
1001 dev
->net
->set_multicast_list
= asix_set_multicast
;
1002 dev
->net
->ethtool_ops
= &ax88772_ethtool_ops
;
1004 asix_mdio_write(dev
->net
, dev
->mii
.phy_id
, MII_BMCR
, BMCR_RESET
);
1005 asix_mdio_write(dev
->net
, dev
->mii
.phy_id
, MII_ADVERTISE
,
1006 ADVERTISE_ALL
| ADVERTISE_CSMA
);
1007 mii_nway_restart(&dev
->mii
);
1009 if ((ret
= asix_write_medium_mode(dev
, AX88772_MEDIUM_DEFAULT
)) < 0)
1012 if ((ret
= asix_write_cmd(dev
, AX_CMD_WRITE_IPG0
,
1013 AX88772_IPG0_DEFAULT
| AX88772_IPG1_DEFAULT
,
1014 AX88772_IPG2_DEFAULT
, 0, buf
)) < 0) {
1015 dbg("Write IPG,IPG1,IPG2 failed: %d", ret
);
1019 /* Set RX_CTL to default values with 2k buffer, and enable cactus */
1020 if ((ret
= asix_write_rx_ctl(dev
, AX_DEFAULT_RX_CTL
)) < 0)
1023 rx_ctl
= asix_read_rx_ctl(dev
);
1024 dbg("RX_CTL is 0x%04x after all initializations", rx_ctl
);
1026 rx_ctl
= asix_read_medium_status(dev
);
1027 dbg("Medium Status is 0x%04x after all initializations", rx_ctl
);
1031 /* Asix framing packs multiple eth frames into a 2K usb bulk transfer */
1032 if (dev
->driver_info
->flags
& FLAG_FRAMING_AX
) {
1033 /* hard_mtu is still the default - the device does not support
1035 dev
->rx_urb_size
= 2048;
1046 static struct ethtool_ops ax88178_ethtool_ops
= {
1047 .get_drvinfo
= asix_get_drvinfo
,
1048 .get_link
= asix_get_link
,
1049 .nway_reset
= asix_nway_reset
,
1050 .get_msglevel
= usbnet_get_msglevel
,
1051 .set_msglevel
= usbnet_set_msglevel
,
1052 .get_wol
= asix_get_wol
,
1053 .set_wol
= asix_set_wol
,
1054 .get_eeprom_len
= asix_get_eeprom_len
,
1055 .get_eeprom
= asix_get_eeprom
,
1056 .get_settings
= asix_get_settings
,
1057 .set_settings
= asix_set_settings
,
1060 static int marvell_phy_init(struct usbnet
*dev
)
1062 struct asix_data
*data
= (struct asix_data
*)&dev
->data
;
1065 devdbg(dev
,"marvell_phy_init()");
1067 reg
= asix_mdio_read(dev
->net
, dev
->mii
.phy_id
, MII_MARVELL_STATUS
);
1068 devdbg(dev
,"MII_MARVELL_STATUS = 0x%04x", reg
);
1070 asix_mdio_write(dev
->net
, dev
->mii
.phy_id
, MII_MARVELL_CTRL
,
1071 MARVELL_CTRL_RXDELAY
| MARVELL_CTRL_TXDELAY
);
1073 if (data
->ledmode
) {
1074 reg
= asix_mdio_read(dev
->net
, dev
->mii
.phy_id
,
1075 MII_MARVELL_LED_CTRL
);
1076 devdbg(dev
,"MII_MARVELL_LED_CTRL (1) = 0x%04x", reg
);
1079 reg
|= (1 + 0x0100);
1080 asix_mdio_write(dev
->net
, dev
->mii
.phy_id
,
1081 MII_MARVELL_LED_CTRL
, reg
);
1083 reg
= asix_mdio_read(dev
->net
, dev
->mii
.phy_id
,
1084 MII_MARVELL_LED_CTRL
);
1085 devdbg(dev
,"MII_MARVELL_LED_CTRL (2) = 0x%04x", reg
);
1092 static int marvell_led_status(struct usbnet
*dev
, u16 speed
)
1094 u16 reg
= asix_mdio_read(dev
->net
, dev
->mii
.phy_id
, MARVELL_LED_MANUAL
);
1096 devdbg(dev
, "marvell_led_status() read 0x%04x", reg
);
1098 /* Clear out the center LED bits - 0x03F0 */
1112 devdbg(dev
, "marvell_led_status() writing 0x%04x", reg
);
1113 asix_mdio_write(dev
->net
, dev
->mii
.phy_id
, MARVELL_LED_MANUAL
, reg
);
1118 static int ax88178_link_reset(struct usbnet
*dev
)
1121 struct ethtool_cmd ecmd
;
1122 struct asix_data
*data
= (struct asix_data
*)&dev
->data
;
1124 devdbg(dev
,"ax88178_link_reset()");
1126 mii_check_media(&dev
->mii
, 1, 1);
1127 mii_ethtool_gset(&dev
->mii
, &ecmd
);
1128 mode
= AX88178_MEDIUM_DEFAULT
;
1130 if (ecmd
.speed
== SPEED_1000
)
1131 mode
|= AX_MEDIUM_GM
| AX_MEDIUM_ENCK
;
1132 else if (ecmd
.speed
== SPEED_100
)
1133 mode
|= AX_MEDIUM_PS
;
1135 mode
&= ~(AX_MEDIUM_PS
| AX_MEDIUM_GM
);
1137 if (ecmd
.duplex
== DUPLEX_FULL
)
1138 mode
|= AX_MEDIUM_FD
;
1140 mode
&= ~AX_MEDIUM_FD
;
1142 devdbg(dev
, "ax88178_link_reset() speed: %d duplex: %d setting mode to 0x%04x", ecmd
.speed
, ecmd
.duplex
, mode
);
1144 asix_write_medium_mode(dev
, mode
);
1146 if (data
->phymode
== PHY_MODE_MARVELL
&& data
->ledmode
)
1147 marvell_led_status(dev
, ecmd
.speed
);
1152 static void ax88178_set_mfb(struct usbnet
*dev
)
1154 u16 mfb
= AX_RX_CTL_MFB_16384
;
1157 int old_rx_urb_size
= dev
->rx_urb_size
;
1159 if (dev
->hard_mtu
< 2048) {
1160 dev
->rx_urb_size
= 2048;
1161 mfb
= AX_RX_CTL_MFB_2048
;
1162 } else if (dev
->hard_mtu
< 4096) {
1163 dev
->rx_urb_size
= 4096;
1164 mfb
= AX_RX_CTL_MFB_4096
;
1165 } else if (dev
->hard_mtu
< 8192) {
1166 dev
->rx_urb_size
= 8192;
1167 mfb
= AX_RX_CTL_MFB_8192
;
1168 } else if (dev
->hard_mtu
< 16384) {
1169 dev
->rx_urb_size
= 16384;
1170 mfb
= AX_RX_CTL_MFB_16384
;
1173 rxctl
= asix_read_rx_ctl(dev
);
1174 asix_write_rx_ctl(dev
, (rxctl
& ~AX_RX_CTL_MFB_16384
) | mfb
);
1176 medium
= asix_read_medium_status(dev
);
1177 if (dev
->net
->mtu
> 1500)
1178 medium
|= AX_MEDIUM_JFE
;
1180 medium
&= ~AX_MEDIUM_JFE
;
1181 asix_write_medium_mode(dev
, medium
);
1183 if (dev
->rx_urb_size
> old_rx_urb_size
)
1184 usbnet_unlink_rx_urbs(dev
);
1187 static int ax88178_change_mtu(struct net_device
*net
, int new_mtu
)
1189 struct usbnet
*dev
= netdev_priv(net
);
1190 int ll_mtu
= new_mtu
+ net
->hard_header_len
+ 4;
1192 devdbg(dev
, "ax88178_change_mtu() new_mtu=%d", new_mtu
);
1194 if (new_mtu
<= 0 || ll_mtu
> 16384)
1197 if ((ll_mtu
% dev
->maxpacket
) == 0)
1201 dev
->hard_mtu
= net
->mtu
+ net
->hard_header_len
;
1202 ax88178_set_mfb(dev
);
1207 static int ax88178_bind(struct usbnet
*dev
, struct usb_interface
*intf
)
1209 struct asix_data
*data
= (struct asix_data
*)&dev
->data
;
1216 usbnet_get_endpoints(dev
,intf
);
1218 buf
= kmalloc(6, GFP_KERNEL
);
1220 dbg ("Cannot allocate memory for buffer");
1226 asix_read_cmd(dev
, AX_CMD_READ_GPIOS
, 0, 0, 1, &eeprom
);
1227 dbg("GPIO Status: 0x%04x", eeprom
);
1229 asix_write_cmd(dev
, AX_CMD_WRITE_ENABLE
, 0, 0, 0, NULL
);
1230 asix_read_cmd(dev
, AX_CMD_READ_EEPROM
, 0x0017, 0, 2, &eeprom
);
1231 asix_write_cmd(dev
, AX_CMD_WRITE_DISABLE
, 0, 0, 0, NULL
);
1233 dbg("EEPROM index 0x17 is 0x%04x", eeprom
);
1235 if (eeprom
== 0xffff) {
1236 data
->phymode
= PHY_MODE_MARVELL
;
1240 data
->phymode
= eeprom
& 7;
1241 data
->ledmode
= eeprom
>> 8;
1242 gpio0
= (eeprom
& 0x80) ? 0 : 1;
1244 dbg("GPIO0: %d, PhyMode: %d", gpio0
, data
->phymode
);
1246 asix_write_gpio(dev
, AX_GPIO_RSE
| AX_GPIO_GPO_1
| AX_GPIO_GPO1EN
, 40);
1247 if ((eeprom
>> 8) != 1) {
1248 asix_write_gpio(dev
, 0x003c, 30);
1249 asix_write_gpio(dev
, 0x001c, 300);
1250 asix_write_gpio(dev
, 0x003c, 30);
1252 dbg("gpio phymode == 1 path");
1253 asix_write_gpio(dev
, AX_GPIO_GPO1EN
, 30);
1254 asix_write_gpio(dev
, AX_GPIO_GPO1EN
| AX_GPIO_GPO_1
, 30);
1257 asix_sw_reset(dev
, 0);
1260 asix_sw_reset(dev
, AX_SWRESET_PRL
| AX_SWRESET_IPPD
);
1263 asix_write_rx_ctl(dev
, 0);
1265 /* Get the MAC address */
1266 memset(buf
, 0, ETH_ALEN
);
1267 if ((ret
= asix_read_cmd(dev
, AX_CMD_READ_NODE_ID
,
1268 0, 0, ETH_ALEN
, buf
)) < 0) {
1269 dbg("Failed to read MAC address: %d", ret
);
1272 memcpy(dev
->net
->dev_addr
, buf
, ETH_ALEN
);
1274 /* Initialize MII structure */
1275 dev
->mii
.dev
= dev
->net
;
1276 dev
->mii
.mdio_read
= asix_mdio_read
;
1277 dev
->mii
.mdio_write
= asix_mdio_write
;
1278 dev
->mii
.phy_id_mask
= 0x1f;
1279 dev
->mii
.reg_num_mask
= 0xff;
1280 dev
->mii
.supports_gmii
= 1;
1281 dev
->net
->do_ioctl
= asix_ioctl
;
1282 dev
->mii
.phy_id
= asix_get_phy_addr(dev
);
1283 dev
->net
->set_multicast_list
= asix_set_multicast
;
1284 dev
->net
->ethtool_ops
= &ax88178_ethtool_ops
;
1285 dev
->net
->change_mtu
= &ax88178_change_mtu
;
1287 phyid
= asix_get_phyid(dev
);
1288 dbg("PHYID=0x%08x", phyid
);
1290 if (data
->phymode
== PHY_MODE_MARVELL
) {
1291 marvell_phy_init(dev
);
1295 asix_mdio_write(dev
->net
, dev
->mii
.phy_id
, MII_BMCR
,
1296 BMCR_RESET
| BMCR_ANENABLE
);
1297 asix_mdio_write(dev
->net
, dev
->mii
.phy_id
, MII_ADVERTISE
,
1298 ADVERTISE_ALL
| ADVERTISE_CSMA
| ADVERTISE_PAUSE_CAP
);
1299 asix_mdio_write(dev
->net
, dev
->mii
.phy_id
, MII_CTRL1000
,
1300 ADVERTISE_1000FULL
);
1302 mii_nway_restart(&dev
->mii
);
1304 if ((ret
= asix_write_medium_mode(dev
, AX88178_MEDIUM_DEFAULT
)) < 0)
1307 if ((ret
= asix_write_rx_ctl(dev
, AX_DEFAULT_RX_CTL
)) < 0)
1312 /* Asix framing packs multiple eth frames into a 2K usb bulk transfer */
1313 if (dev
->driver_info
->flags
& FLAG_FRAMING_AX
) {
1314 /* hard_mtu is still the default - the device does not support
1316 dev
->rx_urb_size
= 2048;
1327 static const struct driver_info ax8817x_info
= {
1328 .description
= "ASIX AX8817x USB 2.0 Ethernet",
1329 .bind
= ax88172_bind
,
1330 .status
= asix_status
,
1331 .link_reset
= ax88172_link_reset
,
1332 .reset
= ax88172_link_reset
,
1333 .flags
= FLAG_ETHER
,
1337 static const struct driver_info dlink_dub_e100_info
= {
1338 .description
= "DLink DUB-E100 USB Ethernet",
1339 .bind
= ax88172_bind
,
1340 .status
= asix_status
,
1341 .link_reset
= ax88172_link_reset
,
1342 .reset
= ax88172_link_reset
,
1343 .flags
= FLAG_ETHER
,
1347 static const struct driver_info netgear_fa120_info
= {
1348 .description
= "Netgear FA-120 USB Ethernet",
1349 .bind
= ax88172_bind
,
1350 .status
= asix_status
,
1351 .link_reset
= ax88172_link_reset
,
1352 .reset
= ax88172_link_reset
,
1353 .flags
= FLAG_ETHER
,
1357 static const struct driver_info hawking_uf200_info
= {
1358 .description
= "Hawking UF200 USB Ethernet",
1359 .bind
= ax88172_bind
,
1360 .status
= asix_status
,
1361 .link_reset
= ax88172_link_reset
,
1362 .reset
= ax88172_link_reset
,
1363 .flags
= FLAG_ETHER
,
1367 static const struct driver_info ax88772_info
= {
1368 .description
= "ASIX AX88772 USB 2.0 Ethernet",
1369 .bind
= ax88772_bind
,
1370 .status
= asix_status
,
1371 .link_reset
= ax88772_link_reset
,
1372 .reset
= ax88772_link_reset
,
1373 .flags
= FLAG_ETHER
| FLAG_FRAMING_AX
,
1374 .rx_fixup
= asix_rx_fixup
,
1375 .tx_fixup
= asix_tx_fixup
,
1378 static const struct driver_info ax88178_info
= {
1379 .description
= "ASIX AX88178 USB 2.0 Ethernet",
1380 .bind
= ax88178_bind
,
1381 .status
= asix_status
,
1382 .link_reset
= ax88178_link_reset
,
1383 .reset
= ax88178_link_reset
,
1384 .flags
= FLAG_ETHER
| FLAG_FRAMING_AX
,
1385 .rx_fixup
= asix_rx_fixup
,
1386 .tx_fixup
= asix_tx_fixup
,
1389 static const struct usb_device_id products
[] = {
1392 USB_DEVICE (0x077b, 0x2226),
1393 .driver_info
= (unsigned long) &ax8817x_info
,
1396 USB_DEVICE (0x0846, 0x1040),
1397 .driver_info
= (unsigned long) &netgear_fa120_info
,
1400 USB_DEVICE (0x2001, 0x1a00),
1401 .driver_info
= (unsigned long) &dlink_dub_e100_info
,
1403 // Intellinet, ST Lab USB Ethernet
1404 USB_DEVICE (0x0b95, 0x1720),
1405 .driver_info
= (unsigned long) &ax8817x_info
,
1407 // Hawking UF200, TrendNet TU2-ET100
1408 USB_DEVICE (0x07b8, 0x420a),
1409 .driver_info
= (unsigned long) &hawking_uf200_info
,
1411 // Billionton Systems, USB2AR
1412 USB_DEVICE (0x08dd, 0x90ff),
1413 .driver_info
= (unsigned long) &ax8817x_info
,
1416 USB_DEVICE (0x0557, 0x2009),
1417 .driver_info
= (unsigned long) &ax8817x_info
,
1419 // Buffalo LUA-U2-KTX
1420 USB_DEVICE (0x0411, 0x003d),
1421 .driver_info
= (unsigned long) &ax8817x_info
,
1423 // Sitecom LN-029 "USB 2.0 10/100 Ethernet adapter"
1424 USB_DEVICE (0x6189, 0x182d),
1425 .driver_info
= (unsigned long) &ax8817x_info
,
1427 // corega FEther USB2-TX
1428 USB_DEVICE (0x07aa, 0x0017),
1429 .driver_info
= (unsigned long) &ax8817x_info
,
1431 // Surecom EP-1427X-2
1432 USB_DEVICE (0x1189, 0x0893),
1433 .driver_info
= (unsigned long) &ax8817x_info
,
1435 // goodway corp usb gwusb2e
1436 USB_DEVICE (0x1631, 0x6200),
1437 .driver_info
= (unsigned long) &ax8817x_info
,
1439 // ASIX AX88772 10/100
1440 USB_DEVICE (0x0b95, 0x7720),
1441 .driver_info
= (unsigned long) &ax88772_info
,
1443 // ASIX AX88178 10/100/1000
1444 USB_DEVICE (0x0b95, 0x1780),
1445 .driver_info
= (unsigned long) &ax88178_info
,
1447 // Linksys USB200M Rev 2
1448 USB_DEVICE (0x13b1, 0x0018),
1449 .driver_info
= (unsigned long) &ax88772_info
,
1451 // 0Q0 cable ethernet
1452 USB_DEVICE (0x1557, 0x7720),
1453 .driver_info
= (unsigned long) &ax88772_info
,
1455 // DLink DUB-E100 H/W Ver B1
1456 USB_DEVICE (0x07d1, 0x3c05),
1457 .driver_info
= (unsigned long) &ax88772_info
,
1459 // DLink DUB-E100 H/W Ver B1 Alternate
1460 USB_DEVICE (0x2001, 0x3c05),
1461 .driver_info
= (unsigned long) &ax88772_info
,
1464 USB_DEVICE (0x1737, 0x0039),
1465 .driver_info
= (unsigned long) &ax88178_info
,
1469 MODULE_DEVICE_TABLE(usb
, products
);
1471 static struct usb_driver asix_driver
= {
1473 .id_table
= products
,
1474 .probe
= usbnet_probe
,
1475 .suspend
= usbnet_suspend
,
1476 .resume
= usbnet_resume
,
1477 .disconnect
= usbnet_disconnect
,
1480 static int __init
asix_init(void)
1482 return usb_register(&asix_driver
);
1484 module_init(asix_init
);
1486 static void __exit
asix_exit(void)
1488 usb_deregister(&asix_driver
);
1490 module_exit(asix_exit
);
1492 MODULE_AUTHOR("David Hollis");
1493 MODULE_DESCRIPTION("ASIX AX8817X based USB 2.0 Ethernet Devices");
1494 MODULE_LICENSE("GPL");