mm/sl[aou]b: Move list_add() to slab_common.c
[linux-2.6/cjktty.git] / drivers / net / phy / lxt.c
blob6d1e3fcc43e237b8076c2be6a2b5c41db5473d38
1 /*
2 * drivers/net/phy/lxt.c
4 * Driver for Intel LXT PHYs
6 * Author: Andy Fleming
8 * Copyright (c) 2004 Freescale Semiconductor, Inc.
10 * This program is free software; you can redistribute it and/or modify it
11 * under the terms of the GNU General Public License as published by the
12 * Free Software Foundation; either version 2 of the License, or (at your
13 * option) any later version.
16 #include <linux/kernel.h>
17 #include <linux/string.h>
18 #include <linux/errno.h>
19 #include <linux/unistd.h>
20 #include <linux/interrupt.h>
21 #include <linux/init.h>
22 #include <linux/delay.h>
23 #include <linux/netdevice.h>
24 #include <linux/etherdevice.h>
25 #include <linux/skbuff.h>
26 #include <linux/spinlock.h>
27 #include <linux/mm.h>
28 #include <linux/module.h>
29 #include <linux/mii.h>
30 #include <linux/ethtool.h>
31 #include <linux/phy.h>
33 #include <asm/io.h>
34 #include <asm/irq.h>
35 #include <asm/uaccess.h>
37 /* The Level one LXT970 is used by many boards */
39 #define MII_LXT970_IER 17 /* Interrupt Enable Register */
41 #define MII_LXT970_IER_IEN 0x0002
43 #define MII_LXT970_ISR 18 /* Interrupt Status Register */
45 #define MII_LXT970_CONFIG 19 /* Configuration Register */
47 /* ------------------------------------------------------------------------- */
48 /* The Level one LXT971 is used on some of my custom boards */
50 /* register definitions for the 971 */
51 #define MII_LXT971_IER 18 /* Interrupt Enable Register */
52 #define MII_LXT971_IER_IEN 0x00f2
54 #define MII_LXT971_ISR 19 /* Interrupt Status Register */
56 /* register definitions for the 973 */
57 #define MII_LXT973_PCR 16 /* Port Configuration Register */
58 #define PCR_FIBER_SELECT 1
60 MODULE_DESCRIPTION("Intel LXT PHY driver");
61 MODULE_AUTHOR("Andy Fleming");
62 MODULE_LICENSE("GPL");
64 static int lxt970_ack_interrupt(struct phy_device *phydev)
66 int err;
68 err = phy_read(phydev, MII_BMSR);
70 if (err < 0)
71 return err;
73 err = phy_read(phydev, MII_LXT970_ISR);
75 if (err < 0)
76 return err;
78 return 0;
81 static int lxt970_config_intr(struct phy_device *phydev)
83 int err;
85 if(phydev->interrupts == PHY_INTERRUPT_ENABLED)
86 err = phy_write(phydev, MII_LXT970_IER, MII_LXT970_IER_IEN);
87 else
88 err = phy_write(phydev, MII_LXT970_IER, 0);
90 return err;
93 static int lxt970_config_init(struct phy_device *phydev)
95 int err;
97 err = phy_write(phydev, MII_LXT970_CONFIG, 0);
99 return err;
103 static int lxt971_ack_interrupt(struct phy_device *phydev)
105 int err = phy_read(phydev, MII_LXT971_ISR);
107 if (err < 0)
108 return err;
110 return 0;
113 static int lxt971_config_intr(struct phy_device *phydev)
115 int err;
117 if(phydev->interrupts == PHY_INTERRUPT_ENABLED)
118 err = phy_write(phydev, MII_LXT971_IER, MII_LXT971_IER_IEN);
119 else
120 err = phy_write(phydev, MII_LXT971_IER, 0);
122 return err;
125 static int lxt973_probe(struct phy_device *phydev)
127 int val = phy_read(phydev, MII_LXT973_PCR);
129 if (val & PCR_FIBER_SELECT) {
131 * If fiber is selected, then the only correct setting
132 * is 100Mbps, full duplex, and auto negotiation off.
134 val = phy_read(phydev, MII_BMCR);
135 val |= (BMCR_SPEED100 | BMCR_FULLDPLX);
136 val &= ~BMCR_ANENABLE;
137 phy_write(phydev, MII_BMCR, val);
138 /* Remember that the port is in fiber mode. */
139 phydev->priv = lxt973_probe;
140 } else {
141 phydev->priv = NULL;
143 return 0;
146 static int lxt973_config_aneg(struct phy_device *phydev)
148 /* Do nothing if port is in fiber mode. */
149 return phydev->priv ? 0 : genphy_config_aneg(phydev);
152 static struct phy_driver lxt97x_driver[] = {
154 .phy_id = 0x78100000,
155 .name = "LXT970",
156 .phy_id_mask = 0xfffffff0,
157 .features = PHY_BASIC_FEATURES,
158 .flags = PHY_HAS_INTERRUPT,
159 .config_init = lxt970_config_init,
160 .config_aneg = genphy_config_aneg,
161 .read_status = genphy_read_status,
162 .ack_interrupt = lxt970_ack_interrupt,
163 .config_intr = lxt970_config_intr,
164 .driver = { .owner = THIS_MODULE,},
165 }, {
166 .phy_id = 0x001378e0,
167 .name = "LXT971",
168 .phy_id_mask = 0xfffffff0,
169 .features = PHY_BASIC_FEATURES,
170 .flags = PHY_HAS_INTERRUPT,
171 .config_aneg = genphy_config_aneg,
172 .read_status = genphy_read_status,
173 .ack_interrupt = lxt971_ack_interrupt,
174 .config_intr = lxt971_config_intr,
175 .driver = { .owner = THIS_MODULE,},
176 }, {
177 .phy_id = 0x00137a10,
178 .name = "LXT973",
179 .phy_id_mask = 0xfffffff0,
180 .features = PHY_BASIC_FEATURES,
181 .flags = 0,
182 .probe = lxt973_probe,
183 .config_aneg = lxt973_config_aneg,
184 .read_status = genphy_read_status,
185 .driver = { .owner = THIS_MODULE,},
186 } };
188 static int __init lxt_init(void)
190 return phy_drivers_register(lxt97x_driver,
191 ARRAY_SIZE(lxt97x_driver));
194 static void __exit lxt_exit(void)
196 phy_drivers_unregister(lxt97x_driver,
197 ARRAY_SIZE(lxt97x_driver));
200 module_init(lxt_init);
201 module_exit(lxt_exit);
203 static struct mdio_device_id __maybe_unused lxt_tbl[] = {
204 { 0x78100000, 0xfffffff0 },
205 { 0x001378e0, 0xfffffff0 },
206 { 0x00137a10, 0xfffffff0 },
210 MODULE_DEVICE_TABLE(mdio, lxt_tbl);