drivers/usb/host/ohci-pci.c

   1 /*
   2  * OHCI HCD (Host Controller Driver) for USB.
   3  *
   4  * (C) Copyright 1999 Roman Weissgaerber <weissg@vienna.at>
   5  * (C) Copyright 2000-2002 David Brownell <dbrownell@users.sourceforge.net>
   6  *
   7  * [ Initialisation is based on Linus'  ]
   8  * [ uhci code and gregs ohci fragments ]
   9  * [ (C) Copyright 1999 Linus Torvalds  ]
  10  * [ (C) Copyright 1999 Gregory P. Smith]
  11  *
  12  * PCI Bus Glue
  13  *
  14  * This file is licenced under the GPL.
  15  */
  16
  17 #ifndef CONFIG_PCI
  18 #error "This file is PCI bus glue.  CONFIG_PCI must be defined."
  19 #endif
  20
  21 /*-------------------------------------------------------------------------*/
  22
  23 static int
  24 ohci_pci_reset (struct usb_hcd *hcd)
  25 {
  26         struct ohci_hcd *ohci = hcd_to_ohci (hcd);
  27
  28         ohci_hcd_init (ohci);
  29         return ohci_init (ohci);
  30 }
  31
  32 static int __devinit
  33 ohci_pci_start (struct usb_hcd *hcd)
  34 {
  35         struct ohci_hcd *ohci = hcd_to_ohci (hcd);
  36         int             ret;
  37
  38         /* REVISIT this whole block should move to reset(), which handles
  39          * all the other one-time init.
  40          */
  41         if (hcd->self.controller) {
  42                 struct pci_dev *pdev = to_pci_dev(hcd->self.controller);
  43
  44                 /* AMD 756, for most chips (early revs), corrupts register
  45                  * values on read ... so enable the vendor workaround.
  46                  */
  47                 if (pdev->vendor == PCI_VENDOR_ID_AMD
  48                                 && pdev->device == 0x740c) {
  49                         ohci->flags = OHCI_QUIRK_AMD756;
  50                         ohci_dbg (ohci, "AMD756 erratum 4 workaround\n");
  51                         /* also erratum 10 (suspend/resume issues) */
  52                         device_init_wakeup(&hcd->self.root_hub->dev, 0);
  53                 }
  54
  55                 /* FIXME for some of the early AMD 760 southbridges, OHCI
  56                  * won't work at all.  blacklist them.
  57                  */
  58
  59                 /* Apple's OHCI driver has a lot of bizarre workarounds
  60                  * for this chip.  Evidently control and bulk lists
  61                  * can get confused.  (B&W G3 models, and ...)
  62                  */
  63                 else if (pdev->vendor == PCI_VENDOR_ID_OPTI
  64                                 && pdev->device == 0xc861) {
  65                         ohci_dbg (ohci,
  66                                 "WARNING: OPTi workarounds unavailable\n");
  67                 }
  68
  69                 /* Check for NSC87560. We have to look at the bridge (fn1) to
  70                  * identify the USB (fn2). This quirk might apply to more or
  71                  * even all NSC stuff.
  72                  */
  73                 else if (pdev->vendor == PCI_VENDOR_ID_NS) {
  74                         struct pci_dev  *b;
  75
  76                         b  = pci_find_slot (pdev->bus->number,
  77                                         PCI_DEVFN (PCI_SLOT (pdev->devfn), 1));
  78                         if (b && b->device == PCI_DEVICE_ID_NS_87560_LIO
  79                                         && b->vendor == PCI_VENDOR_ID_NS) {
  80                                 ohci->flags |= OHCI_QUIRK_SUPERIO;
  81                                 ohci_dbg (ohci, "Using NSC SuperIO setup\n");
  82                         }
  83                 }
  84
  85                 /* Check for Compaq's ZFMicro chipset, which needs short
  86                  * delays before control or bulk queues get re-activated
  87                  * in finish_unlinks()
  88                  */
  89                 else if (pdev->vendor == PCI_VENDOR_ID_COMPAQ
  90                                 && pdev->device  == 0xa0f8) {
  91                         ohci->flags |= OHCI_QUIRK_ZFMICRO;
  92                         ohci_dbg (ohci,
  93                                 "enabled Compaq ZFMicro chipset quirk\n");
  94                 }
  95
  96                 /* RWC may not be set for add-in PCI cards, since boot
  97                  * firmware probably ignored them.  This transfers PCI
  98                  * PM wakeup capabilities (once the PCI layer is fixed).
  99                  */
 100                 if (device_may_wakeup(&pdev->dev))
 101                         ohci->hc_control |= OHCI_CTRL_RWC;
 102         }
 103
 104         /* NOTE: there may have already been a first reset, to
 105          * keep bios/smm irqs from making trouble
 106          */
 107         if ((ret = ohci_run (ohci)) < 0) {
 108                 ohci_err (ohci, "can't start\n");
 109                 ohci_stop (hcd);
 110                 return ret;
 111         }
 112         return 0;
 113 }
 114
 115 #ifdef  CONFIG_PM
 116
 117 static int ohci_pci_suspend (struct usb_hcd *hcd, pm_message_t message)
 118 {
 119         struct ohci_hcd *ohci = hcd_to_ohci (hcd);
 120         unsigned long   flags;
 121         int             rc = 0;
 122
 123         /* Root hub was already suspended. Disable irq emission and
 124          * mark HW unaccessible, bail out if RH has been resumed. Use
 125          * the spinlock to properly synchronize with possible pending
 126          * RH suspend or resume activity.
 127          *
 128          * This is still racy as hcd->state is manipulated outside of
 129          * any locks =P But that will be a different fix.
 130          */
 131         spin_lock_irqsave (&ohci->lock, flags);
 132         if (hcd->state != HC_STATE_SUSPENDED) {
 133                 rc = -EINVAL;
 134                 goto bail;
 135         }
 136         ohci_writel(ohci, OHCI_INTR_MIE, &ohci->regs->intrdisable);
 137         (void)ohci_readl(ohci, &ohci->regs->intrdisable);
 138         clear_bit(HCD_FLAG_HW_ACCESSIBLE, &hcd->flags);
 139  bail:
 140         spin_unlock_irqrestore (&ohci->lock, flags);
 141
 142         return rc;
 143 }
 144
 145
 146 static int ohci_pci_resume (struct usb_hcd *hcd)
 147 {
 148         set_bit(HCD_FLAG_HW_ACCESSIBLE, &hcd->flags);
 149         usb_hcd_resume_root_hub(hcd);
 150         return 0;
 151 }
 152
 153 #endif  /* CONFIG_PM */
 154
 155
 156 /*-------------------------------------------------------------------------*/
 157
 158 static const struct hc_driver ohci_pci_hc_driver = {
 159         .description =          hcd_name,
 160         .product_desc =         "OHCI Host Controller",
 161         .hcd_priv_size =        sizeof(struct ohci_hcd),
 162
 163         /*
 164          * generic hardware linkage
 165          */
 166         .irq =                  ohci_irq,
 167         .flags =                HCD_MEMORY | HCD_USB11,
 168
 169         /*
 170          * basic lifecycle operations
 171          */
 172         .reset =                ohci_pci_reset,
 173         .start =                ohci_pci_start,
 174 #ifdef  CONFIG_PM
 175         .suspend =              ohci_pci_suspend,
 176         .resume =               ohci_pci_resume,
 177 #endif
 178         .stop =                 ohci_stop,
 179
 180         /*
 181          * managing i/o requests and associated device resources
 182          */
 183         .urb_enqueue =          ohci_urb_enqueue,
 184         .urb_dequeue =          ohci_urb_dequeue,
 185         .endpoint_disable =     ohci_endpoint_disable,
 186
 187         /*
 188          * scheduling support
 189          */
 190         .get_frame_number =     ohci_get_frame,
 191
 192         /*
 193          * root hub support
 194          */
 195         .hub_status_data =      ohci_hub_status_data,
 196         .hub_control =          ohci_hub_control,
 197 #ifdef  CONFIG_PM
 198         .bus_suspend =          ohci_bus_suspend,
 199         .bus_resume =           ohci_bus_resume,
 200 #endif
 201         .start_port_reset =     ohci_start_port_reset,
 202 };
 203
 204 /*-------------------------------------------------------------------------*/
 205
 206
 207 static const struct pci_device_id pci_ids [] = { {
 208         /* handle any USB OHCI controller */
 209         PCI_DEVICE_CLASS(PCI_CLASS_SERIAL_USB_OHCI, ~0),
 210         .driver_data =  (unsigned long) &ohci_pci_hc_driver,
 211         }, { /* end: all zeroes */ }
 212 };
 213 MODULE_DEVICE_TABLE (pci, pci_ids);
 214
 215 /* pci driver glue; this is a "new style" PCI driver module */
 216 static struct pci_driver ohci_pci_driver = {
 217         .name =         (char *) hcd_name,
 218         .id_table =     pci_ids,
 219
 220         .probe =        usb_hcd_pci_probe,
 221         .remove =       usb_hcd_pci_remove,
 222
 223 #ifdef  CONFIG_PM
 224         .suspend =      usb_hcd_pci_suspend,
 225         .resume =       usb_hcd_pci_resume,
 226 #endif
 227 };
 228
 229
 230 static int __init ohci_hcd_pci_init (void)
 231 {
 232         printk (KERN_DEBUG "%s: " DRIVER_INFO " (PCI)\n", hcd_name);
 233         if (usb_disabled())
 234                 return -ENODEV;
 235
 236         pr_debug ("%s: block sizes: ed %Zd td %Zd\n", hcd_name,
 237                 sizeof (struct ed), sizeof (struct td));
 238         return pci_register_driver (&ohci_pci_driver);
 239 }
 240 module_init (ohci_hcd_pci_init);
 241
 242 /*-------------------------------------------------------------------------*/
 243
 244 static void __exit ohci_hcd_pci_cleanup (void)
 245 {
 246         pci_unregister_driver (&ohci_pci_driver);
 247 }
 248 module_exit (ohci_hcd_pci_cleanup);