| blob | 3cb2849eefe1e7ac060a05393c1822f83bfc7907 |
1 /*
2 * Device Tree Source for IBM Ebony
3 *
4 * Copyright (c) 2006, 2007 IBM Corp.
5 * Josh Boyer <jwboyer@linux.vnet.ibm.com>, David Gibson <dwg@au1.ibm.com>
6 *
7 * FIXME: Draft only!
8 *
9 * This file is licensed under the terms of the GNU General Public
10 * License version 2. This program is licensed "as is" without
11 * any warranty of any kind, whether express or implied.
12 */
14 / {
15 #address-cells = <2>;
16 #size-cells = <1>;
17 model = "ibm,ebony";
18 compatible = "ibm,ebony";
19 dcr-parent = <&/cpus/cpu@0>;
21 cpus {
22 #address-cells = <1>;
23 #size-cells = <0>;
25 cpu@0 {
26 device_type = "cpu";
27 model = "PowerPC,440GP";
28 reg = <0>;
29 clock-frequency = <0>; // Filled in by zImage
30 timebase-frequency = <0>; // Filled in by zImage
31 i-cache-line-size = <20>;
32 d-cache-line-size = <20>;
33 i-cache-size = <8000>; /* 32 kB */
34 d-cache-size = <8000>; /* 32 kB */
35 dcr-controller;
36 dcr-access-method = "native";
37 };
38 };
40 memory {
41 device_type = "memory";
42 reg = <0 0 0>; // Filled in by zImage
43 };
45 UIC0: interrupt-controller0 {
46 compatible = "ibm,uic-440gp", "ibm,uic";
47 interrupt-controller;
48 cell-index = <0>;
49 dcr-reg = <0c0 009>;
50 #address-cells = <0>;
51 #size-cells = <0>;
52 #interrupt-cells = <2>;
54 };
56 UIC1: interrupt-controller1 {
57 compatible = "ibm,uic-440gp", "ibm,uic";
58 interrupt-controller;
59 cell-index = <1>;
60 dcr-reg = <0d0 009>;
61 #address-cells = <0>;
62 #size-cells = <0>;
63 #interrupt-cells = <2>;
64 interrupts = <1e 4 1f 4>; /* cascade */
65 interrupt-parent = <&UIC0>;
66 };
68 CPC0: cpc {
69 compatible = "ibm,cpc-440gp";
70 dcr-reg = <0b0 003 0e0 010>;
71 // FIXME: anything else?
72 };
74 plb {
75 compatible = "ibm,plb-440gp", "ibm,plb4";
76 #address-cells = <2>;
77 #size-cells = <1>;
78 ranges;
79 clock-frequency = <0>; // Filled in by zImage
81 SDRAM0: memory-controller {
82 compatible = "ibm,sdram-440gp";
83 dcr-reg = <010 2>;
84 // FIXME: anything else?
85 };
87 SRAM0: sram {
88 compatible = "ibm,sram-440gp";
89 dcr-reg = <020 8 00a 1>;
90 };
92 DMA0: dma {
93 // FIXME: ???
94 compatible = "ibm,dma-440gp";
95 dcr-reg = <100 027>;
96 };
98 MAL0: mcmal {
99 compatible = "ibm,mcmal-440gp", "ibm,mcmal";
100 dcr-reg = <180 62>;
101 num-tx-chans = <4>;
102 num-rx-chans = <4>;
103 interrupt-parent = <&MAL0>;
104 interrupts = <0 1 2 3 4>;
105 #interrupt-cells = <1>;
106 #address-cells = <0>;
107 #size-cells = <0>;
108 interrupt-map = </*TXEOB*/ 0 &UIC0 a 4
109 /*RXEOB*/ 1 &UIC0 b 4
110 /*SERR*/ 2 &UIC1 0 4
111 /*TXDE*/ 3 &UIC1 1 4
112 /*RXDE*/ 4 &UIC1 2 4>;
113 interrupt-map-mask = <ffffffff>;
114 };
116 POB0: opb {
117 compatible = "ibm,opb-440gp", "ibm,opb";
118 #address-cells = <1>;
119 #size-cells = <1>;
120 /* Wish there was a nicer way of specifying a full 32-bit
121 range */
122 ranges = <00000000 1 00000000 80000000
123 80000000 1 80000000 80000000>;
124 dcr-reg = <090 00b>;
125 interrupt-parent = <&UIC1>;
126 interrupts = <7 4>;
127 clock-frequency = <0>; // Filled in by zImage
129 EBC0: ebc {
130 compatible = "ibm,ebc-440gp", "ibm,ebc";
131 dcr-reg = <012 2>;
132 #address-cells = <2>;
133 #size-cells = <1>;
134 clock-frequency = <0>; // Filled in by zImage
135 // ranges property is supplied by zImage
136 // based on firmware's configuration of the
137 // EBC bridge
138 interrupts = <5 4>;
139 interrupt-parent = <&UIC1>;
141 small-flash@0,80000 {
142 compatible = "jedec-flash";
143 bank-width = <1>;
144 reg = <0 80000 80000>;
145 #address-cells = <1>;
146 #size-cells = <1>;
147 partition@0 {
148 label = "OpenBIOS";
149 reg = <0 80000>;
150 read-only;
151 };
152 };
154 ds1743@1,0 {
155 /* NVRAM & RTC */
156 compatible = "ds1743";
157 reg = <1 0 2000>;
158 };
160 large-flash@2,0 {
161 compatible = "jedec-flash";
162 bank-width = <1>;
163 reg = <2 0 400000>;
164 #address-cells = <1>;
165 #size-cells = <1>;
166 partition@0 {
167 label = "fs";
168 reg = <0 380000>;
169 };
170 partition@380000 {
171 label = "firmware";
172 reg = <380000 80000>;
173 };
174 };
176 ir@3,0 {
177 reg = <3 0 10>;
178 };
180 fpga@7,0 {
181 compatible = "Ebony-FPGA";
182 reg = <7 0 10>;
183 virtual-reg = <e8300000>;
184 };
185 };
187 UART0: serial@40000200 {
188 device_type = "serial";
189 compatible = "ns16550";
190 reg = <40000200 8>;
191 virtual-reg = <e0000200>;
192 clock-frequency = <A8C000>;
193 current-speed = <2580>;
194 interrupt-parent = <&UIC0>;
195 interrupts = <0 4>;
196 };
198 UART1: serial@40000300 {
199 device_type = "serial";
200 compatible = "ns16550";
201 reg = <40000300 8>;
202 virtual-reg = <e0000300>;
203 clock-frequency = <A8C000>;
204 current-speed = <2580>;
205 interrupt-parent = <&UIC0>;
206 interrupts = <1 4>;
207 };
209 IIC0: i2c@40000400 {
210 /* FIXME */
211 device_type = "i2c";
212 compatible = "ibm,iic-440gp", "ibm,iic";
213 reg = <40000400 14>;
214 interrupt-parent = <&UIC0>;
215 interrupts = <2 4>;
216 };
217 IIC1: i2c@40000500 {
218 /* FIXME */
219 device_type = "i2c";
220 compatible = "ibm,iic-440gp", "ibm,iic";
221 reg = <40000500 14>;
222 interrupt-parent = <&UIC0>;
223 interrupts = <3 4>;
224 };
226 GPIO0: gpio@40000700 {
227 /* FIXME */
228 compatible = "ibm,gpio-440gp";
229 reg = <40000700 20>;
230 };
232 ZMII0: emac-zmii@40000780 {
233 compatible = "ibm,zmii-440gp", "ibm,zmii";
234 reg = <40000780 c>;
235 };
237 EMAC0: ethernet@40000800 {
238 linux,network-index = <0>;
239 device_type = "network";
240 compatible = "ibm,emac-440gp", "ibm,emac";
241 interrupt-parent = <&UIC1>;
242 interrupts = <1c 4 1d 4>;
243 reg = <40000800 70>;
244 local-mac-address = [000000000000]; // Filled in by zImage
245 mal-device = <&MAL0>;
246 mal-tx-channel = <0 1>;
247 mal-rx-channel = <0>;
248 cell-index = <0>;
249 max-frame-size = <5dc>;
250 rx-fifo-size = <1000>;
251 tx-fifo-size = <800>;
252 phy-mode = "rmii";
253 phy-map = <00000001>;
254 zmii-device = <&ZMII0>;
255 zmii-channel = <0>;
256 };
257 EMAC1: ethernet@40000900 {
258 linux,network-index = <1>;
259 device_type = "network";
260 compatible = "ibm,emac-440gp", "ibm,emac";
261 interrupt-parent = <&UIC1>;
262 interrupts = <1e 4 1f 4>;
263 reg = <40000900 70>;
264 local-mac-address = [000000000000]; // Filled in by zImage
265 mal-device = <&MAL0>;
266 mal-tx-channel = <2 3>;
267 mal-rx-channel = <1>;
268 cell-index = <1>;
269 max-frame-size = <5dc>;
270 rx-fifo-size = <1000>;
271 tx-fifo-size = <800>;
272 phy-mode = "rmii";
273 phy-map = <00000001>;
274 zmii-device = <&ZMII0>;
275 zmii-channel = <1>;
276 };
279 GPT0: gpt@40000a00 {
280 /* FIXME */
281 reg = <40000a00 d4>;
282 interrupt-parent = <&UIC0>;
283 interrupts = <12 4 13 4 14 4 15 4 16 4>;
284 };
286 };
288 PCIX0: pci@20ec00000 {
289 device_type = "pci";
290 #interrupt-cells = <1>;
291 #size-cells = <2>;
292 #address-cells = <3>;
293 compatible = "ibm,plb440gp-pcix", "ibm,plb-pcix";
294 primary;
295 reg = <2 0ec00000 8 /* Config space access */
296 0 0 0 /* no IACK cycles */
297 2 0ed00000 4 /* Special cycles */
298 2 0ec80000 f0 /* Internal registers */
299 2 0ec80100 fc>; /* Internal messaging registers */
301 /* Outbound ranges, one memory and one IO,
302 * later cannot be changed
303 */
304 ranges = <02000000 0 80000000 00000003 80000000 0 80000000
305 01000000 0 00000000 00000002 08000000 0 00010000>;
307 /* Inbound 2GB range starting at 0 */
308 dma-ranges = <42000000 0 0 0 0 0 80000000>;
310 /* Ebony has all 4 IRQ pins tied together per slot */
311 interrupt-map-mask = <f800 0 0 0>;
312 interrupt-map = <
313 /* IDSEL 1 */
314 0800 0 0 0 &UIC0 17 8
316 /* IDSEL 2 */
317 1000 0 0 0 &UIC0 18 8
319 /* IDSEL 3 */
320 1800 0 0 0 &UIC0 19 8
322 /* IDSEL 4 */
323 2000 0 0 0 &UIC0 1a 8
324 >;
325 };
326 };
328 chosen {
329 linux,stdout-path = "/plb/opb/serial@40000200";
330 };
331 };