OMAP: clockdomain: Arch specific funcs for hwsup control of clkdm
[linux-2.6/cjktty.git] / arch / arm / mach-omap2 / clockdomain2xxx_3xxx.c
blob25c27a5c722f625c5567ddd8bd95f59880a15e5f
1 /*
2 * OMAP2 and OMAP3 clockdomain control
4 * Copyright (C) 2008-2010 Texas Instruments, Inc.
5 * Copyright (C) 2008-2010 Nokia Corporation
7 * Derived from mach-omap2/clockdomain.c written by Paul Walmsley
8 * Rajendra Nayak <rnayak@ti.com>
10 * This program is free software; you can redistribute it and/or modify
11 * it under the terms of the GNU General Public License version 2 as
12 * published by the Free Software Foundation.
15 #include <linux/types.h>
16 #include <plat/prcm.h>
17 #include "prm.h"
18 #include "prm2xxx_3xxx.h"
19 #include "cm.h"
20 #include "cm2xxx_3xxx.h"
21 #include "cm-regbits-24xx.h"
22 #include "cm-regbits-34xx.h"
23 #include "prm-regbits-24xx.h"
24 #include "clockdomain.h"
26 static int omap2_clkdm_add_wkdep(struct clockdomain *clkdm1,
27 struct clockdomain *clkdm2)
29 omap2_prm_set_mod_reg_bits((1 << clkdm2->dep_bit),
30 clkdm1->pwrdm.ptr->prcm_offs, PM_WKDEP);
31 return 0;
34 static int omap2_clkdm_del_wkdep(struct clockdomain *clkdm1,
35 struct clockdomain *clkdm2)
37 omap2_prm_clear_mod_reg_bits((1 << clkdm2->dep_bit),
38 clkdm1->pwrdm.ptr->prcm_offs, PM_WKDEP);
39 return 0;
42 static int omap2_clkdm_read_wkdep(struct clockdomain *clkdm1,
43 struct clockdomain *clkdm2)
45 return omap2_prm_read_mod_bits_shift(clkdm1->pwrdm.ptr->prcm_offs,
46 PM_WKDEP, (1 << clkdm2->dep_bit));
49 static int omap2_clkdm_clear_all_wkdeps(struct clockdomain *clkdm)
51 struct clkdm_dep *cd;
52 u32 mask = 0;
54 for (cd = clkdm->wkdep_srcs; cd && cd->clkdm_name; cd++) {
55 if (!omap_chip_is(cd->omap_chip))
56 continue;
57 if (!cd->clkdm)
58 continue; /* only happens if data is erroneous */
60 /* PRM accesses are slow, so minimize them */
61 mask |= 1 << cd->clkdm->dep_bit;
62 atomic_set(&cd->wkdep_usecount, 0);
65 omap2_prm_clear_mod_reg_bits(mask, clkdm->pwrdm.ptr->prcm_offs,
66 PM_WKDEP);
67 return 0;
70 static int omap3_clkdm_add_sleepdep(struct clockdomain *clkdm1,
71 struct clockdomain *clkdm2)
73 omap2_cm_set_mod_reg_bits((1 << clkdm2->dep_bit),
74 clkdm1->pwrdm.ptr->prcm_offs,
75 OMAP3430_CM_SLEEPDEP);
76 return 0;
79 static int omap3_clkdm_del_sleepdep(struct clockdomain *clkdm1,
80 struct clockdomain *clkdm2)
82 omap2_cm_clear_mod_reg_bits((1 << clkdm2->dep_bit),
83 clkdm1->pwrdm.ptr->prcm_offs,
84 OMAP3430_CM_SLEEPDEP);
85 return 0;
88 static int omap3_clkdm_read_sleepdep(struct clockdomain *clkdm1,
89 struct clockdomain *clkdm2)
91 return omap2_prm_read_mod_bits_shift(clkdm1->pwrdm.ptr->prcm_offs,
92 OMAP3430_CM_SLEEPDEP, (1 << clkdm2->dep_bit));
95 static int omap3_clkdm_clear_all_sleepdeps(struct clockdomain *clkdm)
97 struct clkdm_dep *cd;
98 u32 mask = 0;
100 for (cd = clkdm->sleepdep_srcs; cd && cd->clkdm_name; cd++) {
101 if (!omap_chip_is(cd->omap_chip))
102 continue;
103 if (!cd->clkdm)
104 continue; /* only happens if data is erroneous */
106 /* PRM accesses are slow, so minimize them */
107 mask |= 1 << cd->clkdm->dep_bit;
108 atomic_set(&cd->sleepdep_usecount, 0);
110 omap2_prm_clear_mod_reg_bits(mask, clkdm->pwrdm.ptr->prcm_offs,
111 OMAP3430_CM_SLEEPDEP);
112 return 0;
115 static int omap2_clkdm_sleep(struct clockdomain *clkdm)
117 omap2_cm_set_mod_reg_bits(OMAP24XX_FORCESTATE_MASK,
118 clkdm->pwrdm.ptr->prcm_offs,
119 OMAP2_PM_PWSTCTRL);
120 return 0;
123 static int omap2_clkdm_wakeup(struct clockdomain *clkdm)
125 omap2_cm_clear_mod_reg_bits(OMAP24XX_FORCESTATE_MASK,
126 clkdm->pwrdm.ptr->prcm_offs,
127 OMAP2_PM_PWSTCTRL);
128 return 0;
131 static void omap2_clkdm_allow_idle(struct clockdomain *clkdm)
133 if (atomic_read(&clkdm->usecount) > 0)
134 _clkdm_add_autodeps(clkdm);
136 omap2xxx_cm_clkdm_enable_hwsup(clkdm->pwrdm.ptr->prcm_offs,
137 clkdm->clktrctrl_mask);
140 static void omap2_clkdm_deny_idle(struct clockdomain *clkdm)
142 omap2xxx_cm_clkdm_disable_hwsup(clkdm->pwrdm.ptr->prcm_offs,
143 clkdm->clktrctrl_mask);
145 if (atomic_read(&clkdm->usecount) > 0)
146 _clkdm_del_autodeps(clkdm);
149 static int omap3_clkdm_sleep(struct clockdomain *clkdm)
151 omap3xxx_cm_clkdm_force_sleep(clkdm->pwrdm.ptr->prcm_offs,
152 clkdm->clktrctrl_mask);
153 return 0;
156 static int omap3_clkdm_wakeup(struct clockdomain *clkdm)
158 omap3xxx_cm_clkdm_force_wakeup(clkdm->pwrdm.ptr->prcm_offs,
159 clkdm->clktrctrl_mask);
160 return 0;
163 static void omap3_clkdm_allow_idle(struct clockdomain *clkdm)
165 if (atomic_read(&clkdm->usecount) > 0)
166 _clkdm_add_autodeps(clkdm);
168 omap3xxx_cm_clkdm_enable_hwsup(clkdm->pwrdm.ptr->prcm_offs,
169 clkdm->clktrctrl_mask);
172 static void omap3_clkdm_deny_idle(struct clockdomain *clkdm)
174 omap3xxx_cm_clkdm_disable_hwsup(clkdm->pwrdm.ptr->prcm_offs,
175 clkdm->clktrctrl_mask);
177 if (atomic_read(&clkdm->usecount) > 0)
178 _clkdm_del_autodeps(clkdm);
181 struct clkdm_ops omap2_clkdm_operations = {
182 .clkdm_add_wkdep = omap2_clkdm_add_wkdep,
183 .clkdm_del_wkdep = omap2_clkdm_del_wkdep,
184 .clkdm_read_wkdep = omap2_clkdm_read_wkdep,
185 .clkdm_clear_all_wkdeps = omap2_clkdm_clear_all_wkdeps,
186 .clkdm_sleep = omap2_clkdm_sleep,
187 .clkdm_wakeup = omap2_clkdm_wakeup,
188 .clkdm_allow_idle = omap2_clkdm_allow_idle,
189 .clkdm_deny_idle = omap2_clkdm_deny_idle,
192 struct clkdm_ops omap3_clkdm_operations = {
193 .clkdm_add_wkdep = omap2_clkdm_add_wkdep,
194 .clkdm_del_wkdep = omap2_clkdm_del_wkdep,
195 .clkdm_read_wkdep = omap2_clkdm_read_wkdep,
196 .clkdm_clear_all_wkdeps = omap2_clkdm_clear_all_wkdeps,
197 .clkdm_add_sleepdep = omap3_clkdm_add_sleepdep,
198 .clkdm_del_sleepdep = omap3_clkdm_del_sleepdep,
199 .clkdm_read_sleepdep = omap3_clkdm_read_sleepdep,
200 .clkdm_clear_all_sleepdeps = omap3_clkdm_clear_all_sleepdeps,
201 .clkdm_sleep = omap3_clkdm_sleep,
202 .clkdm_wakeup = omap3_clkdm_wakeup,
203 .clkdm_allow_idle = omap3_clkdm_allow_idle,
204 .clkdm_deny_idle = omap3_clkdm_deny_idle,