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[netdrvr] tulip: oops in tulip_interrupt when hibernating with swsusp/suspend2
[linux-2.6/cjktty.git] / drivers / net / tulip / tulip_core.c
blob55670b5eb611a0c5c6811f7b6cca3a1b85041963
1 /* tulip_core.c: A DEC 21x4x-family ethernet driver for Linux. */
2
3 /*
4 Maintained by Valerie Henson <val_henson@linux.intel.com>
5 Copyright 2000,2001 The Linux Kernel Team
6 Written/copyright 1994-2001 by Donald Becker.
7
8 This software may be used and distributed according to the terms
9 of the GNU General Public License, incorporated herein by reference.
10
11 Please refer to Documentation/DocBook/tulip-user.{pdf,ps,html}
12 for more information on this driver, or visit the project
13 Web page at http://sourceforge.net/projects/tulip/
14
15 */
16
17
18 #define DRV_NAME "tulip"
19 #ifdef CONFIG_TULIP_NAPI
20 #define DRV_VERSION "1.1.15-NAPI" /* Keep at least for test */
21 #else
22 #define DRV_VERSION "1.1.15"
23 #endif
24 #define DRV_RELDATE "Feb 27, 2007"
25
26
27 #include <linux/module.h>
28 #include <linux/pci.h>
29 #include "tulip.h"
30 #include <linux/init.h>
31 #include <linux/etherdevice.h>
32 #include <linux/delay.h>
33 #include <linux/mii.h>
34 #include <linux/ethtool.h>
35 #include <linux/crc32.h>
36 #include <asm/unaligned.h>
37 #include <asm/uaccess.h>
38
39 #ifdef CONFIG_SPARC
40 #include <asm/prom.h>
41 #endif
42
43 static char version[] __devinitdata =
44 "Linux Tulip driver version " DRV_VERSION " (" DRV_RELDATE ")\n";
45
46
47 /* A few user-configurable values. */
48
49 /* Maximum events (Rx packets, etc.) to handle at each interrupt. */
50 static unsigned int max_interrupt_work = 25;
51
52 #define MAX_UNITS 8
53 /* Used to pass the full-duplex flag, etc. */
54 static int full_duplex[MAX_UNITS];
55 static int options[MAX_UNITS];
56 static int mtu[MAX_UNITS]; /* Jumbo MTU for interfaces. */
57
58 /* The possible media types that can be set in options[] are: */
59 const char * const medianame[32] = {
60 "10baseT", "10base2", "AUI", "100baseTx",
61 "10baseT-FDX", "100baseTx-FDX", "100baseT4", "100baseFx",
62 "100baseFx-FDX", "MII 10baseT", "MII 10baseT-FDX", "MII",
63 "10baseT(forced)", "MII 100baseTx", "MII 100baseTx-FDX", "MII 100baseT4",
64 "MII 100baseFx-HDX", "MII 100baseFx-FDX", "Home-PNA 1Mbps", "Invalid-19",
65 "","","","", "","","","", "","","","Transceiver reset",
66 };
67
68 /* Set the copy breakpoint for the copy-only-tiny-buffer Rx structure. */
69 #if defined(__alpha__) || defined(__arm__) || defined(__hppa__) \
70 || defined(CONFIG_SPARC) || defined(__ia64__) \
71 || defined(__sh__) || defined(__mips__)
72 static int rx_copybreak = 1518;
73 #else
74 static int rx_copybreak = 100;
75 #endif
76
77 /*
78 Set the bus performance register.
79 Typical: Set 16 longword cache alignment, no burst limit.
80 Cache alignment bits 15:14 Burst length 13:8
81 0000 No alignment 0x00000000 unlimited 0800 8 longwords
82 4000 8 longwords 0100 1 longword 1000 16 longwords
83 8000 16 longwords 0200 2 longwords 2000 32 longwords
84 C000 32 longwords 0400 4 longwords
85 Warning: many older 486 systems are broken and require setting 0x00A04800
86 8 longword cache alignment, 8 longword burst.
87 ToDo: Non-Intel setting could be better.
88 */
89
90 #if defined(__alpha__) || defined(__ia64__)
91 static int csr0 = 0x01A00000 | 0xE000;
92 #elif defined(__i386__) || defined(__powerpc__) || defined(__x86_64__)
93 static int csr0 = 0x01A00000 | 0x8000;
94 #elif defined(CONFIG_SPARC) || defined(__hppa__)
95 /* The UltraSparc PCI controllers will disconnect at every 64-byte
96 * crossing anyways so it makes no sense to tell Tulip to burst
97 * any more than that.
98 */
99 static int csr0 = 0x01A00000 | 0x9000;
100 #elif defined(__arm__) || defined(__sh__)
101 static int csr0 = 0x01A00000 | 0x4800;
102 #elif defined(__mips__)
103 static int csr0 = 0x00200000 | 0x4000;
104 #else
105 #warning Processor architecture undefined!
106 static int csr0 = 0x00A00000 | 0x4800;
107 #endif
108
109 /* Operational parameters that usually are not changed. */
110 /* Time in jiffies before concluding the transmitter is hung. */
111 #define TX_TIMEOUT (4*HZ)
112
113
114 MODULE_AUTHOR("The Linux Kernel Team");
115 MODULE_DESCRIPTION("Digital 21*4* Tulip ethernet driver");
116 MODULE_LICENSE("GPL");
117 MODULE_VERSION(DRV_VERSION);
118 module_param(tulip_debug, int, 0);
119 module_param(max_interrupt_work, int, 0);
120 module_param(rx_copybreak, int, 0);
121 module_param(csr0, int, 0);
122 module_param_array(options, int, NULL, 0);
123 module_param_array(full_duplex, int, NULL, 0);
124
125 #define PFX DRV_NAME ": "
126
127 #ifdef TULIP_DEBUG
128 int tulip_debug = TULIP_DEBUG;
129 #else
130 int tulip_debug = 1;
131 #endif
132
133 static void tulip_timer(unsigned long data)
134 {
135 struct net_device *dev = (struct net_device *)data;
136 struct tulip_private *tp = netdev_priv(dev);
137
138 if (netif_running(dev))
139 schedule_work(&tp->media_work);
140 }
141
142 /*
143 * This table use during operation for capabilities and media timer.
144 *
145 * It is indexed via the values in 'enum chips'
146 */
147
148 struct tulip_chip_table tulip_tbl[] = {
149 { }, /* placeholder for array, slot unused currently */
150 { }, /* placeholder for array, slot unused currently */
151
152 /* DC21140 */
153 { "Digital DS21140 Tulip", 128, 0x0001ebef,
154 HAS_MII | HAS_MEDIA_TABLE | CSR12_IN_SROM | HAS_PCI_MWI, tulip_timer,
155 tulip_media_task },
156
157 /* DC21142, DC21143 */
158 { "Digital DS21142/43 Tulip", 128, 0x0801fbff,
159 HAS_MII | HAS_MEDIA_TABLE | ALWAYS_CHECK_MII | HAS_ACPI | HAS_NWAY
160 | HAS_INTR_MITIGATION | HAS_PCI_MWI, tulip_timer, t21142_media_task },
161
162 /* LC82C168 */
163 { "Lite-On 82c168 PNIC", 256, 0x0001fbef,
164 HAS_MII | HAS_PNICNWAY, pnic_timer, },
165
166 /* MX98713 */
167 { "Macronix 98713 PMAC", 128, 0x0001ebef,
168 HAS_MII | HAS_MEDIA_TABLE | CSR12_IN_SROM, mxic_timer, },
169
170 /* MX98715 */
171 { "Macronix 98715 PMAC", 256, 0x0001ebef,
172 HAS_MEDIA_TABLE, mxic_timer, },
173
174 /* MX98725 */
175 { "Macronix 98725 PMAC", 256, 0x0001ebef,
176 HAS_MEDIA_TABLE, mxic_timer, },
177
178 /* AX88140 */
179 { "ASIX AX88140", 128, 0x0001fbff,
180 HAS_MII | HAS_MEDIA_TABLE | CSR12_IN_SROM | MC_HASH_ONLY
181 | IS_ASIX, tulip_timer, tulip_media_task },
182
183 /* PNIC2 */
184 { "Lite-On PNIC-II", 256, 0x0801fbff,
185 HAS_MII | HAS_NWAY | HAS_8023X | HAS_PCI_MWI, pnic2_timer, },
186
187 /* COMET */
188 { "ADMtek Comet", 256, 0x0001abef,
189 HAS_MII | MC_HASH_ONLY | COMET_MAC_ADDR, comet_timer, },
190
191 /* COMPEX9881 */
192 { "Compex 9881 PMAC", 128, 0x0001ebef,
193 HAS_MII | HAS_MEDIA_TABLE | CSR12_IN_SROM, mxic_timer, },
194
195 /* I21145 */
196 { "Intel DS21145 Tulip", 128, 0x0801fbff,
197 HAS_MII | HAS_MEDIA_TABLE | ALWAYS_CHECK_MII | HAS_ACPI
198 | HAS_NWAY | HAS_PCI_MWI, tulip_timer, tulip_media_task },
199
200 /* DM910X */
201 { "Davicom DM9102/DM9102A", 128, 0x0001ebef,
202 HAS_MII | HAS_MEDIA_TABLE | CSR12_IN_SROM | HAS_ACPI,
203 tulip_timer, tulip_media_task },
204
205 /* RS7112 */
206 { "Conexant LANfinity", 256, 0x0001ebef,
207 HAS_MII | HAS_ACPI, tulip_timer, tulip_media_task },
208
209 };
210
211
212 static struct pci_device_id tulip_pci_tbl[] = {
213 { 0x1011, 0x0009, PCI_ANY_ID, PCI_ANY_ID, 0, 0, DC21140 },
214 { 0x1011, 0x0019, PCI_ANY_ID, PCI_ANY_ID, 0, 0, DC21143 },
215 { 0x11AD, 0x0002, PCI_ANY_ID, PCI_ANY_ID, 0, 0, LC82C168 },
216 { 0x10d9, 0x0512, PCI_ANY_ID, PCI_ANY_ID, 0, 0, MX98713 },
217 { 0x10d9, 0x0531, PCI_ANY_ID, PCI_ANY_ID, 0, 0, MX98715 },
218 /* { 0x10d9, 0x0531, PCI_ANY_ID, PCI_ANY_ID, 0, 0, MX98725 },*/
219 { 0x125B, 0x1400, PCI_ANY_ID, PCI_ANY_ID, 0, 0, AX88140 },
220 { 0x11AD, 0xc115, PCI_ANY_ID, PCI_ANY_ID, 0, 0, PNIC2 },
221 { 0x1317, 0x0981, PCI_ANY_ID, PCI_ANY_ID, 0, 0, COMET },
222 { 0x1317, 0x0985, PCI_ANY_ID, PCI_ANY_ID, 0, 0, COMET },
223 { 0x1317, 0x1985, PCI_ANY_ID, PCI_ANY_ID, 0, 0, COMET },
224 { 0x1317, 0x9511, PCI_ANY_ID, PCI_ANY_ID, 0, 0, COMET },
225 { 0x13D1, 0xAB02, PCI_ANY_ID, PCI_ANY_ID, 0, 0, COMET },
226 { 0x13D1, 0xAB03, PCI_ANY_ID, PCI_ANY_ID, 0, 0, COMET },
227 { 0x13D1, 0xAB08, PCI_ANY_ID, PCI_ANY_ID, 0, 0, COMET },
228 { 0x104A, 0x0981, PCI_ANY_ID, PCI_ANY_ID, 0, 0, COMET },
229 { 0x104A, 0x2774, PCI_ANY_ID, PCI_ANY_ID, 0, 0, COMET },
230 { 0x1259, 0xa120, PCI_ANY_ID, PCI_ANY_ID, 0, 0, COMET },
231 { 0x11F6, 0x9881, PCI_ANY_ID, PCI_ANY_ID, 0, 0, COMPEX9881 },
232 { 0x8086, 0x0039, PCI_ANY_ID, PCI_ANY_ID, 0, 0, I21145 },
233 { 0x1282, 0x9100, PCI_ANY_ID, PCI_ANY_ID, 0, 0, DM910X },
234 { 0x1282, 0x9102, PCI_ANY_ID, PCI_ANY_ID, 0, 0, DM910X },
235 { 0x1113, 0x1216, PCI_ANY_ID, PCI_ANY_ID, 0, 0, COMET },
236 { 0x1113, 0x1217, PCI_ANY_ID, PCI_ANY_ID, 0, 0, MX98715 },
237 { 0x1113, 0x9511, PCI_ANY_ID, PCI_ANY_ID, 0, 0, COMET },
238 { 0x1186, 0x1541, PCI_ANY_ID, PCI_ANY_ID, 0, 0, COMET },
239 { 0x1186, 0x1561, PCI_ANY_ID, PCI_ANY_ID, 0, 0, COMET },
240 { 0x1186, 0x1591, PCI_ANY_ID, PCI_ANY_ID, 0, 0, COMET },
241 { 0x14f1, 0x1803, PCI_ANY_ID, PCI_ANY_ID, 0, 0, CONEXANT },
242 { 0x1626, 0x8410, PCI_ANY_ID, PCI_ANY_ID, 0, 0, COMET },
243 { 0x1737, 0xAB09, PCI_ANY_ID, PCI_ANY_ID, 0, 0, COMET },
244 { 0x1737, 0xAB08, PCI_ANY_ID, PCI_ANY_ID, 0, 0, COMET },
245 { 0x17B3, 0xAB08, PCI_ANY_ID, PCI_ANY_ID, 0, 0, COMET },
246 { 0x10b7, 0x9300, PCI_ANY_ID, PCI_ANY_ID, 0, 0, COMET }, /* 3Com 3CSOHO100B-TX */
247 { 0x14ea, 0xab08, PCI_ANY_ID, PCI_ANY_ID, 0, 0, COMET }, /* Planex FNW-3602-TX */
248 { 0x1414, 0x0002, PCI_ANY_ID, PCI_ANY_ID, 0, 0, COMET },
249 { } /* terminate list */
250 };
251 MODULE_DEVICE_TABLE(pci, tulip_pci_tbl);
252
253
254 /* A full-duplex map for media types. */
255 const char tulip_media_cap[32] =
256 {0,0,0,16, 3,19,16,24, 27,4,7,5, 0,20,23,20, 28,31,0,0, };
257
258 static void tulip_tx_timeout(struct net_device *dev);
259 static void tulip_init_ring(struct net_device *dev);
260 static int tulip_start_xmit(struct sk_buff *skb, struct net_device *dev);
261 static int tulip_open(struct net_device *dev);
262 static int tulip_close(struct net_device *dev);
263 static void tulip_up(struct net_device *dev);
264 static void tulip_down(struct net_device *dev);
265 static struct net_device_stats *tulip_get_stats(struct net_device *dev);
266 static int private_ioctl(struct net_device *dev, struct ifreq *rq, int cmd);
267 static void set_rx_mode(struct net_device *dev);
268 #ifdef CONFIG_NET_POLL_CONTROLLER
269 static void poll_tulip(struct net_device *dev);
270 #endif
271
272 static void tulip_set_power_state (struct tulip_private *tp,
273 int sleep, int snooze)
274 {
275 if (tp->flags & HAS_ACPI) {
276 u32 tmp, newtmp;
277 pci_read_config_dword (tp->pdev, CFDD, &tmp);
278 newtmp = tmp & ~(CFDD_Sleep | CFDD_Snooze);
279 if (sleep)
280 newtmp |= CFDD_Sleep;
281 else if (snooze)
282 newtmp |= CFDD_Snooze;
283 if (tmp != newtmp)
284 pci_write_config_dword (tp->pdev, CFDD, newtmp);
285 }
286
287 }
288
289
290 static void tulip_up(struct net_device *dev)
291 {
292 struct tulip_private *tp = netdev_priv(dev);
293 void __iomem *ioaddr = tp->base_addr;
294 int next_tick = 3*HZ;
295 u32 reg;
296 int i;
297
298 #ifdef CONFIG_TULIP_NAPI
299 napi_enable(&tp->napi);
300 #endif
301
302 /* Wake the chip from sleep/snooze mode. */
303 tulip_set_power_state (tp, 0, 0);
304
305 /* On some chip revs we must set the MII/SYM port before the reset!? */
306 if (tp->mii_cnt || (tp->mtable && tp->mtable->has_mii))
307 iowrite32(0x00040000, ioaddr + CSR6);
308
309 /* Reset the chip, holding bit 0 set at least 50 PCI cycles. */
310 iowrite32(0x00000001, ioaddr + CSR0);
311 pci_read_config_dword(tp->pdev, PCI_COMMAND, &reg); /* flush write */
312 udelay(100);
313
314 /* Deassert reset.
315 Wait the specified 50 PCI cycles after a reset by initializing
316 Tx and Rx queues and the address filter list. */
317 iowrite32(tp->csr0, ioaddr + CSR0);
318 pci_read_config_dword(tp->pdev, PCI_COMMAND, &reg); /* flush write */
319 udelay(100);
320
321 if (tulip_debug > 1)
322 printk(KERN_DEBUG "%s: tulip_up(), irq==%d.\n", dev->name, dev->irq);
323
324 iowrite32(tp->rx_ring_dma, ioaddr + CSR3);
325 iowrite32(tp->tx_ring_dma, ioaddr + CSR4);
326 tp->cur_rx = tp->cur_tx = 0;
327 tp->dirty_rx = tp->dirty_tx = 0;
328
329 if (tp->flags & MC_HASH_ONLY) {
330 u32 addr_low = get_unaligned_le32(dev->dev_addr);
331 u32 addr_high = get_unaligned_le16(dev->dev_addr + 4);
332 if (tp->chip_id == AX88140) {
333 iowrite32(0, ioaddr + CSR13);
334 iowrite32(addr_low, ioaddr + CSR14);
335 iowrite32(1, ioaddr + CSR13);
336 iowrite32(addr_high, ioaddr + CSR14);
337 } else if (tp->flags & COMET_MAC_ADDR) {
338 iowrite32(addr_low, ioaddr + 0xA4);
339 iowrite32(addr_high, ioaddr + 0xA8);
340 iowrite32(0, ioaddr + 0xAC);
341 iowrite32(0, ioaddr + 0xB0);
342 }
343 } else {
344 /* This is set_rx_mode(), but without starting the transmitter. */
345 u16 *eaddrs = (u16 *)dev->dev_addr;
346 u16 *setup_frm = &tp->setup_frame[15*6];
347 dma_addr_t mapping;
348
349 /* 21140 bug: you must add the broadcast address. */
350 memset(tp->setup_frame, 0xff, sizeof(tp->setup_frame));
351 /* Fill the final entry of the table with our physical address. */
352 *setup_frm++ = eaddrs[0]; *setup_frm++ = eaddrs[0];
353 *setup_frm++ = eaddrs[1]; *setup_frm++ = eaddrs[1];
354 *setup_frm++ = eaddrs[2]; *setup_frm++ = eaddrs[2];
355
356 mapping = pci_map_single(tp->pdev, tp->setup_frame,
357 sizeof(tp->setup_frame),
358 PCI_DMA_TODEVICE);
359 tp->tx_buffers[tp->cur_tx].skb = NULL;
360 tp->tx_buffers[tp->cur_tx].mapping = mapping;
361
362 /* Put the setup frame on the Tx list. */
363 tp->tx_ring[tp->cur_tx].length = cpu_to_le32(0x08000000 | 192);
364 tp->tx_ring[tp->cur_tx].buffer1 = cpu_to_le32(mapping);
365 tp->tx_ring[tp->cur_tx].status = cpu_to_le32(DescOwned);
366
367 tp->cur_tx++;
368 }
369
370 tp->saved_if_port = dev->if_port;
371 if (dev->if_port == 0)
372 dev->if_port = tp->default_port;
373
374 /* Allow selecting a default media. */
375 i = 0;
376 if (tp->mtable == NULL)
377 goto media_picked;
378 if (dev->if_port) {
379 int looking_for = tulip_media_cap[dev->if_port] & MediaIsMII ? 11 :
380 (dev->if_port == 12 ? 0 : dev->if_port);
381 for (i = 0; i < tp->mtable->leafcount; i++)
382 if (tp->mtable->mleaf[i].media == looking_for) {
383 printk(KERN_INFO "%s: Using user-specified media %s.\n",
384 dev->name, medianame[dev->if_port]);
385 goto media_picked;
386 }
387 }
388 if ((tp->mtable->defaultmedia & 0x0800) == 0) {
389 int looking_for = tp->mtable->defaultmedia & MEDIA_MASK;
390 for (i = 0; i < tp->mtable->leafcount; i++)
391 if (tp->mtable->mleaf[i].media == looking_for) {
392 printk(KERN_INFO "%s: Using EEPROM-set media %s.\n",
393 dev->name, medianame[looking_for]);
394 goto media_picked;
395 }
396 }
397 /* Start sensing first non-full-duplex media. */
398 for (i = tp->mtable->leafcount - 1;
399 (tulip_media_cap[tp->mtable->mleaf[i].media] & MediaAlwaysFD) && i > 0; i--)
400 ;
401 media_picked:
402
403 tp->csr6 = 0;
404 tp->cur_index = i;
405 tp->nwayset = 0;
406
407 if (dev->if_port) {
408 if (tp->chip_id == DC21143 &&
409 (tulip_media_cap[dev->if_port] & MediaIsMII)) {
410 /* We must reset the media CSRs when we force-select MII mode. */
411 iowrite32(0x0000, ioaddr + CSR13);
412 iowrite32(0x0000, ioaddr + CSR14);
413 iowrite32(0x0008, ioaddr + CSR15);
414 }
415 tulip_select_media(dev, 1);
416 } else if (tp->chip_id == DC21142) {
417 if (tp->mii_cnt) {
418 tulip_select_media(dev, 1);
419 if (tulip_debug > 1)
420 printk(KERN_INFO "%s: Using MII transceiver %d, status "
421 "%4.4x.\n",
422 dev->name, tp->phys[0], tulip_mdio_read(dev, tp->phys[0], 1));
423 iowrite32(csr6_mask_defstate, ioaddr + CSR6);
424 tp->csr6 = csr6_mask_hdcap;
425 dev->if_port = 11;
426 iowrite32(0x0000, ioaddr + CSR13);
427 iowrite32(0x0000, ioaddr + CSR14);
428 } else
429 t21142_start_nway(dev);
430 } else if (tp->chip_id == PNIC2) {
431 /* for initial startup advertise 10/100 Full and Half */
432 tp->sym_advertise = 0x01E0;
433 /* enable autonegotiate end interrupt */
434 iowrite32(ioread32(ioaddr+CSR5)| 0x00008010, ioaddr + CSR5);
435 iowrite32(ioread32(ioaddr+CSR7)| 0x00008010, ioaddr + CSR7);
436 pnic2_start_nway(dev);
437 } else if (tp->chip_id == LC82C168 && ! tp->medialock) {
438 if (tp->mii_cnt) {
439 dev->if_port = 11;
440 tp->csr6 = 0x814C0000 | (tp->full_duplex ? 0x0200 : 0);
441 iowrite32(0x0001, ioaddr + CSR15);
442 } else if (ioread32(ioaddr + CSR5) & TPLnkPass)
443 pnic_do_nway(dev);
444 else {
445 /* Start with 10mbps to do autonegotiation. */
446 iowrite32(0x32, ioaddr + CSR12);
447 tp->csr6 = 0x00420000;
448 iowrite32(0x0001B078, ioaddr + 0xB8);
449 iowrite32(0x0201B078, ioaddr + 0xB8);
450 next_tick = 1*HZ;
451 }
452 } else if ((tp->chip_id == MX98713 || tp->chip_id == COMPEX9881)
453 && ! tp->medialock) {
454 dev->if_port = 0;
455 tp->csr6 = 0x01880000 | (tp->full_duplex ? 0x0200 : 0);
456 iowrite32(0x0f370000 | ioread16(ioaddr + 0x80), ioaddr + 0x80);
457 } else if (tp->chip_id == MX98715 || tp->chip_id == MX98725) {
458 /* Provided by BOLO, Macronix - 12/10/1998. */
459 dev->if_port = 0;
460 tp->csr6 = 0x01a80200;
461 iowrite32(0x0f370000 | ioread16(ioaddr + 0x80), ioaddr + 0x80);
462 iowrite32(0x11000 | ioread16(ioaddr + 0xa0), ioaddr + 0xa0);
463 } else if (tp->chip_id == COMET || tp->chip_id == CONEXANT) {
464 /* Enable automatic Tx underrun recovery. */
465 iowrite32(ioread32(ioaddr + 0x88) | 1, ioaddr + 0x88);
466 dev->if_port = tp->mii_cnt ? 11 : 0;
467 tp->csr6 = 0x00040000;
468 } else if (tp->chip_id == AX88140) {
469 tp->csr6 = tp->mii_cnt ? 0x00040100 : 0x00000100;
470 } else
471 tulip_select_media(dev, 1);
472
473 /* Start the chip's Tx to process setup frame. */
474 tulip_stop_rxtx(tp);
475 barrier();
476 udelay(5);
477 iowrite32(tp->csr6 | TxOn, ioaddr + CSR6);
478
479 /* Enable interrupts by setting the interrupt mask. */
480 iowrite32(tulip_tbl[tp->chip_id].valid_intrs, ioaddr + CSR5);
481 iowrite32(tulip_tbl[tp->chip_id].valid_intrs, ioaddr + CSR7);
482 tulip_start_rxtx(tp);
483 iowrite32(0, ioaddr + CSR2); /* Rx poll demand */
484
485 if (tulip_debug > 2) {
486 printk(KERN_DEBUG "%s: Done tulip_up(), CSR0 %8.8x, CSR5 %8.8x CSR6 %8.8x.\n",
487 dev->name, ioread32(ioaddr + CSR0), ioread32(ioaddr + CSR5),
488 ioread32(ioaddr + CSR6));
489 }
490
491 /* Set the timer to switch to check for link beat and perhaps switch
492 to an alternate media type. */
493 tp->timer.expires = RUN_AT(next_tick);
494 add_timer(&tp->timer);
495 #ifdef CONFIG_TULIP_NAPI
496 init_timer(&tp->oom_timer);
497 tp->oom_timer.data = (unsigned long)dev;
498 tp->oom_timer.function = oom_timer;
499 #endif
500 }
501
502 static int
503 tulip_open(struct net_device *dev)
504 {
505 int retval;
506
507 if ((retval = request_irq(dev->irq, &tulip_interrupt, IRQF_SHARED, dev->name, dev)))
508 return retval;
509
510 tulip_init_ring (dev);
511
512 tulip_up (dev);
513
514 netif_start_queue (dev);
515
516 return 0;
517 }
518
519
520 static void tulip_tx_timeout(struct net_device *dev)
521 {
522 struct tulip_private *tp = netdev_priv(dev);
523 void __iomem *ioaddr = tp->base_addr;
524 unsigned long flags;
525
526 spin_lock_irqsave (&tp->lock, flags);
527
528 if (tulip_media_cap[dev->if_port] & MediaIsMII) {
529 /* Do nothing -- the media monitor should handle this. */
530 if (tulip_debug > 1)
531 printk(KERN_WARNING "%s: Transmit timeout using MII device.\n",
532 dev->name);
533 } else if (tp->chip_id == DC21140 || tp->chip_id == DC21142
534 || tp->chip_id == MX98713 || tp->chip_id == COMPEX9881
535 || tp->chip_id == DM910X) {
536 printk(KERN_WARNING "%s: 21140 transmit timed out, status %8.8x, "
537 "SIA %8.8x %8.8x %8.8x %8.8x, resetting...\n",
538 dev->name, ioread32(ioaddr + CSR5), ioread32(ioaddr + CSR12),
539 ioread32(ioaddr + CSR13), ioread32(ioaddr + CSR14), ioread32(ioaddr + CSR15));
540 tp->timeout_recovery = 1;
541 schedule_work(&tp->media_work);
542 goto out_unlock;
543 } else if (tp->chip_id == PNIC2) {
544 printk(KERN_WARNING "%s: PNIC2 transmit timed out, status %8.8x, "
545 "CSR6/7 %8.8x / %8.8x CSR12 %8.8x, resetting...\n",
546 dev->name, (int)ioread32(ioaddr + CSR5), (int)ioread32(ioaddr + CSR6),
547 (int)ioread32(ioaddr + CSR7), (int)ioread32(ioaddr + CSR12));
548 } else {
549 printk(KERN_WARNING "%s: Transmit timed out, status %8.8x, CSR12 "
550 "%8.8x, resetting...\n",
551 dev->name, ioread32(ioaddr + CSR5), ioread32(ioaddr + CSR12));
552 dev->if_port = 0;
553 }
554
555 #if defined(way_too_many_messages)
556 if (tulip_debug > 3) {
557 int i;
558 for (i = 0; i < RX_RING_SIZE; i++) {
559 u8 *buf = (u8 *)(tp->rx_ring[i].buffer1);
560 int j;
561 printk(KERN_DEBUG "%2d: %8.8x %8.8x %8.8x %8.8x "
562 "%2.2x %2.2x %2.2x.\n",
563 i, (unsigned int)tp->rx_ring[i].status,
564 (unsigned int)tp->rx_ring[i].length,
565 (unsigned int)tp->rx_ring[i].buffer1,
566 (unsigned int)tp->rx_ring[i].buffer2,
567 buf[0], buf[1], buf[2]);
568 for (j = 0; buf[j] != 0xee && j < 1600; j++)
569 if (j < 100) printk(" %2.2x", buf[j]);
570 printk(" j=%d.\n", j);
571 }
572 printk(KERN_DEBUG " Rx ring %8.8x: ", (int)tp->rx_ring);
573 for (i = 0; i < RX_RING_SIZE; i++)
574 printk(" %8.8x", (unsigned int)tp->rx_ring[i].status);
575 printk("\n" KERN_DEBUG " Tx ring %8.8x: ", (int)tp->tx_ring);
576 for (i = 0; i < TX_RING_SIZE; i++)
577 printk(" %8.8x", (unsigned int)tp->tx_ring[i].status);
578 printk("\n");
579 }
580 #endif
581
582 tulip_tx_timeout_complete(tp, ioaddr);
583
584 out_unlock:
585 spin_unlock_irqrestore (&tp->lock, flags);
586 dev->trans_start = jiffies;
587 netif_wake_queue (dev);
588 }
589
590
591 /* Initialize the Rx and Tx rings, along with various 'dev' bits. */
592 static void tulip_init_ring(struct net_device *dev)
593 {
594 struct tulip_private *tp = netdev_priv(dev);
595 int i;
596
597 tp->susp_rx = 0;
598 tp->ttimer = 0;
599 tp->nir = 0;
600
601 for (i = 0; i < RX_RING_SIZE; i++) {
602 tp->rx_ring[i].status = 0x00000000;
603 tp->rx_ring[i].length = cpu_to_le32(PKT_BUF_SZ);
604 tp->rx_ring[i].buffer2 = cpu_to_le32(tp->rx_ring_dma + sizeof(struct tulip_rx_desc) * (i + 1));
605 tp->rx_buffers[i].skb = NULL;
606 tp->rx_buffers[i].mapping = 0;
607 }
608 /* Mark the last entry as wrapping the ring. */
609 tp->rx_ring[i-1].length = cpu_to_le32(PKT_BUF_SZ | DESC_RING_WRAP);
610 tp->rx_ring[i-1].buffer2 = cpu_to_le32(tp->rx_ring_dma);
611
612 for (i = 0; i < RX_RING_SIZE; i++) {
613 dma_addr_t mapping;
614
615 /* Note the receive buffer must be longword aligned.
616 dev_alloc_skb() provides 16 byte alignment. But do *not*
617 use skb_reserve() to align the IP header! */
618 struct sk_buff *skb = dev_alloc_skb(PKT_BUF_SZ);
619 tp->rx_buffers[i].skb = skb;
620 if (skb == NULL)
621 break;
622 mapping = pci_map_single(tp->pdev, skb->data,
623 PKT_BUF_SZ, PCI_DMA_FROMDEVICE);
624 tp->rx_buffers[i].mapping = mapping;
625 skb->dev = dev; /* Mark as being used by this device. */
626 tp->rx_ring[i].status = cpu_to_le32(DescOwned); /* Owned by Tulip chip */
627 tp->rx_ring[i].buffer1 = cpu_to_le32(mapping);
628 }
629 tp->dirty_rx = (unsigned int)(i - RX_RING_SIZE);
630
631 /* The Tx buffer descriptor is filled in as needed, but we
632 do need to clear the ownership bit. */
633 for (i = 0; i < TX_RING_SIZE; i++) {
634 tp->tx_buffers[i].skb = NULL;
635 tp->tx_buffers[i].mapping = 0;
636 tp->tx_ring[i].status = 0x00000000;
637 tp->tx_ring[i].buffer2 = cpu_to_le32(tp->tx_ring_dma + sizeof(struct tulip_tx_desc) * (i + 1));
638 }
639 tp->tx_ring[i-1].buffer2 = cpu_to_le32(tp->tx_ring_dma);
640 }
641
642 static int
643 tulip_start_xmit(struct sk_buff *skb, struct net_device *dev)
644 {
645 struct tulip_private *tp = netdev_priv(dev);
646 int entry;
647 u32 flag;
648 dma_addr_t mapping;
649
650 spin_lock_irq(&tp->lock);
651
652 /* Calculate the next Tx descriptor entry. */
653 entry = tp->cur_tx % TX_RING_SIZE;
654
655 tp->tx_buffers[entry].skb = skb;
656 mapping = pci_map_single(tp->pdev, skb->data,
657 skb->len, PCI_DMA_TODEVICE);
658 tp->tx_buffers[entry].mapping = mapping;
659 tp->tx_ring[entry].buffer1 = cpu_to_le32(mapping);
660
661 if (tp->cur_tx - tp->dirty_tx < TX_RING_SIZE/2) {/* Typical path */
662 flag = 0x60000000; /* No interrupt */
663 } else if (tp->cur_tx - tp->dirty_tx == TX_RING_SIZE/2) {
664 flag = 0xe0000000; /* Tx-done intr. */
665 } else if (tp->cur_tx - tp->dirty_tx < TX_RING_SIZE - 2) {
666 flag = 0x60000000; /* No Tx-done intr. */
667 } else { /* Leave room for set_rx_mode() to fill entries. */
668 flag = 0xe0000000; /* Tx-done intr. */
669 netif_stop_queue(dev);
670 }
671 if (entry == TX_RING_SIZE-1)
672 flag = 0xe0000000 | DESC_RING_WRAP;
673
674 tp->tx_ring[entry].length = cpu_to_le32(skb->len | flag);
675 /* if we were using Transmit Automatic Polling, we would need a
676 * wmb() here. */
677 tp->tx_ring[entry].status = cpu_to_le32(DescOwned);
678 wmb();
679
680 tp->cur_tx++;
681
682 /* Trigger an immediate transmit demand. */
683 iowrite32(0, tp->base_addr + CSR1);
684
685 spin_unlock_irq(&tp->lock);
686
687 dev->trans_start = jiffies;
688
689 return 0;
690 }
691
692 static void tulip_clean_tx_ring(struct tulip_private *tp)
693 {
694 unsigned int dirty_tx;
695
696 for (dirty_tx = tp->dirty_tx ; tp->cur_tx - dirty_tx > 0;
697 dirty_tx++) {
698 int entry = dirty_tx % TX_RING_SIZE;
699 int status = le32_to_cpu(tp->tx_ring[entry].status);
700
701 if (status < 0) {
702 tp->stats.tx_errors++; /* It wasn't Txed */
703 tp->tx_ring[entry].status = 0;
704 }
705
706 /* Check for Tx filter setup frames. */
707 if (tp->tx_buffers[entry].skb == NULL) {
708 /* test because dummy frames not mapped */
709 if (tp->tx_buffers[entry].mapping)
710 pci_unmap_single(tp->pdev,
711 tp->tx_buffers[entry].mapping,
712 sizeof(tp->setup_frame),
713 PCI_DMA_TODEVICE);
714 continue;
715 }
716
717 pci_unmap_single(tp->pdev, tp->tx_buffers[entry].mapping,
718 tp->tx_buffers[entry].skb->len,
719 PCI_DMA_TODEVICE);
720
721 /* Free the original skb. */
722 dev_kfree_skb_irq(tp->tx_buffers[entry].skb);
723 tp->tx_buffers[entry].skb = NULL;
724 tp->tx_buffers[entry].mapping = 0;
725 }
726 }
727
728 static void tulip_down (struct net_device *dev)
729 {
730 struct tulip_private *tp = netdev_priv(dev);
731 void __iomem *ioaddr = tp->base_addr;
732 unsigned long flags;
733
734 flush_scheduled_work();
735
736 #ifdef CONFIG_TULIP_NAPI
737 napi_disable(&tp->napi);
738 #endif
739
740 del_timer_sync (&tp->timer);
741 #ifdef CONFIG_TULIP_NAPI
742 del_timer_sync (&tp->oom_timer);
743 #endif
744 spin_lock_irqsave (&tp->lock, flags);
745
746 /* Disable interrupts by clearing the interrupt mask. */
747 iowrite32 (0x00000000, ioaddr + CSR7);
748
749 /* Stop the Tx and Rx processes. */
750 tulip_stop_rxtx(tp);
751
752 /* prepare receive buffers */
753 tulip_refill_rx(dev);
754
755 /* release any unconsumed transmit buffers */
756 tulip_clean_tx_ring(tp);
757
758 if (ioread32 (ioaddr + CSR6) != 0xffffffff)
759 tp->stats.rx_missed_errors += ioread32 (ioaddr + CSR8) & 0xffff;
760
761 spin_unlock_irqrestore (&tp->lock, flags);
762
763 init_timer(&tp->timer);
764 tp->timer.data = (unsigned long)dev;
765 tp->timer.function = tulip_tbl[tp->chip_id].media_timer;
766
767 dev->if_port = tp->saved_if_port;
768
769 /* Leave the driver in snooze, not sleep, mode. */
770 tulip_set_power_state (tp, 0, 1);
771 }
772
773
774 static int tulip_close (struct net_device *dev)
775 {
776 struct tulip_private *tp = netdev_priv(dev);
777 void __iomem *ioaddr = tp->base_addr;
778 int i;
779
780 netif_stop_queue (dev);
781
782 tulip_down (dev);
783
784 if (tulip_debug > 1)
785 printk (KERN_DEBUG "%s: Shutting down ethercard, status was %2.2x.\n",
786 dev->name, ioread32 (ioaddr + CSR5));
787
788 free_irq (dev->irq, dev);
789
790 /* Free all the skbuffs in the Rx queue. */
791 for (i = 0; i < RX_RING_SIZE; i++) {
792 struct sk_buff *skb = tp->rx_buffers[i].skb;
793 dma_addr_t mapping = tp->rx_buffers[i].mapping;
794
795 tp->rx_buffers[i].skb = NULL;
796 tp->rx_buffers[i].mapping = 0;
797
798 tp->rx_ring[i].status = 0; /* Not owned by Tulip chip. */
799 tp->rx_ring[i].length = 0;
800 /* An invalid address. */
801 tp->rx_ring[i].buffer1 = cpu_to_le32(0xBADF00D0);
802 if (skb) {
803 pci_unmap_single(tp->pdev, mapping, PKT_BUF_SZ,
804 PCI_DMA_FROMDEVICE);
805 dev_kfree_skb (skb);
806 }
807 }
808 for (i = 0; i < TX_RING_SIZE; i++) {
809 struct sk_buff *skb = tp->tx_buffers[i].skb;
810
811 if (skb != NULL) {
812 pci_unmap_single(tp->pdev, tp->tx_buffers[i].mapping,
813 skb->len, PCI_DMA_TODEVICE);
814 dev_kfree_skb (skb);
815 }
816 tp->tx_buffers[i].skb = NULL;
817 tp->tx_buffers[i].mapping = 0;
818 }
819
820 return 0;
821 }
822
823 static struct net_device_stats *tulip_get_stats(struct net_device *dev)
824 {
825 struct tulip_private *tp = netdev_priv(dev);
826 void __iomem *ioaddr = tp->base_addr;
827
828 if (netif_running(dev)) {
829 unsigned long flags;
830
831 spin_lock_irqsave (&tp->lock, flags);
832
833 tp->stats.rx_missed_errors += ioread32(ioaddr + CSR8) & 0xffff;
834
835 spin_unlock_irqrestore(&tp->lock, flags);
836 }
837
838 return &tp->stats;
839 }
840
841
842 static void tulip_get_drvinfo(struct net_device *dev, struct ethtool_drvinfo *info)
843 {
844 struct tulip_private *np = netdev_priv(dev);
845 strcpy(info->driver, DRV_NAME);
846 strcpy(info->version, DRV_VERSION);
847 strcpy(info->bus_info, pci_name(np->pdev));
848 }
849
850 static const struct ethtool_ops ops = {
851 .get_drvinfo = tulip_get_drvinfo
852 };
853
854 /* Provide ioctl() calls to examine the MII xcvr state. */
855 static int private_ioctl (struct net_device *dev, struct ifreq *rq, int cmd)
856 {
857 struct tulip_private *tp = netdev_priv(dev);
858 void __iomem *ioaddr = tp->base_addr;
859 struct mii_ioctl_data *data = if_mii(rq);
860 const unsigned int phy_idx = 0;
861 int phy = tp->phys[phy_idx] & 0x1f;
862 unsigned int regnum = data->reg_num;
863
864 switch (cmd) {
865 case SIOCGMIIPHY: /* Get address of MII PHY in use. */
866 if (tp->mii_cnt)
867 data->phy_id = phy;
868 else if (tp->flags & HAS_NWAY)
869 data->phy_id = 32;
870 else if (tp->chip_id == COMET)
871 data->phy_id = 1;
872 else
873 return -ENODEV;
874
875 case SIOCGMIIREG: /* Read MII PHY register. */
876 if (data->phy_id == 32 && (tp->flags & HAS_NWAY)) {
877 int csr12 = ioread32 (ioaddr + CSR12);
878 int csr14 = ioread32 (ioaddr + CSR14);
879 switch (regnum) {
880 case 0:
881 if (((csr14<<5) & 0x1000) ||
882 (dev->if_port == 5 && tp->nwayset))
883 data->val_out = 0x1000;
884 else
885 data->val_out = (tulip_media_cap[dev->if_port]&MediaIs100 ? 0x2000 : 0)
886 | (tulip_media_cap[dev->if_port]&MediaIsFD ? 0x0100 : 0);
887 break;
888 case 1:
889 data->val_out =
890 0x1848 +
891 ((csr12&0x7000) == 0x5000 ? 0x20 : 0) +
892 ((csr12&0x06) == 6 ? 0 : 4);
893 data->val_out |= 0x6048;
894 break;
895 case 4:
896 /* Advertised value, bogus 10baseTx-FD value from CSR6. */
897 data->val_out =
898 ((ioread32(ioaddr + CSR6) >> 3) & 0x0040) +
899 ((csr14 >> 1) & 0x20) + 1;
900 data->val_out |= ((csr14 >> 9) & 0x03C0);
901 break;
902 case 5: data->val_out = tp->lpar; break;
903 default: data->val_out = 0; break;
904 }
905 } else {
906 data->val_out = tulip_mdio_read (dev, data->phy_id & 0x1f, regnum);
907 }
908 return 0;
909
910 case SIOCSMIIREG: /* Write MII PHY register. */
911 if (!capable (CAP_NET_ADMIN))
912 return -EPERM;
913 if (regnum & ~0x1f)
914 return -EINVAL;
915 if (data->phy_id == phy) {
916 u16 value = data->val_in;
917 switch (regnum) {
918 case 0: /* Check for autonegotiation on or reset. */
919 tp->full_duplex_lock = (value & 0x9000) ? 0 : 1;
920 if (tp->full_duplex_lock)
921 tp->full_duplex = (value & 0x0100) ? 1 : 0;
922 break;
923 case 4:
924 tp->advertising[phy_idx] =
925 tp->mii_advertise = data->val_in;
926 break;
927 }
928 }
929 if (data->phy_id == 32 && (tp->flags & HAS_NWAY)) {
930 u16 value = data->val_in;
931 if (regnum == 0) {
932 if ((value & 0x1200) == 0x1200) {
933 if (tp->chip_id == PNIC2) {
934 pnic2_start_nway (dev);
935 } else {
936 t21142_start_nway (dev);
937 }
938 }
939 } else if (regnum == 4)
940 tp->sym_advertise = value;
941 } else {
942 tulip_mdio_write (dev, data->phy_id & 0x1f, regnum, data->val_in);
943 }
944 return 0;
945 default:
946 return -EOPNOTSUPP;
947 }
948
949 return -EOPNOTSUPP;
950 }
951
952
953 /* Set or clear the multicast filter for this adaptor.
954 Note that we only use exclusion around actually queueing the
955 new frame, not around filling tp->setup_frame. This is non-deterministic
956 when re-entered but still correct. */
957
958 #undef set_bit_le
959 #define set_bit_le(i,p) do { ((char *)(p))[(i)/8] |= (1<<((i)%8)); } while(0)
960
961 static void build_setup_frame_hash(u16 *setup_frm, struct net_device *dev)
962 {
963 struct tulip_private *tp = netdev_priv(dev);
964 u16 hash_table[32];
965 struct dev_mc_list *mclist;
966 int i;
967 u16 *eaddrs;
968
969 memset(hash_table, 0, sizeof(hash_table));
970 set_bit_le(255, hash_table); /* Broadcast entry */
971 /* This should work on big-endian machines as well. */
972 for (i = 0, mclist = dev->mc_list; mclist && i < dev->mc_count;
973 i++, mclist = mclist->next) {
974 int index = ether_crc_le(ETH_ALEN, mclist->dmi_addr) & 0x1ff;
975
976 set_bit_le(index, hash_table);
977
978 }
979 for (i = 0; i < 32; i++) {
980 *setup_frm++ = hash_table[i];
981 *setup_frm++ = hash_table[i];
982 }
983 setup_frm = &tp->setup_frame[13*6];
984
985 /* Fill the final entry with our physical address. */
986 eaddrs = (u16 *)dev->dev_addr;
987 *setup_frm++ = eaddrs[0]; *setup_frm++ = eaddrs[0];
988 *setup_frm++ = eaddrs[1]; *setup_frm++ = eaddrs[1];
989 *setup_frm++ = eaddrs[2]; *setup_frm++ = eaddrs[2];
990 }
991
992 static void build_setup_frame_perfect(u16 *setup_frm, struct net_device *dev)
993 {
994 struct tulip_private *tp = netdev_priv(dev);
995 struct dev_mc_list *mclist;
996 int i;
997 u16 *eaddrs;
998
999 /* We have <= 14 addresses so we can use the wonderful
1000 16 address perfect filtering of the Tulip. */
1001 for (i = 0, mclist = dev->mc_list; i < dev->mc_count;
1002 i++, mclist = mclist->next) {
1003 eaddrs = (u16 *)mclist->dmi_addr;
1004 *setup_frm++ = *eaddrs; *setup_frm++ = *eaddrs++;
1005 *setup_frm++ = *eaddrs; *setup_frm++ = *eaddrs++;
1006 *setup_frm++ = *eaddrs; *setup_frm++ = *eaddrs++;
1007 }
1008 /* Fill the unused entries with the broadcast address. */
1009 memset(setup_frm, 0xff, (15-i)*12);
1010 setup_frm = &tp->setup_frame[15*6];
1011
1012 /* Fill the final entry with our physical address. */
1013 eaddrs = (u16 *)dev->dev_addr;
1014 *setup_frm++ = eaddrs[0]; *setup_frm++ = eaddrs[0];
1015 *setup_frm++ = eaddrs[1]; *setup_frm++ = eaddrs[1];
1016 *setup_frm++ = eaddrs[2]; *setup_frm++ = eaddrs[2];
1017 }
1018
1019
1020 static void set_rx_mode(struct net_device *dev)
1021 {
1022 struct tulip_private *tp = netdev_priv(dev);
1023 void __iomem *ioaddr = tp->base_addr;
1024 int csr6;
1025
1026 csr6 = ioread32(ioaddr + CSR6) & ~0x00D5;
1027
1028 tp->csr6 &= ~0x00D5;
1029 if (dev->flags & IFF_PROMISC) { /* Set promiscuous. */
1030 tp->csr6 |= AcceptAllMulticast | AcceptAllPhys;
1031 csr6 |= AcceptAllMulticast | AcceptAllPhys;
1032 } else if ((dev->mc_count > 1000) || (dev->flags & IFF_ALLMULTI)) {
1033 /* Too many to filter well -- accept all multicasts. */
1034 tp->csr6 |= AcceptAllMulticast;
1035 csr6 |= AcceptAllMulticast;
1036 } else if (tp->flags & MC_HASH_ONLY) {
1037 /* Some work-alikes have only a 64-entry hash filter table. */
1038 /* Should verify correctness on big-endian/__powerpc__ */
1039 struct dev_mc_list *mclist;
1040 int i;
1041 if (dev->mc_count > 64) { /* Arbitrary non-effective limit. */
1042 tp->csr6 |= AcceptAllMulticast;
1043 csr6 |= AcceptAllMulticast;
1044 } else {
1045 u32 mc_filter[2] = {0, 0}; /* Multicast hash filter */
1046 int filterbit;
1047 for (i = 0, mclist = dev->mc_list; mclist && i < dev->mc_count;
1048 i++, mclist = mclist->next) {
1049 if (tp->flags & COMET_MAC_ADDR)
1050 filterbit = ether_crc_le(ETH_ALEN, mclist->dmi_addr);
1051 else
1052 filterbit = ether_crc(ETH_ALEN, mclist->dmi_addr) >> 26;
1053 filterbit &= 0x3f;
1054 mc_filter[filterbit >> 5] |= 1 << (filterbit & 31);
1055 if (tulip_debug > 2) {
1056 DECLARE_MAC_BUF(mac);
1057 printk(KERN_INFO "%s: Added filter for %s"
1058 " %8.8x bit %d.\n",
1059 dev->name, print_mac(mac, mclist->dmi_addr),
1060 ether_crc(ETH_ALEN, mclist->dmi_addr), filterbit);
1061 }
1062 }
1063 if (mc_filter[0] == tp->mc_filter[0] &&
1064 mc_filter[1] == tp->mc_filter[1])
1065 ; /* No change. */
1066 else if (tp->flags & IS_ASIX) {
1067 iowrite32(2, ioaddr + CSR13);
1068 iowrite32(mc_filter[0], ioaddr + CSR14);
1069 iowrite32(3, ioaddr + CSR13);
1070 iowrite32(mc_filter[1], ioaddr + CSR14);
1071 } else if (tp->flags & COMET_MAC_ADDR) {
1072 iowrite32(mc_filter[0], ioaddr + 0xAC);
1073 iowrite32(mc_filter[1], ioaddr + 0xB0);
1074 }
1075 tp->mc_filter[0] = mc_filter[0];
1076 tp->mc_filter[1] = mc_filter[1];
1077 }
1078 } else {
1079 unsigned long flags;
1080 u32 tx_flags = 0x08000000 | 192;
1081
1082 /* Note that only the low-address shortword of setup_frame is valid!
1083 The values are doubled for big-endian architectures. */
1084 if (dev->mc_count > 14) { /* Must use a multicast hash table. */
1085 build_setup_frame_hash(tp->setup_frame, dev);
1086 tx_flags = 0x08400000 | 192;
1087 } else {
1088 build_setup_frame_perfect(tp->setup_frame, dev);
1089 }
1090
1091 spin_lock_irqsave(&tp->lock, flags);
1092
1093 if (tp->cur_tx - tp->dirty_tx > TX_RING_SIZE - 2) {
1094 /* Same setup recently queued, we need not add it. */
1095 } else {
1096 unsigned int entry;
1097 int dummy = -1;
1098
1099 /* Now add this frame to the Tx list. */
1100
1101 entry = tp->cur_tx++ % TX_RING_SIZE;
1102
1103 if (entry != 0) {
1104 /* Avoid a chip errata by prefixing a dummy entry. */
1105 tp->tx_buffers[entry].skb = NULL;
1106 tp->tx_buffers[entry].mapping = 0;
1107 tp->tx_ring[entry].length =
1108 (entry == TX_RING_SIZE-1) ? cpu_to_le32(DESC_RING_WRAP) : 0;
1109 tp->tx_ring[entry].buffer1 = 0;
1110 /* Must set DescOwned later to avoid race with chip */
1111 dummy = entry;
1112 entry = tp->cur_tx++ % TX_RING_SIZE;
1113
1114 }
1115
1116 tp->tx_buffers[entry].skb = NULL;
1117 tp->tx_buffers[entry].mapping =
1118 pci_map_single(tp->pdev, tp->setup_frame,
1119 sizeof(tp->setup_frame),
1120 PCI_DMA_TODEVICE);
1121 /* Put the setup frame on the Tx list. */
1122 if (entry == TX_RING_SIZE-1)
1123 tx_flags |= DESC_RING_WRAP; /* Wrap ring. */
1124 tp->tx_ring[entry].length = cpu_to_le32(tx_flags);
1125 tp->tx_ring[entry].buffer1 =
1126 cpu_to_le32(tp->tx_buffers[entry].mapping);
1127 tp->tx_ring[entry].status = cpu_to_le32(DescOwned);
1128 if (dummy >= 0)
1129 tp->tx_ring[dummy].status = cpu_to_le32(DescOwned);
1130 if (tp->cur_tx - tp->dirty_tx >= TX_RING_SIZE - 2)
1131 netif_stop_queue(dev);
1132
1133 /* Trigger an immediate transmit demand. */
1134 iowrite32(0, ioaddr + CSR1);
1135 }
1136
1137 spin_unlock_irqrestore(&tp->lock, flags);
1138 }
1139
1140 iowrite32(csr6, ioaddr + CSR6);
1141 }
1142
1143 #ifdef CONFIG_TULIP_MWI
1144 static void __devinit tulip_mwi_config (struct pci_dev *pdev,
1145 struct net_device *dev)
1146 {
1147 struct tulip_private *tp = netdev_priv(dev);
1148 u8 cache;
1149 u16 pci_command;
1150 u32 csr0;
1151
1152 if (tulip_debug > 3)
1153 printk(KERN_DEBUG "%s: tulip_mwi_config()\n", pci_name(pdev));
1154
1155 tp->csr0 = csr0 = 0;
1156
1157 /* if we have any cache line size at all, we can do MRM and MWI */
1158 csr0 |= MRM | MWI;
1159
1160 /* Enable MWI in the standard PCI command bit.
1161 * Check for the case where MWI is desired but not available
1162 */
1163 pci_try_set_mwi(pdev);
1164
1165 /* read result from hardware (in case bit refused to enable) */
1166 pci_read_config_word(pdev, PCI_COMMAND, &pci_command);
1167 if ((csr0 & MWI) && (!(pci_command & PCI_COMMAND_INVALIDATE)))
1168 csr0 &= ~MWI;
1169
1170 /* if cache line size hardwired to zero, no MWI */
1171 pci_read_config_byte(pdev, PCI_CACHE_LINE_SIZE, &cache);
1172 if ((csr0 & MWI) && (cache == 0)) {
1173 csr0 &= ~MWI;
1174 pci_clear_mwi(pdev);
1175 }
1176
1177 /* assign per-cacheline-size cache alignment and
1178 * burst length values
1179 */
1180 switch (cache) {
1181 case 8:
1182 csr0 |= MRL | (1 << CALShift) | (16 << BurstLenShift);
1183 break;
1184 case 16:
1185 csr0 |= MRL | (2 << CALShift) | (16 << BurstLenShift);
1186 break;
1187 case 32:
1188 csr0 |= MRL | (3 << CALShift) | (32 << BurstLenShift);
1189 break;
1190 default:
1191 cache = 0;
1192 break;
1193 }
1194
1195 /* if we have a good cache line size, we by now have a good
1196 * csr0, so save it and exit
1197 */
1198 if (cache)
1199 goto out;
1200
1201 /* we don't have a good csr0 or cache line size, disable MWI */
1202 if (csr0 & MWI) {
1203 pci_clear_mwi(pdev);
1204 csr0 &= ~MWI;
1205 }
1206
1207 /* sane defaults for burst length and cache alignment
1208 * originally from de4x5 driver
1209 */
1210 csr0 |= (8 << BurstLenShift) | (1 << CALShift);
1211
1212 out:
1213 tp->csr0 = csr0;
1214 if (tulip_debug > 2)
1215 printk(KERN_DEBUG "%s: MWI config cacheline=%d, csr0=%08x\n",
1216 pci_name(pdev), cache, csr0);
1217 }
1218 #endif
1219
1220 /*
1221 * Chips that have the MRM/reserved bit quirk and the burst quirk. That
1222 * is the DM910X and the on chip ULi devices
1223 */
1224
1225 static int tulip_uli_dm_quirk(struct pci_dev *pdev)
1226 {
1227 if (pdev->vendor == 0x1282 && pdev->device == 0x9102)
1228 return 1;
1229 return 0;
1230 }
1231
1232 static int __devinit tulip_init_one (struct pci_dev *pdev,
1233 const struct pci_device_id *ent)
1234 {
1235 struct tulip_private *tp;
1236 /* See note below on the multiport cards. */
1237 static unsigned char last_phys_addr[6] = {0x00, 'L', 'i', 'n', 'u', 'x'};
1238 static struct pci_device_id early_486_chipsets[] = {
1239 { PCI_DEVICE(PCI_VENDOR_ID_INTEL, PCI_DEVICE_ID_INTEL_82424) },
1240 { PCI_DEVICE(PCI_VENDOR_ID_SI, PCI_DEVICE_ID_SI_496) },
1241 { },
1242 };
1243 static int last_irq;
1244 static int multiport_cnt; /* For four-port boards w/one EEPROM */
1245 int i, irq;
1246 unsigned short sum;
1247 unsigned char *ee_data;
1248 struct net_device *dev;
1249 void __iomem *ioaddr;
1250 static int board_idx = -1;
1251 int chip_idx = ent->driver_data;
1252 const char *chip_name = tulip_tbl[chip_idx].chip_name;
1253 unsigned int eeprom_missing = 0;
1254 unsigned int force_csr0 = 0;
1255 DECLARE_MAC_BUF(mac);
1256
1257 #ifndef MODULE
1258 static int did_version; /* Already printed version info. */
1259 if (tulip_debug > 0 && did_version++ == 0)
1260 printk (KERN_INFO "%s", version);
1261 #endif
1262
1263 board_idx++;
1264
1265 /*
1266 * Lan media wire a tulip chip to a wan interface. Needs a very
1267 * different driver (lmc driver)
1268 */
1269
1270 if (pdev->subsystem_vendor == PCI_VENDOR_ID_LMC) {
1271 printk (KERN_ERR PFX "skipping LMC card.\n");
1272 return -ENODEV;
1273 }
1274
1275 /*
1276 * Early DM9100's need software CRC and the DMFE driver
1277 */
1278
1279 if (pdev->vendor == 0x1282 && pdev->device == 0x9100)
1280 {
1281 /* Read Chip revision */
1282 if (pdev->revision < 0x30)
1283 {
1284 printk(KERN_ERR PFX "skipping early DM9100 with Crc bug (use dmfe)\n");
1285 return -ENODEV;
1286 }
1287 }
1288
1289 /*
1290 * Looks for early PCI chipsets where people report hangs
1291 * without the workarounds being on.
1292 */
1293
1294 /* 1. Intel Saturn. Switch to 8 long words burst, 8 long word cache
1295 aligned. Aries might need this too. The Saturn errata are not
1296 pretty reading but thankfully it's an old 486 chipset.
1297
1298 2. The dreaded SiS496 486 chipset. Same workaround as Intel
1299 Saturn.
1300 */
1301
1302 if (pci_dev_present(early_486_chipsets)) {
1303 csr0 = MRL | MRM | (8 << BurstLenShift) | (1 << CALShift);
1304 force_csr0 = 1;
1305 }
1306
1307 /* bugfix: the ASIX must have a burst limit or horrible things happen. */
1308 if (chip_idx == AX88140) {
1309 if ((csr0 & 0x3f00) == 0)
1310 csr0 |= 0x2000;
1311 }
1312
1313 /* PNIC doesn't have MWI/MRL/MRM... */
1314 if (chip_idx == LC82C168)
1315 csr0 &= ~0xfff10000; /* zero reserved bits 31:20, 16 */
1316
1317 /* DM9102A has troubles with MRM & clear reserved bits 24:22, 20, 16, 7:1 */
1318 if (tulip_uli_dm_quirk(pdev)) {
1319 csr0 &= ~0x01f100ff;
1320 #if defined(CONFIG_SPARC)
1321 csr0 = (csr0 & ~0xff00) | 0xe000;
1322 #endif
1323 }
1324 /*
1325 * And back to business
1326 */
1327
1328 i = pci_enable_device(pdev);
1329 if (i) {
1330 printk (KERN_ERR PFX
1331 "Cannot enable tulip board #%d, aborting\n",
1332 board_idx);
1333 return i;
1334 }
1335
1336 irq = pdev->irq;
1337
1338 /* alloc_etherdev ensures aligned and zeroed private structures */
1339 dev = alloc_etherdev (sizeof (*tp));
1340 if (!dev) {
1341 printk (KERN_ERR PFX "ether device alloc failed, aborting\n");
1342 return -ENOMEM;
1343 }
1344
1345 SET_NETDEV_DEV(dev, &pdev->dev);
1346 if (pci_resource_len (pdev, 0) < tulip_tbl[chip_idx].io_size) {
1347 printk (KERN_ERR PFX "%s: I/O region (0x%llx@0x%llx) too small, "
1348 "aborting\n", pci_name(pdev),
1349 (unsigned long long)pci_resource_len (pdev, 0),
1350 (unsigned long long)pci_resource_start (pdev, 0));
1351 goto err_out_free_netdev;
1352 }
1353
1354 /* grab all resources from both PIO and MMIO regions, as we
1355 * don't want anyone else messing around with our hardware */
1356 if (pci_request_regions (pdev, "tulip"))
1357 goto err_out_free_netdev;
1358
1359 ioaddr = pci_iomap(pdev, TULIP_BAR, tulip_tbl[chip_idx].io_size);
1360
1361 if (!ioaddr)
1362 goto err_out_free_res;
1363
1364 /*
1365 * initialize private data structure 'tp'
1366 * it is zeroed and aligned in alloc_etherdev
1367 */
1368 tp = netdev_priv(dev);
1369 tp->dev = dev;
1370
1371 tp->rx_ring = pci_alloc_consistent(pdev,
1372 sizeof(struct tulip_rx_desc) * RX_RING_SIZE +
1373 sizeof(struct tulip_tx_desc) * TX_RING_SIZE,
1374 &tp->rx_ring_dma);
1375 if (!tp->rx_ring)
1376 goto err_out_mtable;
1377 tp->tx_ring = (struct tulip_tx_desc *)(tp->rx_ring + RX_RING_SIZE);
1378 tp->tx_ring_dma = tp->rx_ring_dma + sizeof(struct tulip_rx_desc) * RX_RING_SIZE;
1379
1380 tp->chip_id = chip_idx;
1381 tp->flags = tulip_tbl[chip_idx].flags;
1382 tp->pdev = pdev;
1383 tp->base_addr = ioaddr;
1384 tp->revision = pdev->revision;
1385 tp->csr0 = csr0;
1386 spin_lock_init(&tp->lock);
1387 spin_lock_init(&tp->mii_lock);
1388 init_timer(&tp->timer);
1389 tp->timer.data = (unsigned long)dev;
1390 tp->timer.function = tulip_tbl[tp->chip_id].media_timer;
1391
1392 INIT_WORK(&tp->media_work, tulip_tbl[tp->chip_id].media_task);
1393
1394 dev->base_addr = (unsigned long)ioaddr;
1395
1396 #ifdef CONFIG_TULIP_MWI
1397 if (!force_csr0 && (tp->flags & HAS_PCI_MWI))
1398 tulip_mwi_config (pdev, dev);
1399 #endif
1400
1401 /* Stop the chip's Tx and Rx processes. */
1402 tulip_stop_rxtx(tp);
1403
1404 pci_set_master(pdev);
1405
1406 #ifdef CONFIG_GSC
1407 if (pdev->subsystem_vendor == PCI_VENDOR_ID_HP) {
1408 switch (pdev->subsystem_device) {
1409 default:
1410 break;
1411 case 0x1061:
1412 case 0x1062:
1413 case 0x1063:
1414 case 0x1098:
1415 case 0x1099:
1416 case 0x10EE:
1417 tp->flags |= HAS_SWAPPED_SEEPROM | NEEDS_FAKE_MEDIA_TABLE;
1418 chip_name = "GSC DS21140 Tulip";
1419 }
1420 }
1421 #endif
1422
1423 /* Clear the missed-packet counter. */
1424 ioread32(ioaddr + CSR8);
1425
1426 /* The station address ROM is read byte serially. The register must
1427 be polled, waiting for the value to be read bit serially from the
1428 EEPROM.
1429 */
1430 ee_data = tp->eeprom;
1431 memset(ee_data, 0, sizeof(tp->eeprom));
1432 sum = 0;
1433 if (chip_idx == LC82C168) {
1434 for (i = 0; i < 3; i++) {
1435 int value, boguscnt = 100000;
1436 iowrite32(0x600 | i, ioaddr + 0x98);
1437 do
1438 value = ioread32(ioaddr + CSR9);
1439 while (value < 0 && --boguscnt > 0);
1440 put_unaligned_le16(value, ((__le16 *)dev->dev_addr) + i);
1441 sum += value & 0xffff;
1442 }
1443 } else if (chip_idx == COMET) {
1444 /* No need to read the EEPROM. */
1445 put_unaligned_le32(ioread32(ioaddr + 0xA4), dev->dev_addr);
1446 put_unaligned_le16(ioread32(ioaddr + 0xA8), dev->dev_addr + 4);
1447 for (i = 0; i < 6; i ++)
1448 sum += dev->dev_addr[i];
1449 } else {
1450 /* A serial EEPROM interface, we read now and sort it out later. */
1451 int sa_offset = 0;
1452 int ee_addr_size = tulip_read_eeprom(dev, 0xff, 8) & 0x40000 ? 8 : 6;
1453 int ee_max_addr = ((1 << ee_addr_size) - 1) * sizeof(u16);
1454
1455 if (ee_max_addr > sizeof(tp->eeprom))
1456 ee_max_addr = sizeof(tp->eeprom);
1457
1458 for (i = 0; i < ee_max_addr ; i += sizeof(u16)) {
1459 u16 data = tulip_read_eeprom(dev, i/2, ee_addr_size);
1460 ee_data[i] = data & 0xff;
1461 ee_data[i + 1] = data >> 8;
1462 }
1463
1464 /* DEC now has a specification (see Notes) but early board makers
1465 just put the address in the first EEPROM locations. */
1466 /* This does memcmp(ee_data, ee_data+16, 8) */
1467 for (i = 0; i < 8; i ++)
1468 if (ee_data[i] != ee_data[16+i])
1469 sa_offset = 20;
1470 if (chip_idx == CONEXANT) {
1471 /* Check that the tuple type and length is correct. */
1472 if (ee_data[0x198] == 0x04 && ee_data[0x199] == 6)
1473 sa_offset = 0x19A;
1474 } else if (ee_data[0] == 0xff && ee_data[1] == 0xff &&
1475 ee_data[2] == 0) {
1476 sa_offset = 2; /* Grrr, damn Matrox boards. */
1477 multiport_cnt = 4;
1478 }
1479 #ifdef CONFIG_MIPS_COBALT
1480 if ((pdev->bus->number == 0) &&
1481 ((PCI_SLOT(pdev->devfn) == 7) ||
1482 (PCI_SLOT(pdev->devfn) == 12))) {
1483 /* Cobalt MAC address in first EEPROM locations. */
1484 sa_offset = 0;
1485 /* Ensure our media table fixup get's applied */
1486 memcpy(ee_data + 16, ee_data, 8);
1487 }
1488 #endif
1489 #ifdef CONFIG_GSC
1490 /* Check to see if we have a broken srom */
1491 if (ee_data[0] == 0x61 && ee_data[1] == 0x10) {
1492 /* pci_vendor_id and subsystem_id are swapped */
1493 ee_data[0] = ee_data[2];
1494 ee_data[1] = ee_data[3];
1495 ee_data[2] = 0x61;
1496 ee_data[3] = 0x10;
1497
1498 /* HSC-PCI boards need to be byte-swaped and shifted
1499 * up 1 word. This shift needs to happen at the end
1500 * of the MAC first because of the 2 byte overlap.
1501 */
1502 for (i = 4; i >= 0; i -= 2) {
1503 ee_data[17 + i + 3] = ee_data[17 + i];
1504 ee_data[16 + i + 5] = ee_data[16 + i];
1505 }
1506 }
1507 #endif
1508
1509 for (i = 0; i < 6; i ++) {
1510 dev->dev_addr[i] = ee_data[i + sa_offset];
1511 sum += ee_data[i + sa_offset];
1512 }
1513 }
1514 /* Lite-On boards have the address byte-swapped. */
1515 if ((dev->dev_addr[0] == 0xA0 || dev->dev_addr[0] == 0xC0 || dev->dev_addr[0] == 0x02)
1516 && dev->dev_addr[1] == 0x00)
1517 for (i = 0; i < 6; i+=2) {
1518 char tmp = dev->dev_addr[i];
1519 dev->dev_addr[i] = dev->dev_addr[i+1];
1520 dev->dev_addr[i+1] = tmp;
1521 }
1522 /* On the Zynx 315 Etherarray and other multiport boards only the
1523 first Tulip has an EEPROM.
1524 On Sparc systems the mac address is held in the OBP property
1525 "local-mac-address".
1526 The addresses of the subsequent ports are derived from the first.
1527 Many PCI BIOSes also incorrectly report the IRQ line, so we correct
1528 that here as well. */
1529 if (sum == 0 || sum == 6*0xff) {
1530 #if defined(CONFIG_SPARC)
1531 struct device_node *dp = pci_device_to_OF_node(pdev);
1532 const unsigned char *addr;
1533 int len;
1534 #endif
1535 eeprom_missing = 1;
1536 for (i = 0; i < 5; i++)
1537 dev->dev_addr[i] = last_phys_addr[i];
1538 dev->dev_addr[i] = last_phys_addr[i] + 1;
1539 #if defined(CONFIG_SPARC)
1540 addr = of_get_property(dp, "local-mac-address", &len);
1541 if (addr && len == 6)
1542 memcpy(dev->dev_addr, addr, 6);
1543 #endif
1544 #if defined(__i386__) || defined(__x86_64__) /* Patch up x86 BIOS bug. */
1545 if (last_irq)
1546 irq = last_irq;
1547 #endif
1548 }
1549
1550 for (i = 0; i < 6; i++)
1551 last_phys_addr[i] = dev->dev_addr[i];
1552 last_irq = irq;
1553 dev->irq = irq;
1554
1555 /* The lower four bits are the media type. */
1556 if (board_idx >= 0 && board_idx < MAX_UNITS) {
1557 if (options[board_idx] & MEDIA_MASK)
1558 tp->default_port = options[board_idx] & MEDIA_MASK;
1559 if ((options[board_idx] & FullDuplex) || full_duplex[board_idx] > 0)
1560 tp->full_duplex = 1;
1561 if (mtu[board_idx] > 0)
1562 dev->mtu = mtu[board_idx];
1563 }
1564 if (dev->mem_start & MEDIA_MASK)
1565 tp->default_port = dev->mem_start & MEDIA_MASK;
1566 if (tp->default_port) {
1567 printk(KERN_INFO "tulip%d: Transceiver selection forced to %s.\n",
1568 board_idx, medianame[tp->default_port & MEDIA_MASK]);
1569 tp->medialock = 1;
1570 if (tulip_media_cap[tp->default_port] & MediaAlwaysFD)
1571 tp->full_duplex = 1;
1572 }
1573 if (tp->full_duplex)
1574 tp->full_duplex_lock = 1;
1575
1576 if (tulip_media_cap[tp->default_port] & MediaIsMII) {
1577 u16 media2advert[] = { 0x20, 0x40, 0x03e0, 0x60, 0x80, 0x100, 0x200 };
1578 tp->mii_advertise = media2advert[tp->default_port - 9];
1579 tp->mii_advertise |= (tp->flags & HAS_8023X); /* Matching bits! */
1580 }
1581
1582 if (tp->flags & HAS_MEDIA_TABLE) {
1583 sprintf(dev->name, "tulip%d", board_idx); /* hack */
1584 tulip_parse_eeprom(dev);
1585 strcpy(dev->name, "eth%d"); /* un-hack */
1586 }
1587
1588 if ((tp->flags & ALWAYS_CHECK_MII) ||
1589 (tp->mtable && tp->mtable->has_mii) ||
1590 ( ! tp->mtable && (tp->flags & HAS_MII))) {
1591 if (tp->mtable && tp->mtable->has_mii) {
1592 for (i = 0; i < tp->mtable->leafcount; i++)
1593 if (tp->mtable->mleaf[i].media == 11) {
1594 tp->cur_index = i;
1595 tp->saved_if_port = dev->if_port;
1596 tulip_select_media(dev, 2);
1597 dev->if_port = tp->saved_if_port;
1598 break;
1599 }
1600 }
1601
1602 /* Find the connected MII xcvrs.
1603 Doing this in open() would allow detecting external xcvrs
1604 later, but takes much time. */
1605 tulip_find_mii (dev, board_idx);
1606 }
1607
1608 /* The Tulip-specific entries in the device structure. */
1609 dev->open = tulip_open;
1610 dev->hard_start_xmit = tulip_start_xmit;
1611 dev->tx_timeout = tulip_tx_timeout;
1612 dev->watchdog_timeo = TX_TIMEOUT;
1613 #ifdef CONFIG_TULIP_NAPI
1614 netif_napi_add(dev, &tp->napi, tulip_poll, 16);
1615 #endif
1616 dev->stop = tulip_close;
1617 dev->get_stats = tulip_get_stats;
1618 dev->do_ioctl = private_ioctl;
1619 dev->set_multicast_list = set_rx_mode;
1620 #ifdef CONFIG_NET_POLL_CONTROLLER
1621 dev->poll_controller = &poll_tulip;
1622 #endif
1623 SET_ETHTOOL_OPS(dev, &ops);
1624
1625 if (register_netdev(dev))
1626 goto err_out_free_ring;
1627
1628 printk(KERN_INFO "%s: %s rev %d at "
1629 #ifdef CONFIG_TULIP_MMIO
1630 "MMIO"
1631 #else
1632 "Port"
1633 #endif
1634 " %#llx,", dev->name, chip_name, pdev->revision,
1635 (unsigned long long) pci_resource_start(pdev, TULIP_BAR));
1636 pci_set_drvdata(pdev, dev);
1637
1638 if (eeprom_missing)
1639 printk(" EEPROM not present,");
1640 printk(" %s", print_mac(mac, dev->dev_addr));
1641 printk(", IRQ %d.\n", irq);
1642
1643 if (tp->chip_id == PNIC2)
1644 tp->link_change = pnic2_lnk_change;
1645 else if (tp->flags & HAS_NWAY)
1646 tp->link_change = t21142_lnk_change;
1647 else if (tp->flags & HAS_PNICNWAY)
1648 tp->link_change = pnic_lnk_change;
1649
1650 /* Reset the xcvr interface and turn on heartbeat. */
1651 switch (chip_idx) {
1652 case DC21140:
1653 case DM910X:
1654 default:
1655 if (tp->mtable)
1656 iowrite32(tp->mtable->csr12dir | 0x100, ioaddr + CSR12);
1657 break;
1658 case DC21142:
1659 if (tp->mii_cnt || tulip_media_cap[dev->if_port] & MediaIsMII) {
1660 iowrite32(csr6_mask_defstate, ioaddr + CSR6);
1661 iowrite32(0x0000, ioaddr + CSR13);
1662 iowrite32(0x0000, ioaddr + CSR14);
1663 iowrite32(csr6_mask_hdcap, ioaddr + CSR6);
1664 } else
1665 t21142_start_nway(dev);
1666 break;
1667 case PNIC2:
1668 /* just do a reset for sanity sake */
1669 iowrite32(0x0000, ioaddr + CSR13);
1670 iowrite32(0x0000, ioaddr + CSR14);
1671 break;
1672 case LC82C168:
1673 if ( ! tp->mii_cnt) {
1674 tp->nway = 1;
1675 tp->nwayset = 0;
1676 iowrite32(csr6_ttm | csr6_ca, ioaddr + CSR6);
1677 iowrite32(0x30, ioaddr + CSR12);
1678 iowrite32(0x0001F078, ioaddr + CSR6);
1679 iowrite32(0x0201F078, ioaddr + CSR6); /* Turn on autonegotiation. */
1680 }
1681 break;
1682 case MX98713:
1683 case COMPEX9881:
1684 iowrite32(0x00000000, ioaddr + CSR6);
1685 iowrite32(0x000711C0, ioaddr + CSR14); /* Turn on NWay. */
1686 iowrite32(0x00000001, ioaddr + CSR13);
1687 break;
1688 case MX98715:
1689 case MX98725:
1690 iowrite32(0x01a80000, ioaddr + CSR6);
1691 iowrite32(0xFFFFFFFF, ioaddr + CSR14);
1692 iowrite32(0x00001000, ioaddr + CSR12);
1693 break;
1694 case COMET:
1695 /* No initialization necessary. */
1696 break;
1697 }
1698
1699 /* put the chip in snooze mode until opened */
1700 tulip_set_power_state (tp, 0, 1);
1701
1702 return 0;
1703
1704 err_out_free_ring:
1705 pci_free_consistent (pdev,
1706 sizeof (struct tulip_rx_desc) * RX_RING_SIZE +
1707 sizeof (struct tulip_tx_desc) * TX_RING_SIZE,
1708 tp->rx_ring, tp->rx_ring_dma);
1709
1710 err_out_mtable:
1711 kfree (tp->mtable);
1712 pci_iounmap(pdev, ioaddr);
1713
1714 err_out_free_res:
1715 pci_release_regions (pdev);
1716
1717 err_out_free_netdev:
1718 free_netdev (dev);
1719 return -ENODEV;
1720 }
1721
1722
1723 #ifdef CONFIG_PM
1724
1725 static int tulip_suspend (struct pci_dev *pdev, pm_message_t state)
1726 {
1727 struct net_device *dev = pci_get_drvdata(pdev);
1728
1729 if (!dev)
1730 return -EINVAL;
1731
1732 if (!netif_running(dev))
1733 goto save_state;
1734
1735 tulip_down(dev);
1736
1737 netif_device_detach(dev);
1738 free_irq(dev->irq, dev);
1739
1740 save_state:
1741 pci_save_state(pdev);
1742 pci_disable_device(pdev);
1743 pci_set_power_state(pdev, pci_choose_state(pdev, state));
1744
1745 return 0;
1746 }
1747
1748
1749 static int tulip_resume(struct pci_dev *pdev)
1750 {
1751 struct net_device *dev = pci_get_drvdata(pdev);
1752 int retval;
1753
1754 if (!dev)
1755 return -EINVAL;
1756
1757 pci_set_power_state(pdev, PCI_D0);
1758 pci_restore_state(pdev);
1759
1760 if (!netif_running(dev))
1761 return 0;
1762
1763 if ((retval = pci_enable_device(pdev))) {
1764 printk (KERN_ERR "tulip: pci_enable_device failed in resume\n");
1765 return retval;
1766 }
1767
1768 if ((retval = request_irq(dev->irq, &tulip_interrupt, IRQF_SHARED, dev->name, dev))) {
1769 printk (KERN_ERR "tulip: request_irq failed in resume\n");
1770 return retval;
1771 }
1772
1773 netif_device_attach(dev);
1774
1775 if (netif_running(dev))
1776 tulip_up(dev);
1777
1778 return 0;
1779 }
1780
1781 #endif /* CONFIG_PM */
1782
1783
1784 static void __devexit tulip_remove_one (struct pci_dev *pdev)
1785 {
1786 struct net_device *dev = pci_get_drvdata (pdev);
1787 struct tulip_private *tp;
1788
1789 if (!dev)
1790 return;
1791
1792 tp = netdev_priv(dev);
1793 unregister_netdev(dev);
1794 pci_free_consistent (pdev,
1795 sizeof (struct tulip_rx_desc) * RX_RING_SIZE +
1796 sizeof (struct tulip_tx_desc) * TX_RING_SIZE,
1797 tp->rx_ring, tp->rx_ring_dma);
1798 kfree (tp->mtable);
1799 pci_iounmap(pdev, tp->base_addr);
1800 free_netdev (dev);
1801 pci_release_regions (pdev);
1802 pci_set_drvdata (pdev, NULL);
1803
1804 /* pci_power_off (pdev, -1); */
1805 }
1806
1807 #ifdef CONFIG_NET_POLL_CONTROLLER
1808 /*
1809 * Polling 'interrupt' - used by things like netconsole to send skbs
1810 * without having to re-enable interrupts. It's not called while
1811 * the interrupt routine is executing.
1812 */
1813
1814 static void poll_tulip (struct net_device *dev)
1815 {
1816 /* disable_irq here is not very nice, but with the lockless
1817 interrupt handler we have no other choice. */
1818 disable_irq(dev->irq);
1819 tulip_interrupt (dev->irq, dev);
1820 enable_irq(dev->irq);
1821 }
1822 #endif
1823
1824 static struct pci_driver tulip_driver = {
1825 .name = DRV_NAME,
1826 .id_table = tulip_pci_tbl,
1827 .probe = tulip_init_one,
1828 .remove = __devexit_p(tulip_remove_one),
1829 #ifdef CONFIG_PM
1830 .suspend = tulip_suspend,
1831 .resume = tulip_resume,
1832 #endif /* CONFIG_PM */
1833 };
1834
1835
1836 static int __init tulip_init (void)
1837 {
1838 #ifdef MODULE
1839 printk (KERN_INFO "%s", version);
1840 #endif
1841
1842 /* copy module parms into globals */
1843 tulip_rx_copybreak = rx_copybreak;
1844 tulip_max_interrupt_work = max_interrupt_work;
1845
1846 /* probe for and init boards */
1847 return pci_register_driver(&tulip_driver);
1848 }
1849
1850
1851 static void __exit tulip_cleanup (void)
1852 {
1853 pci_unregister_driver (&tulip_driver);
1854 }
1855
1856
1857 module_init(tulip_init);
1858 module_exit(tulip_cleanup);
CJK support for tty framebuffer vt