arch/sparc64/math-emu/sfp-util.h

   1 /*
   2  * arch/sparc64/math-emu/sfp-util.h
   3  *
   4  * Copyright (C) 1999 Jakub Jelinek (jj@ultra.linux.cz)
   5  * Copyright (C) 1999 David S. Miller (davem@redhat.com)
   6  *
   7  */
   8
   9 #include <linux/kernel.h>
  10 #include <linux/sched.h>
  11 #include <linux/types.h>
  12 #include <asm/byteorder.h>
  13
  14 #define add_ssaaaa(sh, sl, ah, al, bh, bl)      \
  15   __asm__ ("addcc %4,%5,%1\n\t"                 \
  16            "add %2,%3,%0\n\t"                   \
  17            "bcs,a,pn %%xcc, 1f\n\t"             \
  18            "add %0, 1, %0\n"                    \
  19            "1:"                                 \
  20            : "=r" ((UDItype)(sh)),              \
  21              "=&r" ((UDItype)(sl))              \
  22            : "r" ((UDItype)(ah)),               \
  23              "r" ((UDItype)(bh)),               \
  24              "r" ((UDItype)(al)),               \
  25              "r" ((UDItype)(bl))                \
  26            : "cc")
  27
  28 #define sub_ddmmss(sh, sl, ah, al, bh, bl)      \
  29   __asm__ ("subcc %4,%5,%1\n\t"                 \
  30            "sub %2,%3,%0\n\t"                   \
  31            "bcs,a,pn %%xcc, 1f\n\t"             \
  32            "sub %0, 1, %0\n"                    \
  33            "1:"                                 \
  34            : "=r" ((UDItype)(sh)),              \
  35              "=&r" ((UDItype)(sl))              \
  36            : "r" ((UDItype)(ah)),               \
  37              "r" ((UDItype)(bh)),               \
  38              "r" ((UDItype)(al)),               \
  39              "r" ((UDItype)(bl))                \
  40            : "cc")
  41
  42 #define umul_ppmm(wh, wl, u, v)                         \
  43   do {                                                  \
  44           UDItype tmp1, tmp2, tmp3, tmp4;               \
  45           __asm__ __volatile__ (                        \
  46                    "srl %7,0,%3\n\t"                    \
  47                    "mulx %3,%6,%1\n\t"                  \
  48                    "srlx %6,32,%2\n\t"                  \
  49                    "mulx %2,%3,%4\n\t"                  \
  50                    "sllx %4,32,%5\n\t"                  \
  51                    "srl %6,0,%3\n\t"                    \
  52                    "sub %1,%5,%5\n\t"                   \
  53                    "srlx %5,32,%5\n\t"                  \
  54                    "addcc %4,%5,%4\n\t"                 \
  55                    "srlx %7,32,%5\n\t"                  \
  56                    "mulx %3,%5,%3\n\t"                  \
  57                    "mulx %2,%5,%5\n\t"                  \
  58                    "sethi %%hi(0x80000000),%2\n\t"      \
  59                    "addcc %4,%3,%4\n\t"                 \
  60                    "srlx %4,32,%4\n\t"                  \
  61                    "add %2,%2,%2\n\t"                   \
  62                    "movcc %%xcc,%%g0,%2\n\t"            \
  63                    "addcc %5,%4,%5\n\t"                 \
  64                    "sllx %3,32,%3\n\t"                  \
  65                    "add %1,%3,%1\n\t"                   \
  66                    "add %5,%2,%0"                       \
  67            : "=r" ((UDItype)(wh)),                      \
  68              "=&r" ((UDItype)(wl)),                     \
  69              "=&r" (tmp1), "=&r" (tmp2), "=&r" (tmp3), "=&r" (tmp4) \
  70            : "r" ((UDItype)(u)),                        \
  71              "r" ((UDItype)(v))                         \
  72            : "cc");                                     \
  73   } while (0)
  74
  75 #define udiv_qrnnd(q, r, n1, n0, d)                     \
  76   do {                                                  \
  77     UWtype __d1, __d0, __q1, __q0, __r1, __r0, __m;     \
  78     __d1 = (d >> 32);                                   \
  79     __d0 = (USItype)d;                                  \
  80                                                         \
  81     __r1 = (n1) % __d1;                                 \
  82     __q1 = (n1) / __d1;                                 \
  83     __m = (UWtype) __q1 * __d0;                         \
  84     __r1 = (__r1 << 32) | (n0 >> 32);                   \
  85     if (__r1 < __m)                                     \
  86       {                                                 \
  87         __q1--, __r1 += (d);                            \
  88         if (__r1 >= (d)) /* i.e. we didn't get carry when adding to __r1 */ \
  89           if (__r1 < __m)                               \
  90             __q1--, __r1 += (d);                        \
  91       }                                                 \
  92     __r1 -= __m;                                        \
  93                                                         \
  94     __r0 = __r1 % __d1;                                 \
  95     __q0 = __r1 / __d1;                                 \
  96     __m = (UWtype) __q0 * __d0;                         \
  97     __r0 = (__r0 << 32) | ((USItype)n0);                \
  98     if (__r0 < __m)                                     \
  99       {                                                 \
 100         __q0--, __r0 += (d);                            \
 101         if (__r0 >= (d))                                \
 102           if (__r0 < __m)                               \
 103             __q0--, __r0 += (d);                        \
 104       }                                                 \
 105     __r0 -= __m;                                        \
 106                                                         \
 107     (q) = (UWtype) (__q1 << 32)  | __q0;                \
 108     (r) = __r0;                                         \
 109   } while (0)
 110
 111 #define UDIV_NEEDS_NORMALIZATION 1
 112
 113 #define abort() \
 114         return 0
 115
 116 #ifdef __BIG_ENDIAN
 117 #define __BYTE_ORDER __BIG_ENDIAN
 118 #else
 119 #define __BYTE_ORDER __LITTLE_ENDIAN
 120 #endif