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cnic: Fine-tune CID memory space calculation.
[linux-2.6/cjktty.git] / drivers / net / cnic.c
blob70a53cc7df327e91bb4a4b9ed8111ab3dd56841a
1 /* cnic.c: Broadcom CNIC core network driver.
2 *
3 * Copyright (c) 2006-2010 Broadcom Corporation
4 *
5 * This program is free software; you can redistribute it and/or modify
6 * it under the terms of the GNU General Public License as published by
7 * the Free Software Foundation.
8 *
9 * Original skeleton written by: John(Zongxi) Chen (zongxi@broadcom.com)
10 * Modified and maintained by: Michael Chan <mchan@broadcom.com>
11 */
12
13 #define pr_fmt(fmt) KBUILD_MODNAME ": " fmt
14
15 #include <linux/module.h>
16
17 #include <linux/kernel.h>
18 #include <linux/errno.h>
19 #include <linux/list.h>
20 #include <linux/slab.h>
21 #include <linux/pci.h>
22 #include <linux/init.h>
23 #include <linux/netdevice.h>
24 #include <linux/uio_driver.h>
25 #include <linux/in.h>
26 #include <linux/dma-mapping.h>
27 #include <linux/delay.h>
28 #include <linux/ethtool.h>
29 #include <linux/if_vlan.h>
30 #if defined(CONFIG_VLAN_8021Q) || defined(CONFIG_VLAN_8021Q_MODULE)
31 #define BCM_VLAN 1
32 #endif
33 #include <net/ip.h>
34 #include <net/tcp.h>
35 #include <net/route.h>
36 #include <net/ipv6.h>
37 #include <net/ip6_route.h>
38 #include <net/ip6_checksum.h>
39 #include <scsi/iscsi_if.h>
40
41 #include "cnic_if.h"
42 #include "bnx2.h"
43 #include "bnx2x_reg.h"
44 #include "bnx2x_fw_defs.h"
45 #include "bnx2x_hsi.h"
46 #include "../scsi/bnx2i/57xx_iscsi_constants.h"
47 #include "../scsi/bnx2i/57xx_iscsi_hsi.h"
48 #include "cnic.h"
49 #include "cnic_defs.h"
50
51 #define DRV_MODULE_NAME "cnic"
52
53 static char version[] __devinitdata =
54 "Broadcom NetXtreme II CNIC Driver " DRV_MODULE_NAME " v" CNIC_MODULE_VERSION " (" CNIC_MODULE_RELDATE ")\n";
55
56 MODULE_AUTHOR("Michael Chan <mchan@broadcom.com> and John(Zongxi) "
57 "Chen (zongxi@broadcom.com");
58 MODULE_DESCRIPTION("Broadcom NetXtreme II CNIC Driver");
59 MODULE_LICENSE("GPL");
60 MODULE_VERSION(CNIC_MODULE_VERSION);
61
62 static LIST_HEAD(cnic_dev_list);
63 static DEFINE_RWLOCK(cnic_dev_lock);
64 static DEFINE_MUTEX(cnic_lock);
65
66 static struct cnic_ulp_ops *cnic_ulp_tbl[MAX_CNIC_ULP_TYPE];
67
68 static int cnic_service_bnx2(void *, void *);
69 static int cnic_service_bnx2x(void *, void *);
70 static int cnic_ctl(void *, struct cnic_ctl_info *);
71
72 static struct cnic_ops cnic_bnx2_ops = {
73 .cnic_owner = THIS_MODULE,
74 .cnic_handler = cnic_service_bnx2,
75 .cnic_ctl = cnic_ctl,
76 };
77
78 static struct cnic_ops cnic_bnx2x_ops = {
79 .cnic_owner = THIS_MODULE,
80 .cnic_handler = cnic_service_bnx2x,
81 .cnic_ctl = cnic_ctl,
82 };
83
84 static void cnic_shutdown_rings(struct cnic_dev *);
85 static void cnic_init_rings(struct cnic_dev *);
86 static int cnic_cm_set_pg(struct cnic_sock *);
87
88 static int cnic_uio_open(struct uio_info *uinfo, struct inode *inode)
89 {
90 struct cnic_dev *dev = uinfo->priv;
91 struct cnic_local *cp = dev->cnic_priv;
92
93 if (!capable(CAP_NET_ADMIN))
94 return -EPERM;
95
96 if (cp->uio_dev != -1)
97 return -EBUSY;
98
99 rtnl_lock();
100 if (!test_bit(CNIC_F_CNIC_UP, &dev->flags)) {
101 rtnl_unlock();
102 return -ENODEV;
103 }
104
105 cp->uio_dev = iminor(inode);
106
107 cnic_init_rings(dev);
108 rtnl_unlock();
109
110 return 0;
111 }
112
113 static int cnic_uio_close(struct uio_info *uinfo, struct inode *inode)
114 {
115 struct cnic_dev *dev = uinfo->priv;
116 struct cnic_local *cp = dev->cnic_priv;
117
118 cnic_shutdown_rings(dev);
119
120 cp->uio_dev = -1;
121 return 0;
122 }
123
124 static inline void cnic_hold(struct cnic_dev *dev)
125 {
126 atomic_inc(&dev->ref_count);
127 }
128
129 static inline void cnic_put(struct cnic_dev *dev)
130 {
131 atomic_dec(&dev->ref_count);
132 }
133
134 static inline void csk_hold(struct cnic_sock *csk)
135 {
136 atomic_inc(&csk->ref_count);
137 }
138
139 static inline void csk_put(struct cnic_sock *csk)
140 {
141 atomic_dec(&csk->ref_count);
142 }
143
144 static struct cnic_dev *cnic_from_netdev(struct net_device *netdev)
145 {
146 struct cnic_dev *cdev;
147
148 read_lock(&cnic_dev_lock);
149 list_for_each_entry(cdev, &cnic_dev_list, list) {
150 if (netdev == cdev->netdev) {
151 cnic_hold(cdev);
152 read_unlock(&cnic_dev_lock);
153 return cdev;
154 }
155 }
156 read_unlock(&cnic_dev_lock);
157 return NULL;
158 }
159
160 static inline void ulp_get(struct cnic_ulp_ops *ulp_ops)
161 {
162 atomic_inc(&ulp_ops->ref_count);
163 }
164
165 static inline void ulp_put(struct cnic_ulp_ops *ulp_ops)
166 {
167 atomic_dec(&ulp_ops->ref_count);
168 }
169
170 static void cnic_ctx_wr(struct cnic_dev *dev, u32 cid_addr, u32 off, u32 val)
171 {
172 struct cnic_local *cp = dev->cnic_priv;
173 struct cnic_eth_dev *ethdev = cp->ethdev;
174 struct drv_ctl_info info;
175 struct drv_ctl_io *io = &info.data.io;
176
177 info.cmd = DRV_CTL_CTX_WR_CMD;
178 io->cid_addr = cid_addr;
179 io->offset = off;
180 io->data = val;
181 ethdev->drv_ctl(dev->netdev, &info);
182 }
183
184 static void cnic_ctx_tbl_wr(struct cnic_dev *dev, u32 off, dma_addr_t addr)
185 {
186 struct cnic_local *cp = dev->cnic_priv;
187 struct cnic_eth_dev *ethdev = cp->ethdev;
188 struct drv_ctl_info info;
189 struct drv_ctl_io *io = &info.data.io;
190
191 info.cmd = DRV_CTL_CTXTBL_WR_CMD;
192 io->offset = off;
193 io->dma_addr = addr;
194 ethdev->drv_ctl(dev->netdev, &info);
195 }
196
197 static void cnic_ring_ctl(struct cnic_dev *dev, u32 cid, u32 cl_id, int start)
198 {
199 struct cnic_local *cp = dev->cnic_priv;
200 struct cnic_eth_dev *ethdev = cp->ethdev;
201 struct drv_ctl_info info;
202 struct drv_ctl_l2_ring *ring = &info.data.ring;
203
204 if (start)
205 info.cmd = DRV_CTL_START_L2_CMD;
206 else
207 info.cmd = DRV_CTL_STOP_L2_CMD;
208
209 ring->cid = cid;
210 ring->client_id = cl_id;
211 ethdev->drv_ctl(dev->netdev, &info);
212 }
213
214 static void cnic_reg_wr_ind(struct cnic_dev *dev, u32 off, u32 val)
215 {
216 struct cnic_local *cp = dev->cnic_priv;
217 struct cnic_eth_dev *ethdev = cp->ethdev;
218 struct drv_ctl_info info;
219 struct drv_ctl_io *io = &info.data.io;
220
221 info.cmd = DRV_CTL_IO_WR_CMD;
222 io->offset = off;
223 io->data = val;
224 ethdev->drv_ctl(dev->netdev, &info);
225 }
226
227 static u32 cnic_reg_rd_ind(struct cnic_dev *dev, u32 off)
228 {
229 struct cnic_local *cp = dev->cnic_priv;
230 struct cnic_eth_dev *ethdev = cp->ethdev;
231 struct drv_ctl_info info;
232 struct drv_ctl_io *io = &info.data.io;
233
234 info.cmd = DRV_CTL_IO_RD_CMD;
235 io->offset = off;
236 ethdev->drv_ctl(dev->netdev, &info);
237 return io->data;
238 }
239
240 static int cnic_in_use(struct cnic_sock *csk)
241 {
242 return test_bit(SK_F_INUSE, &csk->flags);
243 }
244
245 static void cnic_kwq_completion(struct cnic_dev *dev, u32 count)
246 {
247 struct cnic_local *cp = dev->cnic_priv;
248 struct cnic_eth_dev *ethdev = cp->ethdev;
249 struct drv_ctl_info info;
250
251 info.cmd = DRV_CTL_COMPLETION_CMD;
252 info.data.comp.comp_count = count;
253 ethdev->drv_ctl(dev->netdev, &info);
254 }
255
256 static int cnic_get_l5_cid(struct cnic_local *cp, u32 cid, u32 *l5_cid)
257 {
258 u32 i;
259
260 for (i = 0; i < cp->max_cid_space; i++) {
261 if (cp->ctx_tbl[i].cid == cid) {
262 *l5_cid = i;
263 return 0;
264 }
265 }
266 return -EINVAL;
267 }
268
269 static int cnic_send_nlmsg(struct cnic_local *cp, u32 type,
270 struct cnic_sock *csk)
271 {
272 struct iscsi_path path_req;
273 char *buf = NULL;
274 u16 len = 0;
275 u32 msg_type = ISCSI_KEVENT_IF_DOWN;
276 struct cnic_ulp_ops *ulp_ops;
277
278 if (cp->uio_dev == -1)
279 return -ENODEV;
280
281 if (csk) {
282 len = sizeof(path_req);
283 buf = (char *) &path_req;
284 memset(&path_req, 0, len);
285
286 msg_type = ISCSI_KEVENT_PATH_REQ;
287 path_req.handle = (u64) csk->l5_cid;
288 if (test_bit(SK_F_IPV6, &csk->flags)) {
289 memcpy(&path_req.dst.v6_addr, &csk->dst_ip[0],
290 sizeof(struct in6_addr));
291 path_req.ip_addr_len = 16;
292 } else {
293 memcpy(&path_req.dst.v4_addr, &csk->dst_ip[0],
294 sizeof(struct in_addr));
295 path_req.ip_addr_len = 4;
296 }
297 path_req.vlan_id = csk->vlan_id;
298 path_req.pmtu = csk->mtu;
299 }
300
301 rcu_read_lock();
302 ulp_ops = rcu_dereference(cnic_ulp_tbl[CNIC_ULP_ISCSI]);
303 if (ulp_ops)
304 ulp_ops->iscsi_nl_send_msg(cp->dev, msg_type, buf, len);
305 rcu_read_unlock();
306 return 0;
307 }
308
309 static int cnic_iscsi_nl_msg_recv(struct cnic_dev *dev, u32 msg_type,
310 char *buf, u16 len)
311 {
312 int rc = -EINVAL;
313
314 switch (msg_type) {
315 case ISCSI_UEVENT_PATH_UPDATE: {
316 struct cnic_local *cp;
317 u32 l5_cid;
318 struct cnic_sock *csk;
319 struct iscsi_path *path_resp;
320
321 if (len < sizeof(*path_resp))
322 break;
323
324 path_resp = (struct iscsi_path *) buf;
325 cp = dev->cnic_priv;
326 l5_cid = (u32) path_resp->handle;
327 if (l5_cid >= MAX_CM_SK_TBL_SZ)
328 break;
329
330 rcu_read_lock();
331 if (!rcu_dereference(cp->ulp_ops[CNIC_ULP_L4])) {
332 rc = -ENODEV;
333 rcu_read_unlock();
334 break;
335 }
336 csk = &cp->csk_tbl[l5_cid];
337 csk_hold(csk);
338 if (cnic_in_use(csk)) {
339 memcpy(csk->ha, path_resp->mac_addr, 6);
340 if (test_bit(SK_F_IPV6, &csk->flags))
341 memcpy(&csk->src_ip[0], &path_resp->src.v6_addr,
342 sizeof(struct in6_addr));
343 else
344 memcpy(&csk->src_ip[0], &path_resp->src.v4_addr,
345 sizeof(struct in_addr));
346 if (is_valid_ether_addr(csk->ha))
347 cnic_cm_set_pg(csk);
348 }
349 csk_put(csk);
350 rcu_read_unlock();
351 rc = 0;
352 }
353 }
354
355 return rc;
356 }
357
358 static int cnic_offld_prep(struct cnic_sock *csk)
359 {
360 if (test_and_set_bit(SK_F_OFFLD_SCHED, &csk->flags))
361 return 0;
362
363 if (!test_bit(SK_F_CONNECT_START, &csk->flags)) {
364 clear_bit(SK_F_OFFLD_SCHED, &csk->flags);
365 return 0;
366 }
367
368 return 1;
369 }
370
371 static int cnic_close_prep(struct cnic_sock *csk)
372 {
373 clear_bit(SK_F_CONNECT_START, &csk->flags);
374 smp_mb__after_clear_bit();
375
376 if (test_and_clear_bit(SK_F_OFFLD_COMPLETE, &csk->flags)) {
377 while (test_and_set_bit(SK_F_OFFLD_SCHED, &csk->flags))
378 msleep(1);
379
380 return 1;
381 }
382 return 0;
383 }
384
385 static int cnic_abort_prep(struct cnic_sock *csk)
386 {
387 clear_bit(SK_F_CONNECT_START, &csk->flags);
388 smp_mb__after_clear_bit();
389
390 while (test_and_set_bit(SK_F_OFFLD_SCHED, &csk->flags))
391 msleep(1);
392
393 if (test_and_clear_bit(SK_F_OFFLD_COMPLETE, &csk->flags)) {
394 csk->state = L4_KCQE_OPCODE_VALUE_RESET_COMP;
395 return 1;
396 }
397
398 return 0;
399 }
400
401 static void cnic_uio_stop(void)
402 {
403 struct cnic_dev *dev;
404
405 read_lock(&cnic_dev_lock);
406 list_for_each_entry(dev, &cnic_dev_list, list) {
407 struct cnic_local *cp = dev->cnic_priv;
408
409 if (cp->cnic_uinfo)
410 cnic_send_nlmsg(cp, ISCSI_KEVENT_IF_DOWN, NULL);
411 }
412 read_unlock(&cnic_dev_lock);
413 }
414
415 int cnic_register_driver(int ulp_type, struct cnic_ulp_ops *ulp_ops)
416 {
417 struct cnic_dev *dev;
418
419 if (ulp_type < 0 || ulp_type >= MAX_CNIC_ULP_TYPE) {
420 pr_err("%s: Bad type %d\n", __func__, ulp_type);
421 return -EINVAL;
422 }
423 mutex_lock(&cnic_lock);
424 if (cnic_ulp_tbl[ulp_type]) {
425 pr_err("%s: Type %d has already been registered\n",
426 __func__, ulp_type);
427 mutex_unlock(&cnic_lock);
428 return -EBUSY;
429 }
430
431 read_lock(&cnic_dev_lock);
432 list_for_each_entry(dev, &cnic_dev_list, list) {
433 struct cnic_local *cp = dev->cnic_priv;
434
435 clear_bit(ULP_F_INIT, &cp->ulp_flags[ulp_type]);
436 }
437 read_unlock(&cnic_dev_lock);
438
439 atomic_set(&ulp_ops->ref_count, 0);
440 rcu_assign_pointer(cnic_ulp_tbl[ulp_type], ulp_ops);
441 mutex_unlock(&cnic_lock);
442
443 /* Prevent race conditions with netdev_event */
444 rtnl_lock();
445 read_lock(&cnic_dev_lock);
446 list_for_each_entry(dev, &cnic_dev_list, list) {
447 struct cnic_local *cp = dev->cnic_priv;
448
449 if (!test_and_set_bit(ULP_F_INIT, &cp->ulp_flags[ulp_type]))
450 ulp_ops->cnic_init(dev);
451 }
452 read_unlock(&cnic_dev_lock);
453 rtnl_unlock();
454
455 return 0;
456 }
457
458 int cnic_unregister_driver(int ulp_type)
459 {
460 struct cnic_dev *dev;
461 struct cnic_ulp_ops *ulp_ops;
462 int i = 0;
463
464 if (ulp_type < 0 || ulp_type >= MAX_CNIC_ULP_TYPE) {
465 pr_err("%s: Bad type %d\n", __func__, ulp_type);
466 return -EINVAL;
467 }
468 mutex_lock(&cnic_lock);
469 ulp_ops = cnic_ulp_tbl[ulp_type];
470 if (!ulp_ops) {
471 pr_err("%s: Type %d has not been registered\n",
472 __func__, ulp_type);
473 goto out_unlock;
474 }
475 read_lock(&cnic_dev_lock);
476 list_for_each_entry(dev, &cnic_dev_list, list) {
477 struct cnic_local *cp = dev->cnic_priv;
478
479 if (rcu_dereference(cp->ulp_ops[ulp_type])) {
480 pr_err("%s: Type %d still has devices registered\n",
481 __func__, ulp_type);
482 read_unlock(&cnic_dev_lock);
483 goto out_unlock;
484 }
485 }
486 read_unlock(&cnic_dev_lock);
487
488 if (ulp_type == CNIC_ULP_ISCSI)
489 cnic_uio_stop();
490
491 rcu_assign_pointer(cnic_ulp_tbl[ulp_type], NULL);
492
493 mutex_unlock(&cnic_lock);
494 synchronize_rcu();
495 while ((atomic_read(&ulp_ops->ref_count) != 0) && (i < 20)) {
496 msleep(100);
497 i++;
498 }
499
500 if (atomic_read(&ulp_ops->ref_count) != 0)
501 netdev_warn(dev->netdev, "Failed waiting for ref count to go to zero\n");
502 return 0;
503
504 out_unlock:
505 mutex_unlock(&cnic_lock);
506 return -EINVAL;
507 }
508
509 static int cnic_start_hw(struct cnic_dev *);
510 static void cnic_stop_hw(struct cnic_dev *);
511
512 static int cnic_register_device(struct cnic_dev *dev, int ulp_type,
513 void *ulp_ctx)
514 {
515 struct cnic_local *cp = dev->cnic_priv;
516 struct cnic_ulp_ops *ulp_ops;
517
518 if (ulp_type < 0 || ulp_type >= MAX_CNIC_ULP_TYPE) {
519 pr_err("%s: Bad type %d\n", __func__, ulp_type);
520 return -EINVAL;
521 }
522 mutex_lock(&cnic_lock);
523 if (cnic_ulp_tbl[ulp_type] == NULL) {
524 pr_err("%s: Driver with type %d has not been registered\n",
525 __func__, ulp_type);
526 mutex_unlock(&cnic_lock);
527 return -EAGAIN;
528 }
529 if (rcu_dereference(cp->ulp_ops[ulp_type])) {
530 pr_err("%s: Type %d has already been registered to this device\n",
531 __func__, ulp_type);
532 mutex_unlock(&cnic_lock);
533 return -EBUSY;
534 }
535
536 clear_bit(ULP_F_START, &cp->ulp_flags[ulp_type]);
537 cp->ulp_handle[ulp_type] = ulp_ctx;
538 ulp_ops = cnic_ulp_tbl[ulp_type];
539 rcu_assign_pointer(cp->ulp_ops[ulp_type], ulp_ops);
540 cnic_hold(dev);
541
542 if (test_bit(CNIC_F_CNIC_UP, &dev->flags))
543 if (!test_and_set_bit(ULP_F_START, &cp->ulp_flags[ulp_type]))
544 ulp_ops->cnic_start(cp->ulp_handle[ulp_type]);
545
546 mutex_unlock(&cnic_lock);
547
548 return 0;
549
550 }
551 EXPORT_SYMBOL(cnic_register_driver);
552
553 static int cnic_unregister_device(struct cnic_dev *dev, int ulp_type)
554 {
555 struct cnic_local *cp = dev->cnic_priv;
556 int i = 0;
557
558 if (ulp_type < 0 || ulp_type >= MAX_CNIC_ULP_TYPE) {
559 pr_err("%s: Bad type %d\n", __func__, ulp_type);
560 return -EINVAL;
561 }
562 mutex_lock(&cnic_lock);
563 if (rcu_dereference(cp->ulp_ops[ulp_type])) {
564 rcu_assign_pointer(cp->ulp_ops[ulp_type], NULL);
565 cnic_put(dev);
566 } else {
567 pr_err("%s: device not registered to this ulp type %d\n",
568 __func__, ulp_type);
569 mutex_unlock(&cnic_lock);
570 return -EINVAL;
571 }
572 mutex_unlock(&cnic_lock);
573
574 synchronize_rcu();
575
576 while (test_bit(ULP_F_CALL_PENDING, &cp->ulp_flags[ulp_type]) &&
577 i < 20) {
578 msleep(100);
579 i++;
580 }
581 if (test_bit(ULP_F_CALL_PENDING, &cp->ulp_flags[ulp_type]))
582 netdev_warn(dev->netdev, "Failed waiting for ULP up call to complete\n");
583
584 return 0;
585 }
586 EXPORT_SYMBOL(cnic_unregister_driver);
587
588 static int cnic_init_id_tbl(struct cnic_id_tbl *id_tbl, u32 size, u32 start_id)
589 {
590 id_tbl->start = start_id;
591 id_tbl->max = size;
592 id_tbl->next = 0;
593 spin_lock_init(&id_tbl->lock);
594 id_tbl->table = kzalloc(DIV_ROUND_UP(size, 32) * 4, GFP_KERNEL);
595 if (!id_tbl->table)
596 return -ENOMEM;
597
598 return 0;
599 }
600
601 static void cnic_free_id_tbl(struct cnic_id_tbl *id_tbl)
602 {
603 kfree(id_tbl->table);
604 id_tbl->table = NULL;
605 }
606
607 static int cnic_alloc_id(struct cnic_id_tbl *id_tbl, u32 id)
608 {
609 int ret = -1;
610
611 id -= id_tbl->start;
612 if (id >= id_tbl->max)
613 return ret;
614
615 spin_lock(&id_tbl->lock);
616 if (!test_bit(id, id_tbl->table)) {
617 set_bit(id, id_tbl->table);
618 ret = 0;
619 }
620 spin_unlock(&id_tbl->lock);
621 return ret;
622 }
623
624 /* Returns -1 if not successful */
625 static u32 cnic_alloc_new_id(struct cnic_id_tbl *id_tbl)
626 {
627 u32 id;
628
629 spin_lock(&id_tbl->lock);
630 id = find_next_zero_bit(id_tbl->table, id_tbl->max, id_tbl->next);
631 if (id >= id_tbl->max) {
632 id = -1;
633 if (id_tbl->next != 0) {
634 id = find_first_zero_bit(id_tbl->table, id_tbl->next);
635 if (id >= id_tbl->next)
636 id = -1;
637 }
638 }
639
640 if (id < id_tbl->max) {
641 set_bit(id, id_tbl->table);
642 id_tbl->next = (id + 1) & (id_tbl->max - 1);
643 id += id_tbl->start;
644 }
645
646 spin_unlock(&id_tbl->lock);
647
648 return id;
649 }
650
651 static void cnic_free_id(struct cnic_id_tbl *id_tbl, u32 id)
652 {
653 if (id == -1)
654 return;
655
656 id -= id_tbl->start;
657 if (id >= id_tbl->max)
658 return;
659
660 clear_bit(id, id_tbl->table);
661 }
662
663 static void cnic_free_dma(struct cnic_dev *dev, struct cnic_dma *dma)
664 {
665 int i;
666
667 if (!dma->pg_arr)
668 return;
669
670 for (i = 0; i < dma->num_pages; i++) {
671 if (dma->pg_arr[i]) {
672 dma_free_coherent(&dev->pcidev->dev, BCM_PAGE_SIZE,
673 dma->pg_arr[i], dma->pg_map_arr[i]);
674 dma->pg_arr[i] = NULL;
675 }
676 }
677 if (dma->pgtbl) {
678 dma_free_coherent(&dev->pcidev->dev, dma->pgtbl_size,
679 dma->pgtbl, dma->pgtbl_map);
680 dma->pgtbl = NULL;
681 }
682 kfree(dma->pg_arr);
683 dma->pg_arr = NULL;
684 dma->num_pages = 0;
685 }
686
687 static void cnic_setup_page_tbl(struct cnic_dev *dev, struct cnic_dma *dma)
688 {
689 int i;
690 u32 *page_table = dma->pgtbl;
691
692 for (i = 0; i < dma->num_pages; i++) {
693 /* Each entry needs to be in big endian format. */
694 *page_table = (u32) ((u64) dma->pg_map_arr[i] >> 32);
695 page_table++;
696 *page_table = (u32) dma->pg_map_arr[i];
697 page_table++;
698 }
699 }
700
701 static void cnic_setup_page_tbl_le(struct cnic_dev *dev, struct cnic_dma *dma)
702 {
703 int i;
704 u32 *page_table = dma->pgtbl;
705
706 for (i = 0; i < dma->num_pages; i++) {
707 /* Each entry needs to be in little endian format. */
708 *page_table = dma->pg_map_arr[i] & 0xffffffff;
709 page_table++;
710 *page_table = (u32) ((u64) dma->pg_map_arr[i] >> 32);
711 page_table++;
712 }
713 }
714
715 static int cnic_alloc_dma(struct cnic_dev *dev, struct cnic_dma *dma,
716 int pages, int use_pg_tbl)
717 {
718 int i, size;
719 struct cnic_local *cp = dev->cnic_priv;
720
721 size = pages * (sizeof(void *) + sizeof(dma_addr_t));
722 dma->pg_arr = kzalloc(size, GFP_ATOMIC);
723 if (dma->pg_arr == NULL)
724 return -ENOMEM;
725
726 dma->pg_map_arr = (dma_addr_t *) (dma->pg_arr + pages);
727 dma->num_pages = pages;
728
729 for (i = 0; i < pages; i++) {
730 dma->pg_arr[i] = dma_alloc_coherent(&dev->pcidev->dev,
731 BCM_PAGE_SIZE,
732 &dma->pg_map_arr[i],
733 GFP_ATOMIC);
734 if (dma->pg_arr[i] == NULL)
735 goto error;
736 }
737 if (!use_pg_tbl)
738 return 0;
739
740 dma->pgtbl_size = ((pages * 8) + BCM_PAGE_SIZE - 1) &
741 ~(BCM_PAGE_SIZE - 1);
742 dma->pgtbl = dma_alloc_coherent(&dev->pcidev->dev, dma->pgtbl_size,
743 &dma->pgtbl_map, GFP_ATOMIC);
744 if (dma->pgtbl == NULL)
745 goto error;
746
747 cp->setup_pgtbl(dev, dma);
748
749 return 0;
750
751 error:
752 cnic_free_dma(dev, dma);
753 return -ENOMEM;
754 }
755
756 static void cnic_free_context(struct cnic_dev *dev)
757 {
758 struct cnic_local *cp = dev->cnic_priv;
759 int i;
760
761 for (i = 0; i < cp->ctx_blks; i++) {
762 if (cp->ctx_arr[i].ctx) {
763 dma_free_coherent(&dev->pcidev->dev, cp->ctx_blk_size,
764 cp->ctx_arr[i].ctx,
765 cp->ctx_arr[i].mapping);
766 cp->ctx_arr[i].ctx = NULL;
767 }
768 }
769 }
770
771 static void cnic_free_resc(struct cnic_dev *dev)
772 {
773 struct cnic_local *cp = dev->cnic_priv;
774 int i = 0;
775
776 if (cp->cnic_uinfo) {
777 while (cp->uio_dev != -1 && i < 15) {
778 msleep(100);
779 i++;
780 }
781 uio_unregister_device(cp->cnic_uinfo);
782 kfree(cp->cnic_uinfo);
783 cp->cnic_uinfo = NULL;
784 }
785
786 if (cp->l2_buf) {
787 dma_free_coherent(&dev->pcidev->dev, cp->l2_buf_size,
788 cp->l2_buf, cp->l2_buf_map);
789 cp->l2_buf = NULL;
790 }
791
792 if (cp->l2_ring) {
793 dma_free_coherent(&dev->pcidev->dev, cp->l2_ring_size,
794 cp->l2_ring, cp->l2_ring_map);
795 cp->l2_ring = NULL;
796 }
797
798 cnic_free_context(dev);
799 kfree(cp->ctx_arr);
800 cp->ctx_arr = NULL;
801 cp->ctx_blks = 0;
802
803 cnic_free_dma(dev, &cp->gbl_buf_info);
804 cnic_free_dma(dev, &cp->conn_buf_info);
805 cnic_free_dma(dev, &cp->kwq_info);
806 cnic_free_dma(dev, &cp->kwq_16_data_info);
807 cnic_free_dma(dev, &cp->kcq_info);
808 kfree(cp->iscsi_tbl);
809 cp->iscsi_tbl = NULL;
810 kfree(cp->ctx_tbl);
811 cp->ctx_tbl = NULL;
812
813 cnic_free_id_tbl(&cp->cid_tbl);
814 }
815
816 static int cnic_alloc_context(struct cnic_dev *dev)
817 {
818 struct cnic_local *cp = dev->cnic_priv;
819
820 if (CHIP_NUM(cp) == CHIP_NUM_5709) {
821 int i, k, arr_size;
822
823 cp->ctx_blk_size = BCM_PAGE_SIZE;
824 cp->cids_per_blk = BCM_PAGE_SIZE / 128;
825 arr_size = BNX2_MAX_CID / cp->cids_per_blk *
826 sizeof(struct cnic_ctx);
827 cp->ctx_arr = kzalloc(arr_size, GFP_KERNEL);
828 if (cp->ctx_arr == NULL)
829 return -ENOMEM;
830
831 k = 0;
832 for (i = 0; i < 2; i++) {
833 u32 j, reg, off, lo, hi;
834
835 if (i == 0)
836 off = BNX2_PG_CTX_MAP;
837 else
838 off = BNX2_ISCSI_CTX_MAP;
839
840 reg = cnic_reg_rd_ind(dev, off);
841 lo = reg >> 16;
842 hi = reg & 0xffff;
843 for (j = lo; j < hi; j += cp->cids_per_blk, k++)
844 cp->ctx_arr[k].cid = j;
845 }
846
847 cp->ctx_blks = k;
848 if (cp->ctx_blks >= (BNX2_MAX_CID / cp->cids_per_blk)) {
849 cp->ctx_blks = 0;
850 return -ENOMEM;
851 }
852
853 for (i = 0; i < cp->ctx_blks; i++) {
854 cp->ctx_arr[i].ctx =
855 dma_alloc_coherent(&dev->pcidev->dev,
856 BCM_PAGE_SIZE,
857 &cp->ctx_arr[i].mapping,
858 GFP_KERNEL);
859 if (cp->ctx_arr[i].ctx == NULL)
860 return -ENOMEM;
861 }
862 }
863 return 0;
864 }
865
866 static int cnic_alloc_l2_rings(struct cnic_dev *dev, int pages)
867 {
868 struct cnic_local *cp = dev->cnic_priv;
869
870 cp->l2_ring_size = pages * BCM_PAGE_SIZE;
871 cp->l2_ring = dma_alloc_coherent(&dev->pcidev->dev, cp->l2_ring_size,
872 &cp->l2_ring_map,
873 GFP_KERNEL | __GFP_COMP);
874 if (!cp->l2_ring)
875 return -ENOMEM;
876
877 cp->l2_buf_size = (cp->l2_rx_ring_size + 1) * cp->l2_single_buf_size;
878 cp->l2_buf_size = PAGE_ALIGN(cp->l2_buf_size);
879 cp->l2_buf = dma_alloc_coherent(&dev->pcidev->dev, cp->l2_buf_size,
880 &cp->l2_buf_map,
881 GFP_KERNEL | __GFP_COMP);
882 if (!cp->l2_buf)
883 return -ENOMEM;
884
885 return 0;
886 }
887
888 static int cnic_alloc_uio(struct cnic_dev *dev) {
889 struct cnic_local *cp = dev->cnic_priv;
890 struct uio_info *uinfo;
891 int ret;
892
893 uinfo = kzalloc(sizeof(*uinfo), GFP_ATOMIC);
894 if (!uinfo)
895 return -ENOMEM;
896
897 uinfo->mem[0].addr = dev->netdev->base_addr;
898 uinfo->mem[0].internal_addr = dev->regview;
899 uinfo->mem[0].size = dev->netdev->mem_end - dev->netdev->mem_start;
900 uinfo->mem[0].memtype = UIO_MEM_PHYS;
901
902 if (test_bit(CNIC_F_BNX2_CLASS, &dev->flags)) {
903 uinfo->mem[1].addr = (unsigned long) cp->status_blk.gen &
904 PAGE_MASK;
905 if (cp->ethdev->drv_state & CNIC_DRV_STATE_USING_MSIX)
906 uinfo->mem[1].size = BNX2_SBLK_MSIX_ALIGN_SIZE * 9;
907 else
908 uinfo->mem[1].size = BNX2_SBLK_MSIX_ALIGN_SIZE;
909
910 uinfo->name = "bnx2_cnic";
911 } else if (test_bit(CNIC_F_BNX2X_CLASS, &dev->flags)) {
912 uinfo->mem[1].addr = (unsigned long) cp->bnx2x_def_status_blk &
913 PAGE_MASK;
914 uinfo->mem[1].size = sizeof(struct host_def_status_block);
915
916 uinfo->name = "bnx2x_cnic";
917 }
918
919 uinfo->mem[1].memtype = UIO_MEM_LOGICAL;
920
921 uinfo->mem[2].addr = (unsigned long) cp->l2_ring;
922 uinfo->mem[2].size = cp->l2_ring_size;
923 uinfo->mem[2].memtype = UIO_MEM_LOGICAL;
924
925 uinfo->mem[3].addr = (unsigned long) cp->l2_buf;
926 uinfo->mem[3].size = cp->l2_buf_size;
927 uinfo->mem[3].memtype = UIO_MEM_LOGICAL;
928
929 uinfo->version = CNIC_MODULE_VERSION;
930 uinfo->irq = UIO_IRQ_CUSTOM;
931
932 uinfo->open = cnic_uio_open;
933 uinfo->release = cnic_uio_close;
934
935 uinfo->priv = dev;
936
937 ret = uio_register_device(&dev->pcidev->dev, uinfo);
938 if (ret) {
939 kfree(uinfo);
940 return ret;
941 }
942
943 cp->cnic_uinfo = uinfo;
944 return 0;
945 }
946
947 static int cnic_alloc_bnx2_resc(struct cnic_dev *dev)
948 {
949 struct cnic_local *cp = dev->cnic_priv;
950 int ret;
951
952 ret = cnic_alloc_dma(dev, &cp->kwq_info, KWQ_PAGE_CNT, 1);
953 if (ret)
954 goto error;
955 cp->kwq = (struct kwqe **) cp->kwq_info.pg_arr;
956
957 ret = cnic_alloc_dma(dev, &cp->kcq_info, KCQ_PAGE_CNT, 1);
958 if (ret)
959 goto error;
960 cp->kcq = (struct kcqe **) cp->kcq_info.pg_arr;
961
962 ret = cnic_alloc_context(dev);
963 if (ret)
964 goto error;
965
966 ret = cnic_alloc_l2_rings(dev, 2);
967 if (ret)
968 goto error;
969
970 ret = cnic_alloc_uio(dev);
971 if (ret)
972 goto error;
973
974 return 0;
975
976 error:
977 cnic_free_resc(dev);
978 return ret;
979 }
980
981 static int cnic_alloc_bnx2x_context(struct cnic_dev *dev)
982 {
983 struct cnic_local *cp = dev->cnic_priv;
984 int ctx_blk_size = cp->ethdev->ctx_blk_size;
985 int total_mem, blks, i;
986
987 total_mem = BNX2X_CONTEXT_MEM_SIZE * cp->max_cid_space;
988 blks = total_mem / ctx_blk_size;
989 if (total_mem % ctx_blk_size)
990 blks++;
991
992 if (blks > cp->ethdev->ctx_tbl_len)
993 return -ENOMEM;
994
995 cp->ctx_arr = kzalloc(blks * sizeof(struct cnic_ctx), GFP_KERNEL);
996 if (cp->ctx_arr == NULL)
997 return -ENOMEM;
998
999 cp->ctx_blks = blks;
1000 cp->ctx_blk_size = ctx_blk_size;
1001 if (BNX2X_CHIP_IS_E1H(cp->chip_id))
1002 cp->ctx_align = 0;
1003 else
1004 cp->ctx_align = ctx_blk_size;
1005
1006 cp->cids_per_blk = ctx_blk_size / BNX2X_CONTEXT_MEM_SIZE;
1007
1008 for (i = 0; i < blks; i++) {
1009 cp->ctx_arr[i].ctx =
1010 dma_alloc_coherent(&dev->pcidev->dev, cp->ctx_blk_size,
1011 &cp->ctx_arr[i].mapping,
1012 GFP_KERNEL);
1013 if (cp->ctx_arr[i].ctx == NULL)
1014 return -ENOMEM;
1015
1016 if (cp->ctx_align && cp->ctx_blk_size == ctx_blk_size) {
1017 if (cp->ctx_arr[i].mapping & (cp->ctx_align - 1)) {
1018 cnic_free_context(dev);
1019 cp->ctx_blk_size += cp->ctx_align;
1020 i = -1;
1021 continue;
1022 }
1023 }
1024 }
1025 return 0;
1026 }
1027
1028 static int cnic_alloc_bnx2x_resc(struct cnic_dev *dev)
1029 {
1030 struct cnic_local *cp = dev->cnic_priv;
1031 struct cnic_eth_dev *ethdev = cp->ethdev;
1032 u32 start_cid = ethdev->starting_cid;
1033 int i, j, n, ret, pages;
1034 struct cnic_dma *kwq_16_dma = &cp->kwq_16_data_info;
1035
1036 cp->max_cid_space = MAX_ISCSI_TBL_SZ;
1037 cp->iscsi_start_cid = start_cid;
1038 if (start_cid < BNX2X_ISCSI_START_CID) {
1039 u32 delta = BNX2X_ISCSI_START_CID - start_cid;
1040
1041 cp->iscsi_start_cid = BNX2X_ISCSI_START_CID;
1042 cp->max_cid_space += delta;
1043 }
1044
1045 cp->iscsi_tbl = kzalloc(sizeof(struct cnic_iscsi) * MAX_ISCSI_TBL_SZ,
1046 GFP_KERNEL);
1047 if (!cp->iscsi_tbl)
1048 goto error;
1049
1050 cp->ctx_tbl = kzalloc(sizeof(struct cnic_context) *
1051 cp->max_cid_space, GFP_KERNEL);
1052 if (!cp->ctx_tbl)
1053 goto error;
1054
1055 for (i = 0; i < MAX_ISCSI_TBL_SZ; i++) {
1056 cp->ctx_tbl[i].proto.iscsi = &cp->iscsi_tbl[i];
1057 cp->ctx_tbl[i].ulp_proto_id = CNIC_ULP_ISCSI;
1058 }
1059
1060 pages = PAGE_ALIGN(cp->max_cid_space * CNIC_KWQ16_DATA_SIZE) /
1061 PAGE_SIZE;
1062
1063 ret = cnic_alloc_dma(dev, kwq_16_dma, pages, 0);
1064 if (ret)
1065 return -ENOMEM;
1066
1067 n = PAGE_SIZE / CNIC_KWQ16_DATA_SIZE;
1068 for (i = 0, j = 0; i < cp->max_cid_space; i++) {
1069 long off = CNIC_KWQ16_DATA_SIZE * (i % n);
1070
1071 cp->ctx_tbl[i].kwqe_data = kwq_16_dma->pg_arr[j] + off;
1072 cp->ctx_tbl[i].kwqe_data_mapping = kwq_16_dma->pg_map_arr[j] +
1073 off;
1074
1075 if ((i % n) == (n - 1))
1076 j++;
1077 }
1078
1079 ret = cnic_alloc_dma(dev, &cp->kcq_info, KCQ_PAGE_CNT, 0);
1080 if (ret)
1081 goto error;
1082 cp->kcq = (struct kcqe **) cp->kcq_info.pg_arr;
1083
1084 for (i = 0; i < KCQ_PAGE_CNT; i++) {
1085 struct bnx2x_bd_chain_next *next =
1086 (struct bnx2x_bd_chain_next *)
1087 &cp->kcq[i][MAX_KCQE_CNT];
1088 int j = i + 1;
1089
1090 if (j >= KCQ_PAGE_CNT)
1091 j = 0;
1092 next->addr_hi = (u64) cp->kcq_info.pg_map_arr[j] >> 32;
1093 next->addr_lo = cp->kcq_info.pg_map_arr[j] & 0xffffffff;
1094 }
1095
1096 pages = PAGE_ALIGN(BNX2X_ISCSI_NUM_CONNECTIONS *
1097 BNX2X_ISCSI_CONN_BUF_SIZE) / PAGE_SIZE;
1098 ret = cnic_alloc_dma(dev, &cp->conn_buf_info, pages, 1);
1099 if (ret)
1100 goto error;
1101
1102 pages = PAGE_ALIGN(BNX2X_ISCSI_GLB_BUF_SIZE) / PAGE_SIZE;
1103 ret = cnic_alloc_dma(dev, &cp->gbl_buf_info, pages, 0);
1104 if (ret)
1105 goto error;
1106
1107 ret = cnic_alloc_bnx2x_context(dev);
1108 if (ret)
1109 goto error;
1110
1111 cp->bnx2x_def_status_blk = cp->ethdev->irq_arr[1].status_blk;
1112
1113 memset(cp->status_blk.bnx2x, 0, sizeof(*cp->status_blk.bnx2x));
1114
1115 cp->l2_rx_ring_size = 15;
1116
1117 ret = cnic_alloc_l2_rings(dev, 4);
1118 if (ret)
1119 goto error;
1120
1121 ret = cnic_alloc_uio(dev);
1122 if (ret)
1123 goto error;
1124
1125 return 0;
1126
1127 error:
1128 cnic_free_resc(dev);
1129 return -ENOMEM;
1130 }
1131
1132 static inline u32 cnic_kwq_avail(struct cnic_local *cp)
1133 {
1134 return cp->max_kwq_idx -
1135 ((cp->kwq_prod_idx - cp->kwq_con_idx) & cp->max_kwq_idx);
1136 }
1137
1138 static int cnic_submit_bnx2_kwqes(struct cnic_dev *dev, struct kwqe *wqes[],
1139 u32 num_wqes)
1140 {
1141 struct cnic_local *cp = dev->cnic_priv;
1142 struct kwqe *prod_qe;
1143 u16 prod, sw_prod, i;
1144
1145 if (!test_bit(CNIC_F_CNIC_UP, &dev->flags))
1146 return -EAGAIN; /* bnx2 is down */
1147
1148 spin_lock_bh(&cp->cnic_ulp_lock);
1149 if (num_wqes > cnic_kwq_avail(cp) &&
1150 !test_bit(CNIC_LCL_FL_KWQ_INIT, &cp->cnic_local_flags)) {
1151 spin_unlock_bh(&cp->cnic_ulp_lock);
1152 return -EAGAIN;
1153 }
1154
1155 clear_bit(CNIC_LCL_FL_KWQ_INIT, &cp->cnic_local_flags);
1156
1157 prod = cp->kwq_prod_idx;
1158 sw_prod = prod & MAX_KWQ_IDX;
1159 for (i = 0; i < num_wqes; i++) {
1160 prod_qe = &cp->kwq[KWQ_PG(sw_prod)][KWQ_IDX(sw_prod)];
1161 memcpy(prod_qe, wqes[i], sizeof(struct kwqe));
1162 prod++;
1163 sw_prod = prod & MAX_KWQ_IDX;
1164 }
1165 cp->kwq_prod_idx = prod;
1166
1167 CNIC_WR16(dev, cp->kwq_io_addr, cp->kwq_prod_idx);
1168
1169 spin_unlock_bh(&cp->cnic_ulp_lock);
1170 return 0;
1171 }
1172
1173 static void *cnic_get_kwqe_16_data(struct cnic_local *cp, u32 l5_cid,
1174 union l5cm_specific_data *l5_data)
1175 {
1176 struct cnic_context *ctx = &cp->ctx_tbl[l5_cid];
1177 dma_addr_t map;
1178
1179 map = ctx->kwqe_data_mapping;
1180 l5_data->phy_address.lo = (u64) map & 0xffffffff;
1181 l5_data->phy_address.hi = (u64) map >> 32;
1182 return ctx->kwqe_data;
1183 }
1184
1185 static int cnic_submit_kwqe_16(struct cnic_dev *dev, u32 cmd, u32 cid,
1186 u32 type, union l5cm_specific_data *l5_data)
1187 {
1188 struct cnic_local *cp = dev->cnic_priv;
1189 struct l5cm_spe kwqe;
1190 struct kwqe_16 *kwq[1];
1191 int ret;
1192
1193 kwqe.hdr.conn_and_cmd_data =
1194 cpu_to_le32(((cmd << SPE_HDR_CMD_ID_SHIFT) |
1195 BNX2X_HW_CID(cid, cp->func)));
1196 kwqe.hdr.type = cpu_to_le16(type);
1197 kwqe.hdr.reserved = 0;
1198 kwqe.data.phy_address.lo = cpu_to_le32(l5_data->phy_address.lo);
1199 kwqe.data.phy_address.hi = cpu_to_le32(l5_data->phy_address.hi);
1200
1201 kwq[0] = (struct kwqe_16 *) &kwqe;
1202
1203 spin_lock_bh(&cp->cnic_ulp_lock);
1204 ret = cp->ethdev->drv_submit_kwqes_16(dev->netdev, kwq, 1);
1205 spin_unlock_bh(&cp->cnic_ulp_lock);
1206
1207 if (ret == 1)
1208 return 0;
1209
1210 return -EBUSY;
1211 }
1212
1213 static void cnic_reply_bnx2x_kcqes(struct cnic_dev *dev, int ulp_type,
1214 struct kcqe *cqes[], u32 num_cqes)
1215 {
1216 struct cnic_local *cp = dev->cnic_priv;
1217 struct cnic_ulp_ops *ulp_ops;
1218
1219 rcu_read_lock();
1220 ulp_ops = rcu_dereference(cp->ulp_ops[ulp_type]);
1221 if (likely(ulp_ops)) {
1222 ulp_ops->indicate_kcqes(cp->ulp_handle[ulp_type],
1223 cqes, num_cqes);
1224 }
1225 rcu_read_unlock();
1226 }
1227
1228 static int cnic_bnx2x_iscsi_init1(struct cnic_dev *dev, struct kwqe *kwqe)
1229 {
1230 struct cnic_local *cp = dev->cnic_priv;
1231 struct iscsi_kwqe_init1 *req1 = (struct iscsi_kwqe_init1 *) kwqe;
1232 int func = cp->func, pages;
1233 int hq_bds;
1234
1235 cp->num_iscsi_tasks = req1->num_tasks_per_conn;
1236 cp->num_ccells = req1->num_ccells_per_conn;
1237 cp->task_array_size = BNX2X_ISCSI_TASK_CONTEXT_SIZE *
1238 cp->num_iscsi_tasks;
1239 cp->r2tq_size = cp->num_iscsi_tasks * BNX2X_ISCSI_MAX_PENDING_R2TS *
1240 BNX2X_ISCSI_R2TQE_SIZE;
1241 cp->hq_size = cp->num_ccells * BNX2X_ISCSI_HQ_BD_SIZE;
1242 pages = PAGE_ALIGN(cp->hq_size) / PAGE_SIZE;
1243 hq_bds = pages * (PAGE_SIZE / BNX2X_ISCSI_HQ_BD_SIZE);
1244 cp->num_cqs = req1->num_cqs;
1245
1246 if (!dev->max_iscsi_conn)
1247 return 0;
1248
1249 /* init Tstorm RAM */
1250 CNIC_WR16(dev, BAR_TSTRORM_INTMEM + TSTORM_ISCSI_RQ_SIZE_OFFSET(func),
1251 req1->rq_num_wqes);
1252 CNIC_WR16(dev, BAR_TSTRORM_INTMEM + TSTORM_ISCSI_PAGE_SIZE_OFFSET(func),
1253 PAGE_SIZE);
1254 CNIC_WR8(dev, BAR_TSTRORM_INTMEM +
1255 TSTORM_ISCSI_PAGE_SIZE_LOG_OFFSET(func), PAGE_SHIFT);
1256 CNIC_WR16(dev, BAR_TSTRORM_INTMEM +
1257 TSTORM_ISCSI_NUM_OF_TASKS_OFFSET(func),
1258 req1->num_tasks_per_conn);
1259
1260 /* init Ustorm RAM */
1261 CNIC_WR16(dev, BAR_USTRORM_INTMEM +
1262 USTORM_ISCSI_RQ_BUFFER_SIZE_OFFSET(func),
1263 req1->rq_buffer_size);
1264 CNIC_WR16(dev, BAR_USTRORM_INTMEM + USTORM_ISCSI_PAGE_SIZE_OFFSET(func),
1265 PAGE_SIZE);
1266 CNIC_WR8(dev, BAR_USTRORM_INTMEM +
1267 USTORM_ISCSI_PAGE_SIZE_LOG_OFFSET(func), PAGE_SHIFT);
1268 CNIC_WR16(dev, BAR_USTRORM_INTMEM +
1269 USTORM_ISCSI_NUM_OF_TASKS_OFFSET(func),
1270 req1->num_tasks_per_conn);
1271 CNIC_WR16(dev, BAR_USTRORM_INTMEM + USTORM_ISCSI_RQ_SIZE_OFFSET(func),
1272 req1->rq_num_wqes);
1273 CNIC_WR16(dev, BAR_USTRORM_INTMEM + USTORM_ISCSI_CQ_SIZE_OFFSET(func),
1274 req1->cq_num_wqes);
1275 CNIC_WR16(dev, BAR_USTRORM_INTMEM + USTORM_ISCSI_R2TQ_SIZE_OFFSET(func),
1276 cp->num_iscsi_tasks * BNX2X_ISCSI_MAX_PENDING_R2TS);
1277
1278 /* init Xstorm RAM */
1279 CNIC_WR16(dev, BAR_XSTRORM_INTMEM + XSTORM_ISCSI_PAGE_SIZE_OFFSET(func),
1280 PAGE_SIZE);
1281 CNIC_WR8(dev, BAR_XSTRORM_INTMEM +
1282 XSTORM_ISCSI_PAGE_SIZE_LOG_OFFSET(func), PAGE_SHIFT);
1283 CNIC_WR16(dev, BAR_XSTRORM_INTMEM +
1284 XSTORM_ISCSI_NUM_OF_TASKS_OFFSET(func),
1285 req1->num_tasks_per_conn);
1286 CNIC_WR16(dev, BAR_XSTRORM_INTMEM + XSTORM_ISCSI_HQ_SIZE_OFFSET(func),
1287 hq_bds);
1288 CNIC_WR16(dev, BAR_XSTRORM_INTMEM + XSTORM_ISCSI_SQ_SIZE_OFFSET(func),
1289 req1->num_tasks_per_conn);
1290 CNIC_WR16(dev, BAR_XSTRORM_INTMEM + XSTORM_ISCSI_R2TQ_SIZE_OFFSET(func),
1291 cp->num_iscsi_tasks * BNX2X_ISCSI_MAX_PENDING_R2TS);
1292
1293 /* init Cstorm RAM */
1294 CNIC_WR16(dev, BAR_CSTRORM_INTMEM + CSTORM_ISCSI_PAGE_SIZE_OFFSET(func),
1295 PAGE_SIZE);
1296 CNIC_WR8(dev, BAR_CSTRORM_INTMEM +
1297 CSTORM_ISCSI_PAGE_SIZE_LOG_OFFSET(func), PAGE_SHIFT);
1298 CNIC_WR16(dev, BAR_CSTRORM_INTMEM +
1299 CSTORM_ISCSI_NUM_OF_TASKS_OFFSET(func),
1300 req1->num_tasks_per_conn);
1301 CNIC_WR16(dev, BAR_CSTRORM_INTMEM + CSTORM_ISCSI_CQ_SIZE_OFFSET(func),
1302 req1->cq_num_wqes);
1303 CNIC_WR16(dev, BAR_CSTRORM_INTMEM + CSTORM_ISCSI_HQ_SIZE_OFFSET(func),
1304 hq_bds);
1305
1306 return 0;
1307 }
1308
1309 static int cnic_bnx2x_iscsi_init2(struct cnic_dev *dev, struct kwqe *kwqe)
1310 {
1311 struct iscsi_kwqe_init2 *req2 = (struct iscsi_kwqe_init2 *) kwqe;
1312 struct cnic_local *cp = dev->cnic_priv;
1313 int func = cp->func;
1314 struct iscsi_kcqe kcqe;
1315 struct kcqe *cqes[1];
1316
1317 memset(&kcqe, 0, sizeof(kcqe));
1318 if (!dev->max_iscsi_conn) {
1319 kcqe.completion_status =
1320 ISCSI_KCQE_COMPLETION_STATUS_ISCSI_NOT_SUPPORTED;
1321 goto done;
1322 }
1323
1324 CNIC_WR(dev, BAR_TSTRORM_INTMEM +
1325 TSTORM_ISCSI_ERROR_BITMAP_OFFSET(func), req2->error_bit_map[0]);
1326 CNIC_WR(dev, BAR_TSTRORM_INTMEM +
1327 TSTORM_ISCSI_ERROR_BITMAP_OFFSET(func) + 4,
1328 req2->error_bit_map[1]);
1329
1330 CNIC_WR16(dev, BAR_USTRORM_INTMEM +
1331 USTORM_ISCSI_CQ_SQN_SIZE_OFFSET(func), req2->max_cq_sqn);
1332 CNIC_WR(dev, BAR_USTRORM_INTMEM +
1333 USTORM_ISCSI_ERROR_BITMAP_OFFSET(func), req2->error_bit_map[0]);
1334 CNIC_WR(dev, BAR_USTRORM_INTMEM +
1335 USTORM_ISCSI_ERROR_BITMAP_OFFSET(func) + 4,
1336 req2->error_bit_map[1]);
1337
1338 CNIC_WR16(dev, BAR_CSTRORM_INTMEM +
1339 CSTORM_ISCSI_CQ_SQN_SIZE_OFFSET(func), req2->max_cq_sqn);
1340
1341 kcqe.completion_status = ISCSI_KCQE_COMPLETION_STATUS_SUCCESS;
1342
1343 done:
1344 kcqe.op_code = ISCSI_KCQE_OPCODE_INIT;
1345 cqes[0] = (struct kcqe *) &kcqe;
1346 cnic_reply_bnx2x_kcqes(dev, CNIC_ULP_ISCSI, cqes, 1);
1347
1348 return 0;
1349 }
1350
1351 static void cnic_free_bnx2x_conn_resc(struct cnic_dev *dev, u32 l5_cid)
1352 {
1353 struct cnic_local *cp = dev->cnic_priv;
1354 struct cnic_context *ctx = &cp->ctx_tbl[l5_cid];
1355
1356 if (ctx->ulp_proto_id == CNIC_ULP_ISCSI) {
1357 struct cnic_iscsi *iscsi = ctx->proto.iscsi;
1358
1359 cnic_free_dma(dev, &iscsi->hq_info);
1360 cnic_free_dma(dev, &iscsi->r2tq_info);
1361 cnic_free_dma(dev, &iscsi->task_array_info);
1362 }
1363 cnic_free_id(&cp->cid_tbl, ctx->cid);
1364 ctx->cid = 0;
1365 }
1366
1367 static int cnic_alloc_bnx2x_conn_resc(struct cnic_dev *dev, u32 l5_cid)
1368 {
1369 u32 cid;
1370 int ret, pages;
1371 struct cnic_local *cp = dev->cnic_priv;
1372 struct cnic_context *ctx = &cp->ctx_tbl[l5_cid];
1373 struct cnic_iscsi *iscsi = ctx->proto.iscsi;
1374
1375 cid = cnic_alloc_new_id(&cp->cid_tbl);
1376 if (cid == -1) {
1377 ret = -ENOMEM;
1378 goto error;
1379 }
1380
1381 ctx->cid = cid;
1382 pages = PAGE_ALIGN(cp->task_array_size) / PAGE_SIZE;
1383
1384 ret = cnic_alloc_dma(dev, &iscsi->task_array_info, pages, 1);
1385 if (ret)
1386 goto error;
1387
1388 pages = PAGE_ALIGN(cp->r2tq_size) / PAGE_SIZE;
1389 ret = cnic_alloc_dma(dev, &iscsi->r2tq_info, pages, 1);
1390 if (ret)
1391 goto error;
1392
1393 pages = PAGE_ALIGN(cp->hq_size) / PAGE_SIZE;
1394 ret = cnic_alloc_dma(dev, &iscsi->hq_info, pages, 1);
1395 if (ret)
1396 goto error;
1397
1398 return 0;
1399
1400 error:
1401 cnic_free_bnx2x_conn_resc(dev, l5_cid);
1402 return ret;
1403 }
1404
1405 static void *cnic_get_bnx2x_ctx(struct cnic_dev *dev, u32 cid, int init,
1406 struct regpair *ctx_addr)
1407 {
1408 struct cnic_local *cp = dev->cnic_priv;
1409 struct cnic_eth_dev *ethdev = cp->ethdev;
1410 int blk = (cid - ethdev->starting_cid) / cp->cids_per_blk;
1411 int off = (cid - ethdev->starting_cid) % cp->cids_per_blk;
1412 unsigned long align_off = 0;
1413 dma_addr_t ctx_map;
1414 void *ctx;
1415
1416 if (cp->ctx_align) {
1417 unsigned long mask = cp->ctx_align - 1;
1418
1419 if (cp->ctx_arr[blk].mapping & mask)
1420 align_off = cp->ctx_align -
1421 (cp->ctx_arr[blk].mapping & mask);
1422 }
1423 ctx_map = cp->ctx_arr[blk].mapping + align_off +
1424 (off * BNX2X_CONTEXT_MEM_SIZE);
1425 ctx = cp->ctx_arr[blk].ctx + align_off +
1426 (off * BNX2X_CONTEXT_MEM_SIZE);
1427 if (init)
1428 memset(ctx, 0, BNX2X_CONTEXT_MEM_SIZE);
1429
1430 ctx_addr->lo = ctx_map & 0xffffffff;
1431 ctx_addr->hi = (u64) ctx_map >> 32;
1432 return ctx;
1433 }
1434
1435 static int cnic_setup_bnx2x_ctx(struct cnic_dev *dev, struct kwqe *wqes[],
1436 u32 num)
1437 {
1438 struct cnic_local *cp = dev->cnic_priv;
1439 struct iscsi_kwqe_conn_offload1 *req1 =
1440 (struct iscsi_kwqe_conn_offload1 *) wqes[0];
1441 struct iscsi_kwqe_conn_offload2 *req2 =
1442 (struct iscsi_kwqe_conn_offload2 *) wqes[1];
1443 struct iscsi_kwqe_conn_offload3 *req3;
1444 struct cnic_context *ctx = &cp->ctx_tbl[req1->iscsi_conn_id];
1445 struct cnic_iscsi *iscsi = ctx->proto.iscsi;
1446 u32 cid = ctx->cid;
1447 u32 hw_cid = BNX2X_HW_CID(cid, cp->func);
1448 struct iscsi_context *ictx;
1449 struct regpair context_addr;
1450 int i, j, n = 2, n_max;
1451
1452 ctx->ctx_flags = 0;
1453 if (!req2->num_additional_wqes)
1454 return -EINVAL;
1455
1456 n_max = req2->num_additional_wqes + 2;
1457
1458 ictx = cnic_get_bnx2x_ctx(dev, cid, 1, &context_addr);
1459 if (ictx == NULL)
1460 return -ENOMEM;
1461
1462 req3 = (struct iscsi_kwqe_conn_offload3 *) wqes[n++];
1463
1464 ictx->xstorm_ag_context.hq_prod = 1;
1465
1466 ictx->xstorm_st_context.iscsi.first_burst_length =
1467 ISCSI_DEF_FIRST_BURST_LEN;
1468 ictx->xstorm_st_context.iscsi.max_send_pdu_length =
1469 ISCSI_DEF_MAX_RECV_SEG_LEN;
1470 ictx->xstorm_st_context.iscsi.sq_pbl_base.lo =
1471 req1->sq_page_table_addr_lo;
1472 ictx->xstorm_st_context.iscsi.sq_pbl_base.hi =
1473 req1->sq_page_table_addr_hi;
1474 ictx->xstorm_st_context.iscsi.sq_curr_pbe.lo = req2->sq_first_pte.hi;
1475 ictx->xstorm_st_context.iscsi.sq_curr_pbe.hi = req2->sq_first_pte.lo;
1476 ictx->xstorm_st_context.iscsi.hq_pbl_base.lo =
1477 iscsi->hq_info.pgtbl_map & 0xffffffff;
1478 ictx->xstorm_st_context.iscsi.hq_pbl_base.hi =
1479 (u64) iscsi->hq_info.pgtbl_map >> 32;
1480 ictx->xstorm_st_context.iscsi.hq_curr_pbe_base.lo =
1481 iscsi->hq_info.pgtbl[0];
1482 ictx->xstorm_st_context.iscsi.hq_curr_pbe_base.hi =
1483 iscsi->hq_info.pgtbl[1];
1484 ictx->xstorm_st_context.iscsi.r2tq_pbl_base.lo =
1485 iscsi->r2tq_info.pgtbl_map & 0xffffffff;
1486 ictx->xstorm_st_context.iscsi.r2tq_pbl_base.hi =
1487 (u64) iscsi->r2tq_info.pgtbl_map >> 32;
1488 ictx->xstorm_st_context.iscsi.r2tq_curr_pbe_base.lo =
1489 iscsi->r2tq_info.pgtbl[0];
1490 ictx->xstorm_st_context.iscsi.r2tq_curr_pbe_base.hi =
1491 iscsi->r2tq_info.pgtbl[1];
1492 ictx->xstorm_st_context.iscsi.task_pbl_base.lo =
1493 iscsi->task_array_info.pgtbl_map & 0xffffffff;
1494 ictx->xstorm_st_context.iscsi.task_pbl_base.hi =
1495 (u64) iscsi->task_array_info.pgtbl_map >> 32;
1496 ictx->xstorm_st_context.iscsi.task_pbl_cache_idx =
1497 BNX2X_ISCSI_PBL_NOT_CACHED;
1498 ictx->xstorm_st_context.iscsi.flags.flags |=
1499 XSTORM_ISCSI_CONTEXT_FLAGS_B_IMMEDIATE_DATA;
1500 ictx->xstorm_st_context.iscsi.flags.flags |=
1501 XSTORM_ISCSI_CONTEXT_FLAGS_B_INITIAL_R2T;
1502
1503 ictx->tstorm_st_context.iscsi.hdr_bytes_2_fetch = ISCSI_HEADER_SIZE;
1504 /* TSTORM requires the base address of RQ DB & not PTE */
1505 ictx->tstorm_st_context.iscsi.rq_db_phy_addr.lo =
1506 req2->rq_page_table_addr_lo & PAGE_MASK;
1507 ictx->tstorm_st_context.iscsi.rq_db_phy_addr.hi =
1508 req2->rq_page_table_addr_hi;
1509 ictx->tstorm_st_context.iscsi.iscsi_conn_id = req1->iscsi_conn_id;
1510 ictx->tstorm_st_context.tcp.cwnd = 0x5A8;
1511 ictx->tstorm_st_context.tcp.flags2 |=
1512 TSTORM_TCP_ST_CONTEXT_SECTION_DA_EN;
1513
1514 ictx->timers_context.flags |= ISCSI_TIMERS_BLOCK_CONTEXT_CONN_VALID_FLG;
1515
1516 ictx->ustorm_st_context.ring.rq.pbl_base.lo =
1517 req2->rq_page_table_addr_lo;
1518 ictx->ustorm_st_context.ring.rq.pbl_base.hi =
1519 req2->rq_page_table_addr_hi;
1520 ictx->ustorm_st_context.ring.rq.curr_pbe.lo = req3->qp_first_pte[0].hi;
1521 ictx->ustorm_st_context.ring.rq.curr_pbe.hi = req3->qp_first_pte[0].lo;
1522 ictx->ustorm_st_context.ring.r2tq.pbl_base.lo =
1523 iscsi->r2tq_info.pgtbl_map & 0xffffffff;
1524 ictx->ustorm_st_context.ring.r2tq.pbl_base.hi =
1525 (u64) iscsi->r2tq_info.pgtbl_map >> 32;
1526 ictx->ustorm_st_context.ring.r2tq.curr_pbe.lo =
1527 iscsi->r2tq_info.pgtbl[0];
1528 ictx->ustorm_st_context.ring.r2tq.curr_pbe.hi =
1529 iscsi->r2tq_info.pgtbl[1];
1530 ictx->ustorm_st_context.ring.cq_pbl_base.lo =
1531 req1->cq_page_table_addr_lo;
1532 ictx->ustorm_st_context.ring.cq_pbl_base.hi =
1533 req1->cq_page_table_addr_hi;
1534 ictx->ustorm_st_context.ring.cq[0].cq_sn = ISCSI_INITIAL_SN;
1535 ictx->ustorm_st_context.ring.cq[0].curr_pbe.lo = req2->cq_first_pte.hi;
1536 ictx->ustorm_st_context.ring.cq[0].curr_pbe.hi = req2->cq_first_pte.lo;
1537 ictx->ustorm_st_context.task_pbe_cache_index =
1538 BNX2X_ISCSI_PBL_NOT_CACHED;
1539 ictx->ustorm_st_context.task_pdu_cache_index =
1540 BNX2X_ISCSI_PDU_HEADER_NOT_CACHED;
1541
1542 for (i = 1, j = 1; i < cp->num_cqs; i++, j++) {
1543 if (j == 3) {
1544 if (n >= n_max)
1545 break;
1546 req3 = (struct iscsi_kwqe_conn_offload3 *) wqes[n++];
1547 j = 0;
1548 }
1549 ictx->ustorm_st_context.ring.cq[i].cq_sn = ISCSI_INITIAL_SN;
1550 ictx->ustorm_st_context.ring.cq[i].curr_pbe.lo =
1551 req3->qp_first_pte[j].hi;
1552 ictx->ustorm_st_context.ring.cq[i].curr_pbe.hi =
1553 req3->qp_first_pte[j].lo;
1554 }
1555
1556 ictx->ustorm_st_context.task_pbl_base.lo =
1557 iscsi->task_array_info.pgtbl_map & 0xffffffff;
1558 ictx->ustorm_st_context.task_pbl_base.hi =
1559 (u64) iscsi->task_array_info.pgtbl_map >> 32;
1560 ictx->ustorm_st_context.tce_phy_addr.lo =
1561 iscsi->task_array_info.pgtbl[0];
1562 ictx->ustorm_st_context.tce_phy_addr.hi =
1563 iscsi->task_array_info.pgtbl[1];
1564 ictx->ustorm_st_context.iscsi_conn_id = req1->iscsi_conn_id;
1565 ictx->ustorm_st_context.num_cqs = cp->num_cqs;
1566 ictx->ustorm_st_context.negotiated_rx |= ISCSI_DEF_MAX_RECV_SEG_LEN;
1567 ictx->ustorm_st_context.negotiated_rx_and_flags |=
1568 ISCSI_DEF_MAX_BURST_LEN;
1569 ictx->ustorm_st_context.negotiated_rx |=
1570 ISCSI_DEFAULT_MAX_OUTSTANDING_R2T <<
1571 USTORM_ISCSI_ST_CONTEXT_MAX_OUTSTANDING_R2TS_SHIFT;
1572
1573 ictx->cstorm_st_context.hq_pbl_base.lo =
1574 iscsi->hq_info.pgtbl_map & 0xffffffff;
1575 ictx->cstorm_st_context.hq_pbl_base.hi =
1576 (u64) iscsi->hq_info.pgtbl_map >> 32;
1577 ictx->cstorm_st_context.hq_curr_pbe.lo = iscsi->hq_info.pgtbl[0];
1578 ictx->cstorm_st_context.hq_curr_pbe.hi = iscsi->hq_info.pgtbl[1];
1579 ictx->cstorm_st_context.task_pbl_base.lo =
1580 iscsi->task_array_info.pgtbl_map & 0xffffffff;
1581 ictx->cstorm_st_context.task_pbl_base.hi =
1582 (u64) iscsi->task_array_info.pgtbl_map >> 32;
1583 /* CSTORM and USTORM initialization is different, CSTORM requires
1584 * CQ DB base & not PTE addr */
1585 ictx->cstorm_st_context.cq_db_base.lo =
1586 req1->cq_page_table_addr_lo & PAGE_MASK;
1587 ictx->cstorm_st_context.cq_db_base.hi = req1->cq_page_table_addr_hi;
1588 ictx->cstorm_st_context.iscsi_conn_id = req1->iscsi_conn_id;
1589 ictx->cstorm_st_context.cq_proc_en_bit_map = (1 << cp->num_cqs) - 1;
1590 for (i = 0; i < cp->num_cqs; i++) {
1591 ictx->cstorm_st_context.cq_c_prod_sqn_arr.sqn[i] =
1592 ISCSI_INITIAL_SN;
1593 ictx->cstorm_st_context.cq_c_sqn_2_notify_arr.sqn[i] =
1594 ISCSI_INITIAL_SN;
1595 }
1596
1597 ictx->xstorm_ag_context.cdu_reserved =
1598 CDU_RSRVD_VALUE_TYPE_A(hw_cid, CDU_REGION_NUMBER_XCM_AG,
1599 ISCSI_CONNECTION_TYPE);
1600 ictx->ustorm_ag_context.cdu_usage =
1601 CDU_RSRVD_VALUE_TYPE_A(hw_cid, CDU_REGION_NUMBER_UCM_AG,
1602 ISCSI_CONNECTION_TYPE);
1603 return 0;
1604
1605 }
1606
1607 static int cnic_bnx2x_iscsi_ofld1(struct cnic_dev *dev, struct kwqe *wqes[],
1608 u32 num, int *work)
1609 {
1610 struct iscsi_kwqe_conn_offload1 *req1;
1611 struct iscsi_kwqe_conn_offload2 *req2;
1612 struct cnic_local *cp = dev->cnic_priv;
1613 struct iscsi_kcqe kcqe;
1614 struct kcqe *cqes[1];
1615 u32 l5_cid;
1616 int ret;
1617
1618 if (num < 2) {
1619 *work = num;
1620 return -EINVAL;
1621 }
1622
1623 req1 = (struct iscsi_kwqe_conn_offload1 *) wqes[0];
1624 req2 = (struct iscsi_kwqe_conn_offload2 *) wqes[1];
1625 if ((num - 2) < req2->num_additional_wqes) {
1626 *work = num;
1627 return -EINVAL;
1628 }
1629 *work = 2 + req2->num_additional_wqes;;
1630
1631 l5_cid = req1->iscsi_conn_id;
1632 if (l5_cid >= MAX_ISCSI_TBL_SZ)
1633 return -EINVAL;
1634
1635 memset(&kcqe, 0, sizeof(kcqe));
1636 kcqe.op_code = ISCSI_KCQE_OPCODE_OFFLOAD_CONN;
1637 kcqe.iscsi_conn_id = l5_cid;
1638 kcqe.completion_status = ISCSI_KCQE_COMPLETION_STATUS_CTX_ALLOC_FAILURE;
1639
1640 if (atomic_inc_return(&cp->iscsi_conn) > dev->max_iscsi_conn) {
1641 atomic_dec(&cp->iscsi_conn);
1642 ret = 0;
1643 goto done;
1644 }
1645 ret = cnic_alloc_bnx2x_conn_resc(dev, l5_cid);
1646 if (ret) {
1647 atomic_dec(&cp->iscsi_conn);
1648 ret = 0;
1649 goto done;
1650 }
1651 ret = cnic_setup_bnx2x_ctx(dev, wqes, num);
1652 if (ret < 0) {
1653 cnic_free_bnx2x_conn_resc(dev, l5_cid);
1654 atomic_dec(&cp->iscsi_conn);
1655 goto done;
1656 }
1657
1658 kcqe.completion_status = ISCSI_KCQE_COMPLETION_STATUS_SUCCESS;
1659 kcqe.iscsi_conn_context_id = BNX2X_HW_CID(cp->ctx_tbl[l5_cid].cid,
1660 cp->func);
1661
1662 done:
1663 cqes[0] = (struct kcqe *) &kcqe;
1664 cnic_reply_bnx2x_kcqes(dev, CNIC_ULP_ISCSI, cqes, 1);
1665 return ret;
1666 }
1667
1668
1669 static int cnic_bnx2x_iscsi_update(struct cnic_dev *dev, struct kwqe *kwqe)
1670 {
1671 struct cnic_local *cp = dev->cnic_priv;
1672 struct iscsi_kwqe_conn_update *req =
1673 (struct iscsi_kwqe_conn_update *) kwqe;
1674 void *data;
1675 union l5cm_specific_data l5_data;
1676 u32 l5_cid, cid = BNX2X_SW_CID(req->context_id);
1677 int ret;
1678
1679 if (cnic_get_l5_cid(cp, cid, &l5_cid) != 0)
1680 return -EINVAL;
1681
1682 data = cnic_get_kwqe_16_data(cp, l5_cid, &l5_data);
1683 if (!data)
1684 return -ENOMEM;
1685
1686 memcpy(data, kwqe, sizeof(struct kwqe));
1687
1688 ret = cnic_submit_kwqe_16(dev, ISCSI_RAMROD_CMD_ID_UPDATE_CONN,
1689 req->context_id, ISCSI_CONNECTION_TYPE, &l5_data);
1690 return ret;
1691 }
1692
1693 static int cnic_bnx2x_iscsi_destroy(struct cnic_dev *dev, struct kwqe *kwqe)
1694 {
1695 struct cnic_local *cp = dev->cnic_priv;
1696 struct iscsi_kwqe_conn_destroy *req =
1697 (struct iscsi_kwqe_conn_destroy *) kwqe;
1698 union l5cm_specific_data l5_data;
1699 u32 l5_cid = req->reserved0;
1700 struct cnic_context *ctx = &cp->ctx_tbl[l5_cid];
1701 int ret = 0;
1702 struct iscsi_kcqe kcqe;
1703 struct kcqe *cqes[1];
1704
1705 if (!(ctx->ctx_flags & CTX_FL_OFFLD_START))
1706 goto skip_cfc_delete;
1707
1708 while (!time_after(jiffies, ctx->timestamp + (2 * HZ)))
1709 msleep(250);
1710
1711 init_waitqueue_head(&ctx->waitq);
1712 ctx->wait_cond = 0;
1713 memset(&l5_data, 0, sizeof(l5_data));
1714 ret = cnic_submit_kwqe_16(dev, RAMROD_CMD_ID_ETH_CFC_DEL,
1715 req->context_id,
1716 ETH_CONNECTION_TYPE |
1717 (1 << SPE_HDR_COMMON_RAMROD_SHIFT),
1718 &l5_data);
1719 if (ret == 0)
1720 wait_event(ctx->waitq, ctx->wait_cond);
1721
1722 skip_cfc_delete:
1723 cnic_free_bnx2x_conn_resc(dev, l5_cid);
1724
1725 atomic_dec(&cp->iscsi_conn);
1726
1727 memset(&kcqe, 0, sizeof(kcqe));
1728 kcqe.op_code = ISCSI_KCQE_OPCODE_DESTROY_CONN;
1729 kcqe.iscsi_conn_id = l5_cid;
1730 kcqe.completion_status = ISCSI_KCQE_COMPLETION_STATUS_SUCCESS;
1731 kcqe.iscsi_conn_context_id = req->context_id;
1732
1733 cqes[0] = (struct kcqe *) &kcqe;
1734 cnic_reply_bnx2x_kcqes(dev, CNIC_ULP_ISCSI, cqes, 1);
1735
1736 return ret;
1737 }
1738
1739 static void cnic_init_storm_conn_bufs(struct cnic_dev *dev,
1740 struct l4_kwq_connect_req1 *kwqe1,
1741 struct l4_kwq_connect_req3 *kwqe3,
1742 struct l5cm_active_conn_buffer *conn_buf)
1743 {
1744 struct l5cm_conn_addr_params *conn_addr = &conn_buf->conn_addr_buf;
1745 struct l5cm_xstorm_conn_buffer *xstorm_buf =
1746 &conn_buf->xstorm_conn_buffer;
1747 struct l5cm_tstorm_conn_buffer *tstorm_buf =
1748 &conn_buf->tstorm_conn_buffer;
1749 struct regpair context_addr;
1750 u32 cid = BNX2X_SW_CID(kwqe1->cid);
1751 struct in6_addr src_ip, dst_ip;
1752 int i;
1753 u32 *addrp;
1754
1755 addrp = (u32 *) &conn_addr->local_ip_addr;
1756 for (i = 0; i < 4; i++, addrp++)
1757 src_ip.in6_u.u6_addr32[i] = cpu_to_be32(*addrp);
1758
1759 addrp = (u32 *) &conn_addr->remote_ip_addr;
1760 for (i = 0; i < 4; i++, addrp++)
1761 dst_ip.in6_u.u6_addr32[i] = cpu_to_be32(*addrp);
1762
1763 cnic_get_bnx2x_ctx(dev, cid, 0, &context_addr);
1764
1765 xstorm_buf->context_addr.hi = context_addr.hi;
1766 xstorm_buf->context_addr.lo = context_addr.lo;
1767 xstorm_buf->mss = 0xffff;
1768 xstorm_buf->rcv_buf = kwqe3->rcv_buf;
1769 if (kwqe1->tcp_flags & L4_KWQ_CONNECT_REQ1_NAGLE_ENABLE)
1770 xstorm_buf->params |= L5CM_XSTORM_CONN_BUFFER_NAGLE_ENABLE;
1771 xstorm_buf->pseudo_header_checksum =
1772 swab16(~csum_ipv6_magic(&src_ip, &dst_ip, 0, IPPROTO_TCP, 0));
1773
1774 if (!(kwqe1->tcp_flags & L4_KWQ_CONNECT_REQ1_NO_DELAY_ACK))
1775 tstorm_buf->params |=
1776 L5CM_TSTORM_CONN_BUFFER_DELAYED_ACK_ENABLE;
1777 if (kwqe3->ka_timeout) {
1778 tstorm_buf->ka_enable = 1;
1779 tstorm_buf->ka_timeout = kwqe3->ka_timeout;
1780 tstorm_buf->ka_interval = kwqe3->ka_interval;
1781 tstorm_buf->ka_max_probe_count = kwqe3->ka_max_probe_count;
1782 }
1783 tstorm_buf->rcv_buf = kwqe3->rcv_buf;
1784 tstorm_buf->snd_buf = kwqe3->snd_buf;
1785 tstorm_buf->max_rt_time = 0xffffffff;
1786 }
1787
1788 static void cnic_init_bnx2x_mac(struct cnic_dev *dev)
1789 {
1790 struct cnic_local *cp = dev->cnic_priv;
1791 int func = CNIC_FUNC(cp);
1792 u8 *mac = dev->mac_addr;
1793
1794 CNIC_WR8(dev, BAR_XSTRORM_INTMEM +
1795 XSTORM_ISCSI_LOCAL_MAC_ADDR0_OFFSET(func), mac[0]);
1796 CNIC_WR8(dev, BAR_XSTRORM_INTMEM +
1797 XSTORM_ISCSI_LOCAL_MAC_ADDR1_OFFSET(func), mac[1]);
1798 CNIC_WR8(dev, BAR_XSTRORM_INTMEM +
1799 XSTORM_ISCSI_LOCAL_MAC_ADDR2_OFFSET(func), mac[2]);
1800 CNIC_WR8(dev, BAR_XSTRORM_INTMEM +
1801 XSTORM_ISCSI_LOCAL_MAC_ADDR3_OFFSET(func), mac[3]);
1802 CNIC_WR8(dev, BAR_XSTRORM_INTMEM +
1803 XSTORM_ISCSI_LOCAL_MAC_ADDR4_OFFSET(func), mac[4]);
1804 CNIC_WR8(dev, BAR_XSTRORM_INTMEM +
1805 XSTORM_ISCSI_LOCAL_MAC_ADDR5_OFFSET(func), mac[5]);
1806
1807 CNIC_WR8(dev, BAR_TSTRORM_INTMEM +
1808 TSTORM_ISCSI_TCP_VARS_LSB_LOCAL_MAC_ADDR_OFFSET(func), mac[5]);
1809 CNIC_WR8(dev, BAR_TSTRORM_INTMEM +
1810 TSTORM_ISCSI_TCP_VARS_LSB_LOCAL_MAC_ADDR_OFFSET(func) + 1,
1811 mac[4]);
1812 CNIC_WR8(dev, BAR_TSTRORM_INTMEM +
1813 TSTORM_ISCSI_TCP_VARS_MSB_LOCAL_MAC_ADDR_OFFSET(func), mac[3]);
1814 CNIC_WR8(dev, BAR_TSTRORM_INTMEM +
1815 TSTORM_ISCSI_TCP_VARS_MSB_LOCAL_MAC_ADDR_OFFSET(func) + 1,
1816 mac[2]);
1817 CNIC_WR8(dev, BAR_TSTRORM_INTMEM +
1818 TSTORM_ISCSI_TCP_VARS_MSB_LOCAL_MAC_ADDR_OFFSET(func) + 2,
1819 mac[1]);
1820 CNIC_WR8(dev, BAR_TSTRORM_INTMEM +
1821 TSTORM_ISCSI_TCP_VARS_MSB_LOCAL_MAC_ADDR_OFFSET(func) + 3,
1822 mac[0]);
1823 }
1824
1825 static void cnic_bnx2x_set_tcp_timestamp(struct cnic_dev *dev, int tcp_ts)
1826 {
1827 struct cnic_local *cp = dev->cnic_priv;
1828 u8 xstorm_flags = XSTORM_L5CM_TCP_FLAGS_WND_SCL_EN;
1829 u16 tstorm_flags = 0;
1830
1831 if (tcp_ts) {
1832 xstorm_flags |= XSTORM_L5CM_TCP_FLAGS_TS_ENABLED;
1833 tstorm_flags |= TSTORM_L5CM_TCP_FLAGS_TS_ENABLED;
1834 }
1835
1836 CNIC_WR8(dev, BAR_XSTRORM_INTMEM +
1837 XSTORM_ISCSI_TCP_VARS_FLAGS_OFFSET(cp->func), xstorm_flags);
1838
1839 CNIC_WR16(dev, BAR_TSTRORM_INTMEM +
1840 TSTORM_ISCSI_TCP_VARS_FLAGS_OFFSET(cp->func), tstorm_flags);
1841 }
1842
1843 static int cnic_bnx2x_connect(struct cnic_dev *dev, struct kwqe *wqes[],
1844 u32 num, int *work)
1845 {
1846 struct cnic_local *cp = dev->cnic_priv;
1847 struct l4_kwq_connect_req1 *kwqe1 =
1848 (struct l4_kwq_connect_req1 *) wqes[0];
1849 struct l4_kwq_connect_req3 *kwqe3;
1850 struct l5cm_active_conn_buffer *conn_buf;
1851 struct l5cm_conn_addr_params *conn_addr;
1852 union l5cm_specific_data l5_data;
1853 u32 l5_cid = kwqe1->pg_cid;
1854 struct cnic_sock *csk = &cp->csk_tbl[l5_cid];
1855 struct cnic_context *ctx = &cp->ctx_tbl[l5_cid];
1856 int ret;
1857
1858 if (num < 2) {
1859 *work = num;
1860 return -EINVAL;
1861 }
1862
1863 if (kwqe1->conn_flags & L4_KWQ_CONNECT_REQ1_IP_V6)
1864 *work = 3;
1865 else
1866 *work = 2;
1867
1868 if (num < *work) {
1869 *work = num;
1870 return -EINVAL;
1871 }
1872
1873 if (sizeof(*conn_buf) > CNIC_KWQ16_DATA_SIZE) {
1874 netdev_err(dev->netdev, "conn_buf size too big\n");
1875 return -ENOMEM;
1876 }
1877 conn_buf = cnic_get_kwqe_16_data(cp, l5_cid, &l5_data);
1878 if (!conn_buf)
1879 return -ENOMEM;
1880
1881 memset(conn_buf, 0, sizeof(*conn_buf));
1882
1883 conn_addr = &conn_buf->conn_addr_buf;
1884 conn_addr->remote_addr_0 = csk->ha[0];
1885 conn_addr->remote_addr_1 = csk->ha[1];
1886 conn_addr->remote_addr_2 = csk->ha[2];
1887 conn_addr->remote_addr_3 = csk->ha[3];
1888 conn_addr->remote_addr_4 = csk->ha[4];
1889 conn_addr->remote_addr_5 = csk->ha[5];
1890
1891 if (kwqe1->conn_flags & L4_KWQ_CONNECT_REQ1_IP_V6) {
1892 struct l4_kwq_connect_req2 *kwqe2 =
1893 (struct l4_kwq_connect_req2 *) wqes[1];
1894
1895 conn_addr->local_ip_addr.ip_addr_hi_hi = kwqe2->src_ip_v6_4;
1896 conn_addr->local_ip_addr.ip_addr_hi_lo = kwqe2->src_ip_v6_3;
1897 conn_addr->local_ip_addr.ip_addr_lo_hi = kwqe2->src_ip_v6_2;
1898
1899 conn_addr->remote_ip_addr.ip_addr_hi_hi = kwqe2->dst_ip_v6_4;
1900 conn_addr->remote_ip_addr.ip_addr_hi_lo = kwqe2->dst_ip_v6_3;
1901 conn_addr->remote_ip_addr.ip_addr_lo_hi = kwqe2->dst_ip_v6_2;
1902 conn_addr->params |= L5CM_CONN_ADDR_PARAMS_IP_VERSION;
1903 }
1904 kwqe3 = (struct l4_kwq_connect_req3 *) wqes[*work - 1];
1905
1906 conn_addr->local_ip_addr.ip_addr_lo_lo = kwqe1->src_ip;
1907 conn_addr->remote_ip_addr.ip_addr_lo_lo = kwqe1->dst_ip;
1908 conn_addr->local_tcp_port = kwqe1->src_port;
1909 conn_addr->remote_tcp_port = kwqe1->dst_port;
1910
1911 conn_addr->pmtu = kwqe3->pmtu;
1912 cnic_init_storm_conn_bufs(dev, kwqe1, kwqe3, conn_buf);
1913
1914 CNIC_WR16(dev, BAR_XSTRORM_INTMEM +
1915 XSTORM_ISCSI_LOCAL_VLAN_OFFSET(cp->func), csk->vlan_id);
1916
1917 cnic_bnx2x_set_tcp_timestamp(dev,
1918 kwqe1->tcp_flags & L4_KWQ_CONNECT_REQ1_TIME_STAMP);
1919
1920 ret = cnic_submit_kwqe_16(dev, L5CM_RAMROD_CMD_ID_TCP_CONNECT,
1921 kwqe1->cid, ISCSI_CONNECTION_TYPE, &l5_data);
1922 if (!ret)
1923 ctx->ctx_flags |= CTX_FL_OFFLD_START;
1924
1925 return ret;
1926 }
1927
1928 static int cnic_bnx2x_close(struct cnic_dev *dev, struct kwqe *kwqe)
1929 {
1930 struct l4_kwq_close_req *req = (struct l4_kwq_close_req *) kwqe;
1931 union l5cm_specific_data l5_data;
1932 int ret;
1933
1934 memset(&l5_data, 0, sizeof(l5_data));
1935 ret = cnic_submit_kwqe_16(dev, L5CM_RAMROD_CMD_ID_CLOSE,
1936 req->cid, ISCSI_CONNECTION_TYPE, &l5_data);
1937 return ret;
1938 }
1939
1940 static int cnic_bnx2x_reset(struct cnic_dev *dev, struct kwqe *kwqe)
1941 {
1942 struct l4_kwq_reset_req *req = (struct l4_kwq_reset_req *) kwqe;
1943 union l5cm_specific_data l5_data;
1944 int ret;
1945
1946 memset(&l5_data, 0, sizeof(l5_data));
1947 ret = cnic_submit_kwqe_16(dev, L5CM_RAMROD_CMD_ID_ABORT,
1948 req->cid, ISCSI_CONNECTION_TYPE, &l5_data);
1949 return ret;
1950 }
1951 static int cnic_bnx2x_offload_pg(struct cnic_dev *dev, struct kwqe *kwqe)
1952 {
1953 struct l4_kwq_offload_pg *req = (struct l4_kwq_offload_pg *) kwqe;
1954 struct l4_kcq kcqe;
1955 struct kcqe *cqes[1];
1956
1957 memset(&kcqe, 0, sizeof(kcqe));
1958 kcqe.pg_host_opaque = req->host_opaque;
1959 kcqe.pg_cid = req->host_opaque;
1960 kcqe.op_code = L4_KCQE_OPCODE_VALUE_OFFLOAD_PG;
1961 cqes[0] = (struct kcqe *) &kcqe;
1962 cnic_reply_bnx2x_kcqes(dev, CNIC_ULP_L4, cqes, 1);
1963 return 0;
1964 }
1965
1966 static int cnic_bnx2x_update_pg(struct cnic_dev *dev, struct kwqe *kwqe)
1967 {
1968 struct l4_kwq_update_pg *req = (struct l4_kwq_update_pg *) kwqe;
1969 struct l4_kcq kcqe;
1970 struct kcqe *cqes[1];
1971
1972 memset(&kcqe, 0, sizeof(kcqe));
1973 kcqe.pg_host_opaque = req->pg_host_opaque;
1974 kcqe.pg_cid = req->pg_cid;
1975 kcqe.op_code = L4_KCQE_OPCODE_VALUE_UPDATE_PG;
1976 cqes[0] = (struct kcqe *) &kcqe;
1977 cnic_reply_bnx2x_kcqes(dev, CNIC_ULP_L4, cqes, 1);
1978 return 0;
1979 }
1980
1981 static int cnic_submit_bnx2x_kwqes(struct cnic_dev *dev, struct kwqe *wqes[],
1982 u32 num_wqes)
1983 {
1984 int i, work, ret;
1985 u32 opcode;
1986 struct kwqe *kwqe;
1987
1988 if (!test_bit(CNIC_F_CNIC_UP, &dev->flags))
1989 return -EAGAIN; /* bnx2 is down */
1990
1991 for (i = 0; i < num_wqes; ) {
1992 kwqe = wqes[i];
1993 opcode = KWQE_OPCODE(kwqe->kwqe_op_flag);
1994 work = 1;
1995
1996 switch (opcode) {
1997 case ISCSI_KWQE_OPCODE_INIT1:
1998 ret = cnic_bnx2x_iscsi_init1(dev, kwqe);
1999 break;
2000 case ISCSI_KWQE_OPCODE_INIT2:
2001 ret = cnic_bnx2x_iscsi_init2(dev, kwqe);
2002 break;
2003 case ISCSI_KWQE_OPCODE_OFFLOAD_CONN1:
2004 ret = cnic_bnx2x_iscsi_ofld1(dev, &wqes[i],
2005 num_wqes - i, &work);
2006 break;
2007 case ISCSI_KWQE_OPCODE_UPDATE_CONN:
2008 ret = cnic_bnx2x_iscsi_update(dev, kwqe);
2009 break;
2010 case ISCSI_KWQE_OPCODE_DESTROY_CONN:
2011 ret = cnic_bnx2x_iscsi_destroy(dev, kwqe);
2012 break;
2013 case L4_KWQE_OPCODE_VALUE_CONNECT1:
2014 ret = cnic_bnx2x_connect(dev, &wqes[i], num_wqes - i,
2015 &work);
2016 break;
2017 case L4_KWQE_OPCODE_VALUE_CLOSE:
2018 ret = cnic_bnx2x_close(dev, kwqe);
2019 break;
2020 case L4_KWQE_OPCODE_VALUE_RESET:
2021 ret = cnic_bnx2x_reset(dev, kwqe);
2022 break;
2023 case L4_KWQE_OPCODE_VALUE_OFFLOAD_PG:
2024 ret = cnic_bnx2x_offload_pg(dev, kwqe);
2025 break;
2026 case L4_KWQE_OPCODE_VALUE_UPDATE_PG:
2027 ret = cnic_bnx2x_update_pg(dev, kwqe);
2028 break;
2029 case L4_KWQE_OPCODE_VALUE_UPLOAD_PG:
2030 ret = 0;
2031 break;
2032 default:
2033 ret = 0;
2034 netdev_err(dev->netdev, "Unknown type of KWQE(0x%x)\n",
2035 opcode);
2036 break;
2037 }
2038 if (ret < 0)
2039 netdev_err(dev->netdev, "KWQE(0x%x) failed\n",
2040 opcode);
2041 i += work;
2042 }
2043 return 0;
2044 }
2045
2046 static void service_kcqes(struct cnic_dev *dev, int num_cqes)
2047 {
2048 struct cnic_local *cp = dev->cnic_priv;
2049 int i, j;
2050
2051 i = 0;
2052 j = 1;
2053 while (num_cqes) {
2054 struct cnic_ulp_ops *ulp_ops;
2055 int ulp_type;
2056 u32 kcqe_op_flag = cp->completed_kcq[i]->kcqe_op_flag;
2057 u32 kcqe_layer = kcqe_op_flag & KCQE_FLAGS_LAYER_MASK;
2058
2059 if (unlikely(kcqe_op_flag & KCQE_RAMROD_COMPLETION))
2060 cnic_kwq_completion(dev, 1);
2061
2062 while (j < num_cqes) {
2063 u32 next_op = cp->completed_kcq[i + j]->kcqe_op_flag;
2064
2065 if ((next_op & KCQE_FLAGS_LAYER_MASK) != kcqe_layer)
2066 break;
2067
2068 if (unlikely(next_op & KCQE_RAMROD_COMPLETION))
2069 cnic_kwq_completion(dev, 1);
2070 j++;
2071 }
2072
2073 if (kcqe_layer == KCQE_FLAGS_LAYER_MASK_L5_RDMA)
2074 ulp_type = CNIC_ULP_RDMA;
2075 else if (kcqe_layer == KCQE_FLAGS_LAYER_MASK_L5_ISCSI)
2076 ulp_type = CNIC_ULP_ISCSI;
2077 else if (kcqe_layer == KCQE_FLAGS_LAYER_MASK_L4)
2078 ulp_type = CNIC_ULP_L4;
2079 else if (kcqe_layer == KCQE_FLAGS_LAYER_MASK_L2)
2080 goto end;
2081 else {
2082 netdev_err(dev->netdev, "Unknown type of KCQE(0x%x)\n",
2083 kcqe_op_flag);
2084 goto end;
2085 }
2086
2087 rcu_read_lock();
2088 ulp_ops = rcu_dereference(cp->ulp_ops[ulp_type]);
2089 if (likely(ulp_ops)) {
2090 ulp_ops->indicate_kcqes(cp->ulp_handle[ulp_type],
2091 cp->completed_kcq + i, j);
2092 }
2093 rcu_read_unlock();
2094 end:
2095 num_cqes -= j;
2096 i += j;
2097 j = 1;
2098 }
2099 }
2100
2101 static u16 cnic_bnx2_next_idx(u16 idx)
2102 {
2103 return idx + 1;
2104 }
2105
2106 static u16 cnic_bnx2_hw_idx(u16 idx)
2107 {
2108 return idx;
2109 }
2110
2111 static u16 cnic_bnx2x_next_idx(u16 idx)
2112 {
2113 idx++;
2114 if ((idx & MAX_KCQE_CNT) == MAX_KCQE_CNT)
2115 idx++;
2116
2117 return idx;
2118 }
2119
2120 static u16 cnic_bnx2x_hw_idx(u16 idx)
2121 {
2122 if ((idx & MAX_KCQE_CNT) == MAX_KCQE_CNT)
2123 idx++;
2124 return idx;
2125 }
2126
2127 static int cnic_get_kcqes(struct cnic_dev *dev, u16 hw_prod, u16 *sw_prod)
2128 {
2129 struct cnic_local *cp = dev->cnic_priv;
2130 u16 i, ri, last;
2131 struct kcqe *kcqe;
2132 int kcqe_cnt = 0, last_cnt = 0;
2133
2134 i = ri = last = *sw_prod;
2135 ri &= MAX_KCQ_IDX;
2136
2137 while ((i != hw_prod) && (kcqe_cnt < MAX_COMPLETED_KCQE)) {
2138 kcqe = &cp->kcq[KCQ_PG(ri)][KCQ_IDX(ri)];
2139 cp->completed_kcq[kcqe_cnt++] = kcqe;
2140 i = cp->next_idx(i);
2141 ri = i & MAX_KCQ_IDX;
2142 if (likely(!(kcqe->kcqe_op_flag & KCQE_FLAGS_NEXT))) {
2143 last_cnt = kcqe_cnt;
2144 last = i;
2145 }
2146 }
2147
2148 *sw_prod = last;
2149 return last_cnt;
2150 }
2151
2152 static int cnic_l2_completion(struct cnic_local *cp)
2153 {
2154 u16 hw_cons, sw_cons;
2155 union eth_rx_cqe *cqe, *cqe_ring = (union eth_rx_cqe *)
2156 (cp->l2_ring + (2 * BCM_PAGE_SIZE));
2157 u32 cmd;
2158 int comp = 0;
2159
2160 if (!test_bit(CNIC_F_BNX2X_CLASS, &cp->dev->flags))
2161 return 0;
2162
2163 hw_cons = *cp->rx_cons_ptr;
2164 if ((hw_cons & BNX2X_MAX_RCQ_DESC_CNT) == BNX2X_MAX_RCQ_DESC_CNT)
2165 hw_cons++;
2166
2167 sw_cons = cp->rx_cons;
2168 while (sw_cons != hw_cons) {
2169 u8 cqe_fp_flags;
2170
2171 cqe = &cqe_ring[sw_cons & BNX2X_MAX_RCQ_DESC_CNT];
2172 cqe_fp_flags = cqe->fast_path_cqe.type_error_flags;
2173 if (cqe_fp_flags & ETH_FAST_PATH_RX_CQE_TYPE) {
2174 cmd = le32_to_cpu(cqe->ramrod_cqe.conn_and_cmd_data);
2175 cmd >>= COMMON_RAMROD_ETH_RX_CQE_CMD_ID_SHIFT;
2176 if (cmd == RAMROD_CMD_ID_ETH_CLIENT_SETUP ||
2177 cmd == RAMROD_CMD_ID_ETH_HALT)
2178 comp++;
2179 }
2180 sw_cons = BNX2X_NEXT_RCQE(sw_cons);
2181 }
2182 return comp;
2183 }
2184
2185 static void cnic_chk_pkt_rings(struct cnic_local *cp)
2186 {
2187 u16 rx_cons = *cp->rx_cons_ptr;
2188 u16 tx_cons = *cp->tx_cons_ptr;
2189 int comp = 0;
2190
2191 if (cp->tx_cons != tx_cons || cp->rx_cons != rx_cons) {
2192 if (test_bit(CNIC_LCL_FL_L2_WAIT, &cp->cnic_local_flags))
2193 comp = cnic_l2_completion(cp);
2194
2195 cp->tx_cons = tx_cons;
2196 cp->rx_cons = rx_cons;
2197
2198 uio_event_notify(cp->cnic_uinfo);
2199 }
2200 if (comp)
2201 clear_bit(CNIC_LCL_FL_L2_WAIT, &cp->cnic_local_flags);
2202 }
2203
2204 static int cnic_service_bnx2(void *data, void *status_blk)
2205 {
2206 struct cnic_dev *dev = data;
2207 struct status_block *sblk = status_blk;
2208 struct cnic_local *cp = dev->cnic_priv;
2209 u32 status_idx = sblk->status_idx;
2210 u16 hw_prod, sw_prod;
2211 int kcqe_cnt;
2212
2213 if (unlikely(!test_bit(CNIC_F_CNIC_UP, &dev->flags)))
2214 return status_idx;
2215
2216 cp->kwq_con_idx = *cp->kwq_con_idx_ptr;
2217
2218 hw_prod = sblk->status_completion_producer_index;
2219 sw_prod = cp->kcq_prod_idx;
2220 while (sw_prod != hw_prod) {
2221 kcqe_cnt = cnic_get_kcqes(dev, hw_prod, &sw_prod);
2222 if (kcqe_cnt == 0)
2223 goto done;
2224
2225 service_kcqes(dev, kcqe_cnt);
2226
2227 /* Tell compiler that status_blk fields can change. */
2228 barrier();
2229 if (status_idx != sblk->status_idx) {
2230 status_idx = sblk->status_idx;
2231 cp->kwq_con_idx = *cp->kwq_con_idx_ptr;
2232 hw_prod = sblk->status_completion_producer_index;
2233 } else
2234 break;
2235 }
2236
2237 done:
2238 CNIC_WR16(dev, cp->kcq_io_addr, sw_prod);
2239
2240 cp->kcq_prod_idx = sw_prod;
2241
2242 cnic_chk_pkt_rings(cp);
2243 return status_idx;
2244 }
2245
2246 static void cnic_service_bnx2_msix(unsigned long data)
2247 {
2248 struct cnic_dev *dev = (struct cnic_dev *) data;
2249 struct cnic_local *cp = dev->cnic_priv;
2250 struct status_block_msix *status_blk = cp->status_blk.bnx2;
2251 u32 status_idx = status_blk->status_idx;
2252 u16 hw_prod, sw_prod;
2253 int kcqe_cnt;
2254
2255 cp->kwq_con_idx = status_blk->status_cmd_consumer_index;
2256
2257 hw_prod = status_blk->status_completion_producer_index;
2258 sw_prod = cp->kcq_prod_idx;
2259 while (sw_prod != hw_prod) {
2260 kcqe_cnt = cnic_get_kcqes(dev, hw_prod, &sw_prod);
2261 if (kcqe_cnt == 0)
2262 goto done;
2263
2264 service_kcqes(dev, kcqe_cnt);
2265
2266 /* Tell compiler that status_blk fields can change. */
2267 barrier();
2268 if (status_idx != status_blk->status_idx) {
2269 status_idx = status_blk->status_idx;
2270 cp->kwq_con_idx = status_blk->status_cmd_consumer_index;
2271 hw_prod = status_blk->status_completion_producer_index;
2272 } else
2273 break;
2274 }
2275
2276 done:
2277 CNIC_WR16(dev, cp->kcq_io_addr, sw_prod);
2278 cp->kcq_prod_idx = sw_prod;
2279
2280 cnic_chk_pkt_rings(cp);
2281
2282 cp->last_status_idx = status_idx;
2283 CNIC_WR(dev, BNX2_PCICFG_INT_ACK_CMD, cp->int_num |
2284 BNX2_PCICFG_INT_ACK_CMD_INDEX_VALID | cp->last_status_idx);
2285 }
2286
2287 static irqreturn_t cnic_irq(int irq, void *dev_instance)
2288 {
2289 struct cnic_dev *dev = dev_instance;
2290 struct cnic_local *cp = dev->cnic_priv;
2291 u16 prod = cp->kcq_prod_idx & MAX_KCQ_IDX;
2292
2293 if (cp->ack_int)
2294 cp->ack_int(dev);
2295
2296 prefetch(cp->status_blk.gen);
2297 prefetch(&cp->kcq[KCQ_PG(prod)][KCQ_IDX(prod)]);
2298
2299 if (likely(test_bit(CNIC_F_CNIC_UP, &dev->flags)))
2300 tasklet_schedule(&cp->cnic_irq_task);
2301
2302 return IRQ_HANDLED;
2303 }
2304
2305 static inline void cnic_ack_bnx2x_int(struct cnic_dev *dev, u8 id, u8 storm,
2306 u16 index, u8 op, u8 update)
2307 {
2308 struct cnic_local *cp = dev->cnic_priv;
2309 u32 hc_addr = (HC_REG_COMMAND_REG + CNIC_PORT(cp) * 32 +
2310 COMMAND_REG_INT_ACK);
2311 struct igu_ack_register igu_ack;
2312
2313 igu_ack.status_block_index = index;
2314 igu_ack.sb_id_and_flags =
2315 ((id << IGU_ACK_REGISTER_STATUS_BLOCK_ID_SHIFT) |
2316 (storm << IGU_ACK_REGISTER_STORM_ID_SHIFT) |
2317 (update << IGU_ACK_REGISTER_UPDATE_INDEX_SHIFT) |
2318 (op << IGU_ACK_REGISTER_INTERRUPT_MODE_SHIFT));
2319
2320 CNIC_WR(dev, hc_addr, (*(u32 *)&igu_ack));
2321 }
2322
2323 static void cnic_ack_bnx2x_msix(struct cnic_dev *dev)
2324 {
2325 struct cnic_local *cp = dev->cnic_priv;
2326
2327 cnic_ack_bnx2x_int(dev, cp->status_blk_num, CSTORM_ID, 0,
2328 IGU_INT_DISABLE, 0);
2329 }
2330
2331 static void cnic_service_bnx2x_bh(unsigned long data)
2332 {
2333 struct cnic_dev *dev = (struct cnic_dev *) data;
2334 struct cnic_local *cp = dev->cnic_priv;
2335 u16 hw_prod, sw_prod;
2336 struct cstorm_status_block_c *sblk =
2337 &cp->status_blk.bnx2x->c_status_block;
2338 u32 status_idx = sblk->status_block_index;
2339 int kcqe_cnt;
2340
2341 if (unlikely(!test_bit(CNIC_F_CNIC_UP, &dev->flags)))
2342 return;
2343
2344 hw_prod = sblk->index_values[HC_INDEX_C_ISCSI_EQ_CONS];
2345 hw_prod = cp->hw_idx(hw_prod);
2346 sw_prod = cp->kcq_prod_idx;
2347 while (sw_prod != hw_prod) {
2348 kcqe_cnt = cnic_get_kcqes(dev, hw_prod, &sw_prod);
2349 if (kcqe_cnt == 0)
2350 goto done;
2351
2352 service_kcqes(dev, kcqe_cnt);
2353
2354 /* Tell compiler that sblk fields can change. */
2355 barrier();
2356 if (status_idx == sblk->status_block_index)
2357 break;
2358
2359 status_idx = sblk->status_block_index;
2360 hw_prod = sblk->index_values[HC_INDEX_C_ISCSI_EQ_CONS];
2361 hw_prod = cp->hw_idx(hw_prod);
2362 }
2363
2364 done:
2365 CNIC_WR16(dev, cp->kcq_io_addr, sw_prod + MAX_KCQ_IDX);
2366 cnic_ack_bnx2x_int(dev, cp->status_blk_num, CSTORM_ID,
2367 status_idx, IGU_INT_ENABLE, 1);
2368
2369 cp->kcq_prod_idx = sw_prod;
2370 }
2371
2372 static int cnic_service_bnx2x(void *data, void *status_blk)
2373 {
2374 struct cnic_dev *dev = data;
2375 struct cnic_local *cp = dev->cnic_priv;
2376 u16 prod = cp->kcq_prod_idx & MAX_KCQ_IDX;
2377
2378 if (likely(test_bit(CNIC_F_CNIC_UP, &dev->flags))) {
2379 prefetch(cp->status_blk.bnx2x);
2380 prefetch(&cp->kcq[KCQ_PG(prod)][KCQ_IDX(prod)]);
2381
2382 tasklet_schedule(&cp->cnic_irq_task);
2383 cnic_chk_pkt_rings(cp);
2384 }
2385
2386 return 0;
2387 }
2388
2389 static void cnic_ulp_stop(struct cnic_dev *dev)
2390 {
2391 struct cnic_local *cp = dev->cnic_priv;
2392 int if_type;
2393
2394 if (cp->cnic_uinfo)
2395 cnic_send_nlmsg(cp, ISCSI_KEVENT_IF_DOWN, NULL);
2396
2397 for (if_type = 0; if_type < MAX_CNIC_ULP_TYPE; if_type++) {
2398 struct cnic_ulp_ops *ulp_ops;
2399
2400 mutex_lock(&cnic_lock);
2401 ulp_ops = cp->ulp_ops[if_type];
2402 if (!ulp_ops) {
2403 mutex_unlock(&cnic_lock);
2404 continue;
2405 }
2406 set_bit(ULP_F_CALL_PENDING, &cp->ulp_flags[if_type]);
2407 mutex_unlock(&cnic_lock);
2408
2409 if (test_and_clear_bit(ULP_F_START, &cp->ulp_flags[if_type]))
2410 ulp_ops->cnic_stop(cp->ulp_handle[if_type]);
2411
2412 clear_bit(ULP_F_CALL_PENDING, &cp->ulp_flags[if_type]);
2413 }
2414 }
2415
2416 static void cnic_ulp_start(struct cnic_dev *dev)
2417 {
2418 struct cnic_local *cp = dev->cnic_priv;
2419 int if_type;
2420
2421 for (if_type = 0; if_type < MAX_CNIC_ULP_TYPE; if_type++) {
2422 struct cnic_ulp_ops *ulp_ops;
2423
2424 mutex_lock(&cnic_lock);
2425 ulp_ops = cp->ulp_ops[if_type];
2426 if (!ulp_ops || !ulp_ops->cnic_start) {
2427 mutex_unlock(&cnic_lock);
2428 continue;
2429 }
2430 set_bit(ULP_F_CALL_PENDING, &cp->ulp_flags[if_type]);
2431 mutex_unlock(&cnic_lock);
2432
2433 if (!test_and_set_bit(ULP_F_START, &cp->ulp_flags[if_type]))
2434 ulp_ops->cnic_start(cp->ulp_handle[if_type]);
2435
2436 clear_bit(ULP_F_CALL_PENDING, &cp->ulp_flags[if_type]);
2437 }
2438 }
2439
2440 static int cnic_ctl(void *data, struct cnic_ctl_info *info)
2441 {
2442 struct cnic_dev *dev = data;
2443
2444 switch (info->cmd) {
2445 case CNIC_CTL_STOP_CMD:
2446 cnic_hold(dev);
2447
2448 cnic_ulp_stop(dev);
2449 cnic_stop_hw(dev);
2450
2451 cnic_put(dev);
2452 break;
2453 case CNIC_CTL_START_CMD:
2454 cnic_hold(dev);
2455
2456 if (!cnic_start_hw(dev))
2457 cnic_ulp_start(dev);
2458
2459 cnic_put(dev);
2460 break;
2461 case CNIC_CTL_COMPLETION_CMD: {
2462 u32 cid = BNX2X_SW_CID(info->data.comp.cid);
2463 u32 l5_cid;
2464 struct cnic_local *cp = dev->cnic_priv;
2465
2466 if (cnic_get_l5_cid(cp, cid, &l5_cid) == 0) {
2467 struct cnic_context *ctx = &cp->ctx_tbl[l5_cid];
2468
2469 ctx->wait_cond = 1;
2470 wake_up(&ctx->waitq);
2471 }
2472 break;
2473 }
2474 default:
2475 return -EINVAL;
2476 }
2477 return 0;
2478 }
2479
2480 static void cnic_ulp_init(struct cnic_dev *dev)
2481 {
2482 int i;
2483 struct cnic_local *cp = dev->cnic_priv;
2484
2485 for (i = 0; i < MAX_CNIC_ULP_TYPE_EXT; i++) {
2486 struct cnic_ulp_ops *ulp_ops;
2487
2488 mutex_lock(&cnic_lock);
2489 ulp_ops = cnic_ulp_tbl[i];
2490 if (!ulp_ops || !ulp_ops->cnic_init) {
2491 mutex_unlock(&cnic_lock);
2492 continue;
2493 }
2494 ulp_get(ulp_ops);
2495 mutex_unlock(&cnic_lock);
2496
2497 if (!test_and_set_bit(ULP_F_INIT, &cp->ulp_flags[i]))
2498 ulp_ops->cnic_init(dev);
2499
2500 ulp_put(ulp_ops);
2501 }
2502 }
2503
2504 static void cnic_ulp_exit(struct cnic_dev *dev)
2505 {
2506 int i;
2507 struct cnic_local *cp = dev->cnic_priv;
2508
2509 for (i = 0; i < MAX_CNIC_ULP_TYPE_EXT; i++) {
2510 struct cnic_ulp_ops *ulp_ops;
2511
2512 mutex_lock(&cnic_lock);
2513 ulp_ops = cnic_ulp_tbl[i];
2514 if (!ulp_ops || !ulp_ops->cnic_exit) {
2515 mutex_unlock(&cnic_lock);
2516 continue;
2517 }
2518 ulp_get(ulp_ops);
2519 mutex_unlock(&cnic_lock);
2520
2521 if (test_and_clear_bit(ULP_F_INIT, &cp->ulp_flags[i]))
2522 ulp_ops->cnic_exit(dev);
2523
2524 ulp_put(ulp_ops);
2525 }
2526 }
2527
2528 static int cnic_cm_offload_pg(struct cnic_sock *csk)
2529 {
2530 struct cnic_dev *dev = csk->dev;
2531 struct l4_kwq_offload_pg *l4kwqe;
2532 struct kwqe *wqes[1];
2533
2534 l4kwqe = (struct l4_kwq_offload_pg *) &csk->kwqe1;
2535 memset(l4kwqe, 0, sizeof(*l4kwqe));
2536 wqes[0] = (struct kwqe *) l4kwqe;
2537
2538 l4kwqe->op_code = L4_KWQE_OPCODE_VALUE_OFFLOAD_PG;
2539 l4kwqe->flags =
2540 L4_LAYER_CODE << L4_KWQ_OFFLOAD_PG_LAYER_CODE_SHIFT;
2541 l4kwqe->l2hdr_nbytes = ETH_HLEN;
2542
2543 l4kwqe->da0 = csk->ha[0];
2544 l4kwqe->da1 = csk->ha[1];
2545 l4kwqe->da2 = csk->ha[2];
2546 l4kwqe->da3 = csk->ha[3];
2547 l4kwqe->da4 = csk->ha[4];
2548 l4kwqe->da5 = csk->ha[5];
2549
2550 l4kwqe->sa0 = dev->mac_addr[0];
2551 l4kwqe->sa1 = dev->mac_addr[1];
2552 l4kwqe->sa2 = dev->mac_addr[2];
2553 l4kwqe->sa3 = dev->mac_addr[3];
2554 l4kwqe->sa4 = dev->mac_addr[4];
2555 l4kwqe->sa5 = dev->mac_addr[5];
2556
2557 l4kwqe->etype = ETH_P_IP;
2558 l4kwqe->ipid_start = DEF_IPID_START;
2559 l4kwqe->host_opaque = csk->l5_cid;
2560
2561 if (csk->vlan_id) {
2562 l4kwqe->pg_flags |= L4_KWQ_OFFLOAD_PG_VLAN_TAGGING;
2563 l4kwqe->vlan_tag = csk->vlan_id;
2564 l4kwqe->l2hdr_nbytes += 4;
2565 }
2566
2567 return dev->submit_kwqes(dev, wqes, 1);
2568 }
2569
2570 static int cnic_cm_update_pg(struct cnic_sock *csk)
2571 {
2572 struct cnic_dev *dev = csk->dev;
2573 struct l4_kwq_update_pg *l4kwqe;
2574 struct kwqe *wqes[1];
2575
2576 l4kwqe = (struct l4_kwq_update_pg *) &csk->kwqe1;
2577 memset(l4kwqe, 0, sizeof(*l4kwqe));
2578 wqes[0] = (struct kwqe *) l4kwqe;
2579
2580 l4kwqe->opcode = L4_KWQE_OPCODE_VALUE_UPDATE_PG;
2581 l4kwqe->flags =
2582 L4_LAYER_CODE << L4_KWQ_UPDATE_PG_LAYER_CODE_SHIFT;
2583 l4kwqe->pg_cid = csk->pg_cid;
2584
2585 l4kwqe->da0 = csk->ha[0];
2586 l4kwqe->da1 = csk->ha[1];
2587 l4kwqe->da2 = csk->ha[2];
2588 l4kwqe->da3 = csk->ha[3];
2589 l4kwqe->da4 = csk->ha[4];
2590 l4kwqe->da5 = csk->ha[5];
2591
2592 l4kwqe->pg_host_opaque = csk->l5_cid;
2593 l4kwqe->pg_valids = L4_KWQ_UPDATE_PG_VALIDS_DA;
2594
2595 return dev->submit_kwqes(dev, wqes, 1);
2596 }
2597
2598 static int cnic_cm_upload_pg(struct cnic_sock *csk)
2599 {
2600 struct cnic_dev *dev = csk->dev;
2601 struct l4_kwq_upload *l4kwqe;
2602 struct kwqe *wqes[1];
2603
2604 l4kwqe = (struct l4_kwq_upload *) &csk->kwqe1;
2605 memset(l4kwqe, 0, sizeof(*l4kwqe));
2606 wqes[0] = (struct kwqe *) l4kwqe;
2607
2608 l4kwqe->opcode = L4_KWQE_OPCODE_VALUE_UPLOAD_PG;
2609 l4kwqe->flags =
2610 L4_LAYER_CODE << L4_KWQ_UPLOAD_LAYER_CODE_SHIFT;
2611 l4kwqe->cid = csk->pg_cid;
2612
2613 return dev->submit_kwqes(dev, wqes, 1);
2614 }
2615
2616 static int cnic_cm_conn_req(struct cnic_sock *csk)
2617 {
2618 struct cnic_dev *dev = csk->dev;
2619 struct l4_kwq_connect_req1 *l4kwqe1;
2620 struct l4_kwq_connect_req2 *l4kwqe2;
2621 struct l4_kwq_connect_req3 *l4kwqe3;
2622 struct kwqe *wqes[3];
2623 u8 tcp_flags = 0;
2624 int num_wqes = 2;
2625
2626 l4kwqe1 = (struct l4_kwq_connect_req1 *) &csk->kwqe1;
2627 l4kwqe2 = (struct l4_kwq_connect_req2 *) &csk->kwqe2;
2628 l4kwqe3 = (struct l4_kwq_connect_req3 *) &csk->kwqe3;
2629 memset(l4kwqe1, 0, sizeof(*l4kwqe1));
2630 memset(l4kwqe2, 0, sizeof(*l4kwqe2));
2631 memset(l4kwqe3, 0, sizeof(*l4kwqe3));
2632
2633 l4kwqe3->op_code = L4_KWQE_OPCODE_VALUE_CONNECT3;
2634 l4kwqe3->flags =
2635 L4_LAYER_CODE << L4_KWQ_CONNECT_REQ3_LAYER_CODE_SHIFT;
2636 l4kwqe3->ka_timeout = csk->ka_timeout;
2637 l4kwqe3->ka_interval = csk->ka_interval;
2638 l4kwqe3->ka_max_probe_count = csk->ka_max_probe_count;
2639 l4kwqe3->tos = csk->tos;
2640 l4kwqe3->ttl = csk->ttl;
2641 l4kwqe3->snd_seq_scale = csk->snd_seq_scale;
2642 l4kwqe3->pmtu = csk->mtu;
2643 l4kwqe3->rcv_buf = csk->rcv_buf;
2644 l4kwqe3->snd_buf = csk->snd_buf;
2645 l4kwqe3->seed = csk->seed;
2646
2647 wqes[0] = (struct kwqe *) l4kwqe1;
2648 if (test_bit(SK_F_IPV6, &csk->flags)) {
2649 wqes[1] = (struct kwqe *) l4kwqe2;
2650 wqes[2] = (struct kwqe *) l4kwqe3;
2651 num_wqes = 3;
2652
2653 l4kwqe1->conn_flags = L4_KWQ_CONNECT_REQ1_IP_V6;
2654 l4kwqe2->op_code = L4_KWQE_OPCODE_VALUE_CONNECT2;
2655 l4kwqe2->flags =
2656 L4_KWQ_CONNECT_REQ2_LINKED_WITH_NEXT |
2657 L4_LAYER_CODE << L4_KWQ_CONNECT_REQ2_LAYER_CODE_SHIFT;
2658 l4kwqe2->src_ip_v6_2 = be32_to_cpu(csk->src_ip[1]);
2659 l4kwqe2->src_ip_v6_3 = be32_to_cpu(csk->src_ip[2]);
2660 l4kwqe2->src_ip_v6_4 = be32_to_cpu(csk->src_ip[3]);
2661 l4kwqe2->dst_ip_v6_2 = be32_to_cpu(csk->dst_ip[1]);
2662 l4kwqe2->dst_ip_v6_3 = be32_to_cpu(csk->dst_ip[2]);
2663 l4kwqe2->dst_ip_v6_4 = be32_to_cpu(csk->dst_ip[3]);
2664 l4kwqe3->mss = l4kwqe3->pmtu - sizeof(struct ipv6hdr) -
2665 sizeof(struct tcphdr);
2666 } else {
2667 wqes[1] = (struct kwqe *) l4kwqe3;
2668 l4kwqe3->mss = l4kwqe3->pmtu - sizeof(struct iphdr) -
2669 sizeof(struct tcphdr);
2670 }
2671
2672 l4kwqe1->op_code = L4_KWQE_OPCODE_VALUE_CONNECT1;
2673 l4kwqe1->flags =
2674 (L4_LAYER_CODE << L4_KWQ_CONNECT_REQ1_LAYER_CODE_SHIFT) |
2675 L4_KWQ_CONNECT_REQ3_LINKED_WITH_NEXT;
2676 l4kwqe1->cid = csk->cid;
2677 l4kwqe1->pg_cid = csk->pg_cid;
2678 l4kwqe1->src_ip = be32_to_cpu(csk->src_ip[0]);
2679 l4kwqe1->dst_ip = be32_to_cpu(csk->dst_ip[0]);
2680 l4kwqe1->src_port = be16_to_cpu(csk->src_port);
2681 l4kwqe1->dst_port = be16_to_cpu(csk->dst_port);
2682 if (csk->tcp_flags & SK_TCP_NO_DELAY_ACK)
2683 tcp_flags |= L4_KWQ_CONNECT_REQ1_NO_DELAY_ACK;
2684 if (csk->tcp_flags & SK_TCP_KEEP_ALIVE)
2685 tcp_flags |= L4_KWQ_CONNECT_REQ1_KEEP_ALIVE;
2686 if (csk->tcp_flags & SK_TCP_NAGLE)
2687 tcp_flags |= L4_KWQ_CONNECT_REQ1_NAGLE_ENABLE;
2688 if (csk->tcp_flags & SK_TCP_TIMESTAMP)
2689 tcp_flags |= L4_KWQ_CONNECT_REQ1_TIME_STAMP;
2690 if (csk->tcp_flags & SK_TCP_SACK)
2691 tcp_flags |= L4_KWQ_CONNECT_REQ1_SACK;
2692 if (csk->tcp_flags & SK_TCP_SEG_SCALING)
2693 tcp_flags |= L4_KWQ_CONNECT_REQ1_SEG_SCALING;
2694
2695 l4kwqe1->tcp_flags = tcp_flags;
2696
2697 return dev->submit_kwqes(dev, wqes, num_wqes);
2698 }
2699
2700 static int cnic_cm_close_req(struct cnic_sock *csk)
2701 {
2702 struct cnic_dev *dev = csk->dev;
2703 struct l4_kwq_close_req *l4kwqe;
2704 struct kwqe *wqes[1];
2705
2706 l4kwqe = (struct l4_kwq_close_req *) &csk->kwqe2;
2707 memset(l4kwqe, 0, sizeof(*l4kwqe));
2708 wqes[0] = (struct kwqe *) l4kwqe;
2709
2710 l4kwqe->op_code = L4_KWQE_OPCODE_VALUE_CLOSE;
2711 l4kwqe->flags = L4_LAYER_CODE << L4_KWQ_CLOSE_REQ_LAYER_CODE_SHIFT;
2712 l4kwqe->cid = csk->cid;
2713
2714 return dev->submit_kwqes(dev, wqes, 1);
2715 }
2716
2717 static int cnic_cm_abort_req(struct cnic_sock *csk)
2718 {
2719 struct cnic_dev *dev = csk->dev;
2720 struct l4_kwq_reset_req *l4kwqe;
2721 struct kwqe *wqes[1];
2722
2723 l4kwqe = (struct l4_kwq_reset_req *) &csk->kwqe2;
2724 memset(l4kwqe, 0, sizeof(*l4kwqe));
2725 wqes[0] = (struct kwqe *) l4kwqe;
2726
2727 l4kwqe->op_code = L4_KWQE_OPCODE_VALUE_RESET;
2728 l4kwqe->flags = L4_LAYER_CODE << L4_KWQ_RESET_REQ_LAYER_CODE_SHIFT;
2729 l4kwqe->cid = csk->cid;
2730
2731 return dev->submit_kwqes(dev, wqes, 1);
2732 }
2733
2734 static int cnic_cm_create(struct cnic_dev *dev, int ulp_type, u32 cid,
2735 u32 l5_cid, struct cnic_sock **csk, void *context)
2736 {
2737 struct cnic_local *cp = dev->cnic_priv;
2738 struct cnic_sock *csk1;
2739
2740 if (l5_cid >= MAX_CM_SK_TBL_SZ)
2741 return -EINVAL;
2742
2743 csk1 = &cp->csk_tbl[l5_cid];
2744 if (atomic_read(&csk1->ref_count))
2745 return -EAGAIN;
2746
2747 if (test_and_set_bit(SK_F_INUSE, &csk1->flags))
2748 return -EBUSY;
2749
2750 csk1->dev = dev;
2751 csk1->cid = cid;
2752 csk1->l5_cid = l5_cid;
2753 csk1->ulp_type = ulp_type;
2754 csk1->context = context;
2755
2756 csk1->ka_timeout = DEF_KA_TIMEOUT;
2757 csk1->ka_interval = DEF_KA_INTERVAL;
2758 csk1->ka_max_probe_count = DEF_KA_MAX_PROBE_COUNT;
2759 csk1->tos = DEF_TOS;
2760 csk1->ttl = DEF_TTL;
2761 csk1->snd_seq_scale = DEF_SND_SEQ_SCALE;
2762 csk1->rcv_buf = DEF_RCV_BUF;
2763 csk1->snd_buf = DEF_SND_BUF;
2764 csk1->seed = DEF_SEED;
2765
2766 *csk = csk1;
2767 return 0;
2768 }
2769
2770 static void cnic_cm_cleanup(struct cnic_sock *csk)
2771 {
2772 if (csk->src_port) {
2773 struct cnic_dev *dev = csk->dev;
2774 struct cnic_local *cp = dev->cnic_priv;
2775
2776 cnic_free_id(&cp->csk_port_tbl, csk->src_port);
2777 csk->src_port = 0;
2778 }
2779 }
2780
2781 static void cnic_close_conn(struct cnic_sock *csk)
2782 {
2783 if (test_bit(SK_F_PG_OFFLD_COMPLETE, &csk->flags)) {
2784 cnic_cm_upload_pg(csk);
2785 clear_bit(SK_F_PG_OFFLD_COMPLETE, &csk->flags);
2786 }
2787 cnic_cm_cleanup(csk);
2788 }
2789
2790 static int cnic_cm_destroy(struct cnic_sock *csk)
2791 {
2792 if (!cnic_in_use(csk))
2793 return -EINVAL;
2794
2795 csk_hold(csk);
2796 clear_bit(SK_F_INUSE, &csk->flags);
2797 smp_mb__after_clear_bit();
2798 while (atomic_read(&csk->ref_count) != 1)
2799 msleep(1);
2800 cnic_cm_cleanup(csk);
2801
2802 csk->flags = 0;
2803 csk_put(csk);
2804 return 0;
2805 }
2806
2807 static inline u16 cnic_get_vlan(struct net_device *dev,
2808 struct net_device **vlan_dev)
2809 {
2810 if (dev->priv_flags & IFF_802_1Q_VLAN) {
2811 *vlan_dev = vlan_dev_real_dev(dev);
2812 return vlan_dev_vlan_id(dev);
2813 }
2814 *vlan_dev = dev;
2815 return 0;
2816 }
2817
2818 static int cnic_get_v4_route(struct sockaddr_in *dst_addr,
2819 struct dst_entry **dst)
2820 {
2821 #if defined(CONFIG_INET)
2822 struct flowi fl;
2823 int err;
2824 struct rtable *rt;
2825
2826 memset(&fl, 0, sizeof(fl));
2827 fl.nl_u.ip4_u.daddr = dst_addr->sin_addr.s_addr;
2828
2829 err = ip_route_output_key(&init_net, &rt, &fl);
2830 if (!err)
2831 *dst = &rt->dst;
2832 return err;
2833 #else
2834 return -ENETUNREACH;
2835 #endif
2836 }
2837
2838 static int cnic_get_v6_route(struct sockaddr_in6 *dst_addr,
2839 struct dst_entry **dst)
2840 {
2841 #if defined(CONFIG_IPV6) || (defined(CONFIG_IPV6_MODULE) && defined(MODULE))
2842 struct flowi fl;
2843
2844 memset(&fl, 0, sizeof(fl));
2845 ipv6_addr_copy(&fl.fl6_dst, &dst_addr->sin6_addr);
2846 if (ipv6_addr_type(&fl.fl6_dst) & IPV6_ADDR_LINKLOCAL)
2847 fl.oif = dst_addr->sin6_scope_id;
2848
2849 *dst = ip6_route_output(&init_net, NULL, &fl);
2850 if (*dst)
2851 return 0;
2852 #endif
2853
2854 return -ENETUNREACH;
2855 }
2856
2857 static struct cnic_dev *cnic_cm_select_dev(struct sockaddr_in *dst_addr,
2858 int ulp_type)
2859 {
2860 struct cnic_dev *dev = NULL;
2861 struct dst_entry *dst;
2862 struct net_device *netdev = NULL;
2863 int err = -ENETUNREACH;
2864
2865 if (dst_addr->sin_family == AF_INET)
2866 err = cnic_get_v4_route(dst_addr, &dst);
2867 else if (dst_addr->sin_family == AF_INET6) {
2868 struct sockaddr_in6 *dst_addr6 =
2869 (struct sockaddr_in6 *) dst_addr;
2870
2871 err = cnic_get_v6_route(dst_addr6, &dst);
2872 } else
2873 return NULL;
2874
2875 if (err)
2876 return NULL;
2877
2878 if (!dst->dev)
2879 goto done;
2880
2881 cnic_get_vlan(dst->dev, &netdev);
2882
2883 dev = cnic_from_netdev(netdev);
2884
2885 done:
2886 dst_release(dst);
2887 if (dev)
2888 cnic_put(dev);
2889 return dev;
2890 }
2891
2892 static int cnic_resolve_addr(struct cnic_sock *csk, struct cnic_sockaddr *saddr)
2893 {
2894 struct cnic_dev *dev = csk->dev;
2895 struct cnic_local *cp = dev->cnic_priv;
2896
2897 return cnic_send_nlmsg(cp, ISCSI_KEVENT_PATH_REQ, csk);
2898 }
2899
2900 static int cnic_get_route(struct cnic_sock *csk, struct cnic_sockaddr *saddr)
2901 {
2902 struct cnic_dev *dev = csk->dev;
2903 struct cnic_local *cp = dev->cnic_priv;
2904 int is_v6, rc = 0;
2905 struct dst_entry *dst = NULL;
2906 struct net_device *realdev;
2907 u32 local_port;
2908
2909 if (saddr->local.v6.sin6_family == AF_INET6 &&
2910 saddr->remote.v6.sin6_family == AF_INET6)
2911 is_v6 = 1;
2912 else if (saddr->local.v4.sin_family == AF_INET &&
2913 saddr->remote.v4.sin_family == AF_INET)
2914 is_v6 = 0;
2915 else
2916 return -EINVAL;
2917
2918 clear_bit(SK_F_IPV6, &csk->flags);
2919
2920 if (is_v6) {
2921 set_bit(SK_F_IPV6, &csk->flags);
2922 cnic_get_v6_route(&saddr->remote.v6, &dst);
2923
2924 memcpy(&csk->dst_ip[0], &saddr->remote.v6.sin6_addr,
2925 sizeof(struct in6_addr));
2926 csk->dst_port = saddr->remote.v6.sin6_port;
2927 local_port = saddr->local.v6.sin6_port;
2928
2929 } else {
2930 cnic_get_v4_route(&saddr->remote.v4, &dst);
2931
2932 csk->dst_ip[0] = saddr->remote.v4.sin_addr.s_addr;
2933 csk->dst_port = saddr->remote.v4.sin_port;
2934 local_port = saddr->local.v4.sin_port;
2935 }
2936
2937 csk->vlan_id = 0;
2938 csk->mtu = dev->netdev->mtu;
2939 if (dst && dst->dev) {
2940 u16 vlan = cnic_get_vlan(dst->dev, &realdev);
2941 if (realdev == dev->netdev) {
2942 csk->vlan_id = vlan;
2943 csk->mtu = dst_mtu(dst);
2944 }
2945 }
2946
2947 if (local_port >= CNIC_LOCAL_PORT_MIN &&
2948 local_port < CNIC_LOCAL_PORT_MAX) {
2949 if (cnic_alloc_id(&cp->csk_port_tbl, local_port))
2950 local_port = 0;
2951 } else
2952 local_port = 0;
2953
2954 if (!local_port) {
2955 local_port = cnic_alloc_new_id(&cp->csk_port_tbl);
2956 if (local_port == -1) {
2957 rc = -ENOMEM;
2958 goto err_out;
2959 }
2960 }
2961 csk->src_port = local_port;
2962
2963 err_out:
2964 dst_release(dst);
2965 return rc;
2966 }
2967
2968 static void cnic_init_csk_state(struct cnic_sock *csk)
2969 {
2970 csk->state = 0;
2971 clear_bit(SK_F_OFFLD_SCHED, &csk->flags);
2972 clear_bit(SK_F_CLOSING, &csk->flags);
2973 }
2974
2975 static int cnic_cm_connect(struct cnic_sock *csk, struct cnic_sockaddr *saddr)
2976 {
2977 int err = 0;
2978
2979 if (!cnic_in_use(csk))
2980 return -EINVAL;
2981
2982 if (test_and_set_bit(SK_F_CONNECT_START, &csk->flags))
2983 return -EINVAL;
2984
2985 cnic_init_csk_state(csk);
2986
2987 err = cnic_get_route(csk, saddr);
2988 if (err)
2989 goto err_out;
2990
2991 err = cnic_resolve_addr(csk, saddr);
2992 if (!err)
2993 return 0;
2994
2995 err_out:
2996 clear_bit(SK_F_CONNECT_START, &csk->flags);
2997 return err;
2998 }
2999
3000 static int cnic_cm_abort(struct cnic_sock *csk)
3001 {
3002 struct cnic_local *cp = csk->dev->cnic_priv;
3003 u32 opcode = L4_KCQE_OPCODE_VALUE_RESET_COMP;
3004
3005 if (!cnic_in_use(csk))
3006 return -EINVAL;
3007
3008 if (cnic_abort_prep(csk))
3009 return cnic_cm_abort_req(csk);
3010
3011 /* Getting here means that we haven't started connect, or
3012 * connect was not successful.
3013 */
3014
3015 cp->close_conn(csk, opcode);
3016 if (csk->state != opcode)
3017 return -EALREADY;
3018
3019 return 0;
3020 }
3021
3022 static int cnic_cm_close(struct cnic_sock *csk)
3023 {
3024 if (!cnic_in_use(csk))
3025 return -EINVAL;
3026
3027 if (cnic_close_prep(csk)) {
3028 csk->state = L4_KCQE_OPCODE_VALUE_CLOSE_COMP;
3029 return cnic_cm_close_req(csk);
3030 } else {
3031 return -EALREADY;
3032 }
3033 return 0;
3034 }
3035
3036 static void cnic_cm_upcall(struct cnic_local *cp, struct cnic_sock *csk,
3037 u8 opcode)
3038 {
3039 struct cnic_ulp_ops *ulp_ops;
3040 int ulp_type = csk->ulp_type;
3041
3042 rcu_read_lock();
3043 ulp_ops = rcu_dereference(cp->ulp_ops[ulp_type]);
3044 if (ulp_ops) {
3045 if (opcode == L4_KCQE_OPCODE_VALUE_CONNECT_COMPLETE)
3046 ulp_ops->cm_connect_complete(csk);
3047 else if (opcode == L4_KCQE_OPCODE_VALUE_CLOSE_COMP)
3048 ulp_ops->cm_close_complete(csk);
3049 else if (opcode == L4_KCQE_OPCODE_VALUE_RESET_RECEIVED)
3050 ulp_ops->cm_remote_abort(csk);
3051 else if (opcode == L4_KCQE_OPCODE_VALUE_RESET_COMP)
3052 ulp_ops->cm_abort_complete(csk);
3053 else if (opcode == L4_KCQE_OPCODE_VALUE_CLOSE_RECEIVED)
3054 ulp_ops->cm_remote_close(csk);
3055 }
3056 rcu_read_unlock();
3057 }
3058
3059 static int cnic_cm_set_pg(struct cnic_sock *csk)
3060 {
3061 if (cnic_offld_prep(csk)) {
3062 if (test_bit(SK_F_PG_OFFLD_COMPLETE, &csk->flags))
3063 cnic_cm_update_pg(csk);
3064 else
3065 cnic_cm_offload_pg(csk);
3066 }
3067 return 0;
3068 }
3069
3070 static void cnic_cm_process_offld_pg(struct cnic_dev *dev, struct l4_kcq *kcqe)
3071 {
3072 struct cnic_local *cp = dev->cnic_priv;
3073 u32 l5_cid = kcqe->pg_host_opaque;
3074 u8 opcode = kcqe->op_code;
3075 struct cnic_sock *csk = &cp->csk_tbl[l5_cid];
3076
3077 csk_hold(csk);
3078 if (!cnic_in_use(csk))
3079 goto done;
3080
3081 if (opcode == L4_KCQE_OPCODE_VALUE_UPDATE_PG) {
3082 clear_bit(SK_F_OFFLD_SCHED, &csk->flags);
3083 goto done;
3084 }
3085 /* Possible PG kcqe status: SUCCESS, OFFLOADED_PG, or CTX_ALLOC_FAIL */
3086 if (kcqe->status == L4_KCQE_COMPLETION_STATUS_CTX_ALLOC_FAIL) {
3087 clear_bit(SK_F_OFFLD_SCHED, &csk->flags);
3088 cnic_cm_upcall(cp, csk,
3089 L4_KCQE_OPCODE_VALUE_CONNECT_COMPLETE);
3090 goto done;
3091 }
3092
3093 csk->pg_cid = kcqe->pg_cid;
3094 set_bit(SK_F_PG_OFFLD_COMPLETE, &csk->flags);
3095 cnic_cm_conn_req(csk);
3096
3097 done:
3098 csk_put(csk);
3099 }
3100
3101 static void cnic_cm_process_kcqe(struct cnic_dev *dev, struct kcqe *kcqe)
3102 {
3103 struct cnic_local *cp = dev->cnic_priv;
3104 struct l4_kcq *l4kcqe = (struct l4_kcq *) kcqe;
3105 u8 opcode = l4kcqe->op_code;
3106 u32 l5_cid;
3107 struct cnic_sock *csk;
3108
3109 if (opcode == L4_KCQE_OPCODE_VALUE_OFFLOAD_PG ||
3110 opcode == L4_KCQE_OPCODE_VALUE_UPDATE_PG) {
3111 cnic_cm_process_offld_pg(dev, l4kcqe);
3112 return;
3113 }
3114
3115 l5_cid = l4kcqe->conn_id;
3116 if (opcode & 0x80)
3117 l5_cid = l4kcqe->cid;
3118 if (l5_cid >= MAX_CM_SK_TBL_SZ)
3119 return;
3120
3121 csk = &cp->csk_tbl[l5_cid];
3122 csk_hold(csk);
3123
3124 if (!cnic_in_use(csk)) {
3125 csk_put(csk);
3126 return;
3127 }
3128
3129 switch (opcode) {
3130 case L5CM_RAMROD_CMD_ID_TCP_CONNECT:
3131 if (l4kcqe->status != 0) {
3132 clear_bit(SK_F_OFFLD_SCHED, &csk->flags);
3133 cnic_cm_upcall(cp, csk,
3134 L4_KCQE_OPCODE_VALUE_CONNECT_COMPLETE);
3135 }
3136 break;
3137 case L4_KCQE_OPCODE_VALUE_CONNECT_COMPLETE:
3138 if (l4kcqe->status == 0)
3139 set_bit(SK_F_OFFLD_COMPLETE, &csk->flags);
3140
3141 smp_mb__before_clear_bit();
3142 clear_bit(SK_F_OFFLD_SCHED, &csk->flags);
3143 cnic_cm_upcall(cp, csk, opcode);
3144 break;
3145
3146 case L4_KCQE_OPCODE_VALUE_RESET_RECEIVED:
3147 case L4_KCQE_OPCODE_VALUE_CLOSE_COMP:
3148 case L4_KCQE_OPCODE_VALUE_RESET_COMP:
3149 case L5CM_RAMROD_CMD_ID_SEARCHER_DELETE:
3150 case L5CM_RAMROD_CMD_ID_TERMINATE_OFFLOAD:
3151 cp->close_conn(csk, opcode);
3152 break;
3153
3154 case L4_KCQE_OPCODE_VALUE_CLOSE_RECEIVED:
3155 cnic_cm_upcall(cp, csk, opcode);
3156 break;
3157 }
3158 csk_put(csk);
3159 }
3160
3161 static void cnic_cm_indicate_kcqe(void *data, struct kcqe *kcqe[], u32 num)
3162 {
3163 struct cnic_dev *dev = data;
3164 int i;
3165
3166 for (i = 0; i < num; i++)
3167 cnic_cm_process_kcqe(dev, kcqe[i]);
3168 }
3169
3170 static struct cnic_ulp_ops cm_ulp_ops = {
3171 .indicate_kcqes = cnic_cm_indicate_kcqe,
3172 };
3173
3174 static void cnic_cm_free_mem(struct cnic_dev *dev)
3175 {
3176 struct cnic_local *cp = dev->cnic_priv;
3177
3178 kfree(cp->csk_tbl);
3179 cp->csk_tbl = NULL;
3180 cnic_free_id_tbl(&cp->csk_port_tbl);
3181 }
3182
3183 static int cnic_cm_alloc_mem(struct cnic_dev *dev)
3184 {
3185 struct cnic_local *cp = dev->cnic_priv;
3186
3187 cp->csk_tbl = kzalloc(sizeof(struct cnic_sock) * MAX_CM_SK_TBL_SZ,
3188 GFP_KERNEL);
3189 if (!cp->csk_tbl)
3190 return -ENOMEM;
3191
3192 if (cnic_init_id_tbl(&cp->csk_port_tbl, CNIC_LOCAL_PORT_RANGE,
3193 CNIC_LOCAL_PORT_MIN)) {
3194 cnic_cm_free_mem(dev);
3195 return -ENOMEM;
3196 }
3197 return 0;
3198 }
3199
3200 static int cnic_ready_to_close(struct cnic_sock *csk, u32 opcode)
3201 {
3202 if (test_and_clear_bit(SK_F_OFFLD_COMPLETE, &csk->flags)) {
3203 /* Unsolicited RESET_COMP or RESET_RECEIVED */
3204 opcode = L4_KCQE_OPCODE_VALUE_RESET_RECEIVED;
3205 csk->state = opcode;
3206 }
3207
3208 /* 1. If event opcode matches the expected event in csk->state
3209 * 2. If the expected event is CLOSE_COMP, we accept any event
3210 * 3. If the expected event is 0, meaning the connection was never
3211 * never established, we accept the opcode from cm_abort.
3212 */
3213 if (opcode == csk->state || csk->state == 0 ||
3214 csk->state == L4_KCQE_OPCODE_VALUE_CLOSE_COMP) {
3215 if (!test_and_set_bit(SK_F_CLOSING, &csk->flags)) {
3216 if (csk->state == 0)
3217 csk->state = opcode;
3218 return 1;
3219 }
3220 }
3221 return 0;
3222 }
3223
3224 static void cnic_close_bnx2_conn(struct cnic_sock *csk, u32 opcode)
3225 {
3226 struct cnic_dev *dev = csk->dev;
3227 struct cnic_local *cp = dev->cnic_priv;
3228
3229 if (opcode == L4_KCQE_OPCODE_VALUE_RESET_RECEIVED) {
3230 cnic_cm_upcall(cp, csk, opcode);
3231 return;
3232 }
3233
3234 clear_bit(SK_F_CONNECT_START, &csk->flags);
3235 cnic_close_conn(csk);
3236 csk->state = opcode;
3237 cnic_cm_upcall(cp, csk, opcode);
3238 }
3239
3240 static void cnic_cm_stop_bnx2_hw(struct cnic_dev *dev)
3241 {
3242 }
3243
3244 static int cnic_cm_init_bnx2_hw(struct cnic_dev *dev)
3245 {
3246 u32 seed;
3247
3248 get_random_bytes(&seed, 4);
3249 cnic_ctx_wr(dev, 45, 0, seed);
3250 return 0;
3251 }
3252
3253 static void cnic_close_bnx2x_conn(struct cnic_sock *csk, u32 opcode)
3254 {
3255 struct cnic_dev *dev = csk->dev;
3256 struct cnic_local *cp = dev->cnic_priv;
3257 struct cnic_context *ctx = &cp->ctx_tbl[csk->l5_cid];
3258 union l5cm_specific_data l5_data;
3259 u32 cmd = 0;
3260 int close_complete = 0;
3261
3262 switch (opcode) {
3263 case L4_KCQE_OPCODE_VALUE_RESET_RECEIVED:
3264 case L4_KCQE_OPCODE_VALUE_CLOSE_COMP:
3265 case L4_KCQE_OPCODE_VALUE_RESET_COMP:
3266 if (cnic_ready_to_close(csk, opcode)) {
3267 if (test_bit(SK_F_PG_OFFLD_COMPLETE, &csk->flags))
3268 cmd = L5CM_RAMROD_CMD_ID_SEARCHER_DELETE;
3269 else
3270 close_complete = 1;
3271 }
3272 break;
3273 case L5CM_RAMROD_CMD_ID_SEARCHER_DELETE:
3274 cmd = L5CM_RAMROD_CMD_ID_TERMINATE_OFFLOAD;
3275 break;
3276 case L5CM_RAMROD_CMD_ID_TERMINATE_OFFLOAD:
3277 close_complete = 1;
3278 break;
3279 }
3280 if (cmd) {
3281 memset(&l5_data, 0, sizeof(l5_data));
3282
3283 cnic_submit_kwqe_16(dev, cmd, csk->cid, ISCSI_CONNECTION_TYPE,
3284 &l5_data);
3285 } else if (close_complete) {
3286 ctx->timestamp = jiffies;
3287 cnic_close_conn(csk);
3288 cnic_cm_upcall(cp, csk, csk->state);
3289 }
3290 }
3291
3292 static void cnic_cm_stop_bnx2x_hw(struct cnic_dev *dev)
3293 {
3294 }
3295
3296 static int cnic_cm_init_bnx2x_hw(struct cnic_dev *dev)
3297 {
3298 struct cnic_local *cp = dev->cnic_priv;
3299 int func = CNIC_FUNC(cp);
3300
3301 cnic_init_bnx2x_mac(dev);
3302 cnic_bnx2x_set_tcp_timestamp(dev, 1);
3303
3304 CNIC_WR16(dev, BAR_XSTRORM_INTMEM +
3305 XSTORM_ISCSI_LOCAL_VLAN_OFFSET(func), 0);
3306
3307 CNIC_WR(dev, BAR_XSTRORM_INTMEM +
3308 XSTORM_TCP_GLOBAL_DEL_ACK_COUNTER_ENABLED_OFFSET(func), 1);
3309 CNIC_WR(dev, BAR_XSTRORM_INTMEM +
3310 XSTORM_TCP_GLOBAL_DEL_ACK_COUNTER_MAX_COUNT_OFFSET(func),
3311 DEF_MAX_DA_COUNT);
3312
3313 CNIC_WR8(dev, BAR_XSTRORM_INTMEM +
3314 XSTORM_ISCSI_TCP_VARS_TTL_OFFSET(func), DEF_TTL);
3315 CNIC_WR8(dev, BAR_XSTRORM_INTMEM +
3316 XSTORM_ISCSI_TCP_VARS_TOS_OFFSET(func), DEF_TOS);
3317 CNIC_WR8(dev, BAR_XSTRORM_INTMEM +
3318 XSTORM_ISCSI_TCP_VARS_ADV_WND_SCL_OFFSET(func), 2);
3319 CNIC_WR(dev, BAR_XSTRORM_INTMEM +
3320 XSTORM_TCP_TX_SWS_TIMER_VAL_OFFSET(func), DEF_SWS_TIMER);
3321
3322 CNIC_WR(dev, BAR_TSTRORM_INTMEM + TSTORM_TCP_MAX_CWND_OFFSET(func),
3323 DEF_MAX_CWND);
3324 return 0;
3325 }
3326
3327 static int cnic_cm_open(struct cnic_dev *dev)
3328 {
3329 struct cnic_local *cp = dev->cnic_priv;
3330 int err;
3331
3332 err = cnic_cm_alloc_mem(dev);
3333 if (err)
3334 return err;
3335
3336 err = cp->start_cm(dev);
3337
3338 if (err)
3339 goto err_out;
3340
3341 dev->cm_create = cnic_cm_create;
3342 dev->cm_destroy = cnic_cm_destroy;
3343 dev->cm_connect = cnic_cm_connect;
3344 dev->cm_abort = cnic_cm_abort;
3345 dev->cm_close = cnic_cm_close;
3346 dev->cm_select_dev = cnic_cm_select_dev;
3347
3348 cp->ulp_handle[CNIC_ULP_L4] = dev;
3349 rcu_assign_pointer(cp->ulp_ops[CNIC_ULP_L4], &cm_ulp_ops);
3350 return 0;
3351
3352 err_out:
3353 cnic_cm_free_mem(dev);
3354 return err;
3355 }
3356
3357 static int cnic_cm_shutdown(struct cnic_dev *dev)
3358 {
3359 struct cnic_local *cp = dev->cnic_priv;
3360 int i;
3361
3362 cp->stop_cm(dev);
3363
3364 if (!cp->csk_tbl)
3365 return 0;
3366
3367 for (i = 0; i < MAX_CM_SK_TBL_SZ; i++) {
3368 struct cnic_sock *csk = &cp->csk_tbl[i];
3369
3370 clear_bit(SK_F_INUSE, &csk->flags);
3371 cnic_cm_cleanup(csk);
3372 }
3373 cnic_cm_free_mem(dev);
3374
3375 return 0;
3376 }
3377
3378 static void cnic_init_context(struct cnic_dev *dev, u32 cid)
3379 {
3380 u32 cid_addr;
3381 int i;
3382
3383 cid_addr = GET_CID_ADDR(cid);
3384
3385 for (i = 0; i < CTX_SIZE; i += 4)
3386 cnic_ctx_wr(dev, cid_addr, i, 0);
3387 }
3388
3389 static int cnic_setup_5709_context(struct cnic_dev *dev, int valid)
3390 {
3391 struct cnic_local *cp = dev->cnic_priv;
3392 int ret = 0, i;
3393 u32 valid_bit = valid ? BNX2_CTX_HOST_PAGE_TBL_DATA0_VALID : 0;
3394
3395 if (CHIP_NUM(cp) != CHIP_NUM_5709)
3396 return 0;
3397
3398 for (i = 0; i < cp->ctx_blks; i++) {
3399 int j;
3400 u32 idx = cp->ctx_arr[i].cid / cp->cids_per_blk;
3401 u32 val;
3402
3403 memset(cp->ctx_arr[i].ctx, 0, BCM_PAGE_SIZE);
3404
3405 CNIC_WR(dev, BNX2_CTX_HOST_PAGE_TBL_DATA0,
3406 (cp->ctx_arr[i].mapping & 0xffffffff) | valid_bit);
3407 CNIC_WR(dev, BNX2_CTX_HOST_PAGE_TBL_DATA1,
3408 (u64) cp->ctx_arr[i].mapping >> 32);
3409 CNIC_WR(dev, BNX2_CTX_HOST_PAGE_TBL_CTRL, idx |
3410 BNX2_CTX_HOST_PAGE_TBL_CTRL_WRITE_REQ);
3411 for (j = 0; j < 10; j++) {
3412
3413 val = CNIC_RD(dev, BNX2_CTX_HOST_PAGE_TBL_CTRL);
3414 if (!(val & BNX2_CTX_HOST_PAGE_TBL_CTRL_WRITE_REQ))
3415 break;
3416 udelay(5);
3417 }
3418 if (val & BNX2_CTX_HOST_PAGE_TBL_CTRL_WRITE_REQ) {
3419 ret = -EBUSY;
3420 break;
3421 }
3422 }
3423 return ret;
3424 }
3425
3426 static void cnic_free_irq(struct cnic_dev *dev)
3427 {
3428 struct cnic_local *cp = dev->cnic_priv;
3429 struct cnic_eth_dev *ethdev = cp->ethdev;
3430
3431 if (ethdev->drv_state & CNIC_DRV_STATE_USING_MSIX) {
3432 cp->disable_int_sync(dev);
3433 tasklet_disable(&cp->cnic_irq_task);
3434 free_irq(ethdev->irq_arr[0].vector, dev);
3435 }
3436 }
3437
3438 static int cnic_init_bnx2_irq(struct cnic_dev *dev)
3439 {
3440 struct cnic_local *cp = dev->cnic_priv;
3441 struct cnic_eth_dev *ethdev = cp->ethdev;
3442
3443 if (ethdev->drv_state & CNIC_DRV_STATE_USING_MSIX) {
3444 int err, i = 0;
3445 int sblk_num = cp->status_blk_num;
3446 u32 base = ((sblk_num - 1) * BNX2_HC_SB_CONFIG_SIZE) +
3447 BNX2_HC_SB_CONFIG_1;
3448
3449 CNIC_WR(dev, base, BNX2_HC_SB_CONFIG_1_ONE_SHOT);
3450
3451 CNIC_WR(dev, base + BNX2_HC_COMP_PROD_TRIP_OFF, (2 << 16) | 8);
3452 CNIC_WR(dev, base + BNX2_HC_COM_TICKS_OFF, (64 << 16) | 220);
3453 CNIC_WR(dev, base + BNX2_HC_CMD_TICKS_OFF, (64 << 16) | 220);
3454
3455 cp->last_status_idx = cp->status_blk.bnx2->status_idx;
3456 tasklet_init(&cp->cnic_irq_task, cnic_service_bnx2_msix,
3457 (unsigned long) dev);
3458 err = request_irq(ethdev->irq_arr[0].vector, cnic_irq, 0,
3459 "cnic", dev);
3460 if (err) {
3461 tasklet_disable(&cp->cnic_irq_task);
3462 return err;
3463 }
3464 while (cp->status_blk.bnx2->status_completion_producer_index &&
3465 i < 10) {
3466 CNIC_WR(dev, BNX2_HC_COALESCE_NOW,
3467 1 << (11 + sblk_num));
3468 udelay(10);
3469 i++;
3470 barrier();
3471 }
3472 if (cp->status_blk.bnx2->status_completion_producer_index) {
3473 cnic_free_irq(dev);
3474 goto failed;
3475 }
3476
3477 } else {
3478 struct status_block *sblk = cp->status_blk.gen;
3479 u32 hc_cmd = CNIC_RD(dev, BNX2_HC_COMMAND);
3480 int i = 0;
3481
3482 while (sblk->status_completion_producer_index && i < 10) {
3483 CNIC_WR(dev, BNX2_HC_COMMAND,
3484 hc_cmd | BNX2_HC_COMMAND_COAL_NOW_WO_INT);
3485 udelay(10);
3486 i++;
3487 barrier();
3488 }
3489 if (sblk->status_completion_producer_index)
3490 goto failed;
3491
3492 }
3493 return 0;
3494
3495 failed:
3496 netdev_err(dev->netdev, "KCQ index not resetting to 0\n");
3497 return -EBUSY;
3498 }
3499
3500 static void cnic_enable_bnx2_int(struct cnic_dev *dev)
3501 {
3502 struct cnic_local *cp = dev->cnic_priv;
3503 struct cnic_eth_dev *ethdev = cp->ethdev;
3504
3505 if (!(ethdev->drv_state & CNIC_DRV_STATE_USING_MSIX))
3506 return;
3507
3508 CNIC_WR(dev, BNX2_PCICFG_INT_ACK_CMD, cp->int_num |
3509 BNX2_PCICFG_INT_ACK_CMD_INDEX_VALID | cp->last_status_idx);
3510 }
3511
3512 static void cnic_disable_bnx2_int_sync(struct cnic_dev *dev)
3513 {
3514 struct cnic_local *cp = dev->cnic_priv;
3515 struct cnic_eth_dev *ethdev = cp->ethdev;
3516
3517 if (!(ethdev->drv_state & CNIC_DRV_STATE_USING_MSIX))
3518 return;
3519
3520 CNIC_WR(dev, BNX2_PCICFG_INT_ACK_CMD, cp->int_num |
3521 BNX2_PCICFG_INT_ACK_CMD_MASK_INT);
3522 CNIC_RD(dev, BNX2_PCICFG_INT_ACK_CMD);
3523 synchronize_irq(ethdev->irq_arr[0].vector);
3524 }
3525
3526 static void cnic_init_bnx2_tx_ring(struct cnic_dev *dev)
3527 {
3528 struct cnic_local *cp = dev->cnic_priv;
3529 struct cnic_eth_dev *ethdev = cp->ethdev;
3530 u32 cid_addr, tx_cid, sb_id;
3531 u32 val, offset0, offset1, offset2, offset3;
3532 int i;
3533 struct tx_bd *txbd;
3534 dma_addr_t buf_map;
3535 struct status_block *s_blk = cp->status_blk.gen;
3536
3537 sb_id = cp->status_blk_num;
3538 tx_cid = 20;
3539 cp->tx_cons_ptr = &s_blk->status_tx_quick_consumer_index2;
3540 if (ethdev->drv_state & CNIC_DRV_STATE_USING_MSIX) {
3541 struct status_block_msix *sblk = cp->status_blk.bnx2;
3542
3543 tx_cid = TX_TSS_CID + sb_id - 1;
3544 CNIC_WR(dev, BNX2_TSCH_TSS_CFG, (sb_id << 24) |
3545 (TX_TSS_CID << 7));
3546 cp->tx_cons_ptr = &sblk->status_tx_quick_consumer_index;
3547 }
3548 cp->tx_cons = *cp->tx_cons_ptr;
3549
3550 cid_addr = GET_CID_ADDR(tx_cid);
3551 if (CHIP_NUM(cp) == CHIP_NUM_5709) {
3552 u32 cid_addr2 = GET_CID_ADDR(tx_cid + 4) + 0x40;
3553
3554 for (i = 0; i < PHY_CTX_SIZE; i += 4)
3555 cnic_ctx_wr(dev, cid_addr2, i, 0);
3556
3557 offset0 = BNX2_L2CTX_TYPE_XI;
3558 offset1 = BNX2_L2CTX_CMD_TYPE_XI;
3559 offset2 = BNX2_L2CTX_TBDR_BHADDR_HI_XI;
3560 offset3 = BNX2_L2CTX_TBDR_BHADDR_LO_XI;
3561 } else {
3562 cnic_init_context(dev, tx_cid);
3563 cnic_init_context(dev, tx_cid + 1);
3564
3565 offset0 = BNX2_L2CTX_TYPE;
3566 offset1 = BNX2_L2CTX_CMD_TYPE;
3567 offset2 = BNX2_L2CTX_TBDR_BHADDR_HI;
3568 offset3 = BNX2_L2CTX_TBDR_BHADDR_LO;
3569 }
3570 val = BNX2_L2CTX_TYPE_TYPE_L2 | BNX2_L2CTX_TYPE_SIZE_L2;
3571 cnic_ctx_wr(dev, cid_addr, offset0, val);
3572
3573 val = BNX2_L2CTX_CMD_TYPE_TYPE_L2 | (8 << 16);
3574 cnic_ctx_wr(dev, cid_addr, offset1, val);
3575
3576 txbd = (struct tx_bd *) cp->l2_ring;
3577
3578 buf_map = cp->l2_buf_map;
3579 for (i = 0; i < MAX_TX_DESC_CNT; i++, txbd++) {
3580 txbd->tx_bd_haddr_hi = (u64) buf_map >> 32;
3581 txbd->tx_bd_haddr_lo = (u64) buf_map & 0xffffffff;
3582 }
3583 val = (u64) cp->l2_ring_map >> 32;
3584 cnic_ctx_wr(dev, cid_addr, offset2, val);
3585 txbd->tx_bd_haddr_hi = val;
3586
3587 val = (u64) cp->l2_ring_map & 0xffffffff;
3588 cnic_ctx_wr(dev, cid_addr, offset3, val);
3589 txbd->tx_bd_haddr_lo = val;
3590 }
3591
3592 static void cnic_init_bnx2_rx_ring(struct cnic_dev *dev)
3593 {
3594 struct cnic_local *cp = dev->cnic_priv;
3595 struct cnic_eth_dev *ethdev = cp->ethdev;
3596 u32 cid_addr, sb_id, val, coal_reg, coal_val;
3597 int i;
3598 struct rx_bd *rxbd;
3599 struct status_block *s_blk = cp->status_blk.gen;
3600
3601 sb_id = cp->status_blk_num;
3602 cnic_init_context(dev, 2);
3603 cp->rx_cons_ptr = &s_blk->status_rx_quick_consumer_index2;
3604 coal_reg = BNX2_HC_COMMAND;
3605 coal_val = CNIC_RD(dev, coal_reg);
3606 if (ethdev->drv_state & CNIC_DRV_STATE_USING_MSIX) {
3607 struct status_block_msix *sblk = cp->status_blk.bnx2;
3608
3609 cp->rx_cons_ptr = &sblk->status_rx_quick_consumer_index;
3610 coal_reg = BNX2_HC_COALESCE_NOW;
3611 coal_val = 1 << (11 + sb_id);
3612 }
3613 i = 0;
3614 while (!(*cp->rx_cons_ptr != 0) && i < 10) {
3615 CNIC_WR(dev, coal_reg, coal_val);
3616 udelay(10);
3617 i++;
3618 barrier();
3619 }
3620 cp->rx_cons = *cp->rx_cons_ptr;
3621
3622 cid_addr = GET_CID_ADDR(2);
3623 val = BNX2_L2CTX_CTX_TYPE_CTX_BD_CHN_TYPE_VALUE |
3624 BNX2_L2CTX_CTX_TYPE_SIZE_L2 | (0x02 << 8);
3625 cnic_ctx_wr(dev, cid_addr, BNX2_L2CTX_CTX_TYPE, val);
3626
3627 if (sb_id == 0)
3628 val = 2 << BNX2_L2CTX_L2_STATUSB_NUM_SHIFT;
3629 else
3630 val = BNX2_L2CTX_L2_STATUSB_NUM(sb_id);
3631 cnic_ctx_wr(dev, cid_addr, BNX2_L2CTX_HOST_BDIDX, val);
3632
3633 rxbd = (struct rx_bd *) (cp->l2_ring + BCM_PAGE_SIZE);
3634 for (i = 0; i < MAX_RX_DESC_CNT; i++, rxbd++) {
3635 dma_addr_t buf_map;
3636 int n = (i % cp->l2_rx_ring_size) + 1;
3637
3638 buf_map = cp->l2_buf_map + (n * cp->l2_single_buf_size);
3639 rxbd->rx_bd_len = cp->l2_single_buf_size;
3640 rxbd->rx_bd_flags = RX_BD_FLAGS_START | RX_BD_FLAGS_END;
3641 rxbd->rx_bd_haddr_hi = (u64) buf_map >> 32;
3642 rxbd->rx_bd_haddr_lo = (u64) buf_map & 0xffffffff;
3643 }
3644 val = (u64) (cp->l2_ring_map + BCM_PAGE_SIZE) >> 32;
3645 cnic_ctx_wr(dev, cid_addr, BNX2_L2CTX_NX_BDHADDR_HI, val);
3646 rxbd->rx_bd_haddr_hi = val;
3647
3648 val = (u64) (cp->l2_ring_map + BCM_PAGE_SIZE) & 0xffffffff;
3649 cnic_ctx_wr(dev, cid_addr, BNX2_L2CTX_NX_BDHADDR_LO, val);
3650 rxbd->rx_bd_haddr_lo = val;
3651
3652 val = cnic_reg_rd_ind(dev, BNX2_RXP_SCRATCH_RXP_FLOOD);
3653 cnic_reg_wr_ind(dev, BNX2_RXP_SCRATCH_RXP_FLOOD, val | (1 << 2));
3654 }
3655
3656 static void cnic_shutdown_bnx2_rx_ring(struct cnic_dev *dev)
3657 {
3658 struct kwqe *wqes[1], l2kwqe;
3659
3660 memset(&l2kwqe, 0, sizeof(l2kwqe));
3661 wqes[0] = &l2kwqe;
3662 l2kwqe.kwqe_op_flag = (L2_LAYER_CODE << KWQE_FLAGS_LAYER_SHIFT) |
3663 (L2_KWQE_OPCODE_VALUE_FLUSH <<
3664 KWQE_OPCODE_SHIFT) | 2;
3665 dev->submit_kwqes(dev, wqes, 1);
3666 }
3667
3668 static void cnic_set_bnx2_mac(struct cnic_dev *dev)
3669 {
3670 struct cnic_local *cp = dev->cnic_priv;
3671 u32 val;
3672
3673 val = cp->func << 2;
3674
3675 cp->shmem_base = cnic_reg_rd_ind(dev, BNX2_SHM_HDR_ADDR_0 + val);
3676
3677 val = cnic_reg_rd_ind(dev, cp->shmem_base +
3678 BNX2_PORT_HW_CFG_ISCSI_MAC_UPPER);
3679 dev->mac_addr[0] = (u8) (val >> 8);
3680 dev->mac_addr[1] = (u8) val;
3681
3682 CNIC_WR(dev, BNX2_EMAC_MAC_MATCH4, val);
3683
3684 val = cnic_reg_rd_ind(dev, cp->shmem_base +
3685 BNX2_PORT_HW_CFG_ISCSI_MAC_LOWER);
3686 dev->mac_addr[2] = (u8) (val >> 24);
3687 dev->mac_addr[3] = (u8) (val >> 16);
3688 dev->mac_addr[4] = (u8) (val >> 8);
3689 dev->mac_addr[5] = (u8) val;
3690
3691 CNIC_WR(dev, BNX2_EMAC_MAC_MATCH5, val);
3692
3693 val = 4 | BNX2_RPM_SORT_USER2_BC_EN;
3694 if (CHIP_NUM(cp) != CHIP_NUM_5709)
3695 val |= BNX2_RPM_SORT_USER2_PROM_VLAN;
3696
3697 CNIC_WR(dev, BNX2_RPM_SORT_USER2, 0x0);
3698 CNIC_WR(dev, BNX2_RPM_SORT_USER2, val);
3699 CNIC_WR(dev, BNX2_RPM_SORT_USER2, val | BNX2_RPM_SORT_USER2_ENA);
3700 }
3701
3702 static int cnic_start_bnx2_hw(struct cnic_dev *dev)
3703 {
3704 struct cnic_local *cp = dev->cnic_priv;
3705 struct cnic_eth_dev *ethdev = cp->ethdev;
3706 struct status_block *sblk = cp->status_blk.gen;
3707 u32 val;
3708 int err;
3709
3710 cnic_set_bnx2_mac(dev);
3711
3712 val = CNIC_RD(dev, BNX2_MQ_CONFIG);
3713 val &= ~BNX2_MQ_CONFIG_KNL_BYP_BLK_SIZE;
3714 if (BCM_PAGE_BITS > 12)
3715 val |= (12 - 8) << 4;
3716 else
3717 val |= (BCM_PAGE_BITS - 8) << 4;
3718
3719 CNIC_WR(dev, BNX2_MQ_CONFIG, val);
3720
3721 CNIC_WR(dev, BNX2_HC_COMP_PROD_TRIP, (2 << 16) | 8);
3722 CNIC_WR(dev, BNX2_HC_COM_TICKS, (64 << 16) | 220);
3723 CNIC_WR(dev, BNX2_HC_CMD_TICKS, (64 << 16) | 220);
3724
3725 err = cnic_setup_5709_context(dev, 1);
3726 if (err)
3727 return err;
3728
3729 cnic_init_context(dev, KWQ_CID);
3730 cnic_init_context(dev, KCQ_CID);
3731
3732 cp->kwq_cid_addr = GET_CID_ADDR(KWQ_CID);
3733 cp->kwq_io_addr = MB_GET_CID_ADDR(KWQ_CID) + L5_KRNLQ_HOST_QIDX;
3734
3735 cp->max_kwq_idx = MAX_KWQ_IDX;
3736 cp->kwq_prod_idx = 0;
3737 cp->kwq_con_idx = 0;
3738 set_bit(CNIC_LCL_FL_KWQ_INIT, &cp->cnic_local_flags);
3739
3740 if (CHIP_NUM(cp) == CHIP_NUM_5706 || CHIP_NUM(cp) == CHIP_NUM_5708)
3741 cp->kwq_con_idx_ptr = &sblk->status_rx_quick_consumer_index15;
3742 else
3743 cp->kwq_con_idx_ptr = &sblk->status_cmd_consumer_index;
3744
3745 /* Initialize the kernel work queue context. */
3746 val = KRNLQ_TYPE_TYPE_KRNLQ | KRNLQ_SIZE_TYPE_SIZE |
3747 (BCM_PAGE_BITS - 8) | KRNLQ_FLAGS_QE_SELF_SEQ;
3748 cnic_ctx_wr(dev, cp->kwq_cid_addr, L5_KRNLQ_TYPE, val);
3749
3750 val = (BCM_PAGE_SIZE / sizeof(struct kwqe) - 1) << 16;
3751 cnic_ctx_wr(dev, cp->kwq_cid_addr, L5_KRNLQ_QE_SELF_SEQ_MAX, val);
3752
3753 val = ((BCM_PAGE_SIZE / sizeof(struct kwqe)) << 16) | KWQ_PAGE_CNT;
3754 cnic_ctx_wr(dev, cp->kwq_cid_addr, L5_KRNLQ_PGTBL_NPAGES, val);
3755
3756 val = (u32) ((u64) cp->kwq_info.pgtbl_map >> 32);
3757 cnic_ctx_wr(dev, cp->kwq_cid_addr, L5_KRNLQ_PGTBL_HADDR_HI, val);
3758
3759 val = (u32) cp->kwq_info.pgtbl_map;
3760 cnic_ctx_wr(dev, cp->kwq_cid_addr, L5_KRNLQ_PGTBL_HADDR_LO, val);
3761
3762 cp->kcq_cid_addr = GET_CID_ADDR(KCQ_CID);
3763 cp->kcq_io_addr = MB_GET_CID_ADDR(KCQ_CID) + L5_KRNLQ_HOST_QIDX;
3764
3765 cp->kcq_prod_idx = 0;
3766
3767 /* Initialize the kernel complete queue context. */
3768 val = KRNLQ_TYPE_TYPE_KRNLQ | KRNLQ_SIZE_TYPE_SIZE |
3769 (BCM_PAGE_BITS - 8) | KRNLQ_FLAGS_QE_SELF_SEQ;
3770 cnic_ctx_wr(dev, cp->kcq_cid_addr, L5_KRNLQ_TYPE, val);
3771
3772 val = (BCM_PAGE_SIZE / sizeof(struct kcqe) - 1) << 16;
3773 cnic_ctx_wr(dev, cp->kcq_cid_addr, L5_KRNLQ_QE_SELF_SEQ_MAX, val);
3774
3775 val = ((BCM_PAGE_SIZE / sizeof(struct kcqe)) << 16) | KCQ_PAGE_CNT;
3776 cnic_ctx_wr(dev, cp->kcq_cid_addr, L5_KRNLQ_PGTBL_NPAGES, val);
3777
3778 val = (u32) ((u64) cp->kcq_info.pgtbl_map >> 32);
3779 cnic_ctx_wr(dev, cp->kcq_cid_addr, L5_KRNLQ_PGTBL_HADDR_HI, val);
3780
3781 val = (u32) cp->kcq_info.pgtbl_map;
3782 cnic_ctx_wr(dev, cp->kcq_cid_addr, L5_KRNLQ_PGTBL_HADDR_LO, val);
3783
3784 cp->int_num = 0;
3785 if (ethdev->drv_state & CNIC_DRV_STATE_USING_MSIX) {
3786 u32 sb_id = cp->status_blk_num;
3787 u32 sb = BNX2_L2CTX_L5_STATUSB_NUM(sb_id);
3788
3789 cp->int_num = sb_id << BNX2_PCICFG_INT_ACK_CMD_INT_NUM_SHIFT;
3790 cnic_ctx_wr(dev, cp->kwq_cid_addr, L5_KRNLQ_HOST_QIDX, sb);
3791 cnic_ctx_wr(dev, cp->kcq_cid_addr, L5_KRNLQ_HOST_QIDX, sb);
3792 }
3793
3794 /* Enable Commnad Scheduler notification when we write to the
3795 * host producer index of the kernel contexts. */
3796 CNIC_WR(dev, BNX2_MQ_KNL_CMD_MASK1, 2);
3797
3798 /* Enable Command Scheduler notification when we write to either
3799 * the Send Queue or Receive Queue producer indexes of the kernel
3800 * bypass contexts. */
3801 CNIC_WR(dev, BNX2_MQ_KNL_BYP_CMD_MASK1, 7);
3802 CNIC_WR(dev, BNX2_MQ_KNL_BYP_WRITE_MASK1, 7);
3803
3804 /* Notify COM when the driver post an application buffer. */
3805 CNIC_WR(dev, BNX2_MQ_KNL_RX_V2P_MASK2, 0x2000);
3806
3807 /* Set the CP and COM doorbells. These two processors polls the
3808 * doorbell for a non zero value before running. This must be done
3809 * after setting up the kernel queue contexts. */
3810 cnic_reg_wr_ind(dev, BNX2_CP_SCRATCH + 0x20, 1);
3811 cnic_reg_wr_ind(dev, BNX2_COM_SCRATCH + 0x20, 1);
3812
3813 cnic_init_bnx2_tx_ring(dev);
3814 cnic_init_bnx2_rx_ring(dev);
3815
3816 err = cnic_init_bnx2_irq(dev);
3817 if (err) {
3818 netdev_err(dev->netdev, "cnic_init_irq failed\n");
3819 cnic_reg_wr_ind(dev, BNX2_CP_SCRATCH + 0x20, 0);
3820 cnic_reg_wr_ind(dev, BNX2_COM_SCRATCH + 0x20, 0);
3821 return err;
3822 }
3823
3824 return 0;
3825 }
3826
3827 static void cnic_setup_bnx2x_context(struct cnic_dev *dev)
3828 {
3829 struct cnic_local *cp = dev->cnic_priv;
3830 struct cnic_eth_dev *ethdev = cp->ethdev;
3831 u32 start_offset = ethdev->ctx_tbl_offset;
3832 int i;
3833
3834 for (i = 0; i < cp->ctx_blks; i++) {
3835 struct cnic_ctx *ctx = &cp->ctx_arr[i];
3836 dma_addr_t map = ctx->mapping;
3837
3838 if (cp->ctx_align) {
3839 unsigned long mask = cp->ctx_align - 1;
3840
3841 map = (map + mask) & ~mask;
3842 }
3843
3844 cnic_ctx_tbl_wr(dev, start_offset + i, map);
3845 }
3846 }
3847
3848 static int cnic_init_bnx2x_irq(struct cnic_dev *dev)
3849 {
3850 struct cnic_local *cp = dev->cnic_priv;
3851 struct cnic_eth_dev *ethdev = cp->ethdev;
3852 int err = 0;
3853
3854 tasklet_init(&cp->cnic_irq_task, cnic_service_bnx2x_bh,
3855 (unsigned long) dev);
3856 if (ethdev->drv_state & CNIC_DRV_STATE_USING_MSIX) {
3857 err = request_irq(ethdev->irq_arr[0].vector, cnic_irq, 0,
3858 "cnic", dev);
3859 if (err)
3860 tasklet_disable(&cp->cnic_irq_task);
3861 }
3862 return err;
3863 }
3864
3865 static void cnic_enable_bnx2x_int(struct cnic_dev *dev)
3866 {
3867 struct cnic_local *cp = dev->cnic_priv;
3868 u8 sb_id = cp->status_blk_num;
3869 int port = CNIC_PORT(cp);
3870
3871 CNIC_WR8(dev, BAR_CSTRORM_INTMEM +
3872 CSTORM_SB_HC_TIMEOUT_C_OFFSET(port, sb_id,
3873 HC_INDEX_C_ISCSI_EQ_CONS),
3874 64 / 12);
3875 CNIC_WR16(dev, BAR_CSTRORM_INTMEM +
3876 CSTORM_SB_HC_DISABLE_C_OFFSET(port, sb_id,
3877 HC_INDEX_C_ISCSI_EQ_CONS), 0);
3878 }
3879
3880 static void cnic_disable_bnx2x_int_sync(struct cnic_dev *dev)
3881 {
3882 }
3883
3884 static void cnic_init_bnx2x_tx_ring(struct cnic_dev *dev)
3885 {
3886 struct cnic_local *cp = dev->cnic_priv;
3887 union eth_tx_bd_types *txbd = (union eth_tx_bd_types *) cp->l2_ring;
3888 struct eth_context *context;
3889 struct regpair context_addr;
3890 dma_addr_t buf_map;
3891 int func = CNIC_FUNC(cp);
3892 int port = CNIC_PORT(cp);
3893 int i;
3894 int cli = BNX2X_ISCSI_CL_ID(CNIC_E1HVN(cp));
3895 u32 val;
3896
3897 memset(txbd, 0, BCM_PAGE_SIZE);
3898
3899 buf_map = cp->l2_buf_map;
3900 for (i = 0; i < MAX_TX_DESC_CNT; i += 3, txbd += 3) {
3901 struct eth_tx_start_bd *start_bd = &txbd->start_bd;
3902 struct eth_tx_bd *reg_bd = &((txbd + 2)->reg_bd);
3903
3904 start_bd->addr_hi = cpu_to_le32((u64) buf_map >> 32);
3905 start_bd->addr_lo = cpu_to_le32(buf_map & 0xffffffff);
3906 reg_bd->addr_hi = start_bd->addr_hi;
3907 reg_bd->addr_lo = start_bd->addr_lo + 0x10;
3908 start_bd->nbytes = cpu_to_le16(0x10);
3909 start_bd->nbd = cpu_to_le16(3);
3910 start_bd->bd_flags.as_bitfield = ETH_TX_BD_FLAGS_START_BD;
3911 start_bd->general_data = (UNICAST_ADDRESS <<
3912 ETH_TX_START_BD_ETH_ADDR_TYPE_SHIFT);
3913 start_bd->general_data |= (1 << ETH_TX_START_BD_HDR_NBDS_SHIFT);
3914
3915 }
3916 context = cnic_get_bnx2x_ctx(dev, BNX2X_ISCSI_L2_CID, 1, &context_addr);
3917
3918 val = (u64) cp->l2_ring_map >> 32;
3919 txbd->next_bd.addr_hi = cpu_to_le32(val);
3920
3921 context->xstorm_st_context.tx_bd_page_base_hi = val;
3922
3923 val = (u64) cp->l2_ring_map & 0xffffffff;
3924 txbd->next_bd.addr_lo = cpu_to_le32(val);
3925
3926 context->xstorm_st_context.tx_bd_page_base_lo = val;
3927
3928 context->cstorm_st_context.sb_index_number =
3929 HC_INDEX_DEF_C_ETH_ISCSI_CQ_CONS;
3930 context->cstorm_st_context.status_block_id = BNX2X_DEF_SB_ID;
3931
3932 if (cli < MAX_X_STAT_COUNTER_ID)
3933 context->xstorm_st_context.statistics_data = cli |
3934 XSTORM_ETH_ST_CONTEXT_STATISTICS_ENABLE;
3935
3936 context->xstorm_ag_context.cdu_reserved =
3937 CDU_RSRVD_VALUE_TYPE_A(BNX2X_HW_CID(BNX2X_ISCSI_L2_CID, func),
3938 CDU_REGION_NUMBER_XCM_AG,
3939 ETH_CONNECTION_TYPE);
3940
3941 /* reset xstorm per client statistics */
3942 if (cli < MAX_X_STAT_COUNTER_ID) {
3943 val = BAR_XSTRORM_INTMEM +
3944 XSTORM_PER_COUNTER_ID_STATS_OFFSET(port, cli);
3945 for (i = 0; i < sizeof(struct xstorm_per_client_stats) / 4; i++)
3946 CNIC_WR(dev, val + i * 4, 0);
3947 }
3948
3949 cp->tx_cons_ptr =
3950 &cp->bnx2x_def_status_blk->c_def_status_block.index_values[
3951 HC_INDEX_DEF_C_ETH_ISCSI_CQ_CONS];
3952 }
3953
3954 static void cnic_init_bnx2x_rx_ring(struct cnic_dev *dev)
3955 {
3956 struct cnic_local *cp = dev->cnic_priv;
3957 struct eth_rx_bd *rxbd = (struct eth_rx_bd *) (cp->l2_ring +
3958 BCM_PAGE_SIZE);
3959 struct eth_rx_cqe_next_page *rxcqe = (struct eth_rx_cqe_next_page *)
3960 (cp->l2_ring + (2 * BCM_PAGE_SIZE));
3961 struct eth_context *context;
3962 struct regpair context_addr;
3963 int i;
3964 int port = CNIC_PORT(cp);
3965 int func = CNIC_FUNC(cp);
3966 int cli = BNX2X_ISCSI_CL_ID(CNIC_E1HVN(cp));
3967 u32 val;
3968 struct tstorm_eth_client_config tstorm_client = {0};
3969
3970 for (i = 0; i < BNX2X_MAX_RX_DESC_CNT; i++, rxbd++) {
3971 dma_addr_t buf_map;
3972 int n = (i % cp->l2_rx_ring_size) + 1;
3973
3974 buf_map = cp->l2_buf_map + (n * cp->l2_single_buf_size);
3975 rxbd->addr_hi = cpu_to_le32((u64) buf_map >> 32);
3976 rxbd->addr_lo = cpu_to_le32(buf_map & 0xffffffff);
3977 }
3978 context = cnic_get_bnx2x_ctx(dev, BNX2X_ISCSI_L2_CID, 0, &context_addr);
3979
3980 val = (u64) (cp->l2_ring_map + BCM_PAGE_SIZE) >> 32;
3981 rxbd->addr_hi = cpu_to_le32(val);
3982
3983 context->ustorm_st_context.common.bd_page_base_hi = val;
3984
3985 val = (u64) (cp->l2_ring_map + BCM_PAGE_SIZE) & 0xffffffff;
3986 rxbd->addr_lo = cpu_to_le32(val);
3987
3988 context->ustorm_st_context.common.bd_page_base_lo = val;
3989
3990 context->ustorm_st_context.common.sb_index_numbers =
3991 BNX2X_ISCSI_RX_SB_INDEX_NUM;
3992 context->ustorm_st_context.common.clientId = cli;
3993 context->ustorm_st_context.common.status_block_id = BNX2X_DEF_SB_ID;
3994 if (cli < MAX_U_STAT_COUNTER_ID) {
3995 context->ustorm_st_context.common.flags =
3996 USTORM_ETH_ST_CONTEXT_CONFIG_ENABLE_STATISTICS;
3997 context->ustorm_st_context.common.statistics_counter_id = cli;
3998 }
3999 context->ustorm_st_context.common.mc_alignment_log_size = 0;
4000 context->ustorm_st_context.common.bd_buff_size =
4001 cp->l2_single_buf_size;
4002
4003 context->ustorm_ag_context.cdu_usage =
4004 CDU_RSRVD_VALUE_TYPE_A(BNX2X_HW_CID(BNX2X_ISCSI_L2_CID, func),
4005 CDU_REGION_NUMBER_UCM_AG,
4006 ETH_CONNECTION_TYPE);
4007
4008 rxcqe += BNX2X_MAX_RCQ_DESC_CNT;
4009 val = (u64) (cp->l2_ring_map + (2 * BCM_PAGE_SIZE)) >> 32;
4010 rxcqe->addr_hi = cpu_to_le32(val);
4011
4012 CNIC_WR(dev, BAR_USTRORM_INTMEM +
4013 USTORM_CQE_PAGE_BASE_OFFSET(port, cli) + 4, val);
4014
4015 CNIC_WR(dev, BAR_USTRORM_INTMEM +
4016 USTORM_CQE_PAGE_NEXT_OFFSET(port, cli) + 4, val);
4017
4018 val = (u64) (cp->l2_ring_map + (2 * BCM_PAGE_SIZE)) & 0xffffffff;
4019 rxcqe->addr_lo = cpu_to_le32(val);
4020
4021 CNIC_WR(dev, BAR_USTRORM_INTMEM +
4022 USTORM_CQE_PAGE_BASE_OFFSET(port, cli), val);
4023
4024 CNIC_WR(dev, BAR_USTRORM_INTMEM +
4025 USTORM_CQE_PAGE_NEXT_OFFSET(port, cli), val);
4026
4027 /* client tstorm info */
4028 tstorm_client.mtu = cp->l2_single_buf_size - 14;
4029 tstorm_client.config_flags = TSTORM_ETH_CLIENT_CONFIG_E1HOV_REM_ENABLE;
4030
4031 if (cli < MAX_T_STAT_COUNTER_ID) {
4032 tstorm_client.config_flags |=
4033 TSTORM_ETH_CLIENT_CONFIG_STATSITICS_ENABLE;
4034 tstorm_client.statistics_counter_id = cli;
4035 }
4036
4037 CNIC_WR(dev, BAR_TSTRORM_INTMEM +
4038 TSTORM_CLIENT_CONFIG_OFFSET(port, cli),
4039 ((u32 *)&tstorm_client)[0]);
4040 CNIC_WR(dev, BAR_TSTRORM_INTMEM +
4041 TSTORM_CLIENT_CONFIG_OFFSET(port, cli) + 4,
4042 ((u32 *)&tstorm_client)[1]);
4043
4044 /* reset tstorm per client statistics */
4045 if (cli < MAX_T_STAT_COUNTER_ID) {
4046
4047 val = BAR_TSTRORM_INTMEM +
4048 TSTORM_PER_COUNTER_ID_STATS_OFFSET(port, cli);
4049 for (i = 0; i < sizeof(struct tstorm_per_client_stats) / 4; i++)
4050 CNIC_WR(dev, val + i * 4, 0);
4051 }
4052
4053 /* reset ustorm per client statistics */
4054 if (cli < MAX_U_STAT_COUNTER_ID) {
4055 val = BAR_USTRORM_INTMEM +
4056 USTORM_PER_COUNTER_ID_STATS_OFFSET(port, cli);
4057 for (i = 0; i < sizeof(struct ustorm_per_client_stats) / 4; i++)
4058 CNIC_WR(dev, val + i * 4, 0);
4059 }
4060
4061 cp->rx_cons_ptr =
4062 &cp->bnx2x_def_status_blk->u_def_status_block.index_values[
4063 HC_INDEX_DEF_U_ETH_ISCSI_RX_CQ_CONS];
4064 }
4065
4066 static void cnic_get_bnx2x_iscsi_info(struct cnic_dev *dev)
4067 {
4068 struct cnic_local *cp = dev->cnic_priv;
4069 u32 base, addr, val;
4070 int port = CNIC_PORT(cp);
4071
4072 dev->max_iscsi_conn = 0;
4073 base = CNIC_RD(dev, MISC_REG_SHARED_MEM_ADDR);
4074 if (base < 0xa0000 || base >= 0xc0000)
4075 return;
4076
4077 addr = BNX2X_SHMEM_ADDR(base,
4078 dev_info.port_hw_config[port].iscsi_mac_upper);
4079
4080 val = CNIC_RD(dev, addr);
4081
4082 dev->mac_addr[0] = (u8) (val >> 8);
4083 dev->mac_addr[1] = (u8) val;
4084
4085 addr = BNX2X_SHMEM_ADDR(base,
4086 dev_info.port_hw_config[port].iscsi_mac_lower);
4087
4088 val = CNIC_RD(dev, addr);
4089
4090 dev->mac_addr[2] = (u8) (val >> 24);
4091 dev->mac_addr[3] = (u8) (val >> 16);
4092 dev->mac_addr[4] = (u8) (val >> 8);
4093 dev->mac_addr[5] = (u8) val;
4094
4095 addr = BNX2X_SHMEM_ADDR(base, validity_map[port]);
4096 val = CNIC_RD(dev, addr);
4097
4098 if (!(val & SHR_MEM_VALIDITY_LIC_NO_KEY_IN_EFFECT)) {
4099 u16 val16;
4100
4101 addr = BNX2X_SHMEM_ADDR(base,
4102 drv_lic_key[port].max_iscsi_init_conn);
4103 val16 = CNIC_RD16(dev, addr);
4104
4105 if (val16)
4106 val16 ^= 0x1e1e;
4107 dev->max_iscsi_conn = val16;
4108 }
4109 if (BNX2X_CHIP_IS_E1H(cp->chip_id)) {
4110 int func = CNIC_FUNC(cp);
4111
4112 addr = BNX2X_SHMEM_ADDR(base,
4113 mf_cfg.func_mf_config[func].e1hov_tag);
4114 val = CNIC_RD(dev, addr);
4115 val &= FUNC_MF_CFG_E1HOV_TAG_MASK;
4116 if (val != FUNC_MF_CFG_E1HOV_TAG_DEFAULT) {
4117 addr = BNX2X_SHMEM_ADDR(base,
4118 mf_cfg.func_mf_config[func].config);
4119 val = CNIC_RD(dev, addr);
4120 val &= FUNC_MF_CFG_PROTOCOL_MASK;
4121 if (val != FUNC_MF_CFG_PROTOCOL_ISCSI)
4122 dev->max_iscsi_conn = 0;
4123 }
4124 }
4125 }
4126
4127 static int cnic_start_bnx2x_hw(struct cnic_dev *dev)
4128 {
4129 struct cnic_local *cp = dev->cnic_priv;
4130 int func = CNIC_FUNC(cp), ret, i;
4131 int port = CNIC_PORT(cp);
4132 u16 eq_idx;
4133 u8 sb_id = cp->status_blk_num;
4134
4135 ret = cnic_init_id_tbl(&cp->cid_tbl, MAX_ISCSI_TBL_SZ,
4136 cp->iscsi_start_cid);
4137
4138 if (ret)
4139 return -ENOMEM;
4140
4141 cp->kcq_io_addr = BAR_CSTRORM_INTMEM +
4142 CSTORM_ISCSI_EQ_PROD_OFFSET(func, 0);
4143 cp->kcq_prod_idx = 0;
4144
4145 cnic_get_bnx2x_iscsi_info(dev);
4146
4147 /* Only 1 EQ */
4148 CNIC_WR16(dev, cp->kcq_io_addr, MAX_KCQ_IDX);
4149 CNIC_WR(dev, BAR_CSTRORM_INTMEM +
4150 CSTORM_ISCSI_EQ_CONS_OFFSET(func, 0), 0);
4151 CNIC_WR(dev, BAR_CSTRORM_INTMEM +
4152 CSTORM_ISCSI_EQ_NEXT_PAGE_ADDR_OFFSET(func, 0),
4153 cp->kcq_info.pg_map_arr[1] & 0xffffffff);
4154 CNIC_WR(dev, BAR_CSTRORM_INTMEM +
4155 CSTORM_ISCSI_EQ_NEXT_PAGE_ADDR_OFFSET(func, 0) + 4,
4156 (u64) cp->kcq_info.pg_map_arr[1] >> 32);
4157 CNIC_WR(dev, BAR_CSTRORM_INTMEM +
4158 CSTORM_ISCSI_EQ_NEXT_EQE_ADDR_OFFSET(func, 0),
4159 cp->kcq_info.pg_map_arr[0] & 0xffffffff);
4160 CNIC_WR(dev, BAR_CSTRORM_INTMEM +
4161 CSTORM_ISCSI_EQ_NEXT_EQE_ADDR_OFFSET(func, 0) + 4,
4162 (u64) cp->kcq_info.pg_map_arr[0] >> 32);
4163 CNIC_WR8(dev, BAR_CSTRORM_INTMEM +
4164 CSTORM_ISCSI_EQ_NEXT_PAGE_ADDR_VALID_OFFSET(func, 0), 1);
4165 CNIC_WR16(dev, BAR_CSTRORM_INTMEM +
4166 CSTORM_ISCSI_EQ_SB_NUM_OFFSET(func, 0), cp->status_blk_num);
4167 CNIC_WR8(dev, BAR_CSTRORM_INTMEM +
4168 CSTORM_ISCSI_EQ_SB_INDEX_OFFSET(func, 0),
4169 HC_INDEX_C_ISCSI_EQ_CONS);
4170
4171 for (i = 0; i < cp->conn_buf_info.num_pages; i++) {
4172 CNIC_WR(dev, BAR_TSTRORM_INTMEM +
4173 TSTORM_ISCSI_CONN_BUF_PBL_OFFSET(func, i),
4174 cp->conn_buf_info.pgtbl[2 * i]);
4175 CNIC_WR(dev, BAR_TSTRORM_INTMEM +
4176 TSTORM_ISCSI_CONN_BUF_PBL_OFFSET(func, i) + 4,
4177 cp->conn_buf_info.pgtbl[(2 * i) + 1]);
4178 }
4179
4180 CNIC_WR(dev, BAR_USTRORM_INTMEM +
4181 USTORM_ISCSI_GLOBAL_BUF_PHYS_ADDR_OFFSET(func),
4182 cp->gbl_buf_info.pg_map_arr[0] & 0xffffffff);
4183 CNIC_WR(dev, BAR_USTRORM_INTMEM +
4184 USTORM_ISCSI_GLOBAL_BUF_PHYS_ADDR_OFFSET(func) + 4,
4185 (u64) cp->gbl_buf_info.pg_map_arr[0] >> 32);
4186
4187 cnic_setup_bnx2x_context(dev);
4188
4189 eq_idx = CNIC_RD16(dev, BAR_CSTRORM_INTMEM +
4190 CSTORM_SB_HOST_STATUS_BLOCK_C_OFFSET(port, sb_id) +
4191 offsetof(struct cstorm_status_block_c,
4192 index_values[HC_INDEX_C_ISCSI_EQ_CONS]));
4193 if (eq_idx != 0) {
4194 netdev_err(dev->netdev, "EQ cons index %x != 0\n", eq_idx);
4195 return -EBUSY;
4196 }
4197 ret = cnic_init_bnx2x_irq(dev);
4198 if (ret)
4199 return ret;
4200
4201 cnic_init_bnx2x_tx_ring(dev);
4202 cnic_init_bnx2x_rx_ring(dev);
4203
4204 return 0;
4205 }
4206
4207 static void cnic_init_rings(struct cnic_dev *dev)
4208 {
4209 if (test_bit(CNIC_F_BNX2_CLASS, &dev->flags)) {
4210 cnic_init_bnx2_tx_ring(dev);
4211 cnic_init_bnx2_rx_ring(dev);
4212 } else if (test_bit(CNIC_F_BNX2X_CLASS, &dev->flags)) {
4213 struct cnic_local *cp = dev->cnic_priv;
4214 u32 cli = BNX2X_ISCSI_CL_ID(CNIC_E1HVN(cp));
4215 union l5cm_specific_data l5_data;
4216 struct ustorm_eth_rx_producers rx_prods = {0};
4217 u32 off, i;
4218
4219 rx_prods.bd_prod = 0;
4220 rx_prods.cqe_prod = BNX2X_MAX_RCQ_DESC_CNT;
4221 barrier();
4222
4223 off = BAR_USTRORM_INTMEM +
4224 USTORM_RX_PRODS_OFFSET(CNIC_PORT(cp), cli);
4225
4226 for (i = 0; i < sizeof(struct ustorm_eth_rx_producers) / 4; i++)
4227 CNIC_WR(dev, off + i * 4, ((u32 *) &rx_prods)[i]);
4228
4229 set_bit(CNIC_LCL_FL_L2_WAIT, &cp->cnic_local_flags);
4230
4231 cnic_init_bnx2x_tx_ring(dev);
4232 cnic_init_bnx2x_rx_ring(dev);
4233
4234 l5_data.phy_address.lo = cli;
4235 l5_data.phy_address.hi = 0;
4236 cnic_submit_kwqe_16(dev, RAMROD_CMD_ID_ETH_CLIENT_SETUP,
4237 BNX2X_ISCSI_L2_CID, ETH_CONNECTION_TYPE, &l5_data);
4238 i = 0;
4239 while (test_bit(CNIC_LCL_FL_L2_WAIT, &cp->cnic_local_flags) &&
4240 ++i < 10)
4241 msleep(1);
4242
4243 if (test_bit(CNIC_LCL_FL_L2_WAIT, &cp->cnic_local_flags))
4244 netdev_err(dev->netdev,
4245 "iSCSI CLIENT_SETUP did not complete\n");
4246 cnic_kwq_completion(dev, 1);
4247 cnic_ring_ctl(dev, BNX2X_ISCSI_L2_CID, cli, 1);
4248 }
4249 }
4250
4251 static void cnic_shutdown_rings(struct cnic_dev *dev)
4252 {
4253 if (test_bit(CNIC_F_BNX2_CLASS, &dev->flags)) {
4254 cnic_shutdown_bnx2_rx_ring(dev);
4255 } else if (test_bit(CNIC_F_BNX2X_CLASS, &dev->flags)) {
4256 struct cnic_local *cp = dev->cnic_priv;
4257 u32 cli = BNX2X_ISCSI_CL_ID(CNIC_E1HVN(cp));
4258 union l5cm_specific_data l5_data;
4259 int i;
4260
4261 cnic_ring_ctl(dev, BNX2X_ISCSI_L2_CID, cli, 0);
4262
4263 set_bit(CNIC_LCL_FL_L2_WAIT, &cp->cnic_local_flags);
4264
4265 l5_data.phy_address.lo = cli;
4266 l5_data.phy_address.hi = 0;
4267 cnic_submit_kwqe_16(dev, RAMROD_CMD_ID_ETH_HALT,
4268 BNX2X_ISCSI_L2_CID, ETH_CONNECTION_TYPE, &l5_data);
4269 i = 0;
4270 while (test_bit(CNIC_LCL_FL_L2_WAIT, &cp->cnic_local_flags) &&
4271 ++i < 10)
4272 msleep(1);
4273
4274 if (test_bit(CNIC_LCL_FL_L2_WAIT, &cp->cnic_local_flags))
4275 netdev_err(dev->netdev,
4276 "iSCSI CLIENT_HALT did not complete\n");
4277 cnic_kwq_completion(dev, 1);
4278
4279 memset(&l5_data, 0, sizeof(l5_data));
4280 cnic_submit_kwqe_16(dev, RAMROD_CMD_ID_ETH_CFC_DEL,
4281 BNX2X_ISCSI_L2_CID, ETH_CONNECTION_TYPE |
4282 (1 << SPE_HDR_COMMON_RAMROD_SHIFT), &l5_data);
4283 msleep(10);
4284 }
4285 }
4286
4287 static int cnic_register_netdev(struct cnic_dev *dev)
4288 {
4289 struct cnic_local *cp = dev->cnic_priv;
4290 struct cnic_eth_dev *ethdev = cp->ethdev;
4291 int err;
4292
4293 if (!ethdev)
4294 return -ENODEV;
4295
4296 if (ethdev->drv_state & CNIC_DRV_STATE_REGD)
4297 return 0;
4298
4299 err = ethdev->drv_register_cnic(dev->netdev, cp->cnic_ops, dev);
4300 if (err)
4301 netdev_err(dev->netdev, "register_cnic failed\n");
4302
4303 return err;
4304 }
4305
4306 static void cnic_unregister_netdev(struct cnic_dev *dev)
4307 {
4308 struct cnic_local *cp = dev->cnic_priv;
4309 struct cnic_eth_dev *ethdev = cp->ethdev;
4310
4311 if (!ethdev)
4312 return;
4313
4314 ethdev->drv_unregister_cnic(dev->netdev);
4315 }
4316
4317 static int cnic_start_hw(struct cnic_dev *dev)
4318 {
4319 struct cnic_local *cp = dev->cnic_priv;
4320 struct cnic_eth_dev *ethdev = cp->ethdev;
4321 int err;
4322
4323 if (test_bit(CNIC_F_CNIC_UP, &dev->flags))
4324 return -EALREADY;
4325
4326 dev->regview = ethdev->io_base;
4327 cp->chip_id = ethdev->chip_id;
4328 pci_dev_get(dev->pcidev);
4329 cp->func = PCI_FUNC(dev->pcidev->devfn);
4330 cp->status_blk.gen = ethdev->irq_arr[0].status_blk;
4331 cp->status_blk_num = ethdev->irq_arr[0].status_blk_num;
4332
4333 err = cp->alloc_resc(dev);
4334 if (err) {
4335 netdev_err(dev->netdev, "allocate resource failure\n");
4336 goto err1;
4337 }
4338
4339 err = cp->start_hw(dev);
4340 if (err)
4341 goto err1;
4342
4343 err = cnic_cm_open(dev);
4344 if (err)
4345 goto err1;
4346
4347 set_bit(CNIC_F_CNIC_UP, &dev->flags);
4348
4349 cp->enable_int(dev);
4350
4351 return 0;
4352
4353 err1:
4354 cp->free_resc(dev);
4355 pci_dev_put(dev->pcidev);
4356 return err;
4357 }
4358
4359 static void cnic_stop_bnx2_hw(struct cnic_dev *dev)
4360 {
4361 cnic_disable_bnx2_int_sync(dev);
4362
4363 cnic_reg_wr_ind(dev, BNX2_CP_SCRATCH + 0x20, 0);
4364 cnic_reg_wr_ind(dev, BNX2_COM_SCRATCH + 0x20, 0);
4365
4366 cnic_init_context(dev, KWQ_CID);
4367 cnic_init_context(dev, KCQ_CID);
4368
4369 cnic_setup_5709_context(dev, 0);
4370 cnic_free_irq(dev);
4371
4372 cnic_free_resc(dev);
4373 }
4374
4375
4376 static void cnic_stop_bnx2x_hw(struct cnic_dev *dev)
4377 {
4378 struct cnic_local *cp = dev->cnic_priv;
4379 u8 sb_id = cp->status_blk_num;
4380 int port = CNIC_PORT(cp);
4381
4382 cnic_free_irq(dev);
4383 CNIC_WR16(dev, BAR_CSTRORM_INTMEM +
4384 CSTORM_SB_HOST_STATUS_BLOCK_C_OFFSET(port, sb_id) +
4385 offsetof(struct cstorm_status_block_c,
4386 index_values[HC_INDEX_C_ISCSI_EQ_CONS]),
4387 0);
4388 CNIC_WR(dev, BAR_CSTRORM_INTMEM +
4389 CSTORM_ISCSI_EQ_CONS_OFFSET(cp->func, 0), 0);
4390 CNIC_WR16(dev, cp->kcq_io_addr, 0);
4391 cnic_free_resc(dev);
4392 }
4393
4394 static void cnic_stop_hw(struct cnic_dev *dev)
4395 {
4396 if (test_bit(CNIC_F_CNIC_UP, &dev->flags)) {
4397 struct cnic_local *cp = dev->cnic_priv;
4398 int i = 0;
4399
4400 /* Need to wait for the ring shutdown event to complete
4401 * before clearing the CNIC_UP flag.
4402 */
4403 while (cp->uio_dev != -1 && i < 15) {
4404 msleep(100);
4405 i++;
4406 }
4407 clear_bit(CNIC_F_CNIC_UP, &dev->flags);
4408 rcu_assign_pointer(cp->ulp_ops[CNIC_ULP_L4], NULL);
4409 synchronize_rcu();
4410 cnic_cm_shutdown(dev);
4411 cp->stop_hw(dev);
4412 pci_dev_put(dev->pcidev);
4413 }
4414 }
4415
4416 static void cnic_free_dev(struct cnic_dev *dev)
4417 {
4418 int i = 0;
4419
4420 while ((atomic_read(&dev->ref_count) != 0) && i < 10) {
4421 msleep(100);
4422 i++;
4423 }
4424 if (atomic_read(&dev->ref_count) != 0)
4425 netdev_err(dev->netdev, "Failed waiting for ref count to go to zero\n");
4426
4427 netdev_info(dev->netdev, "Removed CNIC device\n");
4428 dev_put(dev->netdev);
4429 kfree(dev);
4430 }
4431
4432 static struct cnic_dev *cnic_alloc_dev(struct net_device *dev,
4433 struct pci_dev *pdev)
4434 {
4435 struct cnic_dev *cdev;
4436 struct cnic_local *cp;
4437 int alloc_size;
4438
4439 alloc_size = sizeof(struct cnic_dev) + sizeof(struct cnic_local);
4440
4441 cdev = kzalloc(alloc_size , GFP_KERNEL);
4442 if (cdev == NULL) {
4443 netdev_err(dev, "allocate dev struct failure\n");
4444 return NULL;
4445 }
4446
4447 cdev->netdev = dev;
4448 cdev->cnic_priv = (char *)cdev + sizeof(struct cnic_dev);
4449 cdev->register_device = cnic_register_device;
4450 cdev->unregister_device = cnic_unregister_device;
4451 cdev->iscsi_nl_msg_recv = cnic_iscsi_nl_msg_recv;
4452
4453 cp = cdev->cnic_priv;
4454 cp->dev = cdev;
4455 cp->uio_dev = -1;
4456 cp->l2_single_buf_size = 0x400;
4457 cp->l2_rx_ring_size = 3;
4458
4459 spin_lock_init(&cp->cnic_ulp_lock);
4460
4461 netdev_info(dev, "Added CNIC device\n");
4462
4463 return cdev;
4464 }
4465
4466 static struct cnic_dev *init_bnx2_cnic(struct net_device *dev)
4467 {
4468 struct pci_dev *pdev;
4469 struct cnic_dev *cdev;
4470 struct cnic_local *cp;
4471 struct cnic_eth_dev *ethdev = NULL;
4472 struct cnic_eth_dev *(*probe)(struct net_device *) = NULL;
4473
4474 probe = symbol_get(bnx2_cnic_probe);
4475 if (probe) {
4476 ethdev = (*probe)(dev);
4477 symbol_put(bnx2_cnic_probe);
4478 }
4479 if (!ethdev)
4480 return NULL;
4481
4482 pdev = ethdev->pdev;
4483 if (!pdev)
4484 return NULL;
4485
4486 dev_hold(dev);
4487 pci_dev_get(pdev);
4488 if (pdev->device == PCI_DEVICE_ID_NX2_5709 ||
4489 pdev->device == PCI_DEVICE_ID_NX2_5709S) {
4490 u8 rev;
4491
4492 pci_read_config_byte(pdev, PCI_REVISION_ID, &rev);
4493 if (rev < 0x10) {
4494 pci_dev_put(pdev);
4495 goto cnic_err;
4496 }
4497 }
4498 pci_dev_put(pdev);
4499
4500 cdev = cnic_alloc_dev(dev, pdev);
4501 if (cdev == NULL)
4502 goto cnic_err;
4503
4504 set_bit(CNIC_F_BNX2_CLASS, &cdev->flags);
4505 cdev->submit_kwqes = cnic_submit_bnx2_kwqes;
4506
4507 cp = cdev->cnic_priv;
4508 cp->ethdev = ethdev;
4509 cdev->pcidev = pdev;
4510
4511 cp->cnic_ops = &cnic_bnx2_ops;
4512 cp->start_hw = cnic_start_bnx2_hw;
4513 cp->stop_hw = cnic_stop_bnx2_hw;
4514 cp->setup_pgtbl = cnic_setup_page_tbl;
4515 cp->alloc_resc = cnic_alloc_bnx2_resc;
4516 cp->free_resc = cnic_free_resc;
4517 cp->start_cm = cnic_cm_init_bnx2_hw;
4518 cp->stop_cm = cnic_cm_stop_bnx2_hw;
4519 cp->enable_int = cnic_enable_bnx2_int;
4520 cp->disable_int_sync = cnic_disable_bnx2_int_sync;
4521 cp->close_conn = cnic_close_bnx2_conn;
4522 cp->next_idx = cnic_bnx2_next_idx;
4523 cp->hw_idx = cnic_bnx2_hw_idx;
4524 return cdev;
4525
4526 cnic_err:
4527 dev_put(dev);
4528 return NULL;
4529 }
4530
4531 static struct cnic_dev *init_bnx2x_cnic(struct net_device *dev)
4532 {
4533 struct pci_dev *pdev;
4534 struct cnic_dev *cdev;
4535 struct cnic_local *cp;
4536 struct cnic_eth_dev *ethdev = NULL;
4537 struct cnic_eth_dev *(*probe)(struct net_device *) = NULL;
4538
4539 probe = symbol_get(bnx2x_cnic_probe);
4540 if (probe) {
4541 ethdev = (*probe)(dev);
4542 symbol_put(bnx2x_cnic_probe);
4543 }
4544 if (!ethdev)
4545 return NULL;
4546
4547 pdev = ethdev->pdev;
4548 if (!pdev)
4549 return NULL;
4550
4551 dev_hold(dev);
4552 cdev = cnic_alloc_dev(dev, pdev);
4553 if (cdev == NULL) {
4554 dev_put(dev);
4555 return NULL;
4556 }
4557
4558 set_bit(CNIC_F_BNX2X_CLASS, &cdev->flags);
4559 cdev->submit_kwqes = cnic_submit_bnx2x_kwqes;
4560
4561 cp = cdev->cnic_priv;
4562 cp->ethdev = ethdev;
4563 cdev->pcidev = pdev;
4564
4565 cp->cnic_ops = &cnic_bnx2x_ops;
4566 cp->start_hw = cnic_start_bnx2x_hw;
4567 cp->stop_hw = cnic_stop_bnx2x_hw;
4568 cp->setup_pgtbl = cnic_setup_page_tbl_le;
4569 cp->alloc_resc = cnic_alloc_bnx2x_resc;
4570 cp->free_resc = cnic_free_resc;
4571 cp->start_cm = cnic_cm_init_bnx2x_hw;
4572 cp->stop_cm = cnic_cm_stop_bnx2x_hw;
4573 cp->enable_int = cnic_enable_bnx2x_int;
4574 cp->disable_int_sync = cnic_disable_bnx2x_int_sync;
4575 cp->ack_int = cnic_ack_bnx2x_msix;
4576 cp->close_conn = cnic_close_bnx2x_conn;
4577 cp->next_idx = cnic_bnx2x_next_idx;
4578 cp->hw_idx = cnic_bnx2x_hw_idx;
4579 return cdev;
4580 }
4581
4582 static struct cnic_dev *is_cnic_dev(struct net_device *dev)
4583 {
4584 struct ethtool_drvinfo drvinfo;
4585 struct cnic_dev *cdev = NULL;
4586
4587 if (dev->ethtool_ops && dev->ethtool_ops->get_drvinfo) {
4588 memset(&drvinfo, 0, sizeof(drvinfo));
4589 dev->ethtool_ops->get_drvinfo(dev, &drvinfo);
4590
4591 if (!strcmp(drvinfo.driver, "bnx2"))
4592 cdev = init_bnx2_cnic(dev);
4593 if (!strcmp(drvinfo.driver, "bnx2x"))
4594 cdev = init_bnx2x_cnic(dev);
4595 if (cdev) {
4596 write_lock(&cnic_dev_lock);
4597 list_add(&cdev->list, &cnic_dev_list);
4598 write_unlock(&cnic_dev_lock);
4599 }
4600 }
4601 return cdev;
4602 }
4603
4604 /**
4605 * netdev event handler
4606 */
4607 static int cnic_netdev_event(struct notifier_block *this, unsigned long event,
4608 void *ptr)
4609 {
4610 struct net_device *netdev = ptr;
4611 struct cnic_dev *dev;
4612 int if_type;
4613 int new_dev = 0;
4614
4615 dev = cnic_from_netdev(netdev);
4616
4617 if (!dev && (event == NETDEV_REGISTER || event == NETDEV_UP)) {
4618 /* Check for the hot-plug device */
4619 dev = is_cnic_dev(netdev);
4620 if (dev) {
4621 new_dev = 1;
4622 cnic_hold(dev);
4623 }
4624 }
4625 if (dev) {
4626 struct cnic_local *cp = dev->cnic_priv;
4627
4628 if (new_dev)
4629 cnic_ulp_init(dev);
4630 else if (event == NETDEV_UNREGISTER)
4631 cnic_ulp_exit(dev);
4632
4633 if (event == NETDEV_UP) {
4634 if (cnic_register_netdev(dev) != 0) {
4635 cnic_put(dev);
4636 goto done;
4637 }
4638 if (!cnic_start_hw(dev))
4639 cnic_ulp_start(dev);
4640 }
4641
4642 rcu_read_lock();
4643 for (if_type = 0; if_type < MAX_CNIC_ULP_TYPE; if_type++) {
4644 struct cnic_ulp_ops *ulp_ops;
4645 void *ctx;
4646
4647 ulp_ops = rcu_dereference(cp->ulp_ops[if_type]);
4648 if (!ulp_ops || !ulp_ops->indicate_netevent)
4649 continue;
4650
4651 ctx = cp->ulp_handle[if_type];
4652
4653 ulp_ops->indicate_netevent(ctx, event);
4654 }
4655 rcu_read_unlock();
4656
4657 if (event == NETDEV_GOING_DOWN) {
4658 cnic_ulp_stop(dev);
4659 cnic_stop_hw(dev);
4660 cnic_unregister_netdev(dev);
4661 } else if (event == NETDEV_UNREGISTER) {
4662 write_lock(&cnic_dev_lock);
4663 list_del_init(&dev->list);
4664 write_unlock(&cnic_dev_lock);
4665
4666 cnic_put(dev);
4667 cnic_free_dev(dev);
4668 goto done;
4669 }
4670 cnic_put(dev);
4671 }
4672 done:
4673 return NOTIFY_DONE;
4674 }
4675
4676 static struct notifier_block cnic_netdev_notifier = {
4677 .notifier_call = cnic_netdev_event
4678 };
4679
4680 static void cnic_release(void)
4681 {
4682 struct cnic_dev *dev;
4683
4684 while (!list_empty(&cnic_dev_list)) {
4685 dev = list_entry(cnic_dev_list.next, struct cnic_dev, list);
4686 if (test_bit(CNIC_F_CNIC_UP, &dev->flags)) {
4687 cnic_ulp_stop(dev);
4688 cnic_stop_hw(dev);
4689 }
4690
4691 cnic_ulp_exit(dev);
4692 cnic_unregister_netdev(dev);
4693 list_del_init(&dev->list);
4694 cnic_free_dev(dev);
4695 }
4696 }
4697
4698 static int __init cnic_init(void)
4699 {
4700 int rc = 0;
4701
4702 pr_info("%s", version);
4703
4704 rc = register_netdevice_notifier(&cnic_netdev_notifier);
4705 if (rc) {
4706 cnic_release();
4707 return rc;
4708 }
4709
4710 return 0;
4711 }
4712
4713 static void __exit cnic_exit(void)
4714 {
4715 unregister_netdevice_notifier(&cnic_netdev_notifier);
4716 cnic_release();
4717 }
4718
4719 module_init(cnic_init);
4720 module_exit(cnic_exit);
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