arch/m68knommu/platform/5249/config.c

   1 /***************************************************************************/
   2
   3 /*
   4  *      linux/arch/m68knommu/platform/5249/config.c
   5  *
   6  *      Copyright (C) 2002, Greg Ungerer (gerg@snapgear.com)
   7  */
   8
   9 /***************************************************************************/
  10
  11 #include <linux/kernel.h>
  12 #include <linux/param.h>
  13 #include <linux/init.h>
  14 #include <linux/io.h>
  15 #include <asm/machdep.h>
  16 #include <asm/coldfire.h>
  17 #include <asm/mcfsim.h>
  18 #include <asm/mcfuart.h>
  19
  20 /***************************************************************************/
  21
  22 static struct mcf_platform_uart m5249_uart_platform[] = {
  23         {
  24                 .mapbase        = MCF_MBAR + MCFUART_BASE1,
  25                 .irq            = 73,
  26         },
  27         {
  28                 .mapbase        = MCF_MBAR + MCFUART_BASE2,
  29                 .irq            = 74,
  30         },
  31         { },
  32 };
  33
  34 static struct platform_device m5249_uart = {
  35         .name                   = "mcfuart",
  36         .id                     = 0,
  37         .dev.platform_data      = m5249_uart_platform,
  38 };
  39
  40 static struct platform_device *m5249_devices[] __initdata = {
  41         &m5249_uart,
  42 };
  43
  44 /***************************************************************************/
  45
  46 static void __init m5249_uart_init_line(int line, int irq)
  47 {
  48         if (line == 0) {
  49                 writeb(MCFSIM_ICR_LEVEL6 | MCFSIM_ICR_PRI1, MCF_MBAR + MCFSIM_UART1ICR);
  50                 writeb(irq, MCF_MBAR + MCFUART_BASE1 + MCFUART_UIVR);
  51                 mcf_setimr(mcf_getimr() & ~MCFSIM_IMR_UART1);
  52         } else if (line == 1) {
  53                 writeb(MCFSIM_ICR_LEVEL6 | MCFSIM_ICR_PRI2, MCF_MBAR + MCFSIM_UART2ICR);
  54                 writeb(irq, MCF_MBAR + MCFUART_BASE2 + MCFUART_UIVR);
  55                 mcf_setimr(mcf_getimr() & ~MCFSIM_IMR_UART2);
  56         }
  57 }
  58
  59 static void __init m5249_uarts_init(void)
  60 {
  61         const int nrlines = ARRAY_SIZE(m5249_uart_platform);
  62         int line;
  63
  64         for (line = 0; (line < nrlines); line++)
  65                 m5249_uart_init_line(line, m5249_uart_platform[line].irq);
  66 }
  67
  68
  69 /***************************************************************************/
  70
  71 void mcf_settimericr(unsigned int timer, unsigned int level)
  72 {
  73         volatile unsigned char *icrp;
  74         unsigned int icr, imr;
  75
  76         if (timer <= 2) {
  77                 switch (timer) {
  78                 case 2:  icr = MCFSIM_TIMER2ICR; imr = MCFSIM_IMR_TIMER2; break;
  79                 default: icr = MCFSIM_TIMER1ICR; imr = MCFSIM_IMR_TIMER1; break;
  80                 }
  81
  82                 icrp = (volatile unsigned char *) (MCF_MBAR + icr);
  83                 *icrp = MCFSIM_ICR_AUTOVEC | (level << 2) | MCFSIM_ICR_PRI3;
  84                 mcf_setimr(mcf_getimr() & ~imr);
  85         }
  86 }
  87
  88 /***************************************************************************/
  89
  90 void m5249_cpu_reset(void)
  91 {
  92         local_irq_disable();
  93         /* Set watchdog to soft reset, and enabled */
  94         __raw_writeb(0xc0, MCF_MBAR + MCFSIM_SYPCR);
  95         for (;;)
  96                 /* wait for watchdog to timeout */;
  97 }
  98
  99 /***************************************************************************/
 100
 101 void __init config_BSP(char *commandp, int size)
 102 {
 103         mcf_setimr(MCFSIM_IMR_MASKALL);
 104         mach_reset = m5249_cpu_reset;
 105 }
 106
 107 /***************************************************************************/
 108
 109 static int __init init_BSP(void)
 110 {
 111         m5249_uarts_init();
 112         platform_add_devices(m5249_devices, ARRAY_SIZE(m5249_devices));
 113         return 0;
 114 }
 115
 116 arch_initcall(init_BSP);
 117
 118 /***************************************************************************/