arch/powerpc/platforms/pseries/xics.c

   1 /*
   2  * arch/powerpc/platforms/pseries/xics.c
   3  *
   4  * Copyright 2000 IBM Corporation.
   5  *
   6  *  This program is free software; you can redistribute it and/or
   7  *  modify it under the terms of the GNU General Public License
   8  *  as published by the Free Software Foundation; either version
   9  *  2 of the License, or (at your option) any later version.
  10  */
  11
  12
  13 #include <linux/types.h>
  14 #include <linux/threads.h>
  15 #include <linux/kernel.h>
  16 #include <linux/irq.h>
  17 #include <linux/smp.h>
  18 #include <linux/interrupt.h>
  19 #include <linux/signal.h>
  20 #include <linux/init.h>
  21 #include <linux/gfp.h>
  22 #include <linux/radix-tree.h>
  23 #include <linux/cpu.h>
  24
  25 #include <asm/firmware.h>
  26 #include <asm/prom.h>
  27 #include <asm/io.h>
  28 #include <asm/pgtable.h>
  29 #include <asm/smp.h>
  30 #include <asm/rtas.h>
  31 #include <asm/hvcall.h>
  32 #include <asm/machdep.h>
  33 #include <asm/i8259.h>
  34
  35 #include "xics.h"
  36 #include "plpar_wrappers.h"
  37
  38 #define XICS_IPI                2
  39 #define XICS_IRQ_SPURIOUS       0
  40
  41 /* Want a priority other than 0.  Various HW issues require this. */
  42 #define DEFAULT_PRIORITY        5
  43
  44 /*
  45  * Mark IPIs as higher priority so we can take them inside interrupts that
  46  * arent marked IRQF_DISABLED
  47  */
  48 #define IPI_PRIORITY            4
  49
  50 struct xics_ipl {
  51         union {
  52                 u32 word;
  53                 u8 bytes[4];
  54         } xirr_poll;
  55         union {
  56                 u32 word;
  57                 u8 bytes[4];
  58         } xirr;
  59         u32 dummy;
  60         union {
  61                 u32 word;
  62                 u8 bytes[4];
  63         } qirr;
  64 };
  65
  66 static struct xics_ipl __iomem *xics_per_cpu[NR_CPUS];
  67
  68 static unsigned int default_server = 0xFF;
  69 static unsigned int default_distrib_server = 0;
  70 static unsigned int interrupt_server_size = 8;
  71
  72 static struct irq_host *xics_host;
  73
  74 /*
  75  * XICS only has a single IPI, so encode the messages per CPU
  76  */
  77 struct xics_ipi_struct xics_ipi_message[NR_CPUS] __cacheline_aligned;
  78
  79 /* RTAS service tokens */
  80 static int ibm_get_xive;
  81 static int ibm_set_xive;
  82 static int ibm_int_on;
  83 static int ibm_int_off;
  84
  85
  86 /* Direct HW low level accessors */
  87
  88
  89 static inline unsigned int direct_xirr_info_get(void)
  90 {
  91         int cpu = smp_processor_id();
  92
  93         return in_be32(&xics_per_cpu[cpu]->xirr.word);
  94 }
  95
  96 static inline void direct_xirr_info_set(int value)
  97 {
  98         int cpu = smp_processor_id();
  99
 100         out_be32(&xics_per_cpu[cpu]->xirr.word, value);
 101 }
 102
 103 static inline void direct_cppr_info(u8 value)
 104 {
 105         int cpu = smp_processor_id();
 106
 107         out_8(&xics_per_cpu[cpu]->xirr.bytes[0], value);
 108 }
 109
 110 static inline void direct_qirr_info(int n_cpu, u8 value)
 111 {
 112         out_8(&xics_per_cpu[n_cpu]->qirr.bytes[0], value);
 113 }
 114
 115
 116 /* LPAR low level accessors */
 117
 118
 119 static inline unsigned int lpar_xirr_info_get(void)
 120 {
 121         unsigned long lpar_rc;
 122         unsigned long return_value;
 123
 124         lpar_rc = plpar_xirr(&return_value);
 125         if (lpar_rc != H_SUCCESS)
 126                 panic(" bad return code xirr - rc = %lx \n", lpar_rc);
 127         return (unsigned int)return_value;
 128 }
 129
 130 static inline void lpar_xirr_info_set(int value)
 131 {
 132         unsigned long lpar_rc;
 133         unsigned long val64 = value & 0xffffffff;
 134
 135         lpar_rc = plpar_eoi(val64);
 136         if (lpar_rc != H_SUCCESS)
 137                 panic("bad return code EOI - rc = %ld, value=%lx\n", lpar_rc,
 138                       val64);
 139 }
 140
 141 static inline void lpar_cppr_info(u8 value)
 142 {
 143         unsigned long lpar_rc;
 144
 145         lpar_rc = plpar_cppr(value);
 146         if (lpar_rc != H_SUCCESS)
 147                 panic("bad return code cppr - rc = %lx\n", lpar_rc);
 148 }
 149
 150 static inline void lpar_qirr_info(int n_cpu , u8 value)
 151 {
 152         unsigned long lpar_rc;
 153
 154         lpar_rc = plpar_ipi(get_hard_smp_processor_id(n_cpu), value);
 155         if (lpar_rc != H_SUCCESS)
 156                 panic("bad return code qirr - rc = %lx\n", lpar_rc);
 157 }
 158
 159
 160 /* High level handlers and init code */
 161
 162 static void xics_update_irq_servers(void)
 163 {
 164         int i, j;
 165         struct device_node *np;
 166         u32 ilen;
 167         const u32 *ireg, *isize;
 168         u32 hcpuid;
 169
 170         /* Find the server numbers for the boot cpu. */
 171         np = of_get_cpu_node(boot_cpuid, NULL);
 172         BUG_ON(!np);
 173
 174         ireg = of_get_property(np, "ibm,ppc-interrupt-gserver#s", &ilen);
 175         if (!ireg) {
 176                 of_node_put(np);
 177                 return;
 178         }
 179
 180         i = ilen / sizeof(int);
 181         hcpuid = get_hard_smp_processor_id(boot_cpuid);
 182
 183         /* Global interrupt distribution server is specified in the last
 184          * entry of "ibm,ppc-interrupt-gserver#s" property. Get the last
 185          * entry fom this property for current boot cpu id and use it as
 186          * default distribution server
 187          */
 188         for (j = 0; j < i; j += 2) {
 189                 if (ireg[j] == hcpuid) {
 190                         default_server = hcpuid;
 191                         default_distrib_server = ireg[j+1];
 192
 193                         isize = of_get_property(np,
 194                                         "ibm,interrupt-server#-size", NULL);
 195                         if (isize)
 196                                 interrupt_server_size = *isize;
 197                 }
 198         }
 199
 200         of_node_put(np);
 201 }
 202
 203 #ifdef CONFIG_SMP
 204 static int get_irq_server(unsigned int virq, unsigned int strict_check)
 205 {
 206         int server;
 207         /* For the moment only implement delivery to all cpus or one cpu */
 208         cpumask_t cpumask = irq_desc[virq].affinity;
 209         cpumask_t tmp = CPU_MASK_NONE;
 210
 211         if (! cpu_isset(default_server, cpu_online_map))
 212                 xics_update_irq_servers();
 213
 214         if (!distribute_irqs)
 215                 return default_server;
 216
 217         if (!cpus_equal(cpumask, CPU_MASK_ALL)) {
 218                 cpus_and(tmp, cpu_online_map, cpumask);
 219
 220                 server = first_cpu(tmp);
 221
 222                 if (server < NR_CPUS)
 223                         return get_hard_smp_processor_id(server);
 224
 225                 if (strict_check)
 226                         return -1;
 227         }
 228
 229         if (cpus_equal(cpu_online_map, cpu_present_map))
 230                 return default_distrib_server;
 231
 232         return default_server;
 233 }
 234 #else
 235 static int get_irq_server(unsigned int virq, unsigned int strict_check)
 236 {
 237         return default_server;
 238 }
 239 #endif
 240
 241
 242 static void xics_unmask_irq(unsigned int virq)
 243 {
 244         unsigned int irq;
 245         int call_status;
 246         int server;
 247
 248         pr_debug("xics: unmask virq %d\n", virq);
 249
 250         irq = (unsigned int)irq_map[virq].hwirq;
 251         pr_debug(" -> map to hwirq 0x%x\n", irq);
 252         if (irq == XICS_IPI || irq == XICS_IRQ_SPURIOUS)
 253                 return;
 254
 255         server = get_irq_server(virq, 0);
 256
 257         call_status = rtas_call(ibm_set_xive, 3, 1, NULL, irq, server,
 258                                 DEFAULT_PRIORITY);
 259         if (call_status != 0) {
 260                 printk(KERN_ERR "xics_enable_irq: irq=%u: ibm_set_xive "
 261                        "returned %d\n", irq, call_status);
 262                 printk("set_xive %x, server %x\n", ibm_set_xive, server);
 263                 return;
 264         }
 265
 266         /* Now unmask the interrupt (often a no-op) */
 267         call_status = rtas_call(ibm_int_on, 1, 1, NULL, irq);
 268         if (call_status != 0) {
 269                 printk(KERN_ERR "xics_enable_irq: irq=%u: ibm_int_on "
 270                        "returned %d\n", irq, call_status);
 271                 return;
 272         }
 273 }
 274
 275 static void xics_mask_real_irq(unsigned int irq)
 276 {
 277         int call_status;
 278
 279         if (irq == XICS_IPI)
 280                 return;
 281
 282         call_status = rtas_call(ibm_int_off, 1, 1, NULL, irq);
 283         if (call_status != 0) {
 284                 printk(KERN_ERR "xics_disable_real_irq: irq=%u: "
 285                        "ibm_int_off returned %d\n", irq, call_status);
 286                 return;
 287         }
 288
 289         /* Have to set XIVE to 0xff to be able to remove a slot */
 290         call_status = rtas_call(ibm_set_xive, 3, 1, NULL, irq,
 291                                 default_server, 0xff);
 292         if (call_status != 0) {
 293                 printk(KERN_ERR "xics_disable_irq: irq=%u: ibm_set_xive(0xff)"
 294                        " returned %d\n", irq, call_status);
 295                 return;
 296         }
 297 }
 298
 299 static void xics_mask_irq(unsigned int virq)
 300 {
 301         unsigned int irq;
 302
 303         pr_debug("xics: mask virq %d\n", virq);
 304
 305         irq = (unsigned int)irq_map[virq].hwirq;
 306         if (irq == XICS_IPI || irq == XICS_IRQ_SPURIOUS)
 307                 return;
 308         xics_mask_real_irq(irq);
 309 }
 310
 311 static unsigned int xics_startup(unsigned int virq)
 312 {
 313         unsigned int irq;
 314
 315         /* force a reverse mapping of the interrupt so it gets in the cache */
 316         irq = (unsigned int)irq_map[virq].hwirq;
 317         irq_radix_revmap(xics_host, irq);
 318
 319         /* unmask it */
 320         xics_unmask_irq(virq);
 321         return 0;
 322 }
 323
 324 static void xics_eoi_direct(unsigned int virq)
 325 {
 326         unsigned int irq = (unsigned int)irq_map[virq].hwirq;
 327
 328         iosync();
 329         direct_xirr_info_set((0xff << 24) | irq);
 330 }
 331
 332
 333 static void xics_eoi_lpar(unsigned int virq)
 334 {
 335         unsigned int irq = (unsigned int)irq_map[virq].hwirq;
 336
 337         iosync();
 338         lpar_xirr_info_set((0xff << 24) | irq);
 339 }
 340
 341 static inline unsigned int xics_remap_irq(unsigned int vec)
 342 {
 343         unsigned int irq;
 344
 345         vec &= 0x00ffffff;
 346
 347         if (vec == XICS_IRQ_SPURIOUS)
 348                 return NO_IRQ;
 349         irq = irq_radix_revmap(xics_host, vec);
 350         if (likely(irq != NO_IRQ))
 351                 return irq;
 352
 353         printk(KERN_ERR "Interrupt %u (real) is invalid,"
 354                " disabling it.\n", vec);
 355         xics_mask_real_irq(vec);
 356         return NO_IRQ;
 357 }
 358
 359 static unsigned int xics_get_irq_direct(void)
 360 {
 361         return xics_remap_irq(direct_xirr_info_get());
 362 }
 363
 364 static unsigned int xics_get_irq_lpar(void)
 365 {
 366         return xics_remap_irq(lpar_xirr_info_get());
 367 }
 368
 369 #ifdef CONFIG_SMP
 370
 371 static irqreturn_t xics_ipi_dispatch(int cpu)
 372 {
 373         WARN_ON(cpu_is_offline(cpu));
 374
 375         while (xics_ipi_message[cpu].value) {
 376                 if (test_and_clear_bit(PPC_MSG_CALL_FUNCTION,
 377                                        &xics_ipi_message[cpu].value)) {
 378                         mb();
 379                         smp_message_recv(PPC_MSG_CALL_FUNCTION);
 380                 }
 381                 if (test_and_clear_bit(PPC_MSG_RESCHEDULE,
 382                                        &xics_ipi_message[cpu].value)) {
 383                         mb();
 384                         smp_message_recv(PPC_MSG_RESCHEDULE);
 385                 }
 386                 if (test_and_clear_bit(PPC_MSG_CALL_FUNC_SINGLE,
 387                                        &xics_ipi_message[cpu].value)) {
 388                         mb();
 389                         smp_message_recv(PPC_MSG_CALL_FUNC_SINGLE);
 390                 }
 391 #if defined(CONFIG_DEBUGGER) || defined(CONFIG_KEXEC)
 392                 if (test_and_clear_bit(PPC_MSG_DEBUGGER_BREAK,
 393                                        &xics_ipi_message[cpu].value)) {
 394                         mb();
 395                         smp_message_recv(PPC_MSG_DEBUGGER_BREAK);
 396                 }
 397 #endif
 398         }
 399         return IRQ_HANDLED;
 400 }
 401
 402 static irqreturn_t xics_ipi_action_direct(int irq, void *dev_id)
 403 {
 404         int cpu = smp_processor_id();
 405
 406         direct_qirr_info(cpu, 0xff);
 407
 408         return xics_ipi_dispatch(cpu);
 409 }
 410
 411 static irqreturn_t xics_ipi_action_lpar(int irq, void *dev_id)
 412 {
 413         int cpu = smp_processor_id();
 414
 415         lpar_qirr_info(cpu, 0xff);
 416
 417         return xics_ipi_dispatch(cpu);
 418 }
 419
 420 void xics_cause_IPI(int cpu)
 421 {
 422         if (firmware_has_feature(FW_FEATURE_LPAR))
 423                 lpar_qirr_info(cpu, IPI_PRIORITY);
 424         else
 425                 direct_qirr_info(cpu, IPI_PRIORITY);
 426 }
 427
 428 #endif /* CONFIG_SMP */
 429
 430 static void xics_set_cpu_priority(unsigned char cppr)
 431 {
 432         if (firmware_has_feature(FW_FEATURE_LPAR))
 433                 lpar_cppr_info(cppr);
 434         else
 435                 direct_cppr_info(cppr);
 436         iosync();
 437 }
 438
 439 static void xics_set_affinity(unsigned int virq, cpumask_t cpumask)
 440 {
 441         unsigned int irq;
 442         int status;
 443         int xics_status[2];
 444         int irq_server;
 445
 446         irq = (unsigned int)irq_map[virq].hwirq;
 447         if (irq == XICS_IPI || irq == XICS_IRQ_SPURIOUS)
 448                 return;
 449
 450         status = rtas_call(ibm_get_xive, 1, 3, xics_status, irq);
 451
 452         if (status) {
 453                 printk(KERN_ERR "xics_set_affinity: irq=%u ibm,get-xive "
 454                        "returns %d\n", irq, status);
 455                 return;
 456         }
 457
 458         /*
 459          * For the moment only implement delivery to all cpus or one cpu.
 460          * Get current irq_server for the given irq
 461          */
 462         irq_server = get_irq_server(virq, 1);
 463         if (irq_server == -1) {
 464                 char cpulist[128];
 465                 cpumask_scnprintf(cpulist, sizeof(cpulist), cpumask);
 466                 printk(KERN_WARNING "xics_set_affinity: No online cpus in "
 467                                 "the mask %s for irq %d\n", cpulist, virq);
 468                 return;
 469         }
 470
 471         status = rtas_call(ibm_set_xive, 3, 1, NULL,
 472                                 irq, irq_server, xics_status[1]);
 473
 474         if (status) {
 475                 printk(KERN_ERR "xics_set_affinity: irq=%u ibm,set-xive "
 476                        "returns %d\n", irq, status);
 477                 return;
 478         }
 479 }
 480
 481 void xics_setup_cpu(void)
 482 {
 483         xics_set_cpu_priority(0xff);
 484
 485         /*
 486          * Put the calling processor into the GIQ.  This is really only
 487          * necessary from a secondary thread as the OF start-cpu interface
 488          * performs this function for us on primary threads.
 489          *
 490          * XXX: undo of teardown on kexec needs this too, as may hotplug
 491          */
 492         rtas_set_indicator_fast(GLOBAL_INTERRUPT_QUEUE,
 493                 (1UL << interrupt_server_size) - 1 - default_distrib_server, 1);
 494 }
 495
 496
 497 static struct irq_chip xics_pic_direct = {
 498         .typename = " XICS     ",
 499         .startup = xics_startup,
 500         .mask = xics_mask_irq,
 501         .unmask = xics_unmask_irq,
 502         .eoi = xics_eoi_direct,
 503         .set_affinity = xics_set_affinity
 504 };
 505
 506
 507 static struct irq_chip xics_pic_lpar = {
 508         .typename = " XICS     ",
 509         .startup = xics_startup,
 510         .mask = xics_mask_irq,
 511         .unmask = xics_unmask_irq,
 512         .eoi = xics_eoi_lpar,
 513         .set_affinity = xics_set_affinity
 514 };
 515
 516 /* Points to the irq_chip we're actually using */
 517 static struct irq_chip *xics_irq_chip;
 518
 519 static int xics_host_match(struct irq_host *h, struct device_node *node)
 520 {
 521         /* IBM machines have interrupt parents of various funky types for things
 522          * like vdevices, events, etc... The trick we use here is to match
 523          * everything here except the legacy 8259 which is compatible "chrp,iic"
 524          */
 525         return !of_device_is_compatible(node, "chrp,iic");
 526 }
 527
 528 static int xics_host_map(struct irq_host *h, unsigned int virq,
 529                          irq_hw_number_t hw)
 530 {
 531         pr_debug("xics: map virq %d, hwirq 0x%lx\n", virq, hw);
 532
 533         get_irq_desc(virq)->status |= IRQ_LEVEL;
 534         set_irq_chip_and_handler(virq, xics_irq_chip, handle_fasteoi_irq);
 535         return 0;
 536 }
 537
 538 static int xics_host_xlate(struct irq_host *h, struct device_node *ct,
 539                            u32 *intspec, unsigned int intsize,
 540                            irq_hw_number_t *out_hwirq, unsigned int *out_flags)
 541
 542 {
 543         /* Current xics implementation translates everything
 544          * to level. It is not technically right for MSIs but this
 545          * is irrelevant at this point. We might get smarter in the future
 546          */
 547         *out_hwirq = intspec[0];
 548         *out_flags = IRQ_TYPE_LEVEL_LOW;
 549
 550         return 0;
 551 }
 552
 553 static struct irq_host_ops xics_host_ops = {
 554         .match = xics_host_match,
 555         .map = xics_host_map,
 556         .xlate = xics_host_xlate,
 557 };
 558
 559 static void __init xics_init_host(void)
 560 {
 561         if (firmware_has_feature(FW_FEATURE_LPAR))
 562                 xics_irq_chip = &xics_pic_lpar;
 563         else
 564                 xics_irq_chip = &xics_pic_direct;
 565
 566         xics_host = irq_alloc_host(NULL, IRQ_HOST_MAP_TREE, 0, &xics_host_ops,
 567                                    XICS_IRQ_SPURIOUS);
 568         BUG_ON(xics_host == NULL);
 569         irq_set_default_host(xics_host);
 570 }
 571
 572 static void __init xics_map_one_cpu(int hw_id, unsigned long addr,
 573                                      unsigned long size)
 574 {
 575 #ifdef CONFIG_SMP
 576         int i;
 577
 578         /* This may look gross but it's good enough for now, we don't quite
 579          * have a hard -> linux processor id matching.
 580          */
 581         for_each_possible_cpu(i) {
 582                 if (!cpu_present(i))
 583                         continue;
 584                 if (hw_id == get_hard_smp_processor_id(i)) {
 585                         xics_per_cpu[i] = ioremap(addr, size);
 586                         return;
 587                 }
 588         }
 589 #else
 590         if (hw_id != 0)
 591                 return;
 592         xics_per_cpu[0] = ioremap(addr, size);
 593 #endif /* CONFIG_SMP */
 594 }
 595
 596 static void __init xics_init_one_node(struct device_node *np,
 597                                       unsigned int *indx)
 598 {
 599         unsigned int ilen;
 600         const u32 *ireg;
 601
 602         /* This code does the theorically broken assumption that the interrupt
 603          * server numbers are the same as the hard CPU numbers.
 604          * This happens to be the case so far but we are playing with fire...
 605          * should be fixed one of these days. -BenH.
 606          */
 607         ireg = of_get_property(np, "ibm,interrupt-server-ranges", NULL);
 608
 609         /* Do that ever happen ? we'll know soon enough... but even good'old
 610          * f80 does have that property ..
 611          */
 612         WARN_ON(ireg == NULL);
 613         if (ireg) {
 614                 /*
 615                  * set node starting index for this node
 616                  */
 617                 *indx = *ireg;
 618         }
 619         ireg = of_get_property(np, "reg", &ilen);
 620         if (!ireg)
 621                 panic("xics_init_IRQ: can't find interrupt reg property");
 622
 623         while (ilen >= (4 * sizeof(u32))) {
 624                 unsigned long addr, size;
 625
 626                 /* XXX Use proper OF parsing code here !!! */
 627                 addr = (unsigned long)*ireg++ << 32;
 628                 ilen -= sizeof(u32);
 629                 addr |= *ireg++;
 630                 ilen -= sizeof(u32);
 631                 size = (unsigned long)*ireg++ << 32;
 632                 ilen -= sizeof(u32);
 633                 size |= *ireg++;
 634                 ilen -= sizeof(u32);
 635                 xics_map_one_cpu(*indx, addr, size);
 636                 (*indx)++;
 637         }
 638 }
 639
 640 void __init xics_init_IRQ(void)
 641 {
 642         struct device_node *np;
 643         u32 indx = 0;
 644         int found = 0;
 645
 646         ppc64_boot_msg(0x20, "XICS Init");
 647
 648         ibm_get_xive = rtas_token("ibm,get-xive");
 649         ibm_set_xive = rtas_token("ibm,set-xive");
 650         ibm_int_on  = rtas_token("ibm,int-on");
 651         ibm_int_off = rtas_token("ibm,int-off");
 652
 653         for_each_node_by_type(np, "PowerPC-External-Interrupt-Presentation") {
 654                 found = 1;
 655                 if (firmware_has_feature(FW_FEATURE_LPAR))
 656                         break;
 657                 xics_init_one_node(np, &indx);
 658         }
 659         if (found == 0)
 660                 return;
 661
 662         xics_init_host();
 663         xics_update_irq_servers();
 664
 665         if (firmware_has_feature(FW_FEATURE_LPAR))
 666                 ppc_md.get_irq = xics_get_irq_lpar;
 667         else
 668                 ppc_md.get_irq = xics_get_irq_direct;
 669
 670         xics_setup_cpu();
 671
 672         ppc64_boot_msg(0x21, "XICS Done");
 673 }
 674
 675
 676 #ifdef CONFIG_SMP
 677 void xics_request_IPIs(void)
 678 {
 679         unsigned int ipi;
 680         int rc;
 681
 682         ipi = irq_create_mapping(xics_host, XICS_IPI);
 683         BUG_ON(ipi == NO_IRQ);
 684
 685         /*
 686          * IPIs are marked IRQF_DISABLED as they must run with irqs
 687          * disabled
 688          */
 689         set_irq_handler(ipi, handle_percpu_irq);
 690         if (firmware_has_feature(FW_FEATURE_LPAR))
 691                 rc = request_irq(ipi, xics_ipi_action_lpar, IRQF_DISABLED,
 692                                 "IPI", NULL);
 693         else
 694                 rc = request_irq(ipi, xics_ipi_action_direct, IRQF_DISABLED,
 695                                 "IPI", NULL);
 696         BUG_ON(rc);
 697 }
 698 #endif /* CONFIG_SMP */
 699
 700 void xics_teardown_cpu(void)
 701 {
 702         int cpu = smp_processor_id();
 703
 704         xics_set_cpu_priority(0);
 705
 706         /*
 707          * Clear IPI
 708          */
 709         if (firmware_has_feature(FW_FEATURE_LPAR))
 710                 lpar_qirr_info(cpu, 0xff);
 711         else
 712                 direct_qirr_info(cpu, 0xff);
 713 }
 714
 715 void xics_kexec_teardown_cpu(int secondary)
 716 {
 717         unsigned int ipi;
 718         struct irq_desc *desc;
 719
 720         xics_teardown_cpu();
 721
 722         /*
 723          * we need to EOI the IPI
 724          *
 725          * probably need to check all the other interrupts too
 726          * should we be flagging idle loop instead?
 727          * or creating some task to be scheduled?
 728          */
 729
 730         ipi = irq_find_mapping(xics_host, XICS_IPI);
 731         if (ipi == XICS_IRQ_SPURIOUS)
 732                 return;
 733         desc = get_irq_desc(ipi);
 734         if (desc->chip && desc->chip->eoi)
 735                 desc->chip->eoi(ipi);
 736
 737         /*
 738          * Some machines need to have at least one cpu in the GIQ,
 739          * so leave the master cpu in the group.
 740          */
 741         if (secondary)
 742                 rtas_set_indicator_fast(GLOBAL_INTERRUPT_QUEUE,
 743                                    (1UL << interrupt_server_size) - 1 -
 744                                    default_distrib_server, 0);
 745 }
 746
 747 #ifdef CONFIG_HOTPLUG_CPU
 748
 749 /* Interrupts are disabled. */
 750 void xics_migrate_irqs_away(void)
 751 {
 752         int status;
 753         int cpu = smp_processor_id(), hw_cpu = hard_smp_processor_id();
 754         unsigned int irq, virq;
 755
 756         /* Reject any interrupt that was queued to us... */
 757         xics_set_cpu_priority(0);
 758
 759         /* remove ourselves from the global interrupt queue */
 760         status = rtas_set_indicator_fast(GLOBAL_INTERRUPT_QUEUE,
 761                 (1UL << interrupt_server_size) - 1 - default_distrib_server, 0);
 762         WARN_ON(status < 0);
 763
 764         /* Allow IPIs again... */
 765         xics_set_cpu_priority(DEFAULT_PRIORITY);
 766
 767         for_each_irq(virq) {
 768                 struct irq_desc *desc;
 769                 int xics_status[2];
 770                 unsigned long flags;
 771
 772                 /* We cant set affinity on ISA interrupts */
 773                 if (virq < NUM_ISA_INTERRUPTS)
 774                         continue;
 775                 if (irq_map[virq].host != xics_host)
 776                         continue;
 777                 irq = (unsigned int)irq_map[virq].hwirq;
 778                 /* We need to get IPIs still. */
 779                 if (irq == XICS_IPI || irq == XICS_IRQ_SPURIOUS)
 780                         continue;
 781                 desc = get_irq_desc(virq);
 782
 783                 /* We only need to migrate enabled IRQS */
 784                 if (desc == NULL || desc->chip == NULL
 785                     || desc->action == NULL
 786                     || desc->chip->set_affinity == NULL)
 787                         continue;
 788
 789                 spin_lock_irqsave(&desc->lock, flags);
 790
 791                 status = rtas_call(ibm_get_xive, 1, 3, xics_status, irq);
 792                 if (status) {
 793                         printk(KERN_ERR "migrate_irqs_away: irq=%u "
 794                                         "ibm,get-xive returns %d\n",
 795                                         virq, status);
 796                         goto unlock;
 797                 }
 798
 799                 /*
 800                  * We only support delivery to all cpus or to one cpu.
 801                  * The irq has to be migrated only in the single cpu
 802                  * case.
 803                  */
 804                 if (xics_status[0] != hw_cpu)
 805                         goto unlock;
 806
 807                 printk(KERN_WARNING "IRQ %u affinity broken off cpu %u\n",
 808                        virq, cpu);
 809
 810                 /* Reset affinity to all cpus */
 811                 irq_desc[virq].affinity = CPU_MASK_ALL;
 812                 desc->chip->set_affinity(virq, CPU_MASK_ALL);
 813 unlock:
 814                 spin_unlock_irqrestore(&desc->lock, flags);
 815         }
 816 }
 817 #endif