KMS: fix EDID detailed timing vsync parsing
[linux-2.6/cjktty.git] / sound / soc / codecs / wm2000.h
blobfb812cd9e77dd7ea8e44cd7bc48bfd328fc0eadd
1 /*
2 * wm2000.h -- WM2000 Soc Audio driver
4 * This program is free software; you can redistribute it and/or modify
5 * it under the terms of the GNU General Public License version 2 as
6 * published by the Free Software Foundation.
7 */
9 #ifndef _WM2000_H
10 #define _WM2000_H
12 #define WM2000_REG_SYS_START 0x8000
13 #define WM2000_REG_ANC_GAIN_CTRL 0x8fa2
14 #define WM2000_REG_MSE_TH2 0x8fdf
15 #define WM2000_REG_MSE_TH1 0x8fe0
16 #define WM2000_REG_SPEECH_CLARITY 0x8fef
17 #define WM2000_REG_SYS_WATCHDOG 0x8ff6
18 #define WM2000_REG_ANA_VMID_PD_TIME 0x8ff7
19 #define WM2000_REG_ANA_VMID_PU_TIME 0x8ff8
20 #define WM2000_REG_CAT_FLTR_INDX 0x8ff9
21 #define WM2000_REG_CAT_GAIN_0 0x8ffa
22 #define WM2000_REG_SYS_STATUS 0x8ffc
23 #define WM2000_REG_SYS_MODE_CNTRL 0x8ffd
24 #define WM2000_REG_SYS_START0 0x8ffe
25 #define WM2000_REG_SYS_START1 0x8fff
26 #define WM2000_REG_ID1 0xf000
27 #define WM2000_REG_ID2 0xf001
28 #define WM2000_REG_REVISON 0xf002
29 #define WM2000_REG_SYS_CTL1 0xf003
30 #define WM2000_REG_SYS_CTL2 0xf004
31 #define WM2000_REG_ANC_STAT 0xf005
32 #define WM2000_REG_IF_CTL 0xf006
34 /* SPEECH_CLARITY */
35 #define WM2000_SPEECH_CLARITY 0x01
37 /* SYS_STATUS */
38 #define WM2000_STATUS_MOUSE_ACTIVE 0x40
39 #define WM2000_STATUS_CAT_FREQ_COMPLETE 0x20
40 #define WM2000_STATUS_CAT_GAIN_COMPLETE 0x10
41 #define WM2000_STATUS_THERMAL_SHUTDOWN_COMPLETE 0x08
42 #define WM2000_STATUS_ANC_DISABLED 0x04
43 #define WM2000_STATUS_POWER_DOWN_COMPLETE 0x02
44 #define WM2000_STATUS_BOOT_COMPLETE 0x01
46 /* SYS_MODE_CNTRL */
47 #define WM2000_MODE_ANA_SEQ_INCLUDE 0x80
48 #define WM2000_MODE_MOUSE_ENABLE 0x40
49 #define WM2000_MODE_CAT_FREQ_ENABLE 0x20
50 #define WM2000_MODE_CAT_GAIN_ENABLE 0x10
51 #define WM2000_MODE_BYPASS_ENTRY 0x08
52 #define WM2000_MODE_STANDBY_ENTRY 0x04
53 #define WM2000_MODE_THERMAL_ENABLE 0x02
54 #define WM2000_MODE_POWER_DOWN 0x01
56 /* SYS_CTL1 */
57 #define WM2000_SYS_STBY 0x01
59 /* SYS_CTL2 */
60 #define WM2000_MCLK_DIV2_ENA_CLR 0x80
61 #define WM2000_MCLK_DIV2_ENA_SET 0x40
62 #define WM2000_ANC_ENG_CLR 0x20
63 #define WM2000_ANC_ENG_SET 0x10
64 #define WM2000_ANC_INT_N_CLR 0x08
65 #define WM2000_ANC_INT_N_SET 0x04
66 #define WM2000_RAM_CLR 0x02
67 #define WM2000_RAM_SET 0x01
69 /* ANC_STAT */
70 #define WM2000_ANC_ENG_IDLE 0x01
72 #endif