drivers/staging/heci/heci_data_structures.h

   1 /*
   2  * Part of Intel(R) Manageability Engine Interface Linux driver
   3  *
   4  * Copyright (c) 2003 - 2008 Intel Corp.
   5  * All rights reserved.
   6  *
   7  * Redistribution and use in source and binary forms, with or without
   8  * modification, are permitted provided that the following conditions
   9  * are met:
  10  * 1. Redistributions of source code must retain the above copyright
  11  *    notice, this list of conditions, and the following disclaimer,
  12  *    without modification.
  13  * 2. Redistributions in binary form must reproduce at minimum a disclaimer
  14  *    substantially similar to the "NO WARRANTY" disclaimer below
  15  *    ("Disclaimer") and any redistribution must be conditioned upon
  16  *    including a substantially similar Disclaimer requirement for further
  17  *    binary redistribution.
  18  * 3. Neither the names of the above-listed copyright holders nor the names
  19  *    of any contributors may be used to endorse or promote products derived
  20  *    from this software without specific prior written permission.
  21  *
  22  * Alternatively, this software may be distributed under the terms of the
  23  * GNU General Public License ("GPL") version 2 as published by the Free
  24  * Software Foundation.
  25  *
  26  * NO WARRANTY
  27  * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
  28  * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
  29  * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTIBILITY AND FITNESS FOR
  30  * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
  31  * HOLDERS OR CONTRIBUTORS BE LIABLE FOR SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
  32  * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
  33  * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
  34  * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT,
  35  * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING
  36  * IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
  37  * POSSIBILITY OF SUCH DAMAGES.
  38  *
  39  */
  40
  41 #ifndef _HECI_DATA_STRUCTURES_H_
  42 #define _HECI_DATA_STRUCTURES_H_
  43
  44 #include <linux/version.h>
  45 #include <linux/spinlock.h>
  46 #include <linux/list.h>
  47 #include <linux/pci.h>
  48 #include <linux/timer.h>
  49 #include <linux/interrupt.h>
  50 #include <linux/workqueue.h>
  51 #include <linux/module.h>
  52 #include <linux/aio.h>
  53 #include <linux/types.h>
  54
  55 /*
  56  * error code definition
  57  */
  58 #define     ESLOTS_OVERFLOW              1
  59 #define     ECORRUPTED_MESSAGE_HEADER    1000
  60 #define     ECOMPLETE_MESSAGE            1001
  61
  62 #define     HECI_FC_MESSAGE_RESERVED_LENGTH           5
  63
  64 /*
  65  * Number of queue lists used by this driver
  66  */
  67 #define HECI_IO_LISTS_NUMBER        7
  68
  69 /*
  70  * Maximum transmission unit (MTU) of heci messages
  71  */
  72 #define IAMTHIF_MTU 4160
  73
  74
  75 /*
  76  * HECI HW Section
  77  */
  78
  79 /* HECI registers */
  80 /* H_CB_WW - Host Circular Buffer (CB) Write Window register */
  81 #define H_CB_WW    0
  82 /* H_CSR - Host Control Status register */
  83 #define H_CSR      4
  84 /* ME_CB_RW - ME Circular Buffer Read Window register (read only) */
  85 #define ME_CB_RW   8
  86 /* ME_CSR_HA - ME Control Status Host Access register (read only) */
  87 #define ME_CSR_HA  0xC
  88
  89
  90 /* register bits of H_CSR (Host Control Status register) */
  91 /* Host Circular Buffer Depth - maximum number of 32-bit entries in CB */
  92 #define H_CBD             0xFF000000
  93 /* Host Circular Buffer Write Pointer */
  94 #define H_CBWP            0x00FF0000
  95 /* Host Circular Buffer Read Pointer */
  96 #define H_CBRP            0x0000FF00
  97 /* Host Reset */
  98 #define H_RST             0x00000010
  99 /* Host Ready */
 100 #define H_RDY             0x00000008
 101 /* Host Interrupt Generate */
 102 #define H_IG              0x00000004
 103 /* Host Interrupt Status */
 104 #define H_IS              0x00000002
 105 /* Host Interrupt Enable */
 106 #define H_IE              0x00000001
 107
 108
 109 /* register bits of ME_CSR_HA (ME Control Status Host Access register) */
 110 /* ME CB (Circular Buffer) Depth HRA (Host Read Access)
 111  *  - host read only access to ME_CBD */
 112 #define ME_CBD_HRA        0xFF000000
 113 /* ME CB Write Pointer HRA - host read only access to ME_CBWP */
 114 #define ME_CBWP_HRA       0x00FF0000
 115 /* ME CB Read Pointer HRA - host read only access to ME_CBRP */
 116 #define ME_CBRP_HRA       0x0000FF00
 117 /* ME Reset HRA - host read only access to ME_RST */
 118 #define ME_RST_HRA        0x00000010
 119 /* ME Ready HRA - host read only access to ME_RDY */
 120 #define ME_RDY_HRA        0x00000008
 121 /* ME Interrupt Generate HRA - host read only access to ME_IG */
 122 #define ME_IG_HRA         0x00000004
 123 /* ME Interrupt Status HRA - host read only access to ME_IS */
 124 #define ME_IS_HRA         0x00000002
 125 /* ME Interrupt Enable HRA - host read only access to ME_IE */
 126 #define ME_IE_HRA         0x00000001
 127
 128 #define HECI_MINORS_BASE        1
 129 #define HECI_MINORS_COUNT       1
 130
 131 #define  HECI_MINOR_NUMBER      1
 132 #define  HECI_MAX_OPEN_HANDLE_COUNT     253
 133
 134 /*
 135  * debug kernel print macro define
 136  */
 137 extern int heci_debug;
 138
 139 #define DBG(format, arg...) do { \
 140         if (heci_debug) \
 141                 printk(KERN_INFO "heci: %s: " format, __func__, ## arg); \
 142 } while (0)
 143
 144
 145 /*
 146  * time to wait HECI become ready after init
 147  */
 148 #define HECI_INTEROP_TIMEOUT    (HZ * 7)
 149
 150 /*
 151  * watch dog definition
 152  */
 153 #define HECI_WATCHDOG_DATA_SIZE         16
 154 #define HECI_START_WD_DATA_SIZE         20
 155 #define HECI_WD_PARAMS_SIZE             4
 156 #define HECI_WD_STATE_INDEPENDENCE_MSG_SENT       (1 << 0)
 157
 158 #define HECI_WD_HOST_CLIENT_ID          1
 159 #define HECI_IAMTHIF_HOST_CLIENT_ID     2
 160
 161 struct guid {
 162         __u32 data1;
 163         __u16 data2;
 164         __u16 data3;
 165         __u8 data4[8];
 166 };
 167
 168 /* File state */
 169 enum file_state {
 170         HECI_FILE_INITIALIZING = 0,
 171         HECI_FILE_CONNECTING,
 172         HECI_FILE_CONNECTED,
 173         HECI_FILE_DISCONNECTING,
 174         HECI_FILE_DISCONNECTED
 175 };
 176
 177 /* HECI device states */
 178 enum heci_states {
 179         HECI_INITIALIZING = 0,
 180         HECI_ENABLED,
 181         HECI_RESETING,
 182         HECI_DISABLED,
 183         HECI_RECOVERING_FROM_RESET,
 184         HECI_POWER_DOWN,
 185         HECI_POWER_UP
 186 };
 187
 188 enum iamthif_states {
 189         HECI_IAMTHIF_IDLE,
 190         HECI_IAMTHIF_WRITING,
 191         HECI_IAMTHIF_FLOW_CONTROL,
 192         HECI_IAMTHIF_READING,
 193         HECI_IAMTHIF_READ_COMPLETE
 194 };
 195
 196 enum heci_file_transaction_states {
 197         HECI_IDLE,
 198         HECI_WRITING,
 199         HECI_WRITE_COMPLETE,
 200         HECI_FLOW_CONTROL,
 201         HECI_READING,
 202         HECI_READ_COMPLETE
 203 };
 204
 205 /* HECI CB */
 206 enum heci_cb_major_types {
 207         HECI_READ = 0,
 208         HECI_WRITE,
 209         HECI_IOCTL,
 210         HECI_OPEN,
 211         HECI_CLOSE
 212 };
 213
 214 /* HECI user data struct */
 215 struct heci_message_data {
 216         __u32 size;
 217         char *data;
 218 } __attribute__((packed));
 219
 220 #define HECI_CONNECT_TIMEOUT             3      /* at least 2 seconds */
 221
 222 #define IAMTHIF_STALL_TIMER              12     /* seconds */
 223 #define IAMTHIF_READ_TIMER               15     /* seconds */
 224
 225 struct heci_cb_private {
 226         struct list_head cb_list;
 227         enum heci_cb_major_types major_file_operations;
 228         void *file_private;
 229         struct heci_message_data request_buffer;
 230         struct heci_message_data response_buffer;
 231         unsigned long information;
 232         unsigned long read_time;
 233         struct file *file_object;
 234 };
 235
 236 /* Private file struct */
 237 struct heci_file_private {
 238         struct list_head link;
 239         struct file *file;
 240         enum file_state state;
 241         wait_queue_head_t tx_wait;
 242         wait_queue_head_t rx_wait;
 243         wait_queue_head_t wait;
 244         spinlock_t file_lock; /* file lock */
 245         spinlock_t read_io_lock; /* read lock */
 246         spinlock_t write_io_lock; /* write lock */
 247         int read_pending;
 248         int status;
 249         /* ID of client connected */
 250         __u8 host_client_id;
 251         __u8 me_client_id;
 252         __u8 flow_ctrl_creds;
 253         __u8 timer_count;
 254         enum heci_file_transaction_states reading_state;
 255         enum heci_file_transaction_states writing_state;
 256         int sm_state;
 257         struct heci_cb_private *read_cb;
 258 };
 259
 260 struct io_heci_list {
 261         struct heci_cb_private heci_cb;
 262         int status;
 263         struct iamt_heci_device *device_extension;
 264 };
 265
 266 struct heci_driver_version {
 267         __u8 major;
 268         __u8 minor;
 269         __u8 hotfix;
 270         __u16 build;
 271 } __attribute__((packed));
 272
 273
 274 struct heci_client {
 275         __u32 max_msg_length;
 276         __u8 protocol_version;
 277 } __attribute__((packed));
 278
 279 /*
 280  *  HECI BUS Interface Section
 281  */
 282 struct heci_msg_hdr {
 283         __u32 me_addr:8;
 284         __u32 host_addr:8;
 285         __u32 length:9;
 286         __u32 reserved:6;
 287         __u32 msg_complete:1;
 288 } __attribute__((packed));
 289
 290
 291 struct hbm_cmd {
 292         __u8 cmd:7;
 293         __u8 is_response:1;
 294 } __attribute__((packed));
 295
 296
 297 struct heci_bus_message {
 298         struct hbm_cmd cmd;
 299         __u8 command_specific_data[];
 300 } __attribute__((packed));
 301
 302 struct hbm_version {
 303         __u8 minor_version;
 304         __u8 major_version;
 305 } __attribute__((packed));
 306
 307 struct hbm_host_version_request {
 308         struct hbm_cmd cmd;
 309         __u8 reserved;
 310         struct hbm_version host_version;
 311 } __attribute__((packed));
 312
 313 struct hbm_host_version_response {
 314         struct hbm_cmd cmd;
 315         int host_version_supported;
 316         struct hbm_version me_max_version;
 317 } __attribute__((packed));
 318
 319 struct hbm_host_stop_request {
 320         struct hbm_cmd cmd;
 321         __u8 reason;
 322         __u8 reserved[2];
 323 } __attribute__((packed));
 324
 325 struct hbm_host_stop_response {
 326         struct hbm_cmd cmd;
 327         __u8 reserved[3];
 328 } __attribute__((packed));
 329
 330 struct hbm_me_stop_request {
 331         struct hbm_cmd cmd;
 332         __u8 reason;
 333         __u8 reserved[2];
 334 } __attribute__((packed));
 335
 336 struct hbm_host_enum_request {
 337         struct hbm_cmd cmd;
 338         __u8 reserved[3];
 339 } __attribute__((packed));
 340
 341 struct hbm_host_enum_response {
 342         struct hbm_cmd cmd;
 343         __u8 reserved[3];
 344         __u8 valid_addresses[32];
 345 } __attribute__((packed));
 346
 347 struct heci_client_properties {
 348         struct guid protocol_name;
 349         __u8 protocol_version;
 350         __u8 max_number_of_connections;
 351         __u8 fixed_address;
 352         __u8 single_recv_buf;
 353         __u32 max_msg_length;
 354 } __attribute__((packed));
 355
 356 struct hbm_props_request {
 357         struct hbm_cmd cmd;
 358         __u8 address;
 359         __u8 reserved[2];
 360 } __attribute__((packed));
 361
 362
 363 struct hbm_props_response {
 364         struct hbm_cmd cmd;
 365         __u8 address;
 366         __u8 status;
 367         __u8 reserved[1];
 368         struct heci_client_properties client_properties;
 369 } __attribute__((packed));
 370
 371 struct hbm_client_connect_request {
 372         struct hbm_cmd cmd;
 373         __u8 me_addr;
 374         __u8 host_addr;
 375         __u8 reserved;
 376 } __attribute__((packed));
 377
 378 struct hbm_client_connect_response {
 379         struct hbm_cmd cmd;
 380         __u8 me_addr;
 381         __u8 host_addr;
 382         __u8 status;
 383 } __attribute__((packed));
 384
 385 struct hbm_client_disconnect_request {
 386         struct hbm_cmd cmd;
 387         __u8 me_addr;
 388         __u8 host_addr;
 389         __u8 reserved[1];
 390 } __attribute__((packed));
 391
 392 struct hbm_flow_control {
 393         struct hbm_cmd cmd;
 394         __u8 me_addr;
 395         __u8 host_addr;
 396         __u8 reserved[HECI_FC_MESSAGE_RESERVED_LENGTH];
 397 } __attribute__((packed));
 398
 399 struct heci_me_client {
 400         struct heci_client_properties props;
 401         __u8 client_id;
 402         __u8 flow_ctrl_creds;
 403 } __attribute__((packed));
 404
 405 /* private device struct */
 406 struct iamt_heci_device {
 407         struct pci_dev *pdev;   /* pointer to pci device struct */
 408         /*
 409          * lists of queues
 410          */
 411          /* array of pointers to  aio lists */
 412         struct io_heci_list *io_list_array[HECI_IO_LISTS_NUMBER];
 413         struct io_heci_list read_list;  /* driver read queue */
 414         struct io_heci_list write_list; /* driver write queue */
 415         struct io_heci_list write_waiting_list; /* write waiting queue */
 416         struct io_heci_list ctrl_wr_list;       /* managed write IOCTL list */
 417         struct io_heci_list ctrl_rd_list;       /* managed read IOCTL list */
 418         struct io_heci_list pthi_cmd_list;      /* PTHI list for cmd waiting */
 419
 420         /* driver managed PTHI list for reading completed pthi cmd data */
 421         struct io_heci_list pthi_read_complete_list;
 422         /*
 423          * list of files
 424          */
 425         struct list_head file_list;
 426         /*
 427          * memory of device
 428          */
 429         unsigned int mem_base;
 430         unsigned int mem_length;
 431         void __iomem *mem_addr;
 432         /*
 433          * lock for the device
 434          */
 435         spinlock_t device_lock; /* device lock*/
 436         struct work_struct work;
 437         int recvd_msg;
 438
 439         struct task_struct *reinit_tsk;
 440
 441         struct timer_list wd_timer;
 442         /*
 443          * hw states of host and fw(ME)
 444          */
 445         __u32 host_hw_state;
 446         __u32 me_hw_state;
 447         /*
 448          * waiting queue for receive message from FW
 449          */
 450         wait_queue_head_t wait_recvd_msg;
 451         wait_queue_head_t wait_stop_wd;
 452         /*
 453          * heci device  states
 454          */
 455         enum heci_states heci_state;
 456         int stop;
 457
 458         __u32 extra_write_index;
 459         __u32 rd_msg_buf[128];  /* used for control messages */
 460         __u32 wr_msg_buf[128];  /* used for control messages */
 461         __u32 ext_msg_buf[8];   /* for control responses    */
 462         __u32 rd_msg_hdr;
 463
 464         struct hbm_version version;
 465
 466         int host_buffer_is_empty;
 467         struct heci_file_private wd_file_ext;
 468         struct heci_me_client *me_clients; /* Note: memory has to be allocated*/
 469         __u8 heci_me_clients[32];       /* list of existing clients */
 470         __u8 num_heci_me_clients;
 471         __u8 heci_host_clients[32];     /* list of existing clients */
 472         __u8 current_host_client_id;
 473
 474         int wd_pending;
 475         int wd_stoped;
 476         __u16 wd_timeout;       /* seconds ((wd_data[1] << 8) + wd_data[0]) */
 477         unsigned char wd_data[HECI_START_WD_DATA_SIZE];
 478
 479
 480         __u16 wd_due_counter;
 481         int asf_mode;
 482         int wd_bypass;  /* if 1, don't refresh watchdog ME client */
 483
 484         struct file *iamthif_file_object;
 485         struct heci_file_private iamthif_file_ext;
 486         int iamthif_ioctl;
 487         int iamthif_canceled;
 488         __u32 iamthif_timer;
 489         __u32 iamthif_stall_timer;
 490         unsigned char iamthif_msg_buf[IAMTHIF_MTU];
 491         __u32 iamthif_msg_buf_size;
 492         __u32 iamthif_msg_buf_index;
 493         int iamthif_flow_control_pending;
 494         enum iamthif_states iamthif_state;
 495
 496         struct heci_cb_private *iamthif_current_cb;
 497         __u8 write_hang;
 498         int need_reset;
 499         long open_handle_count;
 500
 501 };
 502
 503 /**
 504  * read_heci_register - Read a byte from the heci device
 505  *
 506  * @dev: the device structure
 507  * @offset: offset from which to read the data
 508  *
 509  * returns  the byte read.
 510  */
 511 static inline __u32 read_heci_register(struct iamt_heci_device *dev,
 512                                         unsigned long offset)
 513 {
 514         return readl(dev->mem_addr + offset);
 515 }
 516
 517 /**
 518  * write_heci_register - Write  4 bytes to the heci device
 519  *
 520  * @dev: the device structure
 521  * @offset: offset from which to write the data
 522  * @value: the byte to write
 523  */
 524 static inline void write_heci_register(struct iamt_heci_device *dev,
 525                                         unsigned long offset,  __u32 value)
 526 {
 527         writel(value, dev->mem_addr + offset);
 528 }
 529
 530 #endif /* _HECI_DATA_STRUCTURES_H_ */