ALSA: wss_lib: replace ad1848 mixer element macros with wss ones
[linux-2.6/cjktty.git] / sound / isa / ad1848 / ad1848_lib.c
blob4f7aaf4e098933bdec71d81507ec618d1514b960
1 /*
2 * Copyright (c) by Jaroslav Kysela <perex@perex.cz>
3 * Routines for control of AD1848/AD1847/CS4248
6 * This program is free software; you can redistribute it and/or modify
7 * it under the terms of the GNU General Public License as published by
8 * the Free Software Foundation; either version 2 of the License, or
9 * (at your option) any later version.
11 * This program is distributed in the hope that it will be useful,
12 * but WITHOUT ANY WARRANTY; without even the implied warranty of
13 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
14 * GNU General Public License for more details.
16 * You should have received a copy of the GNU General Public License
17 * along with this program; if not, write to the Free Software
18 * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
22 #define SNDRV_MAIN_OBJECT_FILE
23 #include <linux/delay.h>
24 #include <linux/init.h>
25 #include <linux/interrupt.h>
26 #include <linux/slab.h>
27 #include <linux/ioport.h>
28 #include <sound/core.h>
29 #include <sound/ad1848.h>
30 #include <sound/control.h>
31 #include <sound/tlv.h>
32 #include <sound/pcm_params.h>
34 #include <asm/io.h>
35 #include <asm/dma.h>
37 MODULE_AUTHOR("Jaroslav Kysela <perex@perex.cz>");
38 MODULE_DESCRIPTION("Routines for control of AD1848/AD1847/CS4248");
39 MODULE_LICENSE("GPL");
41 #if 0
42 #define SNDRV_DEBUG_MCE
43 #endif
46 * Some variables
49 static unsigned char freq_bits[14] = {
50 /* 5510 */ 0x00 | AD1848_XTAL2,
51 /* 6620 */ 0x0E | AD1848_XTAL2,
52 /* 8000 */ 0x00 | AD1848_XTAL1,
53 /* 9600 */ 0x0E | AD1848_XTAL1,
54 /* 11025 */ 0x02 | AD1848_XTAL2,
55 /* 16000 */ 0x02 | AD1848_XTAL1,
56 /* 18900 */ 0x04 | AD1848_XTAL2,
57 /* 22050 */ 0x06 | AD1848_XTAL2,
58 /* 27042 */ 0x04 | AD1848_XTAL1,
59 /* 32000 */ 0x06 | AD1848_XTAL1,
60 /* 33075 */ 0x0C | AD1848_XTAL2,
61 /* 37800 */ 0x08 | AD1848_XTAL2,
62 /* 44100 */ 0x0A | AD1848_XTAL2,
63 /* 48000 */ 0x0C | AD1848_XTAL1
66 static unsigned int rates[14] = {
67 5510, 6620, 8000, 9600, 11025, 16000, 18900, 22050,
68 27042, 32000, 33075, 37800, 44100, 48000
71 static struct snd_pcm_hw_constraint_list hw_constraints_rates = {
72 .count = ARRAY_SIZE(rates),
73 .list = rates,
74 .mask = 0,
77 static unsigned char snd_ad1848_original_image[16] =
79 0x00, /* 00 - lic */
80 0x00, /* 01 - ric */
81 0x9f, /* 02 - la1ic */
82 0x9f, /* 03 - ra1ic */
83 0x9f, /* 04 - la2ic */
84 0x9f, /* 05 - ra2ic */
85 0xbf, /* 06 - loc */
86 0xbf, /* 07 - roc */
87 0x20, /* 08 - dfr */
88 AD1848_AUTOCALIB, /* 09 - ic */
89 0x00, /* 0a - pc */
90 0x00, /* 0b - ti */
91 0x00, /* 0c - mi */
92 0x00, /* 0d - lbc */
93 0x00, /* 0e - dru */
94 0x00, /* 0f - drl */
98 * Basic I/O functions
101 static void snd_ad1848_wait(struct snd_wss *chip)
103 int timeout;
105 for (timeout = 250; timeout > 0; timeout--) {
106 if ((inb(AD1848P(chip, REGSEL)) & AD1848_INIT) == 0)
107 break;
108 udelay(100);
112 void snd_ad1848_out(struct snd_wss *chip,
113 unsigned char reg,
114 unsigned char value)
116 snd_ad1848_wait(chip);
117 #ifdef CONFIG_SND_DEBUG
118 if (inb(AD1848P(chip, REGSEL)) & AD1848_INIT)
119 snd_printk(KERN_WARNING "auto calibration time out - "
120 "reg = 0x%x, value = 0x%x\n", reg, value);
121 #endif
122 outb(chip->mce_bit | reg, AD1848P(chip, REGSEL));
123 outb(chip->image[reg] = value, AD1848P(chip, REG));
124 mb();
125 snd_printdd("codec out - reg 0x%x = 0x%x\n",
126 chip->mce_bit | reg, value);
129 EXPORT_SYMBOL(snd_ad1848_out);
131 static void snd_ad1848_dout(struct snd_wss *chip,
132 unsigned char reg, unsigned char value)
134 snd_ad1848_wait(chip);
135 outb(chip->mce_bit | reg, AD1848P(chip, REGSEL));
136 outb(value, AD1848P(chip, REG));
137 mb();
140 static unsigned char snd_ad1848_in(struct snd_wss *chip, unsigned char reg)
142 snd_ad1848_wait(chip);
143 #ifdef CONFIG_SND_DEBUG
144 if (inb(AD1848P(chip, REGSEL)) & AD1848_INIT)
145 snd_printk(KERN_WARNING "auto calibration time out - "
146 "reg = 0x%x\n", reg);
147 #endif
148 outb(chip->mce_bit | reg, AD1848P(chip, REGSEL));
149 mb();
150 return inb(AD1848P(chip, REG));
153 #if 0
155 static void snd_ad1848_debug(struct snd_wss *chip)
157 printk("AD1848 REGS: INDEX = 0x%02x ", inb(AD1848P(chip, REGSEL)));
158 printk(" STATUS = 0x%02x\n", inb(AD1848P(chip, STATUS)));
159 printk(" 0x00: left input = 0x%02x ", snd_ad1848_in(chip, 0x00));
160 printk(" 0x08: playback format = 0x%02x\n", snd_ad1848_in(chip, 0x08));
161 printk(" 0x01: right input = 0x%02x ", snd_ad1848_in(chip, 0x01));
162 printk(" 0x09: iface (CFIG 1) = 0x%02x\n", snd_ad1848_in(chip, 0x09));
163 printk(" 0x02: AUXA left = 0x%02x ", snd_ad1848_in(chip, 0x02));
164 printk(" 0x0a: pin control = 0x%02x\n", snd_ad1848_in(chip, 0x0a));
165 printk(" 0x03: AUXA right = 0x%02x ", snd_ad1848_in(chip, 0x03));
166 printk(" 0x0b: init & status = 0x%02x\n", snd_ad1848_in(chip, 0x0b));
167 printk(" 0x04: AUXB left = 0x%02x ", snd_ad1848_in(chip, 0x04));
168 printk(" 0x0c: revision & mode = 0x%02x\n", snd_ad1848_in(chip, 0x0c));
169 printk(" 0x05: AUXB right = 0x%02x ", snd_ad1848_in(chip, 0x05));
170 printk(" 0x0d: loopback = 0x%02x\n", snd_ad1848_in(chip, 0x0d));
171 printk(" 0x06: left output = 0x%02x ", snd_ad1848_in(chip, 0x06));
172 printk(" 0x0e: data upr count = 0x%02x\n", snd_ad1848_in(chip, 0x0e));
173 printk(" 0x07: right output = 0x%02x ", snd_ad1848_in(chip, 0x07));
174 printk(" 0x0f: data lwr count = 0x%02x\n", snd_ad1848_in(chip, 0x0f));
177 #endif
180 * AD1848 detection / MCE routines
183 static void snd_ad1848_mce_up(struct snd_wss *chip)
185 unsigned long flags;
186 int timeout;
188 snd_ad1848_wait(chip);
189 #ifdef CONFIG_SND_DEBUG
190 if (inb(AD1848P(chip, REGSEL)) & AD1848_INIT)
191 snd_printk(KERN_WARNING "mce_up - auto calibration time out (0)\n");
192 #endif
193 spin_lock_irqsave(&chip->reg_lock, flags);
194 chip->mce_bit |= AD1848_MCE;
195 timeout = inb(AD1848P(chip, REGSEL));
196 if (timeout == 0x80)
197 snd_printk(KERN_WARNING "mce_up [0x%lx]: serious init problem - codec still busy\n", chip->port);
198 if (!(timeout & AD1848_MCE))
199 outb(chip->mce_bit | (timeout & 0x1f), AD1848P(chip, REGSEL));
200 spin_unlock_irqrestore(&chip->reg_lock, flags);
203 static void snd_ad1848_mce_down(struct snd_wss *chip)
205 unsigned long flags, timeout;
206 int reg;
208 spin_lock_irqsave(&chip->reg_lock, flags);
209 for (timeout = 5; timeout > 0; timeout--)
210 inb(AD1848P(chip, REGSEL));
211 /* end of cleanup sequence */
212 for (timeout = 12000; timeout > 0 && (inb(AD1848P(chip, REGSEL)) & AD1848_INIT); timeout--)
213 udelay(100);
215 snd_printdd("(1) timeout = %ld\n", timeout);
217 #ifdef CONFIG_SND_DEBUG
218 if (inb(AD1848P(chip, REGSEL)) & AD1848_INIT)
219 snd_printk(KERN_WARNING "mce_down [0x%lx] - auto calibration time out (0)\n", AD1848P(chip, REGSEL));
220 #endif
222 chip->mce_bit &= ~AD1848_MCE;
223 reg = inb(AD1848P(chip, REGSEL));
224 outb(chip->mce_bit | (reg & 0x1f), AD1848P(chip, REGSEL));
225 if (reg == 0x80)
226 snd_printk(KERN_WARNING "mce_down [0x%lx]: serious init problem - codec still busy\n", chip->port);
227 if ((reg & AD1848_MCE) == 0) {
228 spin_unlock_irqrestore(&chip->reg_lock, flags);
229 return;
233 * Wait for auto-calibration (AC) process to finish, i.e. ACI to go low.
234 * It may take up to 5 sample periods (at most 907 us @ 5.5125 kHz) for
235 * the process to _start_, so it is important to wait at least that long
236 * before checking. Otherwise we might think AC has finished when it
237 * has in fact not begun. It could take 128 (no AC) or 384 (AC) cycles
238 * for ACI to drop. This gives a wait of at most 70 ms with a more
239 * typical value of 3-9 ms.
241 timeout = jiffies + msecs_to_jiffies(250);
242 do {
243 spin_unlock_irqrestore(&chip->reg_lock, flags);
244 msleep(1);
245 spin_lock_irqsave(&chip->reg_lock, flags);
246 reg = snd_ad1848_in(chip, AD1848_TEST_INIT) &
247 AD1848_CALIB_IN_PROGRESS;
248 } while (reg && time_before(jiffies, timeout));
249 spin_unlock_irqrestore(&chip->reg_lock, flags);
250 if (reg)
251 snd_printk(KERN_ERR
252 "mce_down - auto calibration time out (2)\n");
254 snd_printdd("(4) jiffies = %lu\n", jiffies);
255 snd_printd("mce_down - exit = 0x%x\n", inb(AD1848P(chip, REGSEL)));
258 static unsigned int snd_ad1848_get_count(unsigned char format,
259 unsigned int size)
261 switch (format & 0xe0) {
262 case AD1848_LINEAR_16:
263 size >>= 1;
264 break;
266 if (format & AD1848_STEREO)
267 size >>= 1;
268 return size;
271 static int snd_ad1848_trigger(struct snd_wss *chip, unsigned char what,
272 int channel, int cmd)
274 int result = 0;
276 #if 0
277 printk("codec trigger!!! - what = %i, enable = %i, status = 0x%x\n", what, enable, inb(AD1848P(card, STATUS)));
278 #endif
279 spin_lock(&chip->reg_lock);
280 if (cmd == SNDRV_PCM_TRIGGER_START) {
281 if (chip->image[AD1848_IFACE_CTRL] & what) {
282 spin_unlock(&chip->reg_lock);
283 return 0;
285 snd_ad1848_out(chip, AD1848_IFACE_CTRL, chip->image[AD1848_IFACE_CTRL] |= what);
286 } else if (cmd == SNDRV_PCM_TRIGGER_STOP) {
287 if (!(chip->image[AD1848_IFACE_CTRL] & what)) {
288 spin_unlock(&chip->reg_lock);
289 return 0;
291 snd_ad1848_out(chip, AD1848_IFACE_CTRL, chip->image[AD1848_IFACE_CTRL] &= ~what);
292 } else {
293 result = -EINVAL;
295 spin_unlock(&chip->reg_lock);
296 return result;
300 * CODEC I/O
303 static unsigned char snd_ad1848_get_rate(unsigned int rate)
305 int i;
307 for (i = 0; i < ARRAY_SIZE(rates); i++)
308 if (rate == rates[i])
309 return freq_bits[i];
310 snd_BUG();
311 return freq_bits[ARRAY_SIZE(rates) - 1];
314 static int snd_ad1848_ioctl(struct snd_pcm_substream *substream,
315 unsigned int cmd, void *arg)
317 return snd_pcm_lib_ioctl(substream, cmd, arg);
320 static unsigned char snd_ad1848_get_format(int format, int channels)
322 unsigned char rformat;
324 rformat = AD1848_LINEAR_8;
325 switch (format) {
326 case SNDRV_PCM_FORMAT_A_LAW: rformat = AD1848_ALAW_8; break;
327 case SNDRV_PCM_FORMAT_MU_LAW: rformat = AD1848_ULAW_8; break;
328 case SNDRV_PCM_FORMAT_S16_LE: rformat = AD1848_LINEAR_16; break;
330 if (channels > 1)
331 rformat |= AD1848_STEREO;
332 #if 0
333 snd_printk("get_format: 0x%x (mode=0x%x)\n", format, mode);
334 #endif
335 return rformat;
338 static void snd_ad1848_calibrate_mute(struct snd_wss *chip, int mute)
340 unsigned long flags;
342 mute = mute ? 1 : 0;
343 spin_lock_irqsave(&chip->reg_lock, flags);
344 if (chip->calibrate_mute == mute) {
345 spin_unlock_irqrestore(&chip->reg_lock, flags);
346 return;
348 if (!mute) {
349 snd_ad1848_dout(chip, AD1848_LEFT_INPUT, chip->image[AD1848_LEFT_INPUT]);
350 snd_ad1848_dout(chip, AD1848_RIGHT_INPUT, chip->image[AD1848_RIGHT_INPUT]);
352 snd_ad1848_dout(chip, AD1848_AUX1_LEFT_INPUT, mute ? 0x80 : chip->image[AD1848_AUX1_LEFT_INPUT]);
353 snd_ad1848_dout(chip, AD1848_AUX1_RIGHT_INPUT, mute ? 0x80 : chip->image[AD1848_AUX1_RIGHT_INPUT]);
354 snd_ad1848_dout(chip, AD1848_AUX2_LEFT_INPUT, mute ? 0x80 : chip->image[AD1848_AUX2_LEFT_INPUT]);
355 snd_ad1848_dout(chip, AD1848_AUX2_RIGHT_INPUT, mute ? 0x80 : chip->image[AD1848_AUX2_RIGHT_INPUT]);
356 snd_ad1848_dout(chip, AD1848_LEFT_OUTPUT, mute ? 0x80 : chip->image[AD1848_LEFT_OUTPUT]);
357 snd_ad1848_dout(chip, AD1848_RIGHT_OUTPUT, mute ? 0x80 : chip->image[AD1848_RIGHT_OUTPUT]);
358 chip->calibrate_mute = mute;
359 spin_unlock_irqrestore(&chip->reg_lock, flags);
362 static void snd_ad1848_set_data_format(struct snd_wss *chip,
363 struct snd_pcm_hw_params *hw_params)
365 if (hw_params == NULL) {
366 chip->image[AD1848_DATA_FORMAT] = 0x20;
367 } else {
368 chip->image[AD1848_DATA_FORMAT] =
369 snd_ad1848_get_format(params_format(hw_params), params_channels(hw_params)) |
370 snd_ad1848_get_rate(params_rate(hw_params));
372 // snd_printk(">>> pmode = 0x%x, dfr = 0x%x\n", pstr->mode, chip->image[AD1848_DATA_FORMAT]);
375 static int snd_ad1848_open(struct snd_wss *chip, unsigned int mode)
377 unsigned long flags;
379 if (chip->mode & WSS_MODE_OPEN)
380 return -EAGAIN;
382 snd_ad1848_mce_down(chip);
384 #ifdef SNDRV_DEBUG_MCE
385 snd_printk("open: (1)\n");
386 #endif
387 snd_ad1848_mce_up(chip);
388 spin_lock_irqsave(&chip->reg_lock, flags);
389 chip->image[AD1848_IFACE_CTRL] &= ~(AD1848_PLAYBACK_ENABLE | AD1848_PLAYBACK_PIO |
390 AD1848_CAPTURE_ENABLE | AD1848_CAPTURE_PIO |
391 AD1848_CALIB_MODE);
392 chip->image[AD1848_IFACE_CTRL] |= AD1848_AUTOCALIB;
393 snd_ad1848_out(chip, AD1848_IFACE_CTRL, chip->image[AD1848_IFACE_CTRL]);
394 spin_unlock_irqrestore(&chip->reg_lock, flags);
395 snd_ad1848_mce_down(chip);
397 #ifdef SNDRV_DEBUG_MCE
398 snd_printk("open: (2)\n");
399 #endif
401 snd_ad1848_set_data_format(chip, NULL);
403 snd_ad1848_mce_up(chip);
404 spin_lock_irqsave(&chip->reg_lock, flags);
405 snd_ad1848_out(chip, AD1848_DATA_FORMAT, chip->image[AD1848_DATA_FORMAT]);
406 spin_unlock_irqrestore(&chip->reg_lock, flags);
407 snd_ad1848_mce_down(chip);
409 #ifdef SNDRV_DEBUG_MCE
410 snd_printk("open: (3)\n");
411 #endif
413 /* ok. now enable and ack CODEC IRQ */
414 spin_lock_irqsave(&chip->reg_lock, flags);
415 outb(0, AD1848P(chip, STATUS)); /* clear IRQ */
416 outb(0, AD1848P(chip, STATUS)); /* clear IRQ */
417 chip->image[AD1848_PIN_CTRL] |= AD1848_IRQ_ENABLE;
418 snd_ad1848_out(chip, AD1848_PIN_CTRL, chip->image[AD1848_PIN_CTRL]);
419 spin_unlock_irqrestore(&chip->reg_lock, flags);
421 chip->mode = mode;
423 return 0;
426 static void snd_ad1848_close(struct snd_wss *chip)
428 unsigned long flags;
430 if (!chip->mode)
431 return;
432 /* disable IRQ */
433 spin_lock_irqsave(&chip->reg_lock, flags);
434 outb(0, AD1848P(chip, STATUS)); /* clear IRQ */
435 outb(0, AD1848P(chip, STATUS)); /* clear IRQ */
436 chip->image[AD1848_PIN_CTRL] &= ~AD1848_IRQ_ENABLE;
437 snd_ad1848_out(chip, AD1848_PIN_CTRL, chip->image[AD1848_PIN_CTRL]);
438 spin_unlock_irqrestore(&chip->reg_lock, flags);
440 /* now disable capture & playback */
442 snd_ad1848_mce_up(chip);
443 spin_lock_irqsave(&chip->reg_lock, flags);
444 chip->image[AD1848_IFACE_CTRL] &= ~(AD1848_PLAYBACK_ENABLE | AD1848_PLAYBACK_PIO |
445 AD1848_CAPTURE_ENABLE | AD1848_CAPTURE_PIO);
446 snd_ad1848_out(chip, AD1848_IFACE_CTRL, chip->image[AD1848_IFACE_CTRL]);
447 spin_unlock_irqrestore(&chip->reg_lock, flags);
448 snd_ad1848_mce_down(chip);
450 /* clear IRQ again */
451 spin_lock_irqsave(&chip->reg_lock, flags);
452 outb(0, AD1848P(chip, STATUS)); /* clear IRQ */
453 outb(0, AD1848P(chip, STATUS)); /* clear IRQ */
454 spin_unlock_irqrestore(&chip->reg_lock, flags);
456 chip->mode = 0;
460 * ok.. exported functions..
463 static int snd_ad1848_playback_trigger(struct snd_pcm_substream *substream,
464 int cmd)
466 struct snd_wss *chip = snd_pcm_substream_chip(substream);
467 return snd_ad1848_trigger(chip, AD1848_PLAYBACK_ENABLE, SNDRV_PCM_STREAM_PLAYBACK, cmd);
470 static int snd_ad1848_capture_trigger(struct snd_pcm_substream *substream,
471 int cmd)
473 struct snd_wss *chip = snd_pcm_substream_chip(substream);
474 return snd_ad1848_trigger(chip, AD1848_CAPTURE_ENABLE, SNDRV_PCM_STREAM_CAPTURE, cmd);
477 static int snd_ad1848_playback_hw_params(struct snd_pcm_substream *substream,
478 struct snd_pcm_hw_params *hw_params)
480 struct snd_wss *chip = snd_pcm_substream_chip(substream);
481 unsigned long flags;
482 int err;
484 if ((err = snd_pcm_lib_malloc_pages(substream, params_buffer_bytes(hw_params))) < 0)
485 return err;
486 snd_ad1848_calibrate_mute(chip, 1);
487 snd_ad1848_set_data_format(chip, hw_params);
488 snd_ad1848_mce_up(chip);
489 spin_lock_irqsave(&chip->reg_lock, flags);
490 snd_ad1848_out(chip, AD1848_DATA_FORMAT, chip->image[AD1848_DATA_FORMAT]);
491 spin_unlock_irqrestore(&chip->reg_lock, flags);
492 snd_ad1848_mce_down(chip);
493 snd_ad1848_calibrate_mute(chip, 0);
494 return 0;
497 static int snd_ad1848_playback_hw_free(struct snd_pcm_substream *substream)
499 return snd_pcm_lib_free_pages(substream);
502 static int snd_ad1848_playback_prepare(struct snd_pcm_substream *substream)
504 struct snd_wss *chip = snd_pcm_substream_chip(substream);
505 struct snd_pcm_runtime *runtime = substream->runtime;
506 unsigned long flags;
507 unsigned int size = snd_pcm_lib_buffer_bytes(substream);
508 unsigned int count = snd_pcm_lib_period_bytes(substream);
510 chip->p_dma_size = size;
511 chip->image[AD1848_IFACE_CTRL] &= ~(AD1848_PLAYBACK_ENABLE | AD1848_PLAYBACK_PIO);
512 snd_dma_program(chip->dma1, runtime->dma_addr, size,
513 DMA_MODE_WRITE | DMA_AUTOINIT);
514 count = snd_ad1848_get_count(chip->image[AD1848_DATA_FORMAT], count) - 1;
515 spin_lock_irqsave(&chip->reg_lock, flags);
516 snd_ad1848_out(chip, AD1848_DATA_LWR_CNT, (unsigned char) count);
517 snd_ad1848_out(chip, AD1848_DATA_UPR_CNT, (unsigned char) (count >> 8));
518 spin_unlock_irqrestore(&chip->reg_lock, flags);
519 return 0;
522 static int snd_ad1848_capture_hw_params(struct snd_pcm_substream *substream,
523 struct snd_pcm_hw_params *hw_params)
525 struct snd_wss *chip = snd_pcm_substream_chip(substream);
526 unsigned long flags;
527 int err;
529 if ((err = snd_pcm_lib_malloc_pages(substream, params_buffer_bytes(hw_params))) < 0)
530 return err;
531 snd_ad1848_calibrate_mute(chip, 1);
532 snd_ad1848_set_data_format(chip, hw_params);
533 snd_ad1848_mce_up(chip);
534 spin_lock_irqsave(&chip->reg_lock, flags);
535 snd_ad1848_out(chip, AD1848_DATA_FORMAT, chip->image[AD1848_DATA_FORMAT]);
536 spin_unlock_irqrestore(&chip->reg_lock, flags);
537 snd_ad1848_mce_down(chip);
538 snd_ad1848_calibrate_mute(chip, 0);
539 return 0;
542 static int snd_ad1848_capture_hw_free(struct snd_pcm_substream *substream)
544 return snd_pcm_lib_free_pages(substream);
547 static int snd_ad1848_capture_prepare(struct snd_pcm_substream *substream)
549 struct snd_wss *chip = snd_pcm_substream_chip(substream);
550 struct snd_pcm_runtime *runtime = substream->runtime;
551 unsigned long flags;
552 unsigned int size = snd_pcm_lib_buffer_bytes(substream);
553 unsigned int count = snd_pcm_lib_period_bytes(substream);
555 chip->c_dma_size = size;
556 chip->image[AD1848_IFACE_CTRL] &= ~(AD1848_CAPTURE_ENABLE | AD1848_CAPTURE_PIO);
557 snd_dma_program(chip->dma2, runtime->dma_addr, size,
558 DMA_MODE_READ | DMA_AUTOINIT);
559 count = snd_ad1848_get_count(chip->image[AD1848_DATA_FORMAT], count) - 1;
560 spin_lock_irqsave(&chip->reg_lock, flags);
561 snd_ad1848_out(chip, AD1848_DATA_LWR_CNT, (unsigned char) count);
562 snd_ad1848_out(chip, AD1848_DATA_UPR_CNT, (unsigned char) (count >> 8));
563 spin_unlock_irqrestore(&chip->reg_lock, flags);
564 return 0;
567 static irqreturn_t snd_ad1848_interrupt(int irq, void *dev_id)
569 struct snd_wss *chip = dev_id;
571 if ((chip->mode & WSS_MODE_PLAY) && chip->playback_substream)
572 snd_pcm_period_elapsed(chip->playback_substream);
573 if ((chip->mode & WSS_MODE_RECORD) && chip->capture_substream)
574 snd_pcm_period_elapsed(chip->capture_substream);
575 outb(0, AD1848P(chip, STATUS)); /* clear global interrupt bit */
576 return IRQ_HANDLED;
579 static snd_pcm_uframes_t snd_ad1848_playback_pointer(struct snd_pcm_substream *substream)
581 struct snd_wss *chip = snd_pcm_substream_chip(substream);
582 size_t ptr;
584 if (!(chip->image[AD1848_IFACE_CTRL] & AD1848_PLAYBACK_ENABLE))
585 return 0;
586 ptr = snd_dma_pointer(chip->dma1, chip->p_dma_size);
587 return bytes_to_frames(substream->runtime, ptr);
590 static snd_pcm_uframes_t snd_ad1848_capture_pointer(struct snd_pcm_substream *substream)
592 struct snd_wss *chip = snd_pcm_substream_chip(substream);
593 size_t ptr;
595 if (!(chip->image[AD1848_IFACE_CTRL] & AD1848_CAPTURE_ENABLE))
596 return 0;
597 ptr = snd_dma_pointer(chip->dma2, chip->c_dma_size);
598 return bytes_to_frames(substream->runtime, ptr);
605 static void snd_ad1848_thinkpad_twiddle(struct snd_wss *chip, int on)
607 int tmp;
609 if (!chip->thinkpad_flag) return;
611 outb(0x1c, AD1848_THINKPAD_CTL_PORT1);
612 tmp = inb(AD1848_THINKPAD_CTL_PORT2);
614 if (on)
615 /* turn it on */
616 tmp |= AD1848_THINKPAD_CS4248_ENABLE_BIT;
617 else
618 /* turn it off */
619 tmp &= ~AD1848_THINKPAD_CS4248_ENABLE_BIT;
621 outb(tmp, AD1848_THINKPAD_CTL_PORT2);
625 #ifdef CONFIG_PM
626 static void snd_ad1848_suspend(struct snd_wss *chip)
628 snd_pcm_suspend_all(chip->pcm);
629 if (chip->thinkpad_flag)
630 snd_ad1848_thinkpad_twiddle(chip, 0);
633 static void snd_ad1848_resume(struct snd_wss *chip)
635 int i;
637 if (chip->thinkpad_flag)
638 snd_ad1848_thinkpad_twiddle(chip, 1);
640 /* clear any pendings IRQ */
641 inb(AD1848P(chip, STATUS));
642 outb(0, AD1848P(chip, STATUS));
643 mb();
645 snd_ad1848_mce_down(chip);
646 for (i = 0; i < 16; i++)
647 snd_ad1848_out(chip, i, chip->image[i]);
648 snd_ad1848_mce_up(chip);
649 snd_ad1848_mce_down(chip);
651 #endif /* CONFIG_PM */
653 static int snd_ad1848_probe(struct snd_wss *chip)
655 unsigned long flags;
656 int i, id, rev, ad1847;
657 unsigned char *ptr;
659 #if 0
660 snd_ad1848_debug(chip);
661 #endif
662 id = ad1847 = 0;
663 for (i = 0; i < 1000; i++) {
664 mb();
665 if (inb(AD1848P(chip, REGSEL)) & AD1848_INIT)
666 udelay(500);
667 else {
668 spin_lock_irqsave(&chip->reg_lock, flags);
669 snd_ad1848_out(chip, AD1848_MISC_INFO, 0x00);
670 snd_ad1848_out(chip, AD1848_LEFT_INPUT, 0xaa);
671 snd_ad1848_out(chip, AD1848_RIGHT_INPUT, 0x45);
672 rev = snd_ad1848_in(chip, AD1848_RIGHT_INPUT);
673 if (rev == 0x65) {
674 spin_unlock_irqrestore(&chip->reg_lock, flags);
675 id = 1;
676 ad1847 = 1;
677 break;
679 if (snd_ad1848_in(chip, AD1848_LEFT_INPUT) == 0xaa && rev == 0x45) {
680 spin_unlock_irqrestore(&chip->reg_lock, flags);
681 id = 1;
682 break;
684 spin_unlock_irqrestore(&chip->reg_lock, flags);
687 if (id != 1)
688 return -ENODEV; /* no valid device found */
689 if (chip->hardware == WSS_HW_DETECT) {
690 if (ad1847) {
691 chip->hardware = WSS_HW_AD1847;
692 } else {
693 chip->hardware = WSS_HW_AD1848;
694 rev = snd_ad1848_in(chip, AD1848_MISC_INFO);
695 if (rev & 0x80) {
696 chip->hardware = WSS_HW_CS4248;
697 } else if ((rev & 0x0f) == 0x0a) {
698 snd_ad1848_out(chip, AD1848_MISC_INFO, 0x40);
699 for (i = 0; i < 16; ++i) {
700 if (snd_ad1848_in(chip, i) != snd_ad1848_in(chip, i + 16)) {
701 chip->hardware = WSS_HW_CMI8330;
702 break;
705 snd_ad1848_out(chip, AD1848_MISC_INFO, 0x00);
709 spin_lock_irqsave(&chip->reg_lock, flags);
710 inb(AD1848P(chip, STATUS)); /* clear any pendings IRQ */
711 outb(0, AD1848P(chip, STATUS));
712 mb();
713 spin_unlock_irqrestore(&chip->reg_lock, flags);
715 chip->image[AD1848_MISC_INFO] = 0x00;
716 chip->image[AD1848_IFACE_CTRL] =
717 (chip->image[AD1848_IFACE_CTRL] & ~AD1848_SINGLE_DMA) | AD1848_SINGLE_DMA;
718 ptr = (unsigned char *) &chip->image;
719 snd_ad1848_mce_down(chip);
720 spin_lock_irqsave(&chip->reg_lock, flags);
721 for (i = 0; i < 16; i++) /* ok.. fill all AD1848 registers */
722 snd_ad1848_out(chip, i, *ptr++);
723 spin_unlock_irqrestore(&chip->reg_lock, flags);
724 snd_ad1848_mce_up(chip);
725 snd_ad1848_mce_down(chip);
726 return 0; /* all things are ok.. */
733 static struct snd_pcm_hardware snd_ad1848_playback =
735 .info = (SNDRV_PCM_INFO_MMAP | SNDRV_PCM_INFO_INTERLEAVED |
736 SNDRV_PCM_INFO_MMAP_VALID),
737 .formats = (SNDRV_PCM_FMTBIT_MU_LAW | SNDRV_PCM_FMTBIT_A_LAW |
738 SNDRV_PCM_FMTBIT_U8 | SNDRV_PCM_FMTBIT_S16_LE),
739 .rates = SNDRV_PCM_RATE_KNOT | SNDRV_PCM_RATE_8000_48000,
740 .rate_min = 5510,
741 .rate_max = 48000,
742 .channels_min = 1,
743 .channels_max = 2,
744 .buffer_bytes_max = (128*1024),
745 .period_bytes_min = 64,
746 .period_bytes_max = (128*1024),
747 .periods_min = 1,
748 .periods_max = 1024,
749 .fifo_size = 0,
752 static struct snd_pcm_hardware snd_ad1848_capture =
754 .info = (SNDRV_PCM_INFO_MMAP | SNDRV_PCM_INFO_INTERLEAVED |
755 SNDRV_PCM_INFO_MMAP_VALID),
756 .formats = (SNDRV_PCM_FMTBIT_MU_LAW | SNDRV_PCM_FMTBIT_A_LAW |
757 SNDRV_PCM_FMTBIT_U8 | SNDRV_PCM_FMTBIT_S16_LE),
758 .rates = SNDRV_PCM_RATE_KNOT | SNDRV_PCM_RATE_8000_48000,
759 .rate_min = 5510,
760 .rate_max = 48000,
761 .channels_min = 1,
762 .channels_max = 2,
763 .buffer_bytes_max = (128*1024),
764 .period_bytes_min = 64,
765 .period_bytes_max = (128*1024),
766 .periods_min = 1,
767 .periods_max = 1024,
768 .fifo_size = 0,
775 static int snd_ad1848_playback_open(struct snd_pcm_substream *substream)
777 struct snd_wss *chip = snd_pcm_substream_chip(substream);
778 struct snd_pcm_runtime *runtime = substream->runtime;
779 int err;
781 err = snd_ad1848_open(chip, WSS_MODE_PLAY);
782 if (err < 0)
783 return err;
784 chip->playback_substream = substream;
785 runtime->hw = snd_ad1848_playback;
786 snd_pcm_limit_isa_dma_size(chip->dma1, &runtime->hw.buffer_bytes_max);
787 snd_pcm_limit_isa_dma_size(chip->dma1, &runtime->hw.period_bytes_max);
788 snd_pcm_hw_constraint_list(runtime, 0, SNDRV_PCM_HW_PARAM_RATE, &hw_constraints_rates);
789 return 0;
792 static int snd_ad1848_capture_open(struct snd_pcm_substream *substream)
794 struct snd_wss *chip = snd_pcm_substream_chip(substream);
795 struct snd_pcm_runtime *runtime = substream->runtime;
796 int err;
798 err = snd_ad1848_open(chip, WSS_MODE_RECORD);
799 if (err < 0)
800 return err;
801 chip->capture_substream = substream;
802 runtime->hw = snd_ad1848_capture;
803 snd_pcm_limit_isa_dma_size(chip->dma2, &runtime->hw.buffer_bytes_max);
804 snd_pcm_limit_isa_dma_size(chip->dma2, &runtime->hw.period_bytes_max);
805 snd_pcm_hw_constraint_list(runtime, 0, SNDRV_PCM_HW_PARAM_RATE, &hw_constraints_rates);
806 return 0;
809 static int snd_ad1848_playback_close(struct snd_pcm_substream *substream)
811 struct snd_wss *chip = snd_pcm_substream_chip(substream);
813 chip->mode &= ~WSS_MODE_PLAY;
814 chip->playback_substream = NULL;
815 snd_ad1848_close(chip);
816 return 0;
819 static int snd_ad1848_capture_close(struct snd_pcm_substream *substream)
821 struct snd_wss *chip = snd_pcm_substream_chip(substream);
823 chip->mode &= ~WSS_MODE_RECORD;
824 chip->capture_substream = NULL;
825 snd_ad1848_close(chip);
826 return 0;
829 static int snd_ad1848_free(struct snd_wss *chip)
831 release_and_free_resource(chip->res_port);
832 if (chip->irq >= 0)
833 free_irq(chip->irq, (void *) chip);
834 if (chip->dma1 >= 0) {
835 snd_dma_disable(chip->dma1);
836 free_dma(chip->dma1);
838 kfree(chip);
839 return 0;
842 static int snd_ad1848_dev_free(struct snd_device *device)
844 struct snd_wss *chip = device->device_data;
845 return snd_ad1848_free(chip);
848 static const char *snd_ad1848_chip_id(struct snd_wss *chip)
850 switch (chip->hardware) {
851 case AD1848_HW_AD1847: return "AD1847";
852 case AD1848_HW_AD1848: return "AD1848";
853 case AD1848_HW_CS4248: return "CS4248";
854 case AD1848_HW_CMI8330: return "CMI8330/C3D";
855 default: return "???";
859 int snd_ad1848_create(struct snd_card *card,
860 unsigned long port,
861 int irq, int dma,
862 unsigned short hardware,
863 struct snd_wss **rchip)
865 static struct snd_device_ops ops = {
866 .dev_free = snd_ad1848_dev_free,
868 struct snd_wss *chip;
869 int err;
871 *rchip = NULL;
872 chip = kzalloc(sizeof(*chip), GFP_KERNEL);
873 if (chip == NULL)
874 return -ENOMEM;
875 spin_lock_init(&chip->reg_lock);
876 chip->card = card;
877 chip->port = port;
878 chip->irq = -1;
879 chip->dma1 = -1;
880 chip->dma2 = -1;
881 chip->single_dma = 1;
882 chip->hardware = hardware;
883 memcpy(&chip->image, &snd_ad1848_original_image, sizeof(snd_ad1848_original_image));
885 if ((chip->res_port = request_region(port, 4, "AD1848")) == NULL) {
886 snd_printk(KERN_ERR "ad1848: can't grab port 0x%lx\n", port);
887 snd_ad1848_free(chip);
888 return -EBUSY;
890 if (request_irq(irq, snd_ad1848_interrupt, IRQF_DISABLED, "AD1848", (void *) chip)) {
891 snd_printk(KERN_ERR "ad1848: can't grab IRQ %d\n", irq);
892 snd_ad1848_free(chip);
893 return -EBUSY;
895 chip->irq = irq;
896 if (request_dma(dma, "AD1848")) {
897 snd_printk(KERN_ERR "ad1848: can't grab DMA %d\n", dma);
898 snd_ad1848_free(chip);
899 return -EBUSY;
901 chip->dma1 = dma;
902 chip->dma2 = dma;
904 if (hardware == WSS_HW_THINKPAD) {
905 chip->thinkpad_flag = 1;
906 chip->hardware = WSS_HW_DETECT; /* reset */
907 snd_ad1848_thinkpad_twiddle(chip, 1);
910 if (snd_ad1848_probe(chip) < 0) {
911 snd_ad1848_free(chip);
912 return -ENODEV;
915 /* Register device */
916 if ((err = snd_device_new(card, SNDRV_DEV_LOWLEVEL, chip, &ops)) < 0) {
917 snd_ad1848_free(chip);
918 return err;
921 #ifdef CONFIG_PM
922 chip->suspend = snd_ad1848_suspend;
923 chip->resume = snd_ad1848_resume;
924 #endif
926 *rchip = chip;
927 return 0;
930 EXPORT_SYMBOL(snd_ad1848_create);
932 static struct snd_pcm_ops snd_ad1848_playback_ops = {
933 .open = snd_ad1848_playback_open,
934 .close = snd_ad1848_playback_close,
935 .ioctl = snd_ad1848_ioctl,
936 .hw_params = snd_ad1848_playback_hw_params,
937 .hw_free = snd_ad1848_playback_hw_free,
938 .prepare = snd_ad1848_playback_prepare,
939 .trigger = snd_ad1848_playback_trigger,
940 .pointer = snd_ad1848_playback_pointer,
943 static struct snd_pcm_ops snd_ad1848_capture_ops = {
944 .open = snd_ad1848_capture_open,
945 .close = snd_ad1848_capture_close,
946 .ioctl = snd_ad1848_ioctl,
947 .hw_params = snd_ad1848_capture_hw_params,
948 .hw_free = snd_ad1848_capture_hw_free,
949 .prepare = snd_ad1848_capture_prepare,
950 .trigger = snd_ad1848_capture_trigger,
951 .pointer = snd_ad1848_capture_pointer,
954 int snd_ad1848_pcm(struct snd_wss *chip, int device, struct snd_pcm **rpcm)
956 struct snd_pcm *pcm;
957 int err;
959 if ((err = snd_pcm_new(chip->card, "AD1848", device, 1, 1, &pcm)) < 0)
960 return err;
962 snd_pcm_set_ops(pcm, SNDRV_PCM_STREAM_PLAYBACK, &snd_ad1848_playback_ops);
963 snd_pcm_set_ops(pcm, SNDRV_PCM_STREAM_CAPTURE, &snd_ad1848_capture_ops);
965 pcm->private_data = chip;
966 pcm->info_flags = SNDRV_PCM_INFO_HALF_DUPLEX;
967 strcpy(pcm->name, snd_ad1848_chip_id(chip));
969 snd_pcm_lib_preallocate_pages_for_all(pcm, SNDRV_DMA_TYPE_DEV,
970 snd_dma_isa_data(),
971 64 * 1024,
972 chip->dma1 > 3 ?
973 128 * 1024 : 64 * 1024);
975 chip->pcm = pcm;
976 if (rpcm)
977 *rpcm = pcm;
978 return 0;
981 EXPORT_SYMBOL(snd_ad1848_pcm);
983 const struct snd_pcm_ops *snd_ad1848_get_pcm_ops(int direction)
985 return direction == SNDRV_PCM_STREAM_PLAYBACK ?
986 &snd_ad1848_playback_ops : &snd_ad1848_capture_ops;
989 EXPORT_SYMBOL(snd_ad1848_get_pcm_ops);
992 * MIXER part
995 static int snd_ad1848_info_mux(struct snd_kcontrol *kcontrol, struct snd_ctl_elem_info *uinfo)
997 static char *texts[4] = {
998 "Line", "Aux", "Mic", "Mix"
1001 uinfo->type = SNDRV_CTL_ELEM_TYPE_ENUMERATED;
1002 uinfo->count = 2;
1003 uinfo->value.enumerated.items = 4;
1004 if (uinfo->value.enumerated.item > 3)
1005 uinfo->value.enumerated.item = 3;
1006 strcpy(uinfo->value.enumerated.name, texts[uinfo->value.enumerated.item]);
1007 return 0;
1010 static int snd_ad1848_get_mux(struct snd_kcontrol *kcontrol, struct snd_ctl_elem_value *ucontrol)
1012 struct snd_wss *chip = snd_kcontrol_chip(kcontrol);
1013 unsigned long flags;
1015 spin_lock_irqsave(&chip->reg_lock, flags);
1016 ucontrol->value.enumerated.item[0] = (chip->image[AD1848_LEFT_INPUT] & AD1848_MIXS_ALL) >> 6;
1017 ucontrol->value.enumerated.item[1] = (chip->image[AD1848_RIGHT_INPUT] & AD1848_MIXS_ALL) >> 6;
1018 spin_unlock_irqrestore(&chip->reg_lock, flags);
1019 return 0;
1022 static int snd_ad1848_put_mux(struct snd_kcontrol *kcontrol, struct snd_ctl_elem_value *ucontrol)
1024 struct snd_wss *chip = snd_kcontrol_chip(kcontrol);
1025 unsigned long flags;
1026 unsigned short left, right;
1027 int change;
1029 if (ucontrol->value.enumerated.item[0] > 3 ||
1030 ucontrol->value.enumerated.item[1] > 3)
1031 return -EINVAL;
1032 left = ucontrol->value.enumerated.item[0] << 6;
1033 right = ucontrol->value.enumerated.item[1] << 6;
1034 spin_lock_irqsave(&chip->reg_lock, flags);
1035 left = (chip->image[AD1848_LEFT_INPUT] & ~AD1848_MIXS_ALL) | left;
1036 right = (chip->image[AD1848_RIGHT_INPUT] & ~AD1848_MIXS_ALL) | right;
1037 change = left != chip->image[AD1848_LEFT_INPUT] ||
1038 right != chip->image[AD1848_RIGHT_INPUT];
1039 snd_ad1848_out(chip, AD1848_LEFT_INPUT, left);
1040 snd_ad1848_out(chip, AD1848_RIGHT_INPUT, right);
1041 spin_unlock_irqrestore(&chip->reg_lock, flags);
1042 return change;
1045 static int snd_ad1848_info_single(struct snd_kcontrol *kcontrol, struct snd_ctl_elem_info *uinfo)
1047 int mask = (kcontrol->private_value >> 16) & 0xff;
1049 uinfo->type = mask == 1 ? SNDRV_CTL_ELEM_TYPE_BOOLEAN : SNDRV_CTL_ELEM_TYPE_INTEGER;
1050 uinfo->count = 1;
1051 uinfo->value.integer.min = 0;
1052 uinfo->value.integer.max = mask;
1053 return 0;
1056 static int snd_ad1848_get_single(struct snd_kcontrol *kcontrol, struct snd_ctl_elem_value *ucontrol)
1058 struct snd_wss *chip = snd_kcontrol_chip(kcontrol);
1059 unsigned long flags;
1060 int reg = kcontrol->private_value & 0xff;
1061 int shift = (kcontrol->private_value >> 8) & 0xff;
1062 int mask = (kcontrol->private_value >> 16) & 0xff;
1063 int invert = (kcontrol->private_value >> 24) & 0xff;
1065 spin_lock_irqsave(&chip->reg_lock, flags);
1066 ucontrol->value.integer.value[0] = (chip->image[reg] >> shift) & mask;
1067 spin_unlock_irqrestore(&chip->reg_lock, flags);
1068 if (invert)
1069 ucontrol->value.integer.value[0] = mask - ucontrol->value.integer.value[0];
1070 return 0;
1073 static int snd_ad1848_put_single(struct snd_kcontrol *kcontrol, struct snd_ctl_elem_value *ucontrol)
1075 struct snd_wss *chip = snd_kcontrol_chip(kcontrol);
1076 unsigned long flags;
1077 int reg = kcontrol->private_value & 0xff;
1078 int shift = (kcontrol->private_value >> 8) & 0xff;
1079 int mask = (kcontrol->private_value >> 16) & 0xff;
1080 int invert = (kcontrol->private_value >> 24) & 0xff;
1081 int change;
1082 unsigned short val;
1084 val = (ucontrol->value.integer.value[0] & mask);
1085 if (invert)
1086 val = mask - val;
1087 val <<= shift;
1088 spin_lock_irqsave(&chip->reg_lock, flags);
1089 val = (chip->image[reg] & ~(mask << shift)) | val;
1090 change = val != chip->image[reg];
1091 snd_ad1848_out(chip, reg, val);
1092 spin_unlock_irqrestore(&chip->reg_lock, flags);
1093 return change;
1096 static int snd_ad1848_info_double(struct snd_kcontrol *kcontrol, struct snd_ctl_elem_info *uinfo)
1098 int mask = (kcontrol->private_value >> 24) & 0xff;
1100 uinfo->type = mask == 1 ? SNDRV_CTL_ELEM_TYPE_BOOLEAN : SNDRV_CTL_ELEM_TYPE_INTEGER;
1101 uinfo->count = 2;
1102 uinfo->value.integer.min = 0;
1103 uinfo->value.integer.max = mask;
1104 return 0;
1107 static int snd_ad1848_get_double(struct snd_kcontrol *kcontrol, struct snd_ctl_elem_value *ucontrol)
1109 struct snd_wss *chip = snd_kcontrol_chip(kcontrol);
1110 unsigned long flags;
1111 int left_reg = kcontrol->private_value & 0xff;
1112 int right_reg = (kcontrol->private_value >> 8) & 0xff;
1113 int shift_left = (kcontrol->private_value >> 16) & 0x07;
1114 int shift_right = (kcontrol->private_value >> 19) & 0x07;
1115 int mask = (kcontrol->private_value >> 24) & 0xff;
1116 int invert = (kcontrol->private_value >> 22) & 1;
1118 spin_lock_irqsave(&chip->reg_lock, flags);
1119 ucontrol->value.integer.value[0] = (chip->image[left_reg] >> shift_left) & mask;
1120 ucontrol->value.integer.value[1] = (chip->image[right_reg] >> shift_right) & mask;
1121 spin_unlock_irqrestore(&chip->reg_lock, flags);
1122 if (invert) {
1123 ucontrol->value.integer.value[0] = mask - ucontrol->value.integer.value[0];
1124 ucontrol->value.integer.value[1] = mask - ucontrol->value.integer.value[1];
1126 return 0;
1129 static int snd_ad1848_put_double(struct snd_kcontrol *kcontrol, struct snd_ctl_elem_value *ucontrol)
1131 struct snd_wss *chip = snd_kcontrol_chip(kcontrol);
1132 unsigned long flags;
1133 int left_reg = kcontrol->private_value & 0xff;
1134 int right_reg = (kcontrol->private_value >> 8) & 0xff;
1135 int shift_left = (kcontrol->private_value >> 16) & 0x07;
1136 int shift_right = (kcontrol->private_value >> 19) & 0x07;
1137 int mask = (kcontrol->private_value >> 24) & 0xff;
1138 int invert = (kcontrol->private_value >> 22) & 1;
1139 int change;
1140 unsigned short val1, val2;
1142 val1 = ucontrol->value.integer.value[0] & mask;
1143 val2 = ucontrol->value.integer.value[1] & mask;
1144 if (invert) {
1145 val1 = mask - val1;
1146 val2 = mask - val2;
1148 val1 <<= shift_left;
1149 val2 <<= shift_right;
1150 spin_lock_irqsave(&chip->reg_lock, flags);
1151 if (left_reg != right_reg) {
1152 val1 = (chip->image[left_reg] & ~(mask << shift_left)) | val1;
1153 val2 = (chip->image[right_reg] & ~(mask << shift_right)) | val2;
1154 change = val1 != chip->image[left_reg] || val2 != chip->image[right_reg];
1155 snd_ad1848_out(chip, left_reg, val1);
1156 snd_ad1848_out(chip, right_reg, val2);
1157 } else {
1158 val1 = (chip->image[left_reg] & ~((mask << shift_left) | (mask << shift_right))) | val1 | val2;
1159 change = val1 != chip->image[left_reg];
1160 snd_ad1848_out(chip, left_reg, val1);
1162 spin_unlock_irqrestore(&chip->reg_lock, flags);
1163 return change;
1166 static const DECLARE_TLV_DB_SCALE(db_scale_6bit, -9450, 150, 0);
1167 static const DECLARE_TLV_DB_SCALE(db_scale_5bit_12db_max, -3450, 150, 0);
1168 static const DECLARE_TLV_DB_SCALE(db_scale_rec_gain, 0, 150, 0);
1170 #define AD1848_SINGLE_TLV(xname, xindex, reg, shift, mask, invert, xtlv) \
1171 { .iface = SNDRV_CTL_ELEM_IFACE_MIXER, \
1172 .access = SNDRV_CTL_ELEM_ACCESS_READWRITE | SNDRV_CTL_ELEM_ACCESS_TLV_READ, \
1173 .name = xname, \
1174 .index = xindex, \
1175 .info = snd_ad1848_info_single, \
1176 .get = snd_ad1848_get_single, \
1177 .put = snd_ad1848_put_single, \
1178 .private_value = reg | (shift << 8) | (mask << 16) | (invert << 24), \
1179 .tlv = { .p = (xtlv) } }
1181 #define AD1848_DOUBLE_TLV(xname, xindex, left_reg, right_reg, shift_left, shift_right, mask, invert, xtlv) \
1182 { .iface = SNDRV_CTL_ELEM_IFACE_MIXER, \
1183 .access = SNDRV_CTL_ELEM_ACCESS_READWRITE | SNDRV_CTL_ELEM_ACCESS_TLV_READ, \
1184 .name = xname, \
1185 .index = xindex, \
1186 .info = snd_ad1848_info_double, \
1187 .get = snd_ad1848_get_double, \
1188 .put = snd_ad1848_put_double, \
1189 .private_value = left_reg | (right_reg << 8) | (shift_left << 16) | \
1190 (shift_right << 19) | (mask << 24) | (invert << 22), \
1191 .tlv = { .p = (xtlv) } }
1193 static struct snd_kcontrol_new snd_ad1848_controls[] = {
1194 WSS_DOUBLE("PCM Playback Switch", 0,
1195 AD1848_LEFT_OUTPUT, AD1848_RIGHT_OUTPUT, 7, 7, 1, 1),
1196 AD1848_DOUBLE_TLV("PCM Playback Volume", 0,
1197 AD1848_LEFT_OUTPUT, AD1848_RIGHT_OUTPUT, 0, 0, 63, 1,
1198 db_scale_6bit),
1199 WSS_DOUBLE("Aux Playback Switch", 0,
1200 AD1848_AUX1_LEFT_INPUT, AD1848_AUX1_RIGHT_INPUT, 7, 7, 1, 1),
1201 AD1848_DOUBLE_TLV("Aux Playback Volume", 0,
1202 AD1848_AUX1_LEFT_INPUT, AD1848_AUX1_RIGHT_INPUT, 0, 0, 31, 1,
1203 db_scale_5bit_12db_max),
1204 WSS_DOUBLE("Aux Playback Switch", 1,
1205 AD1848_AUX2_LEFT_INPUT, AD1848_AUX2_RIGHT_INPUT, 7, 7, 1, 1),
1206 AD1848_DOUBLE_TLV("Aux Playback Volume", 1,
1207 AD1848_AUX2_LEFT_INPUT, AD1848_AUX2_RIGHT_INPUT, 0, 0, 31, 1,
1208 db_scale_5bit_12db_max),
1209 AD1848_DOUBLE_TLV("Capture Volume", 0,
1210 AD1848_LEFT_INPUT, AD1848_RIGHT_INPUT, 0, 0, 15, 0,
1211 db_scale_rec_gain),
1213 .name = "Capture Source",
1214 .iface = SNDRV_CTL_ELEM_IFACE_MIXER,
1215 .info = snd_ad1848_info_mux,
1216 .get = snd_ad1848_get_mux,
1217 .put = snd_ad1848_put_mux,
1219 WSS_SINGLE("Loopback Capture Switch", 0,
1220 AD1848_LOOPBACK, 0, 1, 0),
1221 AD1848_SINGLE_TLV("Loopback Capture Volume", 0,
1222 AD1848_LOOPBACK, 1, 63, 0,
1223 db_scale_6bit),
1226 int snd_ad1848_mixer(struct snd_wss *chip)
1228 struct snd_card *card;
1229 struct snd_pcm *pcm;
1230 unsigned int idx;
1231 int err;
1233 snd_assert(chip != NULL && chip->pcm != NULL, return -EINVAL);
1235 pcm = chip->pcm;
1236 card = chip->card;
1238 strcpy(card->mixername, pcm->name);
1240 for (idx = 0; idx < ARRAY_SIZE(snd_ad1848_controls); idx++) {
1241 err = snd_ctl_add(card,
1242 snd_ctl_new1(&snd_ad1848_controls[idx], chip));
1243 if (err < 0)
1244 return err;
1247 return 0;
1250 EXPORT_SYMBOL(snd_ad1848_mixer);
1253 * INIT part
1256 static int __init alsa_ad1848_init(void)
1258 return 0;
1261 static void __exit alsa_ad1848_exit(void)
1265 module_init(alsa_ad1848_init)
1266 module_exit(alsa_ad1848_exit)