arch/arm/mach-mx2/mx27ads.c

   1 /*
   2  *  Copyright (C) 2000 Deep Blue Solutions Ltd
   3  *  Copyright (C) 2002 Shane Nay (shane@minirl.com)
   4  *  Copyright 2006-2007 Freescale Semiconductor, Inc. All Rights Reserved.
   5  *
   6  * This program is free software; you can redistribute it and/or modify
   7  * it under the terms of the GNU General Public License as published by
   8  * the Free Software Foundation; either version 2 of the License, or
   9  * (at your option) any later version.
  10  *
  11  * This program is distributed in the hope that it will be useful,
  12  * but WITHOUT ANY WARRANTY; without even the implied warranty of
  13  * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
  14  * GNU General Public License for more details.
  15  *
  16  * You should have received a copy of the GNU General Public License
  17  * along with this program; if not, write to the Free Software
  18  * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA  02111-1307  USA
  19  */
  20
  21 #include <linux/platform_device.h>
  22 #include <linux/mtd/mtd.h>
  23 #include <linux/mtd/map.h>
  24 #include <linux/mtd/partitions.h>
  25 #include <linux/mtd/physmap.h>
  26 #include <mach/common.h>
  27 #include <mach/hardware.h>
  28 #include <asm/mach-types.h>
  29 #include <asm/mach/arch.h>
  30 #include <asm/mach/time.h>
  31 #include <asm/mach/map.h>
  32 #include <mach/gpio.h>
  33 #include <mach/imx-uart.h>
  34 #include <mach/iomux.h>
  35 #include <mach/board-mx27ads.h>
  36
  37 #include "devices.h"
  38
  39 /* ADS's NOR flash */
  40 static struct physmap_flash_data mx27ads_flash_data = {
  41         .width = 2,
  42 };
  43
  44 static struct resource mx27ads_flash_resource = {
  45         .start = 0xc0000000,
  46         .end = 0xc0000000 + 0x02000000 - 1,
  47         .flags = IORESOURCE_MEM,
  48
  49 };
  50
  51 static struct platform_device mx27ads_nor_mtd_device = {
  52         .name = "physmap-flash",
  53         .id = 0,
  54         .dev = {
  55                 .platform_data = &mx27ads_flash_data,
  56         },
  57         .num_resources = 1,
  58         .resource = &mx27ads_flash_resource,
  59 };
  60
  61 static int mxc_uart0_pins[] = {
  62         PE12_PF_UART1_TXD,
  63         PE13_PF_UART1_RXD,
  64         PE14_PF_UART1_CTS,
  65         PE15_PF_UART1_RTS
  66 };
  67
  68 static int uart_mxc_port0_init(struct platform_device *pdev)
  69 {
  70         return mxc_gpio_setup_multiple_pins(mxc_uart0_pins,
  71                         ARRAY_SIZE(mxc_uart0_pins), "UART0");
  72 }
  73
  74 static void uart_mxc_port0_exit(struct platform_device *pdev)
  75 {
  76         mxc_gpio_release_multiple_pins(mxc_uart0_pins,
  77                         ARRAY_SIZE(mxc_uart0_pins));
  78 }
  79
  80 static int mxc_uart1_pins[] = {
  81         PE3_PF_UART2_CTS,
  82         PE4_PF_UART2_RTS,
  83         PE6_PF_UART2_TXD,
  84         PE7_PF_UART2_RXD
  85 };
  86
  87 static int uart_mxc_port1_init(struct platform_device *pdev)
  88 {
  89         return mxc_gpio_setup_multiple_pins(mxc_uart1_pins,
  90                         ARRAY_SIZE(mxc_uart1_pins), "UART1");
  91 }
  92
  93 static void uart_mxc_port1_exit(struct platform_device *pdev)
  94 {
  95         mxc_gpio_release_multiple_pins(mxc_uart1_pins,
  96                         ARRAY_SIZE(mxc_uart1_pins));
  97 }
  98
  99 static int mxc_uart2_pins[] = {
 100         PE8_PF_UART3_TXD,
 101         PE9_PF_UART3_RXD,
 102         PE10_PF_UART3_CTS,
 103         PE11_PF_UART3_RTS
 104 };
 105
 106 static int uart_mxc_port2_init(struct platform_device *pdev)
 107 {
 108         return mxc_gpio_setup_multiple_pins(mxc_uart2_pins,
 109                         ARRAY_SIZE(mxc_uart2_pins), "UART2");
 110 }
 111
 112 static void uart_mxc_port2_exit(struct platform_device *pdev)
 113 {
 114         mxc_gpio_release_multiple_pins(mxc_uart2_pins,
 115                         ARRAY_SIZE(mxc_uart2_pins));
 116 }
 117
 118 static int mxc_uart3_pins[] = {
 119         PB26_AF_UART4_RTS,
 120         PB28_AF_UART4_TXD,
 121         PB29_AF_UART4_CTS,
 122         PB31_AF_UART4_RXD
 123 };
 124
 125 static int uart_mxc_port3_init(struct platform_device *pdev)
 126 {
 127         return mxc_gpio_setup_multiple_pins(mxc_uart3_pins,
 128                         ARRAY_SIZE(mxc_uart3_pins), "UART3");
 129 }
 130
 131 static void uart_mxc_port3_exit(struct platform_device *pdev)
 132 {
 133         mxc_gpio_release_multiple_pins(mxc_uart3_pins,
 134                         ARRAY_SIZE(mxc_uart3_pins));
 135 }
 136
 137 static int mxc_uart4_pins[] = {
 138         PB18_AF_UART5_TXD,
 139         PB19_AF_UART5_RXD,
 140         PB20_AF_UART5_CTS,
 141         PB21_AF_UART5_RTS
 142 };
 143
 144 static int uart_mxc_port4_init(struct platform_device *pdev)
 145 {
 146         return mxc_gpio_setup_multiple_pins(mxc_uart4_pins,
 147                         ARRAY_SIZE(mxc_uart4_pins), "UART4");
 148 }
 149
 150 static void uart_mxc_port4_exit(struct platform_device *pdev)
 151 {
 152         mxc_gpio_release_multiple_pins(mxc_uart4_pins,
 153                         ARRAY_SIZE(mxc_uart4_pins));
 154 }
 155
 156 static int mxc_uart5_pins[] = {
 157         PB10_AF_UART6_TXD,
 158         PB12_AF_UART6_CTS,
 159         PB11_AF_UART6_RXD,
 160         PB13_AF_UART6_RTS
 161 };
 162
 163 static int uart_mxc_port5_init(struct platform_device *pdev)
 164 {
 165         return mxc_gpio_setup_multiple_pins(mxc_uart5_pins,
 166                         ARRAY_SIZE(mxc_uart5_pins), "UART5");
 167 }
 168
 169 static void uart_mxc_port5_exit(struct platform_device *pdev)
 170 {
 171         mxc_gpio_release_multiple_pins(mxc_uart5_pins,
 172                         ARRAY_SIZE(mxc_uart5_pins));
 173 }
 174
 175 static struct platform_device *platform_devices[] __initdata = {
 176         &mx27ads_nor_mtd_device,
 177         &mxc_fec_device,
 178 };
 179
 180 static int mxc_fec_pins[] = {
 181         PD0_AIN_FEC_TXD0,
 182         PD1_AIN_FEC_TXD1,
 183         PD2_AIN_FEC_TXD2,
 184         PD3_AIN_FEC_TXD3,
 185         PD4_AOUT_FEC_RX_ER,
 186         PD5_AOUT_FEC_RXD1,
 187         PD6_AOUT_FEC_RXD2,
 188         PD7_AOUT_FEC_RXD3,
 189         PD8_AF_FEC_MDIO,
 190         PD9_AIN_FEC_MDC,
 191         PD10_AOUT_FEC_CRS,
 192         PD11_AOUT_FEC_TX_CLK,
 193         PD12_AOUT_FEC_RXD0,
 194         PD13_AOUT_FEC_RX_DV,
 195         PD14_AOUT_FEC_RX_CLK,
 196         PD15_AOUT_FEC_COL,
 197         PD16_AIN_FEC_TX_ER,
 198         PF23_AIN_FEC_TX_EN
 199 };
 200
 201 static void gpio_fec_active(void)
 202 {
 203         mxc_gpio_setup_multiple_pins(mxc_fec_pins,
 204                         ARRAY_SIZE(mxc_fec_pins), "FEC");
 205 }
 206
 207 static struct imxuart_platform_data uart_pdata[] = {
 208         {
 209                 .init = uart_mxc_port0_init,
 210                 .exit = uart_mxc_port0_exit,
 211                 .flags = IMXUART_HAVE_RTSCTS,
 212         }, {
 213                 .init = uart_mxc_port1_init,
 214                 .exit = uart_mxc_port1_exit,
 215                 .flags = IMXUART_HAVE_RTSCTS,
 216         }, {
 217                 .init = uart_mxc_port2_init,
 218                 .exit = uart_mxc_port2_exit,
 219                 .flags = IMXUART_HAVE_RTSCTS,
 220         }, {
 221                 .init = uart_mxc_port3_init,
 222                 .exit = uart_mxc_port3_exit,
 223                 .flags = IMXUART_HAVE_RTSCTS,
 224         }, {
 225                 .init = uart_mxc_port4_init,
 226                 .exit = uart_mxc_port4_exit,
 227                 .flags = IMXUART_HAVE_RTSCTS,
 228         }, {
 229                 .init = uart_mxc_port5_init,
 230                 .exit = uart_mxc_port5_exit,
 231                 .flags = IMXUART_HAVE_RTSCTS,
 232         },
 233 };
 234
 235 static void __init mx27ads_board_init(void)
 236 {
 237         gpio_fec_active();
 238
 239         mxc_register_device(&mxc_uart_device0, &uart_pdata[0]);
 240         mxc_register_device(&mxc_uart_device1, &uart_pdata[1]);
 241         mxc_register_device(&mxc_uart_device2, &uart_pdata[2]);
 242         mxc_register_device(&mxc_uart_device3, &uart_pdata[3]);
 243         mxc_register_device(&mxc_uart_device4, &uart_pdata[4]);
 244         mxc_register_device(&mxc_uart_device5, &uart_pdata[5]);
 245
 246         platform_add_devices(platform_devices, ARRAY_SIZE(platform_devices));
 247 }
 248
 249 static void __init mx27ads_timer_init(void)
 250 {
 251         unsigned long fref = 26000000;
 252
 253         if ((__raw_readw(PBC_VERSION_REG) & CKIH_27MHZ_BIT_SET) == 0)
 254                 fref = 27000000;
 255
 256         mx27_clocks_init(fref);
 257 }
 258
 259 static struct sys_timer mx27ads_timer = {
 260         .init   = mx27ads_timer_init,
 261 };
 262
 263 static struct map_desc mx27ads_io_desc[] __initdata = {
 264         {
 265                 .virtual = PBC_BASE_ADDRESS,
 266                 .pfn = __phys_to_pfn(CS4_BASE_ADDR),
 267                 .length = SZ_1M,
 268                 .type = MT_DEVICE,
 269         },
 270 };
 271
 272 static void __init mx27ads_map_io(void)
 273 {
 274         mx27_map_io();
 275         iotable_init(mx27ads_io_desc, ARRAY_SIZE(mx27ads_io_desc));
 276 }
 277
 278 MACHINE_START(MX27ADS, "Freescale i.MX27ADS")
 279         /* maintainer: Freescale Semiconductor, Inc. */
 280         .phys_io        = AIPI_BASE_ADDR,
 281         .io_pg_offst    = ((AIPI_BASE_ADDR_VIRT) >> 18) & 0xfffc,
 282         .boot_params    = PHYS_OFFSET + 0x100,
 283         .map_io         = mx27ads_map_io,
 284         .init_irq       = mxc_init_irq,
 285         .init_machine   = mx27ads_board_init,
 286         .timer          = &mx27ads_timer,
 287 MACHINE_END
 288