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ASoC: Intel: bytcr_rt5651: Add BYT_RT5651_DEFAULT_QUIRKS define
[linux-2.6/btrfs-unstable.git] / sound / soc / intel / boards / bytcr_rt5651.c
blob735b8312e275953a2dd31b48881e23ce99dcc44c
1 /*
2 * bytcr_rt5651.c - ASoc Machine driver for Intel Byt CR platform
3 * (derived from bytcr_rt5640.c)
4 *
5 * Copyright (C) 2015 Intel Corp
6 * ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
7 *
8 * This program is free software; you can redistribute it and/or modify
9 * it under the terms of the GNU General Public License as published by
10 * the Free Software Foundation; version 2 of the License.
11 *
12 * This program is distributed in the hope that it will be useful, but
13 * WITHOUT ANY WARRANTY; without even the implied warranty of
14 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
15 * General Public License for more details.
16 *
17 * ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
18 */
19
20 #include <linux/init.h>
21 #include <linux/i2c.h>
22 #include <linux/module.h>
23 #include <linux/platform_device.h>
24 #include <linux/property.h>
25 #include <linux/acpi.h>
26 #include <linux/clk.h>
27 #include <linux/device.h>
28 #include <linux/dmi.h>
29 #include <linux/slab.h>
30 #include <asm/cpu_device_id.h>
31 #include <asm/platform_sst_audio.h>
32 #include <sound/pcm.h>
33 #include <sound/pcm_params.h>
34 #include <sound/soc.h>
35 #include <sound/jack.h>
36 #include <sound/soc-acpi.h>
37 #include "../../codecs/rt5651.h"
38 #include "../atom/sst-atom-controls.h"
39
40 enum {
41 BYT_RT5651_DMIC_MAP,
42 BYT_RT5651_IN1_MAP,
43 BYT_RT5651_IN2_MAP,
44 BYT_RT5651_IN1_IN2_MAP,
45 BYT_RT5651_IN1_HS_IN3_MAP,
46 BYT_RT5651_IN2_HS_IN3_MAP,
47 };
48
49 enum {
50 BYT_RT5651_JD_NULL = (RT5651_JD_NULL << 4),
51 BYT_RT5651_JD1_1 = (RT5651_JD1_1 << 4),
52 BYT_RT5651_JD1_2 = (RT5651_JD1_2 << 4),
53 BYT_RT5651_JD2 = (RT5651_JD2 << 4),
54 };
55
56 enum {
57 BYT_RT5651_OVCD_TH_600UA = (6 << 8),
58 BYT_RT5651_OVCD_TH_1500UA = (15 << 8),
59 BYT_RT5651_OVCD_TH_2000UA = (20 << 8),
60 };
61
62 enum {
63 BYT_RT5651_OVCD_SF_0P5 = (RT5651_OVCD_SF_0P5 << 13),
64 BYT_RT5651_OVCD_SF_0P75 = (RT5651_OVCD_SF_0P75 << 13),
65 BYT_RT5651_OVCD_SF_1P0 = (RT5651_OVCD_SF_1P0 << 13),
66 BYT_RT5651_OVCD_SF_1P5 = (RT5651_OVCD_SF_1P5 << 13),
67 };
68
69 #define BYT_RT5651_MAP(quirk) ((quirk) & GENMASK(3, 0))
70 #define BYT_RT5651_JDSRC(quirk) (((quirk) & GENMASK(7, 4)) >> 4)
71 #define BYT_RT5651_OVCD_TH(quirk) (((quirk) & GENMASK(12, 8)) >> 8)
72 #define BYT_RT5651_OVCD_SF(quirk) (((quirk) & GENMASK(14, 13)) >> 13)
73 #define BYT_RT5651_DMIC_EN BIT(16)
74 #define BYT_RT5651_MCLK_EN BIT(17)
75 #define BYT_RT5651_MCLK_25MHZ BIT(18)
76 #define BYT_RT5651_SSP2_AIF2 BIT(19) /* default is using AIF1 */
77 #define BYT_RT5651_SSP0_AIF1 BIT(20)
78 #define BYT_RT5651_SSP0_AIF2 BIT(21)
79
80 #define BYT_RT5651_DEFAULT_QUIRKS (BYT_RT5651_MCLK_EN | \
81 BYT_RT5651_JD1_1 | \
82 BYT_RT5651_OVCD_TH_2000UA | \
83 BYT_RT5651_OVCD_SF_0P75)
84
85 /* jack-detect-source + dmic-en + ovcd-th + -sf + terminating empty entry */
86 #define MAX_NO_PROPS 5
87
88 struct byt_rt5651_private {
89 struct clk *mclk;
90 struct snd_soc_jack jack;
91 };
92
93 /* Default: jack-detect on JD1_1, internal mic on in2, headsetmic on in3 */
94 static unsigned long byt_rt5651_quirk = BYT_RT5651_DEFAULT_QUIRKS |
95 BYT_RT5651_IN2_HS_IN3_MAP;
96
97 static void log_quirks(struct device *dev)
98 {
99 if (BYT_RT5651_MAP(byt_rt5651_quirk) == BYT_RT5651_DMIC_MAP)
100 dev_info(dev, "quirk DMIC_MAP enabled");
101 if (BYT_RT5651_MAP(byt_rt5651_quirk) == BYT_RT5651_IN1_MAP)
102 dev_info(dev, "quirk IN1_MAP enabled");
103 if (BYT_RT5651_MAP(byt_rt5651_quirk) == BYT_RT5651_IN2_MAP)
104 dev_info(dev, "quirk IN2_MAP enabled");
105 if (BYT_RT5651_MAP(byt_rt5651_quirk) == BYT_RT5651_IN1_HS_IN3_MAP)
106 dev_info(dev, "quirk IN1_HS_IN3_MAP enabled");
107 if (BYT_RT5651_MAP(byt_rt5651_quirk) == BYT_RT5651_IN2_HS_IN3_MAP)
108 dev_info(dev, "quirk IN2_HS_IN3_MAP enabled");
109 if (BYT_RT5651_JDSRC(byt_rt5651_quirk)) {
110 dev_info(dev, "quirk realtek,jack-detect-source %ld\n",
111 BYT_RT5651_JDSRC(byt_rt5651_quirk));
112 dev_info(dev, "quirk realtek,over-current-threshold-microamp %ld\n",
113 BYT_RT5651_OVCD_TH(byt_rt5651_quirk) * 100);
114 dev_info(dev, "quirk realtek,over-current-scale-factor %ld\n",
115 BYT_RT5651_OVCD_SF(byt_rt5651_quirk));
116 }
117 if (byt_rt5651_quirk & BYT_RT5651_DMIC_EN)
118 dev_info(dev, "quirk DMIC enabled");
119 if (byt_rt5651_quirk & BYT_RT5651_MCLK_EN)
120 dev_info(dev, "quirk MCLK_EN enabled");
121 if (byt_rt5651_quirk & BYT_RT5651_MCLK_25MHZ)
122 dev_info(dev, "quirk MCLK_25MHZ enabled");
123 if (byt_rt5651_quirk & BYT_RT5651_SSP2_AIF2)
124 dev_info(dev, "quirk SSP2_AIF2 enabled\n");
125 if (byt_rt5651_quirk & BYT_RT5651_SSP0_AIF1)
126 dev_info(dev, "quirk SSP0_AIF1 enabled\n");
127 if (byt_rt5651_quirk & BYT_RT5651_SSP0_AIF2)
128 dev_info(dev, "quirk SSP0_AIF2 enabled\n");
129 }
130
131 #define BYT_CODEC_DAI1 "rt5651-aif1"
132 #define BYT_CODEC_DAI2 "rt5651-aif2"
133
134 static int byt_rt5651_prepare_and_enable_pll1(struct snd_soc_dai *codec_dai,
135 int rate, int bclk_ratio)
136 {
137 int clk_id, clk_freq, ret;
138
139 /* Configure the PLL before selecting it */
140 if (!(byt_rt5651_quirk & BYT_RT5651_MCLK_EN)) {
141 clk_id = RT5651_PLL1_S_BCLK1,
142 clk_freq = rate * bclk_ratio;
143 } else {
144 clk_id = RT5651_PLL1_S_MCLK;
145 if (byt_rt5651_quirk & BYT_RT5651_MCLK_25MHZ)
146 clk_freq = 25000000;
147 else
148 clk_freq = 19200000;
149 }
150 ret = snd_soc_dai_set_pll(codec_dai, 0, clk_id, clk_freq, rate * 512);
151 if (ret < 0) {
152 dev_err(codec_dai->component->dev, "can't set pll: %d\n", ret);
153 return ret;
154 }
155
156 ret = snd_soc_dai_set_sysclk(codec_dai, RT5651_SCLK_S_PLL1,
157 rate * 512, SND_SOC_CLOCK_IN);
158 if (ret < 0) {
159 dev_err(codec_dai->component->dev, "can't set clock %d\n", ret);
160 return ret;
161 }
162
163 return 0;
164 }
165
166 static int platform_clock_control(struct snd_soc_dapm_widget *w,
167 struct snd_kcontrol *k, int event)
168 {
169 struct snd_soc_dapm_context *dapm = w->dapm;
170 struct snd_soc_card *card = dapm->card;
171 struct snd_soc_dai *codec_dai;
172 struct byt_rt5651_private *priv = snd_soc_card_get_drvdata(card);
173 int ret;
174
175 codec_dai = snd_soc_card_get_codec_dai(card, BYT_CODEC_DAI1);
176 if (!codec_dai)
177 codec_dai = snd_soc_card_get_codec_dai(card, BYT_CODEC_DAI2);
178 if (!codec_dai) {
179 dev_err(card->dev,
180 "Codec dai not found; Unable to set platform clock\n");
181 return -EIO;
182 }
183
184 if (SND_SOC_DAPM_EVENT_ON(event)) {
185 if (byt_rt5651_quirk & BYT_RT5651_MCLK_EN) {
186 ret = clk_prepare_enable(priv->mclk);
187 if (ret < 0) {
188 dev_err(card->dev,
189 "could not configure MCLK state");
190 return ret;
191 }
192 }
193 ret = byt_rt5651_prepare_and_enable_pll1(codec_dai, 48000, 50);
194 } else {
195 /*
196 * Set codec clock source to internal clock before
197 * turning off the platform clock. Codec needs clock
198 * for Jack detection and button press
199 */
200 ret = snd_soc_dai_set_sysclk(codec_dai, RT5651_SCLK_S_RCCLK,
201 48000 * 512,
202 SND_SOC_CLOCK_IN);
203 if (!ret)
204 if (byt_rt5651_quirk & BYT_RT5651_MCLK_EN)
205 clk_disable_unprepare(priv->mclk);
206 }
207
208 if (ret < 0) {
209 dev_err(card->dev, "can't set codec sysclk: %d\n", ret);
210 return ret;
211 }
212
213 return 0;
214 }
215
216 static const struct snd_soc_dapm_widget byt_rt5651_widgets[] = {
217 SND_SOC_DAPM_HP("Headphone", NULL),
218 SND_SOC_DAPM_MIC("Headset Mic", NULL),
219 SND_SOC_DAPM_MIC("Internal Mic", NULL),
220 SND_SOC_DAPM_SPK("Speaker", NULL),
221 SND_SOC_DAPM_LINE("Line In", NULL),
222 SND_SOC_DAPM_SUPPLY("Platform Clock", SND_SOC_NOPM, 0, 0,
223 platform_clock_control, SND_SOC_DAPM_PRE_PMU |
224 SND_SOC_DAPM_POST_PMD),
225
226 };
227
228 static const struct snd_soc_dapm_route byt_rt5651_audio_map[] = {
229 {"Headphone", NULL, "Platform Clock"},
230 {"Headset Mic", NULL, "Platform Clock"},
231 {"Internal Mic", NULL, "Platform Clock"},
232 {"Speaker", NULL, "Platform Clock"},
233 {"Line In", NULL, "Platform Clock"},
234
235 {"Headset Mic", NULL, "micbias1"}, /* lowercase for rt5651 */
236 {"Headphone", NULL, "HPOL"},
237 {"Headphone", NULL, "HPOR"},
238 {"Speaker", NULL, "LOUTL"},
239 {"Speaker", NULL, "LOUTR"},
240 {"IN2P", NULL, "Line In"},
241 {"IN2N", NULL, "Line In"},
242
243 };
244
245 static const struct snd_soc_dapm_route byt_rt5651_intmic_dmic_map[] = {
246 {"IN2P", NULL, "Headset Mic"},
247 {"DMIC L1", NULL, "Internal Mic"},
248 {"DMIC R1", NULL, "Internal Mic"},
249 };
250
251 static const struct snd_soc_dapm_route byt_rt5651_intmic_in1_map[] = {
252 {"Internal Mic", NULL, "micbias1"},
253 {"IN1P", NULL, "Internal Mic"},
254 {"IN2P", NULL, "Headset Mic"},
255 };
256
257 static const struct snd_soc_dapm_route byt_rt5651_intmic_in2_map[] = {
258 {"Internal Mic", NULL, "micbias1"},
259 {"IN1P", NULL, "Headset Mic"},
260 {"IN2P", NULL, "Internal Mic"},
261 };
262
263 static const struct snd_soc_dapm_route byt_rt5651_intmic_in1_in2_map[] = {
264 {"Internal Mic", NULL, "micbias1"},
265 {"IN1P", NULL, "Internal Mic"},
266 {"IN2P", NULL, "Internal Mic"},
267 {"IN3P", NULL, "Headset Mic"},
268 };
269
270 static const struct snd_soc_dapm_route byt_rt5651_intmic_in1_hs_in3_map[] = {
271 {"Internal Mic", NULL, "micbias1"},
272 {"IN1P", NULL, "Internal Mic"},
273 {"IN3P", NULL, "Headset Mic"},
274 };
275
276 static const struct snd_soc_dapm_route byt_rt5651_intmic_in2_hs_in3_map[] = {
277 {"Internal Mic", NULL, "micbias1"},
278 {"IN2P", NULL, "Internal Mic"},
279 {"IN3P", NULL, "Headset Mic"},
280 };
281
282 static const struct snd_soc_dapm_route byt_rt5651_ssp0_aif1_map[] = {
283 {"ssp0 Tx", NULL, "modem_out"},
284 {"modem_in", NULL, "ssp0 Rx"},
285
286 {"AIF1 Playback", NULL, "ssp0 Tx"},
287 {"ssp0 Rx", NULL, "AIF1 Capture"},
288 };
289
290 static const struct snd_soc_dapm_route byt_rt5651_ssp0_aif2_map[] = {
291 {"ssp0 Tx", NULL, "modem_out"},
292 {"modem_in", NULL, "ssp0 Rx"},
293
294 {"AIF2 Playback", NULL, "ssp0 Tx"},
295 {"ssp0 Rx", NULL, "AIF2 Capture"},
296 };
297
298 static const struct snd_soc_dapm_route byt_rt5651_ssp2_aif1_map[] = {
299 {"ssp2 Tx", NULL, "codec_out0"},
300 {"ssp2 Tx", NULL, "codec_out1"},
301 {"codec_in0", NULL, "ssp2 Rx"},
302 {"codec_in1", NULL, "ssp2 Rx"},
303
304 {"AIF1 Playback", NULL, "ssp2 Tx"},
305 {"ssp2 Rx", NULL, "AIF1 Capture"},
306 };
307
308 static const struct snd_soc_dapm_route byt_rt5651_ssp2_aif2_map[] = {
309 {"ssp2 Tx", NULL, "codec_out0"},
310 {"ssp2 Tx", NULL, "codec_out1"},
311 {"codec_in0", NULL, "ssp2 Rx"},
312 {"codec_in1", NULL, "ssp2 Rx"},
313
314 {"AIF2 Playback", NULL, "ssp2 Tx"},
315 {"ssp2 Rx", NULL, "AIF2 Capture"},
316 };
317
318 static const struct snd_kcontrol_new byt_rt5651_controls[] = {
319 SOC_DAPM_PIN_SWITCH("Headphone"),
320 SOC_DAPM_PIN_SWITCH("Headset Mic"),
321 SOC_DAPM_PIN_SWITCH("Internal Mic"),
322 SOC_DAPM_PIN_SWITCH("Speaker"),
323 SOC_DAPM_PIN_SWITCH("Line In"),
324 };
325
326 static struct snd_soc_jack_pin bytcr_jack_pins[] = {
327 {
328 .pin = "Headphone",
329 .mask = SND_JACK_HEADPHONE,
330 },
331 {
332 .pin = "Headset Mic",
333 .mask = SND_JACK_MICROPHONE,
334 },
335 };
336
337 static int byt_rt5651_aif1_hw_params(struct snd_pcm_substream *substream,
338 struct snd_pcm_hw_params *params)
339 {
340 struct snd_soc_pcm_runtime *rtd = substream->private_data;
341 struct snd_soc_dai *codec_dai = rtd->codec_dai;
342 snd_pcm_format_t format = params_format(params);
343 int rate = params_rate(params);
344 int bclk_ratio;
345
346 if (format == SNDRV_PCM_FORMAT_S16_LE)
347 bclk_ratio = 32;
348 else
349 bclk_ratio = 50;
350
351 return byt_rt5651_prepare_and_enable_pll1(codec_dai, rate, bclk_ratio);
352 }
353
354 static int byt_rt5651_quirk_cb(const struct dmi_system_id *id)
355 {
356 byt_rt5651_quirk = (unsigned long)id->driver_data;
357 return 1;
358 }
359
360 static const struct dmi_system_id byt_rt5651_quirk_table[] = {
361 {
362 .callback = byt_rt5651_quirk_cb,
363 .matches = {
364 DMI_MATCH(DMI_SYS_VENDOR, "Circuitco"),
365 DMI_MATCH(DMI_PRODUCT_NAME, "Minnowboard Max B3 PLATFORM"),
366 },
367 .driver_data = (void *)(BYT_RT5651_IN1_HS_IN3_MAP),
368 },
369 {
370 .callback = byt_rt5651_quirk_cb,
371 .matches = {
372 DMI_MATCH(DMI_SYS_VENDOR, "ADI"),
373 DMI_MATCH(DMI_PRODUCT_NAME, "Minnowboard Turbot"),
374 },
375 .driver_data = (void *)(BYT_RT5651_MCLK_EN |
376 BYT_RT5651_IN1_HS_IN3_MAP),
377 },
378 {
379 .callback = byt_rt5651_quirk_cb,
380 .matches = {
381 DMI_MATCH(DMI_SYS_VENDOR, "KIANO"),
382 DMI_MATCH(DMI_PRODUCT_NAME, "KIANO SlimNote 14.2"),
383 },
384 .driver_data = (void *)(BYT_RT5651_DEFAULT_QUIRKS |
385 BYT_RT5651_IN1_IN2_MAP),
386 },
387 {
388 /* Chuwi Vi8 Plus (CWI519) */
389 .callback = byt_rt5651_quirk_cb,
390 .matches = {
391 DMI_MATCH(DMI_SYS_VENDOR, "Hampoo"),
392 DMI_MATCH(DMI_PRODUCT_NAME, "D2D3_Vi8A1"),
393 },
394 .driver_data = (void *)(BYT_RT5651_DEFAULT_QUIRKS |
395 BYT_RT5651_IN2_HS_IN3_MAP),
396 },
397 {
398 /* VIOS LTH17 */
399 .callback = byt_rt5651_quirk_cb,
400 .matches = {
401 DMI_MATCH(DMI_SYS_VENDOR, "VIOS"),
402 DMI_MATCH(DMI_PRODUCT_NAME, "LTH17"),
403 },
404 .driver_data = (void *)(BYT_RT5651_DEFAULT_QUIRKS |
405 BYT_RT5651_IN1_IN2_MAP),
406 },
407 {}
408 };
409
410 /*
411 * Note this MUST be called before snd_soc_register_card(), so that the props
412 * are in place before the codec component driver's probe function parses them.
413 */
414 static int byt_rt5651_add_codec_device_props(const char *i2c_dev_name)
415 {
416 struct property_entry props[MAX_NO_PROPS] = {};
417 struct device *i2c_dev;
418 int ret, cnt = 0;
419
420 i2c_dev = bus_find_device_by_name(&i2c_bus_type, NULL, i2c_dev_name);
421 if (!i2c_dev)
422 return -EPROBE_DEFER;
423
424 props[cnt++] = PROPERTY_ENTRY_U32("realtek,jack-detect-source",
425 BYT_RT5651_JDSRC(byt_rt5651_quirk));
426
427 props[cnt++] = PROPERTY_ENTRY_U32("realtek,over-current-threshold-microamp",
428 BYT_RT5651_OVCD_TH(byt_rt5651_quirk) * 100);
429
430 props[cnt++] = PROPERTY_ENTRY_U32("realtek,over-current-scale-factor",
431 BYT_RT5651_OVCD_SF(byt_rt5651_quirk));
432
433 if (byt_rt5651_quirk & BYT_RT5651_DMIC_EN)
434 props[cnt++] = PROPERTY_ENTRY_BOOL("realtek,dmic-en");
435
436 ret = device_add_properties(i2c_dev, props);
437 put_device(i2c_dev);
438
439 return ret;
440 }
441
442 static int byt_rt5651_init(struct snd_soc_pcm_runtime *runtime)
443 {
444 struct snd_soc_card *card = runtime->card;
445 struct snd_soc_component *codec = runtime->codec_dai->component;
446 struct byt_rt5651_private *priv = snd_soc_card_get_drvdata(card);
447 const struct snd_soc_dapm_route *custom_map;
448 int num_routes;
449 int ret;
450
451 card->dapm.idle_bias_off = true;
452
453 /* Start with RC clk for jack-detect (we disable MCLK below) */
454 if (byt_rt5651_quirk & BYT_RT5651_MCLK_EN)
455 snd_soc_component_update_bits(codec, RT5651_GLB_CLK,
456 RT5651_SCLK_SRC_MASK, RT5651_SCLK_SRC_RCCLK);
457
458 switch (BYT_RT5651_MAP(byt_rt5651_quirk)) {
459 case BYT_RT5651_IN1_MAP:
460 custom_map = byt_rt5651_intmic_in1_map;
461 num_routes = ARRAY_SIZE(byt_rt5651_intmic_in1_map);
462 break;
463 case BYT_RT5651_IN2_MAP:
464 custom_map = byt_rt5651_intmic_in2_map;
465 num_routes = ARRAY_SIZE(byt_rt5651_intmic_in2_map);
466 break;
467 case BYT_RT5651_IN1_IN2_MAP:
468 custom_map = byt_rt5651_intmic_in1_in2_map;
469 num_routes = ARRAY_SIZE(byt_rt5651_intmic_in1_in2_map);
470 break;
471 case BYT_RT5651_IN1_HS_IN3_MAP:
472 custom_map = byt_rt5651_intmic_in1_hs_in3_map;
473 num_routes = ARRAY_SIZE(byt_rt5651_intmic_in1_hs_in3_map);
474 break;
475 case BYT_RT5651_IN2_HS_IN3_MAP:
476 custom_map = byt_rt5651_intmic_in2_hs_in3_map;
477 num_routes = ARRAY_SIZE(byt_rt5651_intmic_in2_hs_in3_map);
478 break;
479 default:
480 custom_map = byt_rt5651_intmic_dmic_map;
481 num_routes = ARRAY_SIZE(byt_rt5651_intmic_dmic_map);
482 }
483 ret = snd_soc_dapm_add_routes(&card->dapm, custom_map, num_routes);
484 if (ret)
485 return ret;
486
487 if (byt_rt5651_quirk & BYT_RT5651_SSP2_AIF2) {
488 ret = snd_soc_dapm_add_routes(&card->dapm,
489 byt_rt5651_ssp2_aif2_map,
490 ARRAY_SIZE(byt_rt5651_ssp2_aif2_map));
491 } else if (byt_rt5651_quirk & BYT_RT5651_SSP0_AIF1) {
492 ret = snd_soc_dapm_add_routes(&card->dapm,
493 byt_rt5651_ssp0_aif1_map,
494 ARRAY_SIZE(byt_rt5651_ssp0_aif1_map));
495 } else if (byt_rt5651_quirk & BYT_RT5651_SSP0_AIF2) {
496 ret = snd_soc_dapm_add_routes(&card->dapm,
497 byt_rt5651_ssp0_aif2_map,
498 ARRAY_SIZE(byt_rt5651_ssp0_aif2_map));
499 } else {
500 ret = snd_soc_dapm_add_routes(&card->dapm,
501 byt_rt5651_ssp2_aif1_map,
502 ARRAY_SIZE(byt_rt5651_ssp2_aif1_map));
503 }
504 if (ret)
505 return ret;
506
507 ret = snd_soc_add_card_controls(card, byt_rt5651_controls,
508 ARRAY_SIZE(byt_rt5651_controls));
509 if (ret) {
510 dev_err(card->dev, "unable to add card controls\n");
511 return ret;
512 }
513 snd_soc_dapm_ignore_suspend(&card->dapm, "Headphone");
514 snd_soc_dapm_ignore_suspend(&card->dapm, "Speaker");
515
516 if (byt_rt5651_quirk & BYT_RT5651_MCLK_EN) {
517 /*
518 * The firmware might enable the clock at
519 * boot (this information may or may not
520 * be reflected in the enable clock register).
521 * To change the rate we must disable the clock
522 * first to cover these cases. Due to common
523 * clock framework restrictions that do not allow
524 * to disable a clock that has not been enabled,
525 * we need to enable the clock first.
526 */
527 ret = clk_prepare_enable(priv->mclk);
528 if (!ret)
529 clk_disable_unprepare(priv->mclk);
530
531 if (byt_rt5651_quirk & BYT_RT5651_MCLK_25MHZ)
532 ret = clk_set_rate(priv->mclk, 25000000);
533 else
534 ret = clk_set_rate(priv->mclk, 19200000);
535
536 if (ret)
537 dev_err(card->dev, "unable to set MCLK rate\n");
538 }
539
540 if (BYT_RT5651_JDSRC(byt_rt5651_quirk)) {
541 ret = snd_soc_card_jack_new(runtime->card, "Headset",
542 SND_JACK_HEADSET, &priv->jack,
543 bytcr_jack_pins, ARRAY_SIZE(bytcr_jack_pins));
544 if (ret) {
545 dev_err(runtime->dev, "jack creation failed %d\n", ret);
546 return ret;
547 }
548
549 ret = snd_soc_component_set_jack(codec, &priv->jack, NULL);
550 if (ret)
551 return ret;
552 }
553
554 return 0;
555 }
556
557 static const struct snd_soc_pcm_stream byt_rt5651_dai_params = {
558 .formats = SNDRV_PCM_FMTBIT_S24_LE,
559 .rate_min = 48000,
560 .rate_max = 48000,
561 .channels_min = 2,
562 .channels_max = 2,
563 };
564
565 static int byt_rt5651_codec_fixup(struct snd_soc_pcm_runtime *rtd,
566 struct snd_pcm_hw_params *params)
567 {
568 struct snd_interval *rate = hw_param_interval(params,
569 SNDRV_PCM_HW_PARAM_RATE);
570 struct snd_interval *channels = hw_param_interval(params,
571 SNDRV_PCM_HW_PARAM_CHANNELS);
572 int ret, bits;
573
574 /* The DSP will covert the FE rate to 48k, stereo */
575 rate->min = rate->max = 48000;
576 channels->min = channels->max = 2;
577
578 if ((byt_rt5651_quirk & BYT_RT5651_SSP0_AIF1) ||
579 (byt_rt5651_quirk & BYT_RT5651_SSP0_AIF2)) {
580 /* set SSP0 to 16-bit */
581 params_set_format(params, SNDRV_PCM_FORMAT_S16_LE);
582 bits = 16;
583 } else {
584 /* set SSP2 to 24-bit */
585 params_set_format(params, SNDRV_PCM_FORMAT_S24_LE);
586 bits = 24;
587 }
588
589 /*
590 * Default mode for SSP configuration is TDM 4 slot, override config
591 * with explicit setting to I2S 2ch. The word length is set with
592 * dai_set_tdm_slot() since there is no other API exposed
593 */
594 ret = snd_soc_dai_set_fmt(rtd->cpu_dai,
595 SND_SOC_DAIFMT_I2S |
596 SND_SOC_DAIFMT_NB_NF |
597 SND_SOC_DAIFMT_CBS_CFS
598 );
599
600 if (ret < 0) {
601 dev_err(rtd->dev, "can't set format to I2S, err %d\n", ret);
602 return ret;
603 }
604
605 ret = snd_soc_dai_set_tdm_slot(rtd->cpu_dai, 0x3, 0x3, 2, bits);
606 if (ret < 0) {
607 dev_err(rtd->dev, "can't set I2S config, err %d\n", ret);
608 return ret;
609 }
610
611 return 0;
612 }
613
614 static const unsigned int rates_48000[] = {
615 48000,
616 };
617
618 static const struct snd_pcm_hw_constraint_list constraints_48000 = {
619 .count = ARRAY_SIZE(rates_48000),
620 .list = rates_48000,
621 };
622
623 static int byt_rt5651_aif1_startup(struct snd_pcm_substream *substream)
624 {
625 return snd_pcm_hw_constraint_list(substream->runtime, 0,
626 SNDRV_PCM_HW_PARAM_RATE,
627 &constraints_48000);
628 }
629
630 static const struct snd_soc_ops byt_rt5651_aif1_ops = {
631 .startup = byt_rt5651_aif1_startup,
632 };
633
634 static const struct snd_soc_ops byt_rt5651_be_ssp2_ops = {
635 .hw_params = byt_rt5651_aif1_hw_params,
636 };
637
638 static struct snd_soc_dai_link byt_rt5651_dais[] = {
639 [MERR_DPCM_AUDIO] = {
640 .name = "Audio Port",
641 .stream_name = "Audio",
642 .cpu_dai_name = "media-cpu-dai",
643 .codec_dai_name = "snd-soc-dummy-dai",
644 .codec_name = "snd-soc-dummy",
645 .platform_name = "sst-mfld-platform",
646 .nonatomic = true,
647 .dynamic = 1,
648 .dpcm_playback = 1,
649 .dpcm_capture = 1,
650 .ops = &byt_rt5651_aif1_ops,
651 },
652 [MERR_DPCM_DEEP_BUFFER] = {
653 .name = "Deep-Buffer Audio Port",
654 .stream_name = "Deep-Buffer Audio",
655 .cpu_dai_name = "deepbuffer-cpu-dai",
656 .codec_dai_name = "snd-soc-dummy-dai",
657 .codec_name = "snd-soc-dummy",
658 .platform_name = "sst-mfld-platform",
659 .nonatomic = true,
660 .dynamic = 1,
661 .dpcm_playback = 1,
662 .ops = &byt_rt5651_aif1_ops,
663 },
664 /* CODEC<->CODEC link */
665 /* back ends */
666 {
667 .name = "SSP2-Codec",
668 .id = 0,
669 .cpu_dai_name = "ssp2-port",
670 .platform_name = "sst-mfld-platform",
671 .no_pcm = 1,
672 .codec_dai_name = "rt5651-aif1",
673 .codec_name = "i2c-10EC5651:00",
674 .dai_fmt = SND_SOC_DAIFMT_I2S | SND_SOC_DAIFMT_NB_NF
675 | SND_SOC_DAIFMT_CBS_CFS,
676 .be_hw_params_fixup = byt_rt5651_codec_fixup,
677 .ignore_suspend = 1,
678 .nonatomic = true,
679 .dpcm_playback = 1,
680 .dpcm_capture = 1,
681 .init = byt_rt5651_init,
682 .ops = &byt_rt5651_be_ssp2_ops,
683 },
684 };
685
686 /* SoC card */
687 static struct snd_soc_card byt_rt5651_card = {
688 .name = "bytcr-rt5651",
689 .owner = THIS_MODULE,
690 .dai_link = byt_rt5651_dais,
691 .num_links = ARRAY_SIZE(byt_rt5651_dais),
692 .dapm_widgets = byt_rt5651_widgets,
693 .num_dapm_widgets = ARRAY_SIZE(byt_rt5651_widgets),
694 .dapm_routes = byt_rt5651_audio_map,
695 .num_dapm_routes = ARRAY_SIZE(byt_rt5651_audio_map),
696 .fully_routed = true,
697 };
698
699 static char byt_rt5651_codec_name[SND_ACPI_I2C_ID_LEN];
700 static char byt_rt5651_codec_aif_name[12]; /* = "rt5651-aif[1|2]" */
701 static char byt_rt5651_cpu_dai_name[10]; /* = "ssp[0|2]-port" */
702 static char byt_rt5651_long_name[40]; /* = "bytcr-rt5651-*-spk-*-mic" */
703
704 static bool is_valleyview(void)
705 {
706 static const struct x86_cpu_id cpu_ids[] = {
707 { X86_VENDOR_INTEL, 6, 55 }, /* Valleyview, Bay Trail */
708 {}
709 };
710
711 if (!x86_match_cpu(cpu_ids))
712 return false;
713 return true;
714 }
715
716 struct acpi_chan_package { /* ACPICA seems to require 64 bit integers */
717 u64 aif_value; /* 1: AIF1, 2: AIF2 */
718 u64 mclock_value; /* usually 25MHz (0x17d7940), ignored */
719 };
720
721 static int snd_byt_rt5651_mc_probe(struct platform_device *pdev)
722 {
723 const char * const intmic_name[] =
724 { "dmic", "in1", "in2", "in12", "in1", "in2" };
725 const char * const hsmic_name[] =
726 { "in2", "in2", "in1", "in3", "in3", "in3" };
727 struct byt_rt5651_private *priv;
728 struct snd_soc_acpi_mach *mach;
729 const char *i2c_name = NULL;
730 bool is_bytcr = false;
731 int ret_val = 0;
732 int dai_index = 0;
733 int i;
734
735 priv = devm_kzalloc(&pdev->dev, sizeof(*priv), GFP_KERNEL);
736 if (!priv)
737 return -ENOMEM;
738
739 /* register the soc card */
740 byt_rt5651_card.dev = &pdev->dev;
741
742 mach = byt_rt5651_card.dev->platform_data;
743 snd_soc_card_set_drvdata(&byt_rt5651_card, priv);
744
745 /* fix index of codec dai */
746 for (i = 0; i < ARRAY_SIZE(byt_rt5651_dais); i++) {
747 if (!strcmp(byt_rt5651_dais[i].codec_name, "i2c-10EC5651:00")) {
748 dai_index = i;
749 break;
750 }
751 }
752
753 /* fixup codec name based on HID */
754 i2c_name = acpi_dev_get_first_match_name(mach->id, NULL, -1);
755 if (!i2c_name) {
756 dev_err(&pdev->dev, "Error cannot find '%s' dev\n", mach->id);
757 return -ENODEV;
758 }
759 snprintf(byt_rt5651_codec_name, sizeof(byt_rt5651_codec_name),
760 "%s%s", "i2c-", i2c_name);
761 byt_rt5651_dais[dai_index].codec_name = byt_rt5651_codec_name;
762
763 /*
764 * swap SSP0 if bytcr is detected
765 * (will be overridden if DMI quirk is detected)
766 */
767 if (is_valleyview()) {
768 struct sst_platform_info *p_info = mach->pdata;
769 const struct sst_res_info *res_info = p_info->res_info;
770
771 if (res_info->acpi_ipc_irq_index == 0)
772 is_bytcr = true;
773 }
774
775 if (is_bytcr) {
776 /*
777 * Baytrail CR platforms may have CHAN package in BIOS, try
778 * to find relevant routing quirk based as done on Windows
779 * platforms. We have to read the information directly from the
780 * BIOS, at this stage the card is not created and the links
781 * with the codec driver/pdata are non-existent
782 */
783
784 struct acpi_chan_package chan_package;
785
786 /* format specified: 2 64-bit integers */
787 struct acpi_buffer format = {sizeof("NN"), "NN"};
788 struct acpi_buffer state = {0, NULL};
789 struct snd_soc_acpi_package_context pkg_ctx;
790 bool pkg_found = false;
791
792 state.length = sizeof(chan_package);
793 state.pointer = &chan_package;
794
795 pkg_ctx.name = "CHAN";
796 pkg_ctx.length = 2;
797 pkg_ctx.format = &format;
798 pkg_ctx.state = &state;
799 pkg_ctx.data_valid = false;
800
801 pkg_found = snd_soc_acpi_find_package_from_hid(mach->id,
802 &pkg_ctx);
803 if (pkg_found) {
804 if (chan_package.aif_value == 1) {
805 dev_info(&pdev->dev, "BIOS Routing: AIF1 connected\n");
806 byt_rt5651_quirk |= BYT_RT5651_SSP0_AIF1;
807 } else if (chan_package.aif_value == 2) {
808 dev_info(&pdev->dev, "BIOS Routing: AIF2 connected\n");
809 byt_rt5651_quirk |= BYT_RT5651_SSP0_AIF2;
810 } else {
811 dev_info(&pdev->dev, "BIOS Routing isn't valid, ignored\n");
812 pkg_found = false;
813 }
814 }
815
816 if (!pkg_found) {
817 /* no BIOS indications, assume SSP0-AIF2 connection */
818 byt_rt5651_quirk |= BYT_RT5651_SSP0_AIF2;
819 }
820 }
821
822 /* check quirks before creating card */
823 dmi_check_system(byt_rt5651_quirk_table);
824
825 /* Must be called before register_card, also see declaration comment. */
826 ret_val = byt_rt5651_add_codec_device_props(byt_rt5651_codec_name);
827 if (ret_val)
828 return ret_val;
829
830 log_quirks(&pdev->dev);
831
832 if ((byt_rt5651_quirk & BYT_RT5651_SSP2_AIF2) ||
833 (byt_rt5651_quirk & BYT_RT5651_SSP0_AIF2)) {
834 /* fixup codec aif name */
835 snprintf(byt_rt5651_codec_aif_name,
836 sizeof(byt_rt5651_codec_aif_name),
837 "%s", "rt5651-aif2");
838
839 byt_rt5651_dais[dai_index].codec_dai_name =
840 byt_rt5651_codec_aif_name;
841 }
842
843 if ((byt_rt5651_quirk & BYT_RT5651_SSP0_AIF1) ||
844 (byt_rt5651_quirk & BYT_RT5651_SSP0_AIF2)) {
845 /* fixup cpu dai name name */
846 snprintf(byt_rt5651_cpu_dai_name,
847 sizeof(byt_rt5651_cpu_dai_name),
848 "%s", "ssp0-port");
849
850 byt_rt5651_dais[dai_index].cpu_dai_name =
851 byt_rt5651_cpu_dai_name;
852 }
853
854 if (byt_rt5651_quirk & BYT_RT5651_MCLK_EN) {
855 priv->mclk = devm_clk_get(&pdev->dev, "pmc_plt_clk_3");
856 if (IS_ERR(priv->mclk)) {
857 ret_val = PTR_ERR(priv->mclk);
858 dev_err(&pdev->dev,
859 "Failed to get MCLK from pmc_plt_clk_3: %d\n",
860 ret_val);
861 /*
862 * Fall back to bit clock usage for -ENOENT (clock not
863 * available likely due to missing dependencies), bail
864 * for all other errors, including -EPROBE_DEFER
865 */
866 if (ret_val != -ENOENT)
867 return ret_val;
868 byt_rt5651_quirk &= ~BYT_RT5651_MCLK_EN;
869 }
870 }
871
872 snprintf(byt_rt5651_long_name, sizeof(byt_rt5651_long_name),
873 "bytcr-rt5651-%s-intmic-%s-hsmic",
874 intmic_name[BYT_RT5651_MAP(byt_rt5651_quirk)],
875 hsmic_name[BYT_RT5651_MAP(byt_rt5651_quirk)]);
876 byt_rt5651_card.long_name = byt_rt5651_long_name;
877
878 ret_val = devm_snd_soc_register_card(&pdev->dev, &byt_rt5651_card);
879
880 if (ret_val) {
881 dev_err(&pdev->dev, "devm_snd_soc_register_card failed %d\n",
882 ret_val);
883 return ret_val;
884 }
885 platform_set_drvdata(pdev, &byt_rt5651_card);
886 return ret_val;
887 }
888
889 static struct platform_driver snd_byt_rt5651_mc_driver = {
890 .driver = {
891 .name = "bytcr_rt5651",
892 },
893 .probe = snd_byt_rt5651_mc_probe,
894 };
895
896 module_platform_driver(snd_byt_rt5651_mc_driver);
897
898 MODULE_DESCRIPTION("ASoC Intel(R) Baytrail CR Machine driver for RT5651");
899 MODULE_AUTHOR("Pierre-Louis Bossart <pierre-louis.bossart@linux.intel.com>");
900 MODULE_LICENSE("GPL v2");
901 MODULE_ALIAS("platform:bytcr_rt5651");
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