include/linux/mmc/host.h

   1 /*
   2  *  linux/include/linux/mmc/host.h
   3  *
   4  * This program is free software; you can redistribute it and/or modify
   5  * it under the terms of the GNU General Public License version 2 as
   6  * published by the Free Software Foundation.
   7  *
   8  *  Host driver specific definitions.
   9  */
  10 #ifndef LINUX_MMC_HOST_H
  11 #define LINUX_MMC_HOST_H
  12
  13 #include <linux/leds.h>
  14 #include <linux/mutex.h>
  15 #include <linux/timer.h>
  16 #include <linux/sched.h>
  17 #include <linux/device.h>
  18 #include <linux/fault-inject.h>
  19
  20 #include <linux/mmc/core.h>
  21 #include <linux/mmc/card.h>
  22 #include <linux/mmc/pm.h>
  23
  24 struct mmc_ios {
  25         unsigned int    clock;                  /* clock rate */
  26         unsigned short  vdd;
  27
  28 /* vdd stores the bit number of the selected voltage range from below. */
  29
  30         unsigned char   bus_mode;               /* command output mode */
  31
  32 #define MMC_BUSMODE_OPENDRAIN   1
  33 #define MMC_BUSMODE_PUSHPULL    2
  34
  35         unsigned char   chip_select;            /* SPI chip select */
  36
  37 #define MMC_CS_DONTCARE         0
  38 #define MMC_CS_HIGH             1
  39 #define MMC_CS_LOW              2
  40
  41         unsigned char   power_mode;             /* power supply mode */
  42
  43 #define MMC_POWER_OFF           0
  44 #define MMC_POWER_UP            1
  45 #define MMC_POWER_ON            2
  46 #define MMC_POWER_UNDEFINED     3
  47
  48         unsigned char   bus_width;              /* data bus width */
  49
  50 #define MMC_BUS_WIDTH_1         0
  51 #define MMC_BUS_WIDTH_4         2
  52 #define MMC_BUS_WIDTH_8         3
  53
  54         unsigned char   timing;                 /* timing specification used */
  55
  56 #define MMC_TIMING_LEGACY       0
  57 #define MMC_TIMING_MMC_HS       1
  58 #define MMC_TIMING_SD_HS        2
  59 #define MMC_TIMING_UHS_SDR12    3
  60 #define MMC_TIMING_UHS_SDR25    4
  61 #define MMC_TIMING_UHS_SDR50    5
  62 #define MMC_TIMING_UHS_SDR104   6
  63 #define MMC_TIMING_UHS_DDR50    7
  64 #define MMC_TIMING_MMC_DDR52    8
  65 #define MMC_TIMING_MMC_HS200    9
  66 #define MMC_TIMING_MMC_HS400    10
  67
  68         unsigned char   signal_voltage;         /* signalling voltage (1.8V or 3.3V) */
  69
  70 #define MMC_SIGNAL_VOLTAGE_330  0
  71 #define MMC_SIGNAL_VOLTAGE_180  1
  72 #define MMC_SIGNAL_VOLTAGE_120  2
  73
  74         unsigned char   drv_type;               /* driver type (A, B, C, D) */
  75
  76 #define MMC_SET_DRIVER_TYPE_B   0
  77 #define MMC_SET_DRIVER_TYPE_A   1
  78 #define MMC_SET_DRIVER_TYPE_C   2
  79 #define MMC_SET_DRIVER_TYPE_D   3
  80 };
  81
  82 struct mmc_host_ops {
  83         /*
  84          * It is optional for the host to implement pre_req and post_req in
  85          * order to support double buffering of requests (prepare one
  86          * request while another request is active).
  87          * pre_req() must always be followed by a post_req().
  88          * To undo a call made to pre_req(), call post_req() with
  89          * a nonzero err condition.
  90          */
  91         void    (*post_req)(struct mmc_host *host, struct mmc_request *req,
  92                             int err);
  93         void    (*pre_req)(struct mmc_host *host, struct mmc_request *req,
  94                            bool is_first_req);
  95         void    (*request)(struct mmc_host *host, struct mmc_request *req);
  96
  97         /*
  98          * Avoid calling the next three functions too often or in a "fast
  99          * path", since underlaying controller might implement them in an
 100          * expensive and/or slow way. Also note that these functions might
 101          * sleep, so don't call them in the atomic contexts!
 102          */
 103
 104         /*
 105          * Notes to the set_ios callback:
 106          * ios->clock might be 0. For some controllers, setting 0Hz
 107          * as any other frequency works. However, some controllers
 108          * explicitly need to disable the clock. Otherwise e.g. voltage
 109          * switching might fail because the SDCLK is not really quiet.
 110          */
 111         void    (*set_ios)(struct mmc_host *host, struct mmc_ios *ios);
 112
 113         /*
 114          * Return values for the get_ro callback should be:
 115          *   0 for a read/write card
 116          *   1 for a read-only card
 117          *   -ENOSYS when not supported (equal to NULL callback)
 118          *   or a negative errno value when something bad happened
 119          */
 120         int     (*get_ro)(struct mmc_host *host);
 121
 122         /*
 123          * Return values for the get_cd callback should be:
 124          *   0 for a absent card
 125          *   1 for a present card
 126          *   -ENOSYS when not supported (equal to NULL callback)
 127          *   or a negative errno value when something bad happened
 128          */
 129         int     (*get_cd)(struct mmc_host *host);
 130
 131         void    (*enable_sdio_irq)(struct mmc_host *host, int enable);
 132
 133         /* optional callback for HC quirks */
 134         void    (*init_card)(struct mmc_host *host, struct mmc_card *card);
 135
 136         int     (*start_signal_voltage_switch)(struct mmc_host *host, struct mmc_ios *ios);
 137
 138         /* Check if the card is pulling dat[0:3] low */
 139         int     (*card_busy)(struct mmc_host *host);
 140
 141         /* The tuning command opcode value is different for SD and eMMC cards */
 142         int     (*execute_tuning)(struct mmc_host *host, u32 opcode);
 143
 144         /* Prepare HS400 target operating frequency depending host driver */
 145         int     (*prepare_hs400_tuning)(struct mmc_host *host, struct mmc_ios *ios);
 146         int     (*select_drive_strength)(struct mmc_card *card,
 147                                          unsigned int max_dtr, int host_drv,
 148                                          int card_drv, int *drv_type);
 149         void    (*hw_reset)(struct mmc_host *host);
 150         void    (*card_event)(struct mmc_host *host);
 151
 152         /*
 153          * Optional callback to support controllers with HW issues for multiple
 154          * I/O. Returns the number of supported blocks for the request.
 155          */
 156         int     (*multi_io_quirk)(struct mmc_card *card,
 157                                   unsigned int direction, int blk_size);
 158 };
 159
 160 struct mmc_card;
 161 struct device;
 162
 163 struct mmc_async_req {
 164         /* active mmc request */
 165         struct mmc_request      *mrq;
 166         /*
 167          * Check error status of completed mmc request.
 168          * Returns 0 if success otherwise non zero.
 169          */
 170         int (*err_check) (struct mmc_card *, struct mmc_async_req *);
 171 };
 172
 173 /**
 174  * struct mmc_slot - MMC slot functions
 175  *
 176  * @cd_irq:             MMC/SD-card slot hotplug detection IRQ or -EINVAL
 177  * @handler_priv:       MMC/SD-card slot context
 178  *
 179  * Some MMC/SD host controllers implement slot-functions like card and
 180  * write-protect detection natively. However, a large number of controllers
 181  * leave these functions to the CPU. This struct provides a hook to attach
 182  * such slot-function drivers.
 183  */
 184 struct mmc_slot {
 185         int cd_irq;
 186         void *handler_priv;
 187 };
 188
 189 /**
 190  * mmc_context_info - synchronization details for mmc context
 191  * @is_done_rcv         wake up reason was done request
 192  * @is_new_req          wake up reason was new request
 193  * @is_waiting_last_req mmc context waiting for single running request
 194  * @wait                wait queue
 195  * @lock                lock to protect data fields
 196  */
 197 struct mmc_context_info {
 198         bool                    is_done_rcv;
 199         bool                    is_new_req;
 200         bool                    is_waiting_last_req;
 201         wait_queue_head_t       wait;
 202         spinlock_t              lock;
 203 };
 204
 205 struct regulator;
 206 struct mmc_pwrseq;
 207
 208 struct mmc_supply {
 209         struct regulator *vmmc;         /* Card power supply */
 210         struct regulator *vqmmc;        /* Optional Vccq supply */
 211 };
 212
 213 struct mmc_host {
 214         struct device           *parent;
 215         struct device           class_dev;
 216         int                     index;
 217         const struct mmc_host_ops *ops;
 218         struct mmc_pwrseq       *pwrseq;
 219         unsigned int            f_min;
 220         unsigned int            f_max;
 221         unsigned int            f_init;
 222         u32                     ocr_avail;
 223         u32                     ocr_avail_sdio; /* SDIO-specific OCR */
 224         u32                     ocr_avail_sd;   /* SD-specific OCR */
 225         u32                     ocr_avail_mmc;  /* MMC-specific OCR */
 226 #ifdef CONFIG_PM_SLEEP
 227         struct notifier_block   pm_notify;
 228 #endif
 229         u32                     max_current_330;
 230         u32                     max_current_300;
 231         u32                     max_current_180;
 232
 233 #define MMC_VDD_165_195         0x00000080      /* VDD voltage 1.65 - 1.95 */
 234 #define MMC_VDD_20_21           0x00000100      /* VDD voltage 2.0 ~ 2.1 */
 235 #define MMC_VDD_21_22           0x00000200      /* VDD voltage 2.1 ~ 2.2 */
 236 #define MMC_VDD_22_23           0x00000400      /* VDD voltage 2.2 ~ 2.3 */
 237 #define MMC_VDD_23_24           0x00000800      /* VDD voltage 2.3 ~ 2.4 */
 238 #define MMC_VDD_24_25           0x00001000      /* VDD voltage 2.4 ~ 2.5 */
 239 #define MMC_VDD_25_26           0x00002000      /* VDD voltage 2.5 ~ 2.6 */
 240 #define MMC_VDD_26_27           0x00004000      /* VDD voltage 2.6 ~ 2.7 */
 241 #define MMC_VDD_27_28           0x00008000      /* VDD voltage 2.7 ~ 2.8 */
 242 #define MMC_VDD_28_29           0x00010000      /* VDD voltage 2.8 ~ 2.9 */
 243 #define MMC_VDD_29_30           0x00020000      /* VDD voltage 2.9 ~ 3.0 */
 244 #define MMC_VDD_30_31           0x00040000      /* VDD voltage 3.0 ~ 3.1 */
 245 #define MMC_VDD_31_32           0x00080000      /* VDD voltage 3.1 ~ 3.2 */
 246 #define MMC_VDD_32_33           0x00100000      /* VDD voltage 3.2 ~ 3.3 */
 247 #define MMC_VDD_33_34           0x00200000      /* VDD voltage 3.3 ~ 3.4 */
 248 #define MMC_VDD_34_35           0x00400000      /* VDD voltage 3.4 ~ 3.5 */
 249 #define MMC_VDD_35_36           0x00800000      /* VDD voltage 3.5 ~ 3.6 */
 250
 251         u32                     caps;           /* Host capabilities */
 252
 253 #define MMC_CAP_4_BIT_DATA      (1 << 0)        /* Can the host do 4 bit transfers */
 254 #define MMC_CAP_MMC_HIGHSPEED   (1 << 1)        /* Can do MMC high-speed timing */
 255 #define MMC_CAP_SD_HIGHSPEED    (1 << 2)        /* Can do SD high-speed timing */
 256 #define MMC_CAP_SDIO_IRQ        (1 << 3)        /* Can signal pending SDIO IRQs */
 257 #define MMC_CAP_SPI             (1 << 4)        /* Talks only SPI protocols */
 258 #define MMC_CAP_NEEDS_POLL      (1 << 5)        /* Needs polling for card-detection */
 259 #define MMC_CAP_8_BIT_DATA      (1 << 6)        /* Can the host do 8 bit transfers */
 260 #define MMC_CAP_AGGRESSIVE_PM   (1 << 7)        /* Suspend (e)MMC/SD at idle  */
 261 #define MMC_CAP_NONREMOVABLE    (1 << 8)        /* Nonremovable e.g. eMMC */
 262 #define MMC_CAP_WAIT_WHILE_BUSY (1 << 9)        /* Waits while card is busy */
 263 #define MMC_CAP_ERASE           (1 << 10)       /* Allow erase/trim commands */
 264 #define MMC_CAP_1_8V_DDR        (1 << 11)       /* can support */
 265                                                 /* DDR mode at 1.8V */
 266 #define MMC_CAP_1_2V_DDR        (1 << 12)       /* can support */
 267                                                 /* DDR mode at 1.2V */
 268 #define MMC_CAP_POWER_OFF_CARD  (1 << 13)       /* Can power off after boot */
 269 #define MMC_CAP_BUS_WIDTH_TEST  (1 << 14)       /* CMD14/CMD19 bus width ok */
 270 #define MMC_CAP_UHS_SDR12       (1 << 15)       /* Host supports UHS SDR12 mode */
 271 #define MMC_CAP_UHS_SDR25       (1 << 16)       /* Host supports UHS SDR25 mode */
 272 #define MMC_CAP_UHS_SDR50       (1 << 17)       /* Host supports UHS SDR50 mode */
 273 #define MMC_CAP_UHS_SDR104      (1 << 18)       /* Host supports UHS SDR104 mode */
 274 #define MMC_CAP_UHS_DDR50       (1 << 19)       /* Host supports UHS DDR50 mode */
 275 #define MMC_CAP_DRIVER_TYPE_A   (1 << 23)       /* Host supports Driver Type A */
 276 #define MMC_CAP_DRIVER_TYPE_C   (1 << 24)       /* Host supports Driver Type C */
 277 #define MMC_CAP_DRIVER_TYPE_D   (1 << 25)       /* Host supports Driver Type D */
 278 #define MMC_CAP_CMD23           (1 << 30)       /* CMD23 supported. */
 279 #define MMC_CAP_HW_RESET        (1 << 31)       /* Hardware reset */
 280
 281         u32                     caps2;          /* More host capabilities */
 282
 283 #define MMC_CAP2_BOOTPART_NOACC (1 << 0)        /* Boot partition no access */
 284 #define MMC_CAP2_FULL_PWR_CYCLE (1 << 2)        /* Can do full power cycle */
 285 #define MMC_CAP2_HS200_1_8V_SDR (1 << 5)        /* can support */
 286 #define MMC_CAP2_HS200_1_2V_SDR (1 << 6)        /* can support */
 287 #define MMC_CAP2_HS200          (MMC_CAP2_HS200_1_8V_SDR | \
 288                                  MMC_CAP2_HS200_1_2V_SDR)
 289 #define MMC_CAP2_HC_ERASE_SZ    (1 << 9)        /* High-capacity erase size */
 290 #define MMC_CAP2_CD_ACTIVE_HIGH (1 << 10)       /* Card-detect signal active high */
 291 #define MMC_CAP2_RO_ACTIVE_HIGH (1 << 11)       /* Write-protect signal active high */
 292 #define MMC_CAP2_PACKED_RD      (1 << 12)       /* Allow packed read */
 293 #define MMC_CAP2_PACKED_WR      (1 << 13)       /* Allow packed write */
 294 #define MMC_CAP2_PACKED_CMD     (MMC_CAP2_PACKED_RD | \
 295                                  MMC_CAP2_PACKED_WR)
 296 #define MMC_CAP2_NO_PRESCAN_POWERUP (1 << 14)   /* Don't power up before scan */
 297 #define MMC_CAP2_HS400_1_8V     (1 << 15)       /* Can support HS400 1.8V */
 298 #define MMC_CAP2_HS400_1_2V     (1 << 16)       /* Can support HS400 1.2V */
 299 #define MMC_CAP2_HS400          (MMC_CAP2_HS400_1_8V | \
 300                                  MMC_CAP2_HS400_1_2V)
 301 #define MMC_CAP2_HSX00_1_2V     (MMC_CAP2_HS200_1_2V_SDR | MMC_CAP2_HS400_1_2V)
 302 #define MMC_CAP2_SDIO_IRQ_NOTHREAD (1 << 17)
 303 #define MMC_CAP2_NO_WRITE_PROTECT (1 << 18)     /* No physical write protect pin, assume that card is always read-write */
 304 #define MMC_CAP2_NO_SDIO        (1 << 19)       /* Do not send SDIO commands during initialization */
 305
 306         mmc_pm_flag_t           pm_caps;        /* supported pm features */
 307
 308         /* host specific block data */
 309         unsigned int            max_seg_size;   /* see blk_queue_max_segment_size */
 310         unsigned short          max_segs;       /* see blk_queue_max_segments */
 311         unsigned short          unused;
 312         unsigned int            max_req_size;   /* maximum number of bytes in one req */
 313         unsigned int            max_blk_size;   /* maximum size of one mmc block */
 314         unsigned int            max_blk_count;  /* maximum number of blocks in one req */
 315         unsigned int            max_busy_timeout; /* max busy timeout in ms */
 316
 317         /* private data */
 318         spinlock_t              lock;           /* lock for claim and bus ops */
 319
 320         struct mmc_ios          ios;            /* current io bus settings */
 321
 322         /* group bitfields together to minimize padding */
 323         unsigned int            use_spi_crc:1;
 324         unsigned int            claimed:1;      /* host exclusively claimed */
 325         unsigned int            bus_dead:1;     /* bus has been released */
 326 #ifdef CONFIG_MMC_DEBUG
 327         unsigned int            removed:1;      /* host is being removed */
 328 #endif
 329         unsigned int            can_retune:1;   /* re-tuning can be used */
 330         unsigned int            doing_retune:1; /* re-tuning in progress */
 331         unsigned int            retune_now:1;   /* do re-tuning at next req */
 332         unsigned int            retune_paused:1; /* re-tuning is temporarily disabled */
 333
 334         int                     rescan_disable; /* disable card detection */
 335         int                     rescan_entered; /* used with nonremovable devices */
 336
 337         int                     need_retune;    /* re-tuning is needed */
 338         int                     hold_retune;    /* hold off re-tuning */
 339         unsigned int            retune_period;  /* re-tuning period in secs */
 340         struct timer_list       retune_timer;   /* for periodic re-tuning */
 341
 342         bool                    trigger_card_event; /* card_event necessary */
 343
 344         struct mmc_card         *card;          /* device attached to this host */
 345
 346         wait_queue_head_t       wq;
 347         struct task_struct      *claimer;       /* task that has host claimed */
 348         int                     claim_cnt;      /* "claim" nesting count */
 349
 350         struct delayed_work     detect;
 351         int                     detect_change;  /* card detect flag */
 352         struct mmc_slot         slot;
 353
 354         const struct mmc_bus_ops *bus_ops;      /* current bus driver */
 355         unsigned int            bus_refs;       /* reference counter */
 356
 357         unsigned int            sdio_irqs;
 358         struct task_struct      *sdio_irq_thread;
 359         bool                    sdio_irq_pending;
 360         atomic_t                sdio_irq_thread_abort;
 361
 362         mmc_pm_flag_t           pm_flags;       /* requested pm features */
 363
 364         struct led_trigger      *led;           /* activity led */
 365
 366 #ifdef CONFIG_REGULATOR
 367         bool                    regulator_enabled; /* regulator state */
 368 #endif
 369         struct mmc_supply       supply;
 370
 371         struct dentry           *debugfs_root;
 372
 373         struct mmc_async_req    *areq;          /* active async req */
 374         struct mmc_context_info context_info;   /* async synchronization info */
 375
 376 #ifdef CONFIG_FAIL_MMC_REQUEST
 377         struct fault_attr       fail_mmc_request;
 378 #endif
 379
 380         unsigned int            actual_clock;   /* Actual HC clock rate */
 381
 382         unsigned int            slotno; /* used for sdio acpi binding */
 383
 384         int                     dsr_req;        /* DSR value is valid */
 385         u32                     dsr;    /* optional driver stage (DSR) value */
 386
 387         unsigned long           private[0] ____cacheline_aligned;
 388 };
 389
 390 struct mmc_host *mmc_alloc_host(int extra, struct device *);
 391 int mmc_add_host(struct mmc_host *);
 392 void mmc_remove_host(struct mmc_host *);
 393 void mmc_free_host(struct mmc_host *);
 394 int mmc_of_parse(struct mmc_host *host);
 395
 396 static inline void *mmc_priv(struct mmc_host *host)
 397 {
 398         return (void *)host->private;
 399 }
 400
 401 #define mmc_host_is_spi(host)   ((host)->caps & MMC_CAP_SPI)
 402
 403 #define mmc_dev(x)      ((x)->parent)
 404 #define mmc_classdev(x) (&(x)->class_dev)
 405 #define mmc_hostname(x) (dev_name(&(x)->class_dev))
 406
 407 int mmc_power_save_host(struct mmc_host *host);
 408 int mmc_power_restore_host(struct mmc_host *host);
 409
 410 void mmc_detect_change(struct mmc_host *, unsigned long delay);
 411 void mmc_request_done(struct mmc_host *, struct mmc_request *);
 412
 413 static inline void mmc_signal_sdio_irq(struct mmc_host *host)
 414 {
 415         host->ops->enable_sdio_irq(host, 0);
 416         host->sdio_irq_pending = true;
 417         if (host->sdio_irq_thread)
 418                 wake_up_process(host->sdio_irq_thread);
 419 }
 420
 421 void sdio_run_irqs(struct mmc_host *host);
 422
 423 #ifdef CONFIG_REGULATOR
 424 int mmc_regulator_get_ocrmask(struct regulator *supply);
 425 int mmc_regulator_set_ocr(struct mmc_host *mmc,
 426                         struct regulator *supply,
 427                         unsigned short vdd_bit);
 428 int mmc_regulator_set_vqmmc(struct mmc_host *mmc, struct mmc_ios *ios);
 429 #else
 430 static inline int mmc_regulator_get_ocrmask(struct regulator *supply)
 431 {
 432         return 0;
 433 }
 434
 435 static inline int mmc_regulator_set_ocr(struct mmc_host *mmc,
 436                                  struct regulator *supply,
 437                                  unsigned short vdd_bit)
 438 {
 439         return 0;
 440 }
 441
 442 static inline int mmc_regulator_set_vqmmc(struct mmc_host *mmc,
 443                                           struct mmc_ios *ios)
 444 {
 445         return -EINVAL;
 446 }
 447 #endif
 448
 449 int mmc_regulator_get_supply(struct mmc_host *mmc);
 450
 451 static inline int mmc_card_is_removable(struct mmc_host *host)
 452 {
 453         return !(host->caps & MMC_CAP_NONREMOVABLE);
 454 }
 455
 456 static inline int mmc_card_keep_power(struct mmc_host *host)
 457 {
 458         return host->pm_flags & MMC_PM_KEEP_POWER;
 459 }
 460
 461 static inline int mmc_card_wake_sdio_irq(struct mmc_host *host)
 462 {
 463         return host->pm_flags & MMC_PM_WAKE_SDIO_IRQ;
 464 }
 465
 466 static inline int mmc_host_cmd23(struct mmc_host *host)
 467 {
 468         return host->caps & MMC_CAP_CMD23;
 469 }
 470
 471 static inline int mmc_boot_partition_access(struct mmc_host *host)
 472 {
 473         return !(host->caps2 & MMC_CAP2_BOOTPART_NOACC);
 474 }
 475
 476 static inline int mmc_host_uhs(struct mmc_host *host)
 477 {
 478         return host->caps &
 479                 (MMC_CAP_UHS_SDR12 | MMC_CAP_UHS_SDR25 |
 480                  MMC_CAP_UHS_SDR50 | MMC_CAP_UHS_SDR104 |
 481                  MMC_CAP_UHS_DDR50);
 482 }
 483
 484 static inline int mmc_host_packed_wr(struct mmc_host *host)
 485 {
 486         return host->caps2 & MMC_CAP2_PACKED_WR;
 487 }
 488
 489 static inline int mmc_card_hs(struct mmc_card *card)
 490 {
 491         return card->host->ios.timing == MMC_TIMING_SD_HS ||
 492                 card->host->ios.timing == MMC_TIMING_MMC_HS;
 493 }
 494
 495 static inline int mmc_card_uhs(struct mmc_card *card)
 496 {
 497         return card->host->ios.timing >= MMC_TIMING_UHS_SDR12 &&
 498                 card->host->ios.timing <= MMC_TIMING_UHS_DDR50;
 499 }
 500
 501 static inline bool mmc_card_hs200(struct mmc_card *card)
 502 {
 503         return card->host->ios.timing == MMC_TIMING_MMC_HS200;
 504 }
 505
 506 static inline bool mmc_card_ddr52(struct mmc_card *card)
 507 {
 508         return card->host->ios.timing == MMC_TIMING_MMC_DDR52;
 509 }
 510
 511 static inline bool mmc_card_hs400(struct mmc_card *card)
 512 {
 513         return card->host->ios.timing == MMC_TIMING_MMC_HS400;
 514 }
 515
 516 void mmc_retune_timer_stop(struct mmc_host *host);
 517
 518 static inline void mmc_retune_needed(struct mmc_host *host)
 519 {
 520         if (host->can_retune)
 521                 host->need_retune = 1;
 522 }
 523
 524 static inline void mmc_retune_recheck(struct mmc_host *host)
 525 {
 526         if (host->hold_retune <= 1)
 527                 host->retune_now = 1;
 528 }
 529
 530 void mmc_retune_pause(struct mmc_host *host);
 531 void mmc_retune_unpause(struct mmc_host *host);
 532
 533 #endif /* LINUX_MMC_HOST_H */