staging/irda/net: Drop extraneous parentheses around test
[linux-2.6/btrfs-unstable.git] / drivers / irqchip / qcom-irq-combiner.c
blobf31265937439608314bf55d70665b55a299a4666
1 /* Copyright (c) 2015-2016, The Linux Foundation. All rights reserved.
3 * This program is free software; you can redistribute it and/or modify
4 * it under the terms of the GNU General Public License version 2 and
5 * only version 2 as published by the Free Software Foundation.
7 * This program is distributed in the hope that it will be useful,
8 * but WITHOUT ANY WARRANTY; without even the implied warranty of
9 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
10 * GNU General Public License for more details.
14 * Driver for interrupt combiners in the Top-level Control and Status
15 * Registers (TCSR) hardware block in Qualcomm Technologies chips.
16 * An interrupt combiner in this block combines a set of interrupts by
17 * OR'ing the individual interrupt signals into a summary interrupt
18 * signal routed to a parent interrupt controller, and provides read-
19 * only, 32-bit registers to query the status of individual interrupts.
20 * The status bit for IRQ n is bit (n % 32) within register (n / 32)
21 * of the given combiner. Thus, each combiner can be described as a set
22 * of register offsets and the number of IRQs managed.
25 #define pr_fmt(fmt) "QCOM80B1:" fmt
27 #include <linux/acpi.h>
28 #include <linux/irqchip/chained_irq.h>
29 #include <linux/irqdomain.h>
30 #include <linux/platform_device.h>
32 #define REG_SIZE 32
34 struct combiner_reg {
35 void __iomem *addr;
36 unsigned long enabled;
39 struct combiner {
40 struct irq_domain *domain;
41 int parent_irq;
42 u32 nirqs;
43 u32 nregs;
44 struct combiner_reg regs[0];
47 static inline int irq_nr(u32 reg, u32 bit)
49 return reg * REG_SIZE + bit;
53 * Handler for the cascaded IRQ.
55 static void combiner_handle_irq(struct irq_desc *desc)
57 struct combiner *combiner = irq_desc_get_handler_data(desc);
58 struct irq_chip *chip = irq_desc_get_chip(desc);
59 u32 reg;
61 chained_irq_enter(chip, desc);
63 for (reg = 0; reg < combiner->nregs; reg++) {
64 int virq;
65 int hwirq;
66 u32 bit;
67 u32 status;
69 bit = readl_relaxed(combiner->regs[reg].addr);
70 status = bit & combiner->regs[reg].enabled;
71 if (!status)
72 pr_warn_ratelimited("Unexpected IRQ on CPU%d: (%08x %08lx %p)\n",
73 smp_processor_id(), bit,
74 combiner->regs[reg].enabled,
75 combiner->regs[reg].addr);
77 while (status) {
78 bit = __ffs(status);
79 status &= ~(1 << bit);
80 hwirq = irq_nr(reg, bit);
81 virq = irq_find_mapping(combiner->domain, hwirq);
82 if (virq > 0)
83 generic_handle_irq(virq);
88 chained_irq_exit(chip, desc);
91 static void combiner_irq_chip_mask_irq(struct irq_data *data)
93 struct combiner *combiner = irq_data_get_irq_chip_data(data);
94 struct combiner_reg *reg = combiner->regs + data->hwirq / REG_SIZE;
96 clear_bit(data->hwirq % REG_SIZE, &reg->enabled);
99 static void combiner_irq_chip_unmask_irq(struct irq_data *data)
101 struct combiner *combiner = irq_data_get_irq_chip_data(data);
102 struct combiner_reg *reg = combiner->regs + data->hwirq / REG_SIZE;
104 set_bit(data->hwirq % REG_SIZE, &reg->enabled);
107 static struct irq_chip irq_chip = {
108 .irq_mask = combiner_irq_chip_mask_irq,
109 .irq_unmask = combiner_irq_chip_unmask_irq,
110 .name = "qcom-irq-combiner"
113 static int combiner_irq_map(struct irq_domain *domain, unsigned int irq,
114 irq_hw_number_t hwirq)
116 irq_set_chip_and_handler(irq, &irq_chip, handle_level_irq);
117 irq_set_chip_data(irq, domain->host_data);
118 irq_set_noprobe(irq);
119 return 0;
122 static void combiner_irq_unmap(struct irq_domain *domain, unsigned int irq)
124 irq_domain_reset_irq_data(irq_get_irq_data(irq));
127 static int combiner_irq_translate(struct irq_domain *d, struct irq_fwspec *fws,
128 unsigned long *hwirq, unsigned int *type)
130 struct combiner *combiner = d->host_data;
132 if (is_acpi_node(fws->fwnode)) {
133 if (WARN_ON((fws->param_count != 2) ||
134 (fws->param[0] >= combiner->nirqs) ||
135 (fws->param[1] & IORESOURCE_IRQ_LOWEDGE) ||
136 (fws->param[1] & IORESOURCE_IRQ_HIGHEDGE)))
137 return -EINVAL;
139 *hwirq = fws->param[0];
140 *type = fws->param[1];
141 return 0;
144 return -EINVAL;
147 static const struct irq_domain_ops domain_ops = {
148 .map = combiner_irq_map,
149 .unmap = combiner_irq_unmap,
150 .translate = combiner_irq_translate
153 static acpi_status count_registers_cb(struct acpi_resource *ares, void *context)
155 int *count = context;
157 if (ares->type == ACPI_RESOURCE_TYPE_GENERIC_REGISTER)
158 ++(*count);
159 return AE_OK;
162 static int count_registers(struct platform_device *pdev)
164 acpi_handle ahandle = ACPI_HANDLE(&pdev->dev);
165 acpi_status status;
166 int count = 0;
168 if (!acpi_has_method(ahandle, METHOD_NAME__CRS))
169 return -EINVAL;
171 status = acpi_walk_resources(ahandle, METHOD_NAME__CRS,
172 count_registers_cb, &count);
173 if (ACPI_FAILURE(status))
174 return -EINVAL;
175 return count;
178 struct get_registers_context {
179 struct device *dev;
180 struct combiner *combiner;
181 int err;
184 static acpi_status get_registers_cb(struct acpi_resource *ares, void *context)
186 struct get_registers_context *ctx = context;
187 struct acpi_resource_generic_register *reg;
188 phys_addr_t paddr;
189 void __iomem *vaddr;
191 if (ares->type != ACPI_RESOURCE_TYPE_GENERIC_REGISTER)
192 return AE_OK;
194 reg = &ares->data.generic_reg;
195 paddr = reg->address;
196 if ((reg->space_id != ACPI_SPACE_MEM) ||
197 (reg->bit_offset != 0) ||
198 (reg->bit_width > REG_SIZE)) {
199 dev_err(ctx->dev, "Bad register resource @%pa\n", &paddr);
200 ctx->err = -EINVAL;
201 return AE_ERROR;
204 vaddr = devm_ioremap(ctx->dev, reg->address, REG_SIZE);
205 if (!vaddr) {
206 dev_err(ctx->dev, "Can't map register @%pa\n", &paddr);
207 ctx->err = -ENOMEM;
208 return AE_ERROR;
211 ctx->combiner->regs[ctx->combiner->nregs].addr = vaddr;
212 ctx->combiner->nirqs += reg->bit_width;
213 ctx->combiner->nregs++;
214 return AE_OK;
217 static int get_registers(struct platform_device *pdev, struct combiner *comb)
219 acpi_handle ahandle = ACPI_HANDLE(&pdev->dev);
220 acpi_status status;
221 struct get_registers_context ctx;
223 if (!acpi_has_method(ahandle, METHOD_NAME__CRS))
224 return -EINVAL;
226 ctx.dev = &pdev->dev;
227 ctx.combiner = comb;
228 ctx.err = 0;
230 status = acpi_walk_resources(ahandle, METHOD_NAME__CRS,
231 get_registers_cb, &ctx);
232 if (ACPI_FAILURE(status))
233 return ctx.err;
234 return 0;
237 static int __init combiner_probe(struct platform_device *pdev)
239 struct combiner *combiner;
240 size_t alloc_sz;
241 int nregs;
242 int err;
244 nregs = count_registers(pdev);
245 if (nregs <= 0) {
246 dev_err(&pdev->dev, "Error reading register resources\n");
247 return -EINVAL;
250 alloc_sz = sizeof(*combiner) + sizeof(struct combiner_reg) * nregs;
251 combiner = devm_kzalloc(&pdev->dev, alloc_sz, GFP_KERNEL);
252 if (!combiner)
253 return -ENOMEM;
255 err = get_registers(pdev, combiner);
256 if (err < 0)
257 return err;
259 combiner->parent_irq = platform_get_irq(pdev, 0);
260 if (combiner->parent_irq <= 0) {
261 dev_err(&pdev->dev, "Error getting IRQ resource\n");
262 return -EPROBE_DEFER;
265 combiner->domain = irq_domain_create_linear(pdev->dev.fwnode, combiner->nirqs,
266 &domain_ops, combiner);
267 if (!combiner->domain)
268 /* Errors printed by irq_domain_create_linear */
269 return -ENODEV;
271 irq_set_chained_handler_and_data(combiner->parent_irq,
272 combiner_handle_irq, combiner);
274 dev_info(&pdev->dev, "Initialized with [p=%d,n=%d,r=%p]\n",
275 combiner->parent_irq, combiner->nirqs, combiner->regs[0].addr);
276 return 0;
279 static const struct acpi_device_id qcom_irq_combiner_ids[] = {
280 { "QCOM80B1", },
284 static struct platform_driver qcom_irq_combiner_probe = {
285 .driver = {
286 .name = "qcom-irq-combiner",
287 .acpi_match_table = ACPI_PTR(qcom_irq_combiner_ids),
289 .probe = combiner_probe,
291 builtin_platform_driver(qcom_irq_combiner_probe);