ARM: mvebu: Allow to power down L2 cache controller in idle mode
[linux-2.6/btrfs-unstable.git] / arch / arm / mach-mvebu / pmsu.c
blob7ccf14a065b18b84a112cb033832bd1bc8e60a3c
1 /*
2 * Power Management Service Unit(PMSU) support for Armada 370/XP platforms.
4 * Copyright (C) 2012 Marvell
6 * Yehuda Yitschak <yehuday@marvell.com>
7 * Gregory Clement <gregory.clement@free-electrons.com>
8 * Thomas Petazzoni <thomas.petazzoni@free-electrons.com>
10 * This file is licensed under the terms of the GNU General Public
11 * License version 2. This program is licensed "as is" without any
12 * warranty of any kind, whether express or implied.
14 * The Armada 370 and Armada XP SOCs have a power management service
15 * unit which is responsible for powering down and waking up CPUs and
16 * other SOC units
19 #define pr_fmt(fmt) "mvebu-pmsu: " fmt
21 #include <linux/kernel.h>
22 #include <linux/init.h>
23 #include <linux/of_address.h>
24 #include <linux/io.h>
25 #include <linux/smp.h>
26 #include <linux/resource.h>
27 #include <asm/smp_plat.h>
28 #include "common.h"
29 #include "pmsu.h"
31 static void __iomem *pmsu_mp_base;
33 #define PMSU_BASE_OFFSET 0x100
34 #define PMSU_REG_SIZE 0x1000
36 /* PMSU MP registers */
37 #define PMSU_BOOT_ADDR_REDIRECT_OFFSET(cpu) ((cpu * 0x100) + 0x124)
39 /* PMSU fabric registers */
40 #define L2C_NFABRIC_PM_CTL 0x4
41 #define L2C_NFABRIC_PM_CTL_PWR_DOWN BIT(20)
43 static struct of_device_id of_pmsu_table[] = {
44 { .compatible = "marvell,armada-370-pmsu", },
45 { .compatible = "marvell,armada-370-xp-pmsu", },
46 { .compatible = "marvell,armada-380-pmsu", },
47 { /* end of list */ },
50 void mvebu_pmsu_set_cpu_boot_addr(int hw_cpu, void *boot_addr)
52 writel(virt_to_phys(boot_addr), pmsu_mp_base +
53 PMSU_BOOT_ADDR_REDIRECT_OFFSET(hw_cpu));
56 static int __init armada_370_xp_pmsu_init(void)
58 struct device_node *np;
59 struct resource res;
60 int ret = 0;
62 np = of_find_matching_node(NULL, of_pmsu_table);
63 if (!np)
64 return 0;
66 pr_info("Initializing Power Management Service Unit\n");
68 if (of_address_to_resource(np, 0, &res)) {
69 pr_err("unable to get resource\n");
70 ret = -ENOENT;
71 goto out;
74 if (of_device_is_compatible(np, "marvell,armada-370-xp-pmsu")) {
75 pr_warn(FW_WARN "deprecated pmsu binding\n");
76 res.start = res.start - PMSU_BASE_OFFSET;
77 res.end = res.start + PMSU_REG_SIZE - 1;
80 if (!request_mem_region(res.start, resource_size(&res),
81 np->full_name)) {
82 pr_err("unable to request region\n");
83 ret = -EBUSY;
84 goto out;
87 pmsu_mp_base = ioremap(res.start, resource_size(&res));
88 if (!pmsu_mp_base) {
89 pr_err("unable to map registers\n");
90 release_mem_region(res.start, resource_size(&res));
91 ret = -ENOMEM;
92 goto out;
95 out:
96 of_node_put(np);
97 return ret;
100 static void armada_370_xp_pmsu_enable_l2_powerdown_onidle(void)
102 u32 reg;
104 if (pmsu_mp_base == NULL)
105 return;
107 /* Enable L2 & Fabric powerdown in Deep-Idle mode - Fabric */
108 reg = readl(pmsu_mp_base + L2C_NFABRIC_PM_CTL);
109 reg |= L2C_NFABRIC_PM_CTL_PWR_DOWN;
110 writel(reg, pmsu_mp_base + L2C_NFABRIC_PM_CTL);
113 early_initcall(armada_370_xp_pmsu_init);