Staging : rtl8188eu : os_dep : Compression of lines for immediate return
[linux-2.6/btrfs-unstable.git] / arch / x86 / mm / pageattr.c
blob727158cb3b3c91111f7bfe63a3b2fd9744972c1a
1 /*
2 * Copyright 2002 Andi Kleen, SuSE Labs.
3 * Thanks to Ben LaHaise for precious feedback.
4 */
5 #include <linux/highmem.h>
6 #include <linux/bootmem.h>
7 #include <linux/module.h>
8 #include <linux/sched.h>
9 #include <linux/mm.h>
10 #include <linux/interrupt.h>
11 #include <linux/seq_file.h>
12 #include <linux/debugfs.h>
13 #include <linux/pfn.h>
14 #include <linux/percpu.h>
15 #include <linux/gfp.h>
16 #include <linux/pci.h>
17 #include <linux/vmalloc.h>
19 #include <asm/e820.h>
20 #include <asm/processor.h>
21 #include <asm/tlbflush.h>
22 #include <asm/sections.h>
23 #include <asm/setup.h>
24 #include <asm/uaccess.h>
25 #include <asm/pgalloc.h>
26 #include <asm/proto.h>
27 #include <asm/pat.h>
30 * The current flushing context - we pass it instead of 5 arguments:
32 struct cpa_data {
33 unsigned long *vaddr;
34 pgd_t *pgd;
35 pgprot_t mask_set;
36 pgprot_t mask_clr;
37 int numpages;
38 int flags;
39 unsigned long pfn;
40 unsigned force_split : 1;
41 int curpage;
42 struct page **pages;
46 * Serialize cpa() (for !DEBUG_PAGEALLOC which uses large identity mappings)
47 * using cpa_lock. So that we don't allow any other cpu, with stale large tlb
48 * entries change the page attribute in parallel to some other cpu
49 * splitting a large page entry along with changing the attribute.
51 static DEFINE_SPINLOCK(cpa_lock);
53 #define CPA_FLUSHTLB 1
54 #define CPA_ARRAY 2
55 #define CPA_PAGES_ARRAY 4
57 #ifdef CONFIG_PROC_FS
58 static unsigned long direct_pages_count[PG_LEVEL_NUM];
60 void update_page_count(int level, unsigned long pages)
62 /* Protect against CPA */
63 spin_lock(&pgd_lock);
64 direct_pages_count[level] += pages;
65 spin_unlock(&pgd_lock);
68 static void split_page_count(int level)
70 direct_pages_count[level]--;
71 direct_pages_count[level - 1] += PTRS_PER_PTE;
74 void arch_report_meminfo(struct seq_file *m)
76 seq_printf(m, "DirectMap4k: %8lu kB\n",
77 direct_pages_count[PG_LEVEL_4K] << 2);
78 #if defined(CONFIG_X86_64) || defined(CONFIG_X86_PAE)
79 seq_printf(m, "DirectMap2M: %8lu kB\n",
80 direct_pages_count[PG_LEVEL_2M] << 11);
81 #else
82 seq_printf(m, "DirectMap4M: %8lu kB\n",
83 direct_pages_count[PG_LEVEL_2M] << 12);
84 #endif
85 if (direct_gbpages)
86 seq_printf(m, "DirectMap1G: %8lu kB\n",
87 direct_pages_count[PG_LEVEL_1G] << 20);
89 #else
90 static inline void split_page_count(int level) { }
91 #endif
93 #ifdef CONFIG_X86_64
95 static inline unsigned long highmap_start_pfn(void)
97 return __pa_symbol(_text) >> PAGE_SHIFT;
100 static inline unsigned long highmap_end_pfn(void)
102 return __pa_symbol(roundup(_brk_end, PMD_SIZE)) >> PAGE_SHIFT;
105 #endif
107 #ifdef CONFIG_DEBUG_PAGEALLOC
108 # define debug_pagealloc 1
109 #else
110 # define debug_pagealloc 0
111 #endif
113 static inline int
114 within(unsigned long addr, unsigned long start, unsigned long end)
116 return addr >= start && addr < end;
120 * Flushing functions
124 * clflush_cache_range - flush a cache range with clflush
125 * @vaddr: virtual start address
126 * @size: number of bytes to flush
128 * clflushopt is an unordered instruction which needs fencing with mfence or
129 * sfence to avoid ordering issues.
131 void clflush_cache_range(void *vaddr, unsigned int size)
133 unsigned long clflush_mask = boot_cpu_data.x86_clflush_size - 1;
134 void *vend = vaddr + size;
135 void *p;
137 mb();
139 for (p = (void *)((unsigned long)vaddr & ~clflush_mask);
140 p < vend; p += boot_cpu_data.x86_clflush_size)
141 clflushopt(p);
143 mb();
145 EXPORT_SYMBOL_GPL(clflush_cache_range);
147 static void __cpa_flush_all(void *arg)
149 unsigned long cache = (unsigned long)arg;
152 * Flush all to work around Errata in early athlons regarding
153 * large page flushing.
155 __flush_tlb_all();
157 if (cache && boot_cpu_data.x86 >= 4)
158 wbinvd();
161 static void cpa_flush_all(unsigned long cache)
163 BUG_ON(irqs_disabled());
165 on_each_cpu(__cpa_flush_all, (void *) cache, 1);
168 static void __cpa_flush_range(void *arg)
171 * We could optimize that further and do individual per page
172 * tlb invalidates for a low number of pages. Caveat: we must
173 * flush the high aliases on 64bit as well.
175 __flush_tlb_all();
178 static void cpa_flush_range(unsigned long start, int numpages, int cache)
180 unsigned int i, level;
181 unsigned long addr;
183 BUG_ON(irqs_disabled());
184 WARN_ON(PAGE_ALIGN(start) != start);
186 on_each_cpu(__cpa_flush_range, NULL, 1);
188 if (!cache)
189 return;
192 * We only need to flush on one CPU,
193 * clflush is a MESI-coherent instruction that
194 * will cause all other CPUs to flush the same
195 * cachelines:
197 for (i = 0, addr = start; i < numpages; i++, addr += PAGE_SIZE) {
198 pte_t *pte = lookup_address(addr, &level);
201 * Only flush present addresses:
203 if (pte && (pte_val(*pte) & _PAGE_PRESENT))
204 clflush_cache_range((void *) addr, PAGE_SIZE);
208 static void cpa_flush_array(unsigned long *start, int numpages, int cache,
209 int in_flags, struct page **pages)
211 unsigned int i, level;
212 unsigned long do_wbinvd = cache && numpages >= 1024; /* 4M threshold */
214 BUG_ON(irqs_disabled());
216 on_each_cpu(__cpa_flush_all, (void *) do_wbinvd, 1);
218 if (!cache || do_wbinvd)
219 return;
222 * We only need to flush on one CPU,
223 * clflush is a MESI-coherent instruction that
224 * will cause all other CPUs to flush the same
225 * cachelines:
227 for (i = 0; i < numpages; i++) {
228 unsigned long addr;
229 pte_t *pte;
231 if (in_flags & CPA_PAGES_ARRAY)
232 addr = (unsigned long)page_address(pages[i]);
233 else
234 addr = start[i];
236 pte = lookup_address(addr, &level);
239 * Only flush present addresses:
241 if (pte && (pte_val(*pte) & _PAGE_PRESENT))
242 clflush_cache_range((void *)addr, PAGE_SIZE);
247 * Certain areas of memory on x86 require very specific protection flags,
248 * for example the BIOS area or kernel text. Callers don't always get this
249 * right (again, ioremap() on BIOS memory is not uncommon) so this function
250 * checks and fixes these known static required protection bits.
252 static inline pgprot_t static_protections(pgprot_t prot, unsigned long address,
253 unsigned long pfn)
255 pgprot_t forbidden = __pgprot(0);
258 * The BIOS area between 640k and 1Mb needs to be executable for
259 * PCI BIOS based config access (CONFIG_PCI_GOBIOS) support.
261 #ifdef CONFIG_PCI_BIOS
262 if (pcibios_enabled && within(pfn, BIOS_BEGIN >> PAGE_SHIFT, BIOS_END >> PAGE_SHIFT))
263 pgprot_val(forbidden) |= _PAGE_NX;
264 #endif
267 * The kernel text needs to be executable for obvious reasons
268 * Does not cover __inittext since that is gone later on. On
269 * 64bit we do not enforce !NX on the low mapping
271 if (within(address, (unsigned long)_text, (unsigned long)_etext))
272 pgprot_val(forbidden) |= _PAGE_NX;
275 * The .rodata section needs to be read-only. Using the pfn
276 * catches all aliases.
278 if (within(pfn, __pa_symbol(__start_rodata) >> PAGE_SHIFT,
279 __pa_symbol(__end_rodata) >> PAGE_SHIFT))
280 pgprot_val(forbidden) |= _PAGE_RW;
282 #if defined(CONFIG_X86_64) && defined(CONFIG_DEBUG_RODATA)
284 * Once the kernel maps the text as RO (kernel_set_to_readonly is set),
285 * kernel text mappings for the large page aligned text, rodata sections
286 * will be always read-only. For the kernel identity mappings covering
287 * the holes caused by this alignment can be anything that user asks.
289 * This will preserve the large page mappings for kernel text/data
290 * at no extra cost.
292 if (kernel_set_to_readonly &&
293 within(address, (unsigned long)_text,
294 (unsigned long)__end_rodata_hpage_align)) {
295 unsigned int level;
298 * Don't enforce the !RW mapping for the kernel text mapping,
299 * if the current mapping is already using small page mapping.
300 * No need to work hard to preserve large page mappings in this
301 * case.
303 * This also fixes the Linux Xen paravirt guest boot failure
304 * (because of unexpected read-only mappings for kernel identity
305 * mappings). In this paravirt guest case, the kernel text
306 * mapping and the kernel identity mapping share the same
307 * page-table pages. Thus we can't really use different
308 * protections for the kernel text and identity mappings. Also,
309 * these shared mappings are made of small page mappings.
310 * Thus this don't enforce !RW mapping for small page kernel
311 * text mapping logic will help Linux Xen parvirt guest boot
312 * as well.
314 if (lookup_address(address, &level) && (level != PG_LEVEL_4K))
315 pgprot_val(forbidden) |= _PAGE_RW;
317 #endif
319 prot = __pgprot(pgprot_val(prot) & ~pgprot_val(forbidden));
321 return prot;
325 * Lookup the page table entry for a virtual address in a specific pgd.
326 * Return a pointer to the entry and the level of the mapping.
328 pte_t *lookup_address_in_pgd(pgd_t *pgd, unsigned long address,
329 unsigned int *level)
331 pud_t *pud;
332 pmd_t *pmd;
334 *level = PG_LEVEL_NONE;
336 if (pgd_none(*pgd))
337 return NULL;
339 pud = pud_offset(pgd, address);
340 if (pud_none(*pud))
341 return NULL;
343 *level = PG_LEVEL_1G;
344 if (pud_large(*pud) || !pud_present(*pud))
345 return (pte_t *)pud;
347 pmd = pmd_offset(pud, address);
348 if (pmd_none(*pmd))
349 return NULL;
351 *level = PG_LEVEL_2M;
352 if (pmd_large(*pmd) || !pmd_present(*pmd))
353 return (pte_t *)pmd;
355 *level = PG_LEVEL_4K;
357 return pte_offset_kernel(pmd, address);
361 * Lookup the page table entry for a virtual address. Return a pointer
362 * to the entry and the level of the mapping.
364 * Note: We return pud and pmd either when the entry is marked large
365 * or when the present bit is not set. Otherwise we would return a
366 * pointer to a nonexisting mapping.
368 pte_t *lookup_address(unsigned long address, unsigned int *level)
370 return lookup_address_in_pgd(pgd_offset_k(address), address, level);
372 EXPORT_SYMBOL_GPL(lookup_address);
374 static pte_t *_lookup_address_cpa(struct cpa_data *cpa, unsigned long address,
375 unsigned int *level)
377 if (cpa->pgd)
378 return lookup_address_in_pgd(cpa->pgd + pgd_index(address),
379 address, level);
381 return lookup_address(address, level);
385 * Lookup the PMD entry for a virtual address. Return a pointer to the entry
386 * or NULL if not present.
388 pmd_t *lookup_pmd_address(unsigned long address)
390 pgd_t *pgd;
391 pud_t *pud;
393 pgd = pgd_offset_k(address);
394 if (pgd_none(*pgd))
395 return NULL;
397 pud = pud_offset(pgd, address);
398 if (pud_none(*pud) || pud_large(*pud) || !pud_present(*pud))
399 return NULL;
401 return pmd_offset(pud, address);
405 * This is necessary because __pa() does not work on some
406 * kinds of memory, like vmalloc() or the alloc_remap()
407 * areas on 32-bit NUMA systems. The percpu areas can
408 * end up in this kind of memory, for instance.
410 * This could be optimized, but it is only intended to be
411 * used at inititalization time, and keeping it
412 * unoptimized should increase the testing coverage for
413 * the more obscure platforms.
415 phys_addr_t slow_virt_to_phys(void *__virt_addr)
417 unsigned long virt_addr = (unsigned long)__virt_addr;
418 phys_addr_t phys_addr;
419 unsigned long offset;
420 enum pg_level level;
421 unsigned long pmask;
422 pte_t *pte;
424 pte = lookup_address(virt_addr, &level);
425 BUG_ON(!pte);
426 pmask = page_level_mask(level);
427 offset = virt_addr & ~pmask;
428 phys_addr = (phys_addr_t)pte_pfn(*pte) << PAGE_SHIFT;
429 return (phys_addr | offset);
431 EXPORT_SYMBOL_GPL(slow_virt_to_phys);
434 * Set the new pmd in all the pgds we know about:
436 static void __set_pmd_pte(pte_t *kpte, unsigned long address, pte_t pte)
438 /* change init_mm */
439 set_pte_atomic(kpte, pte);
440 #ifdef CONFIG_X86_32
441 if (!SHARED_KERNEL_PMD) {
442 struct page *page;
444 list_for_each_entry(page, &pgd_list, lru) {
445 pgd_t *pgd;
446 pud_t *pud;
447 pmd_t *pmd;
449 pgd = (pgd_t *)page_address(page) + pgd_index(address);
450 pud = pud_offset(pgd, address);
451 pmd = pmd_offset(pud, address);
452 set_pte_atomic((pte_t *)pmd, pte);
455 #endif
458 static int
459 try_preserve_large_page(pte_t *kpte, unsigned long address,
460 struct cpa_data *cpa)
462 unsigned long nextpage_addr, numpages, pmask, psize, addr, pfn;
463 pte_t new_pte, old_pte, *tmp;
464 pgprot_t old_prot, new_prot, req_prot;
465 int i, do_split = 1;
466 enum pg_level level;
468 if (cpa->force_split)
469 return 1;
471 spin_lock(&pgd_lock);
473 * Check for races, another CPU might have split this page
474 * up already:
476 tmp = _lookup_address_cpa(cpa, address, &level);
477 if (tmp != kpte)
478 goto out_unlock;
480 switch (level) {
481 case PG_LEVEL_2M:
482 #ifdef CONFIG_X86_64
483 case PG_LEVEL_1G:
484 #endif
485 psize = page_level_size(level);
486 pmask = page_level_mask(level);
487 break;
488 default:
489 do_split = -EINVAL;
490 goto out_unlock;
494 * Calculate the number of pages, which fit into this large
495 * page starting at address:
497 nextpage_addr = (address + psize) & pmask;
498 numpages = (nextpage_addr - address) >> PAGE_SHIFT;
499 if (numpages < cpa->numpages)
500 cpa->numpages = numpages;
503 * We are safe now. Check whether the new pgprot is the same:
504 * Convert protection attributes to 4k-format, as cpa->mask* are set
505 * up accordingly.
507 old_pte = *kpte;
508 old_prot = req_prot = pgprot_large_2_4k(pte_pgprot(old_pte));
510 pgprot_val(req_prot) &= ~pgprot_val(cpa->mask_clr);
511 pgprot_val(req_prot) |= pgprot_val(cpa->mask_set);
514 * req_prot is in format of 4k pages. It must be converted to large
515 * page format: the caching mode includes the PAT bit located at
516 * different bit positions in the two formats.
518 req_prot = pgprot_4k_2_large(req_prot);
521 * Set the PSE and GLOBAL flags only if the PRESENT flag is
522 * set otherwise pmd_present/pmd_huge will return true even on
523 * a non present pmd. The canon_pgprot will clear _PAGE_GLOBAL
524 * for the ancient hardware that doesn't support it.
526 if (pgprot_val(req_prot) & _PAGE_PRESENT)
527 pgprot_val(req_prot) |= _PAGE_PSE | _PAGE_GLOBAL;
528 else
529 pgprot_val(req_prot) &= ~(_PAGE_PSE | _PAGE_GLOBAL);
531 req_prot = canon_pgprot(req_prot);
534 * old_pte points to the large page base address. So we need
535 * to add the offset of the virtual address:
537 pfn = pte_pfn(old_pte) + ((address & (psize - 1)) >> PAGE_SHIFT);
538 cpa->pfn = pfn;
540 new_prot = static_protections(req_prot, address, pfn);
543 * We need to check the full range, whether
544 * static_protection() requires a different pgprot for one of
545 * the pages in the range we try to preserve:
547 addr = address & pmask;
548 pfn = pte_pfn(old_pte);
549 for (i = 0; i < (psize >> PAGE_SHIFT); i++, addr += PAGE_SIZE, pfn++) {
550 pgprot_t chk_prot = static_protections(req_prot, addr, pfn);
552 if (pgprot_val(chk_prot) != pgprot_val(new_prot))
553 goto out_unlock;
557 * If there are no changes, return. maxpages has been updated
558 * above:
560 if (pgprot_val(new_prot) == pgprot_val(old_prot)) {
561 do_split = 0;
562 goto out_unlock;
566 * We need to change the attributes. Check, whether we can
567 * change the large page in one go. We request a split, when
568 * the address is not aligned and the number of pages is
569 * smaller than the number of pages in the large page. Note
570 * that we limited the number of possible pages already to
571 * the number of pages in the large page.
573 if (address == (address & pmask) && cpa->numpages == (psize >> PAGE_SHIFT)) {
575 * The address is aligned and the number of pages
576 * covers the full page.
578 new_pte = pfn_pte(pte_pfn(old_pte), new_prot);
579 __set_pmd_pte(kpte, address, new_pte);
580 cpa->flags |= CPA_FLUSHTLB;
581 do_split = 0;
584 out_unlock:
585 spin_unlock(&pgd_lock);
587 return do_split;
590 static int
591 __split_large_page(struct cpa_data *cpa, pte_t *kpte, unsigned long address,
592 struct page *base)
594 pte_t *pbase = (pte_t *)page_address(base);
595 unsigned long pfn, pfninc = 1;
596 unsigned int i, level;
597 pte_t *tmp;
598 pgprot_t ref_prot;
600 spin_lock(&pgd_lock);
602 * Check for races, another CPU might have split this page
603 * up for us already:
605 tmp = _lookup_address_cpa(cpa, address, &level);
606 if (tmp != kpte) {
607 spin_unlock(&pgd_lock);
608 return 1;
611 paravirt_alloc_pte(&init_mm, page_to_pfn(base));
612 ref_prot = pte_pgprot(pte_clrhuge(*kpte));
614 /* promote PAT bit to correct position */
615 if (level == PG_LEVEL_2M)
616 ref_prot = pgprot_large_2_4k(ref_prot);
618 #ifdef CONFIG_X86_64
619 if (level == PG_LEVEL_1G) {
620 pfninc = PMD_PAGE_SIZE >> PAGE_SHIFT;
622 * Set the PSE flags only if the PRESENT flag is set
623 * otherwise pmd_present/pmd_huge will return true
624 * even on a non present pmd.
626 if (pgprot_val(ref_prot) & _PAGE_PRESENT)
627 pgprot_val(ref_prot) |= _PAGE_PSE;
628 else
629 pgprot_val(ref_prot) &= ~_PAGE_PSE;
631 #endif
634 * Set the GLOBAL flags only if the PRESENT flag is set
635 * otherwise pmd/pte_present will return true even on a non
636 * present pmd/pte. The canon_pgprot will clear _PAGE_GLOBAL
637 * for the ancient hardware that doesn't support it.
639 if (pgprot_val(ref_prot) & _PAGE_PRESENT)
640 pgprot_val(ref_prot) |= _PAGE_GLOBAL;
641 else
642 pgprot_val(ref_prot) &= ~_PAGE_GLOBAL;
645 * Get the target pfn from the original entry:
647 pfn = pte_pfn(*kpte);
648 for (i = 0; i < PTRS_PER_PTE; i++, pfn += pfninc)
649 set_pte(&pbase[i], pfn_pte(pfn, canon_pgprot(ref_prot)));
651 if (pfn_range_is_mapped(PFN_DOWN(__pa(address)),
652 PFN_DOWN(__pa(address)) + 1))
653 split_page_count(level);
656 * Install the new, split up pagetable.
658 * We use the standard kernel pagetable protections for the new
659 * pagetable protections, the actual ptes set above control the
660 * primary protection behavior:
662 __set_pmd_pte(kpte, address, mk_pte(base, __pgprot(_KERNPG_TABLE)));
665 * Intel Atom errata AAH41 workaround.
667 * The real fix should be in hw or in a microcode update, but
668 * we also probabilistically try to reduce the window of having
669 * a large TLB mixed with 4K TLBs while instruction fetches are
670 * going on.
672 __flush_tlb_all();
673 spin_unlock(&pgd_lock);
675 return 0;
678 static int split_large_page(struct cpa_data *cpa, pte_t *kpte,
679 unsigned long address)
681 struct page *base;
683 if (!debug_pagealloc)
684 spin_unlock(&cpa_lock);
685 base = alloc_pages(GFP_KERNEL | __GFP_NOTRACK, 0);
686 if (!debug_pagealloc)
687 spin_lock(&cpa_lock);
688 if (!base)
689 return -ENOMEM;
691 if (__split_large_page(cpa, kpte, address, base))
692 __free_page(base);
694 return 0;
697 static bool try_to_free_pte_page(pte_t *pte)
699 int i;
701 for (i = 0; i < PTRS_PER_PTE; i++)
702 if (!pte_none(pte[i]))
703 return false;
705 free_page((unsigned long)pte);
706 return true;
709 static bool try_to_free_pmd_page(pmd_t *pmd)
711 int i;
713 for (i = 0; i < PTRS_PER_PMD; i++)
714 if (!pmd_none(pmd[i]))
715 return false;
717 free_page((unsigned long)pmd);
718 return true;
721 static bool try_to_free_pud_page(pud_t *pud)
723 int i;
725 for (i = 0; i < PTRS_PER_PUD; i++)
726 if (!pud_none(pud[i]))
727 return false;
729 free_page((unsigned long)pud);
730 return true;
733 static bool unmap_pte_range(pmd_t *pmd, unsigned long start, unsigned long end)
735 pte_t *pte = pte_offset_kernel(pmd, start);
737 while (start < end) {
738 set_pte(pte, __pte(0));
740 start += PAGE_SIZE;
741 pte++;
744 if (try_to_free_pte_page((pte_t *)pmd_page_vaddr(*pmd))) {
745 pmd_clear(pmd);
746 return true;
748 return false;
751 static void __unmap_pmd_range(pud_t *pud, pmd_t *pmd,
752 unsigned long start, unsigned long end)
754 if (unmap_pte_range(pmd, start, end))
755 if (try_to_free_pmd_page((pmd_t *)pud_page_vaddr(*pud)))
756 pud_clear(pud);
759 static void unmap_pmd_range(pud_t *pud, unsigned long start, unsigned long end)
761 pmd_t *pmd = pmd_offset(pud, start);
764 * Not on a 2MB page boundary?
766 if (start & (PMD_SIZE - 1)) {
767 unsigned long next_page = (start + PMD_SIZE) & PMD_MASK;
768 unsigned long pre_end = min_t(unsigned long, end, next_page);
770 __unmap_pmd_range(pud, pmd, start, pre_end);
772 start = pre_end;
773 pmd++;
777 * Try to unmap in 2M chunks.
779 while (end - start >= PMD_SIZE) {
780 if (pmd_large(*pmd))
781 pmd_clear(pmd);
782 else
783 __unmap_pmd_range(pud, pmd, start, start + PMD_SIZE);
785 start += PMD_SIZE;
786 pmd++;
790 * 4K leftovers?
792 if (start < end)
793 return __unmap_pmd_range(pud, pmd, start, end);
796 * Try again to free the PMD page if haven't succeeded above.
798 if (!pud_none(*pud))
799 if (try_to_free_pmd_page((pmd_t *)pud_page_vaddr(*pud)))
800 pud_clear(pud);
803 static void unmap_pud_range(pgd_t *pgd, unsigned long start, unsigned long end)
805 pud_t *pud = pud_offset(pgd, start);
808 * Not on a GB page boundary?
810 if (start & (PUD_SIZE - 1)) {
811 unsigned long next_page = (start + PUD_SIZE) & PUD_MASK;
812 unsigned long pre_end = min_t(unsigned long, end, next_page);
814 unmap_pmd_range(pud, start, pre_end);
816 start = pre_end;
817 pud++;
821 * Try to unmap in 1G chunks?
823 while (end - start >= PUD_SIZE) {
825 if (pud_large(*pud))
826 pud_clear(pud);
827 else
828 unmap_pmd_range(pud, start, start + PUD_SIZE);
830 start += PUD_SIZE;
831 pud++;
835 * 2M leftovers?
837 if (start < end)
838 unmap_pmd_range(pud, start, end);
841 * No need to try to free the PUD page because we'll free it in
842 * populate_pgd's error path
846 static void unmap_pgd_range(pgd_t *root, unsigned long addr, unsigned long end)
848 pgd_t *pgd_entry = root + pgd_index(addr);
850 unmap_pud_range(pgd_entry, addr, end);
852 if (try_to_free_pud_page((pud_t *)pgd_page_vaddr(*pgd_entry)))
853 pgd_clear(pgd_entry);
856 static int alloc_pte_page(pmd_t *pmd)
858 pte_t *pte = (pte_t *)get_zeroed_page(GFP_KERNEL | __GFP_NOTRACK);
859 if (!pte)
860 return -1;
862 set_pmd(pmd, __pmd(__pa(pte) | _KERNPG_TABLE));
863 return 0;
866 static int alloc_pmd_page(pud_t *pud)
868 pmd_t *pmd = (pmd_t *)get_zeroed_page(GFP_KERNEL | __GFP_NOTRACK);
869 if (!pmd)
870 return -1;
872 set_pud(pud, __pud(__pa(pmd) | _KERNPG_TABLE));
873 return 0;
876 static void populate_pte(struct cpa_data *cpa,
877 unsigned long start, unsigned long end,
878 unsigned num_pages, pmd_t *pmd, pgprot_t pgprot)
880 pte_t *pte;
882 pte = pte_offset_kernel(pmd, start);
884 while (num_pages-- && start < end) {
886 /* deal with the NX bit */
887 if (!(pgprot_val(pgprot) & _PAGE_NX))
888 cpa->pfn &= ~_PAGE_NX;
890 set_pte(pte, pfn_pte(cpa->pfn >> PAGE_SHIFT, pgprot));
892 start += PAGE_SIZE;
893 cpa->pfn += PAGE_SIZE;
894 pte++;
898 static int populate_pmd(struct cpa_data *cpa,
899 unsigned long start, unsigned long end,
900 unsigned num_pages, pud_t *pud, pgprot_t pgprot)
902 unsigned int cur_pages = 0;
903 pmd_t *pmd;
904 pgprot_t pmd_pgprot;
907 * Not on a 2M boundary?
909 if (start & (PMD_SIZE - 1)) {
910 unsigned long pre_end = start + (num_pages << PAGE_SHIFT);
911 unsigned long next_page = (start + PMD_SIZE) & PMD_MASK;
913 pre_end = min_t(unsigned long, pre_end, next_page);
914 cur_pages = (pre_end - start) >> PAGE_SHIFT;
915 cur_pages = min_t(unsigned int, num_pages, cur_pages);
918 * Need a PTE page?
920 pmd = pmd_offset(pud, start);
921 if (pmd_none(*pmd))
922 if (alloc_pte_page(pmd))
923 return -1;
925 populate_pte(cpa, start, pre_end, cur_pages, pmd, pgprot);
927 start = pre_end;
931 * We mapped them all?
933 if (num_pages == cur_pages)
934 return cur_pages;
936 pmd_pgprot = pgprot_4k_2_large(pgprot);
938 while (end - start >= PMD_SIZE) {
941 * We cannot use a 1G page so allocate a PMD page if needed.
943 if (pud_none(*pud))
944 if (alloc_pmd_page(pud))
945 return -1;
947 pmd = pmd_offset(pud, start);
949 set_pmd(pmd, __pmd(cpa->pfn | _PAGE_PSE |
950 massage_pgprot(pmd_pgprot)));
952 start += PMD_SIZE;
953 cpa->pfn += PMD_SIZE;
954 cur_pages += PMD_SIZE >> PAGE_SHIFT;
958 * Map trailing 4K pages.
960 if (start < end) {
961 pmd = pmd_offset(pud, start);
962 if (pmd_none(*pmd))
963 if (alloc_pte_page(pmd))
964 return -1;
966 populate_pte(cpa, start, end, num_pages - cur_pages,
967 pmd, pgprot);
969 return num_pages;
972 static int populate_pud(struct cpa_data *cpa, unsigned long start, pgd_t *pgd,
973 pgprot_t pgprot)
975 pud_t *pud;
976 unsigned long end;
977 int cur_pages = 0;
978 pgprot_t pud_pgprot;
980 end = start + (cpa->numpages << PAGE_SHIFT);
983 * Not on a Gb page boundary? => map everything up to it with
984 * smaller pages.
986 if (start & (PUD_SIZE - 1)) {
987 unsigned long pre_end;
988 unsigned long next_page = (start + PUD_SIZE) & PUD_MASK;
990 pre_end = min_t(unsigned long, end, next_page);
991 cur_pages = (pre_end - start) >> PAGE_SHIFT;
992 cur_pages = min_t(int, (int)cpa->numpages, cur_pages);
994 pud = pud_offset(pgd, start);
997 * Need a PMD page?
999 if (pud_none(*pud))
1000 if (alloc_pmd_page(pud))
1001 return -1;
1003 cur_pages = populate_pmd(cpa, start, pre_end, cur_pages,
1004 pud, pgprot);
1005 if (cur_pages < 0)
1006 return cur_pages;
1008 start = pre_end;
1011 /* We mapped them all? */
1012 if (cpa->numpages == cur_pages)
1013 return cur_pages;
1015 pud = pud_offset(pgd, start);
1016 pud_pgprot = pgprot_4k_2_large(pgprot);
1019 * Map everything starting from the Gb boundary, possibly with 1G pages
1021 while (end - start >= PUD_SIZE) {
1022 set_pud(pud, __pud(cpa->pfn | _PAGE_PSE |
1023 massage_pgprot(pud_pgprot)));
1025 start += PUD_SIZE;
1026 cpa->pfn += PUD_SIZE;
1027 cur_pages += PUD_SIZE >> PAGE_SHIFT;
1028 pud++;
1031 /* Map trailing leftover */
1032 if (start < end) {
1033 int tmp;
1035 pud = pud_offset(pgd, start);
1036 if (pud_none(*pud))
1037 if (alloc_pmd_page(pud))
1038 return -1;
1040 tmp = populate_pmd(cpa, start, end, cpa->numpages - cur_pages,
1041 pud, pgprot);
1042 if (tmp < 0)
1043 return cur_pages;
1045 cur_pages += tmp;
1047 return cur_pages;
1051 * Restrictions for kernel page table do not necessarily apply when mapping in
1052 * an alternate PGD.
1054 static int populate_pgd(struct cpa_data *cpa, unsigned long addr)
1056 pgprot_t pgprot = __pgprot(_KERNPG_TABLE);
1057 pud_t *pud = NULL; /* shut up gcc */
1058 pgd_t *pgd_entry;
1059 int ret;
1061 pgd_entry = cpa->pgd + pgd_index(addr);
1064 * Allocate a PUD page and hand it down for mapping.
1066 if (pgd_none(*pgd_entry)) {
1067 pud = (pud_t *)get_zeroed_page(GFP_KERNEL | __GFP_NOTRACK);
1068 if (!pud)
1069 return -1;
1071 set_pgd(pgd_entry, __pgd(__pa(pud) | _KERNPG_TABLE));
1074 pgprot_val(pgprot) &= ~pgprot_val(cpa->mask_clr);
1075 pgprot_val(pgprot) |= pgprot_val(cpa->mask_set);
1077 ret = populate_pud(cpa, addr, pgd_entry, pgprot);
1078 if (ret < 0) {
1079 unmap_pgd_range(cpa->pgd, addr,
1080 addr + (cpa->numpages << PAGE_SHIFT));
1081 return ret;
1084 cpa->numpages = ret;
1085 return 0;
1088 static int __cpa_process_fault(struct cpa_data *cpa, unsigned long vaddr,
1089 int primary)
1091 if (cpa->pgd)
1092 return populate_pgd(cpa, vaddr);
1095 * Ignore all non primary paths.
1097 if (!primary)
1098 return 0;
1101 * Ignore the NULL PTE for kernel identity mapping, as it is expected
1102 * to have holes.
1103 * Also set numpages to '1' indicating that we processed cpa req for
1104 * one virtual address page and its pfn. TBD: numpages can be set based
1105 * on the initial value and the level returned by lookup_address().
1107 if (within(vaddr, PAGE_OFFSET,
1108 PAGE_OFFSET + (max_pfn_mapped << PAGE_SHIFT))) {
1109 cpa->numpages = 1;
1110 cpa->pfn = __pa(vaddr) >> PAGE_SHIFT;
1111 return 0;
1112 } else {
1113 WARN(1, KERN_WARNING "CPA: called for zero pte. "
1114 "vaddr = %lx cpa->vaddr = %lx\n", vaddr,
1115 *cpa->vaddr);
1117 return -EFAULT;
1121 static int __change_page_attr(struct cpa_data *cpa, int primary)
1123 unsigned long address;
1124 int do_split, err;
1125 unsigned int level;
1126 pte_t *kpte, old_pte;
1128 if (cpa->flags & CPA_PAGES_ARRAY) {
1129 struct page *page = cpa->pages[cpa->curpage];
1130 if (unlikely(PageHighMem(page)))
1131 return 0;
1132 address = (unsigned long)page_address(page);
1133 } else if (cpa->flags & CPA_ARRAY)
1134 address = cpa->vaddr[cpa->curpage];
1135 else
1136 address = *cpa->vaddr;
1137 repeat:
1138 kpte = _lookup_address_cpa(cpa, address, &level);
1139 if (!kpte)
1140 return __cpa_process_fault(cpa, address, primary);
1142 old_pte = *kpte;
1143 if (!pte_val(old_pte))
1144 return __cpa_process_fault(cpa, address, primary);
1146 if (level == PG_LEVEL_4K) {
1147 pte_t new_pte;
1148 pgprot_t new_prot = pte_pgprot(old_pte);
1149 unsigned long pfn = pte_pfn(old_pte);
1151 pgprot_val(new_prot) &= ~pgprot_val(cpa->mask_clr);
1152 pgprot_val(new_prot) |= pgprot_val(cpa->mask_set);
1154 new_prot = static_protections(new_prot, address, pfn);
1157 * Set the GLOBAL flags only if the PRESENT flag is
1158 * set otherwise pte_present will return true even on
1159 * a non present pte. The canon_pgprot will clear
1160 * _PAGE_GLOBAL for the ancient hardware that doesn't
1161 * support it.
1163 if (pgprot_val(new_prot) & _PAGE_PRESENT)
1164 pgprot_val(new_prot) |= _PAGE_GLOBAL;
1165 else
1166 pgprot_val(new_prot) &= ~_PAGE_GLOBAL;
1169 * We need to keep the pfn from the existing PTE,
1170 * after all we're only going to change it's attributes
1171 * not the memory it points to
1173 new_pte = pfn_pte(pfn, canon_pgprot(new_prot));
1174 cpa->pfn = pfn;
1176 * Do we really change anything ?
1178 if (pte_val(old_pte) != pte_val(new_pte)) {
1179 set_pte_atomic(kpte, new_pte);
1180 cpa->flags |= CPA_FLUSHTLB;
1182 cpa->numpages = 1;
1183 return 0;
1187 * Check, whether we can keep the large page intact
1188 * and just change the pte:
1190 do_split = try_preserve_large_page(kpte, address, cpa);
1192 * When the range fits into the existing large page,
1193 * return. cp->numpages and cpa->tlbflush have been updated in
1194 * try_large_page:
1196 if (do_split <= 0)
1197 return do_split;
1200 * We have to split the large page:
1202 err = split_large_page(cpa, kpte, address);
1203 if (!err) {
1205 * Do a global flush tlb after splitting the large page
1206 * and before we do the actual change page attribute in the PTE.
1208 * With out this, we violate the TLB application note, that says
1209 * "The TLBs may contain both ordinary and large-page
1210 * translations for a 4-KByte range of linear addresses. This
1211 * may occur if software modifies the paging structures so that
1212 * the page size used for the address range changes. If the two
1213 * translations differ with respect to page frame or attributes
1214 * (e.g., permissions), processor behavior is undefined and may
1215 * be implementation-specific."
1217 * We do this global tlb flush inside the cpa_lock, so that we
1218 * don't allow any other cpu, with stale tlb entries change the
1219 * page attribute in parallel, that also falls into the
1220 * just split large page entry.
1222 flush_tlb_all();
1223 goto repeat;
1226 return err;
1229 static int __change_page_attr_set_clr(struct cpa_data *cpa, int checkalias);
1231 static int cpa_process_alias(struct cpa_data *cpa)
1233 struct cpa_data alias_cpa;
1234 unsigned long laddr = (unsigned long)__va(cpa->pfn << PAGE_SHIFT);
1235 unsigned long vaddr;
1236 int ret;
1238 if (!pfn_range_is_mapped(cpa->pfn, cpa->pfn + 1))
1239 return 0;
1242 * No need to redo, when the primary call touched the direct
1243 * mapping already:
1245 if (cpa->flags & CPA_PAGES_ARRAY) {
1246 struct page *page = cpa->pages[cpa->curpage];
1247 if (unlikely(PageHighMem(page)))
1248 return 0;
1249 vaddr = (unsigned long)page_address(page);
1250 } else if (cpa->flags & CPA_ARRAY)
1251 vaddr = cpa->vaddr[cpa->curpage];
1252 else
1253 vaddr = *cpa->vaddr;
1255 if (!(within(vaddr, PAGE_OFFSET,
1256 PAGE_OFFSET + (max_pfn_mapped << PAGE_SHIFT)))) {
1258 alias_cpa = *cpa;
1259 alias_cpa.vaddr = &laddr;
1260 alias_cpa.flags &= ~(CPA_PAGES_ARRAY | CPA_ARRAY);
1262 ret = __change_page_attr_set_clr(&alias_cpa, 0);
1263 if (ret)
1264 return ret;
1267 #ifdef CONFIG_X86_64
1269 * If the primary call didn't touch the high mapping already
1270 * and the physical address is inside the kernel map, we need
1271 * to touch the high mapped kernel as well:
1273 if (!within(vaddr, (unsigned long)_text, _brk_end) &&
1274 within(cpa->pfn, highmap_start_pfn(), highmap_end_pfn())) {
1275 unsigned long temp_cpa_vaddr = (cpa->pfn << PAGE_SHIFT) +
1276 __START_KERNEL_map - phys_base;
1277 alias_cpa = *cpa;
1278 alias_cpa.vaddr = &temp_cpa_vaddr;
1279 alias_cpa.flags &= ~(CPA_PAGES_ARRAY | CPA_ARRAY);
1282 * The high mapping range is imprecise, so ignore the
1283 * return value.
1285 __change_page_attr_set_clr(&alias_cpa, 0);
1287 #endif
1289 return 0;
1292 static int __change_page_attr_set_clr(struct cpa_data *cpa, int checkalias)
1294 int ret, numpages = cpa->numpages;
1296 while (numpages) {
1298 * Store the remaining nr of pages for the large page
1299 * preservation check.
1301 cpa->numpages = numpages;
1302 /* for array changes, we can't use large page */
1303 if (cpa->flags & (CPA_ARRAY | CPA_PAGES_ARRAY))
1304 cpa->numpages = 1;
1306 if (!debug_pagealloc)
1307 spin_lock(&cpa_lock);
1308 ret = __change_page_attr(cpa, checkalias);
1309 if (!debug_pagealloc)
1310 spin_unlock(&cpa_lock);
1311 if (ret)
1312 return ret;
1314 if (checkalias) {
1315 ret = cpa_process_alias(cpa);
1316 if (ret)
1317 return ret;
1321 * Adjust the number of pages with the result of the
1322 * CPA operation. Either a large page has been
1323 * preserved or a single page update happened.
1325 BUG_ON(cpa->numpages > numpages);
1326 numpages -= cpa->numpages;
1327 if (cpa->flags & (CPA_PAGES_ARRAY | CPA_ARRAY))
1328 cpa->curpage++;
1329 else
1330 *cpa->vaddr += cpa->numpages * PAGE_SIZE;
1333 return 0;
1336 static int change_page_attr_set_clr(unsigned long *addr, int numpages,
1337 pgprot_t mask_set, pgprot_t mask_clr,
1338 int force_split, int in_flag,
1339 struct page **pages)
1341 struct cpa_data cpa;
1342 int ret, cache, checkalias;
1343 unsigned long baddr = 0;
1345 memset(&cpa, 0, sizeof(cpa));
1348 * Check, if we are requested to change a not supported
1349 * feature:
1351 mask_set = canon_pgprot(mask_set);
1352 mask_clr = canon_pgprot(mask_clr);
1353 if (!pgprot_val(mask_set) && !pgprot_val(mask_clr) && !force_split)
1354 return 0;
1356 /* Ensure we are PAGE_SIZE aligned */
1357 if (in_flag & CPA_ARRAY) {
1358 int i;
1359 for (i = 0; i < numpages; i++) {
1360 if (addr[i] & ~PAGE_MASK) {
1361 addr[i] &= PAGE_MASK;
1362 WARN_ON_ONCE(1);
1365 } else if (!(in_flag & CPA_PAGES_ARRAY)) {
1367 * in_flag of CPA_PAGES_ARRAY implies it is aligned.
1368 * No need to cehck in that case
1370 if (*addr & ~PAGE_MASK) {
1371 *addr &= PAGE_MASK;
1373 * People should not be passing in unaligned addresses:
1375 WARN_ON_ONCE(1);
1378 * Save address for cache flush. *addr is modified in the call
1379 * to __change_page_attr_set_clr() below.
1381 baddr = *addr;
1384 /* Must avoid aliasing mappings in the highmem code */
1385 kmap_flush_unused();
1387 vm_unmap_aliases();
1389 cpa.vaddr = addr;
1390 cpa.pages = pages;
1391 cpa.numpages = numpages;
1392 cpa.mask_set = mask_set;
1393 cpa.mask_clr = mask_clr;
1394 cpa.flags = 0;
1395 cpa.curpage = 0;
1396 cpa.force_split = force_split;
1398 if (in_flag & (CPA_ARRAY | CPA_PAGES_ARRAY))
1399 cpa.flags |= in_flag;
1401 /* No alias checking for _NX bit modifications */
1402 checkalias = (pgprot_val(mask_set) | pgprot_val(mask_clr)) != _PAGE_NX;
1404 ret = __change_page_attr_set_clr(&cpa, checkalias);
1407 * Check whether we really changed something:
1409 if (!(cpa.flags & CPA_FLUSHTLB))
1410 goto out;
1413 * No need to flush, when we did not set any of the caching
1414 * attributes:
1416 cache = !!pgprot2cachemode(mask_set);
1419 * On success we use CLFLUSH, when the CPU supports it to
1420 * avoid the WBINVD. If the CPU does not support it and in the
1421 * error case we fall back to cpa_flush_all (which uses
1422 * WBINVD):
1424 if (!ret && cpu_has_clflush) {
1425 if (cpa.flags & (CPA_PAGES_ARRAY | CPA_ARRAY)) {
1426 cpa_flush_array(addr, numpages, cache,
1427 cpa.flags, pages);
1428 } else
1429 cpa_flush_range(baddr, numpages, cache);
1430 } else
1431 cpa_flush_all(cache);
1433 out:
1434 return ret;
1437 static inline int change_page_attr_set(unsigned long *addr, int numpages,
1438 pgprot_t mask, int array)
1440 return change_page_attr_set_clr(addr, numpages, mask, __pgprot(0), 0,
1441 (array ? CPA_ARRAY : 0), NULL);
1444 static inline int change_page_attr_clear(unsigned long *addr, int numpages,
1445 pgprot_t mask, int array)
1447 return change_page_attr_set_clr(addr, numpages, __pgprot(0), mask, 0,
1448 (array ? CPA_ARRAY : 0), NULL);
1451 static inline int cpa_set_pages_array(struct page **pages, int numpages,
1452 pgprot_t mask)
1454 return change_page_attr_set_clr(NULL, numpages, mask, __pgprot(0), 0,
1455 CPA_PAGES_ARRAY, pages);
1458 static inline int cpa_clear_pages_array(struct page **pages, int numpages,
1459 pgprot_t mask)
1461 return change_page_attr_set_clr(NULL, numpages, __pgprot(0), mask, 0,
1462 CPA_PAGES_ARRAY, pages);
1465 int _set_memory_uc(unsigned long addr, int numpages)
1468 * for now UC MINUS. see comments in ioremap_nocache()
1469 * If you really need strong UC use ioremap_uc(), but note
1470 * that you cannot override IO areas with set_memory_*() as
1471 * these helpers cannot work with IO memory.
1473 return change_page_attr_set(&addr, numpages,
1474 cachemode2pgprot(_PAGE_CACHE_MODE_UC_MINUS),
1478 int set_memory_uc(unsigned long addr, int numpages)
1480 int ret;
1483 * for now UC MINUS. see comments in ioremap_nocache()
1485 ret = reserve_memtype(__pa(addr), __pa(addr) + numpages * PAGE_SIZE,
1486 _PAGE_CACHE_MODE_UC_MINUS, NULL);
1487 if (ret)
1488 goto out_err;
1490 ret = _set_memory_uc(addr, numpages);
1491 if (ret)
1492 goto out_free;
1494 return 0;
1496 out_free:
1497 free_memtype(__pa(addr), __pa(addr) + numpages * PAGE_SIZE);
1498 out_err:
1499 return ret;
1501 EXPORT_SYMBOL(set_memory_uc);
1503 static int _set_memory_array(unsigned long *addr, int addrinarray,
1504 enum page_cache_mode new_type)
1506 enum page_cache_mode set_type;
1507 int i, j;
1508 int ret;
1510 for (i = 0; i < addrinarray; i++) {
1511 ret = reserve_memtype(__pa(addr[i]), __pa(addr[i]) + PAGE_SIZE,
1512 new_type, NULL);
1513 if (ret)
1514 goto out_free;
1517 /* If WC, set to UC- first and then WC */
1518 set_type = (new_type == _PAGE_CACHE_MODE_WC) ?
1519 _PAGE_CACHE_MODE_UC_MINUS : new_type;
1521 ret = change_page_attr_set(addr, addrinarray,
1522 cachemode2pgprot(set_type), 1);
1524 if (!ret && new_type == _PAGE_CACHE_MODE_WC)
1525 ret = change_page_attr_set_clr(addr, addrinarray,
1526 cachemode2pgprot(
1527 _PAGE_CACHE_MODE_WC),
1528 __pgprot(_PAGE_CACHE_MASK),
1529 0, CPA_ARRAY, NULL);
1530 if (ret)
1531 goto out_free;
1533 return 0;
1535 out_free:
1536 for (j = 0; j < i; j++)
1537 free_memtype(__pa(addr[j]), __pa(addr[j]) + PAGE_SIZE);
1539 return ret;
1542 int set_memory_array_uc(unsigned long *addr, int addrinarray)
1544 return _set_memory_array(addr, addrinarray, _PAGE_CACHE_MODE_UC_MINUS);
1546 EXPORT_SYMBOL(set_memory_array_uc);
1548 int set_memory_array_wc(unsigned long *addr, int addrinarray)
1550 return _set_memory_array(addr, addrinarray, _PAGE_CACHE_MODE_WC);
1552 EXPORT_SYMBOL(set_memory_array_wc);
1554 int set_memory_array_wt(unsigned long *addr, int addrinarray)
1556 return _set_memory_array(addr, addrinarray, _PAGE_CACHE_MODE_WT);
1558 EXPORT_SYMBOL_GPL(set_memory_array_wt);
1560 int _set_memory_wc(unsigned long addr, int numpages)
1562 int ret;
1563 unsigned long addr_copy = addr;
1565 ret = change_page_attr_set(&addr, numpages,
1566 cachemode2pgprot(_PAGE_CACHE_MODE_UC_MINUS),
1568 if (!ret) {
1569 ret = change_page_attr_set_clr(&addr_copy, numpages,
1570 cachemode2pgprot(
1571 _PAGE_CACHE_MODE_WC),
1572 __pgprot(_PAGE_CACHE_MASK),
1573 0, 0, NULL);
1575 return ret;
1578 int set_memory_wc(unsigned long addr, int numpages)
1580 int ret;
1582 ret = reserve_memtype(__pa(addr), __pa(addr) + numpages * PAGE_SIZE,
1583 _PAGE_CACHE_MODE_WC, NULL);
1584 if (ret)
1585 return ret;
1587 ret = _set_memory_wc(addr, numpages);
1588 if (ret)
1589 free_memtype(__pa(addr), __pa(addr) + numpages * PAGE_SIZE);
1591 return ret;
1593 EXPORT_SYMBOL(set_memory_wc);
1595 int _set_memory_wt(unsigned long addr, int numpages)
1597 return change_page_attr_set(&addr, numpages,
1598 cachemode2pgprot(_PAGE_CACHE_MODE_WT), 0);
1601 int set_memory_wt(unsigned long addr, int numpages)
1603 int ret;
1605 ret = reserve_memtype(__pa(addr), __pa(addr) + numpages * PAGE_SIZE,
1606 _PAGE_CACHE_MODE_WT, NULL);
1607 if (ret)
1608 return ret;
1610 ret = _set_memory_wt(addr, numpages);
1611 if (ret)
1612 free_memtype(__pa(addr), __pa(addr) + numpages * PAGE_SIZE);
1614 return ret;
1616 EXPORT_SYMBOL_GPL(set_memory_wt);
1618 int _set_memory_wb(unsigned long addr, int numpages)
1620 /* WB cache mode is hard wired to all cache attribute bits being 0 */
1621 return change_page_attr_clear(&addr, numpages,
1622 __pgprot(_PAGE_CACHE_MASK), 0);
1625 int set_memory_wb(unsigned long addr, int numpages)
1627 int ret;
1629 ret = _set_memory_wb(addr, numpages);
1630 if (ret)
1631 return ret;
1633 free_memtype(__pa(addr), __pa(addr) + numpages * PAGE_SIZE);
1634 return 0;
1636 EXPORT_SYMBOL(set_memory_wb);
1638 int set_memory_array_wb(unsigned long *addr, int addrinarray)
1640 int i;
1641 int ret;
1643 /* WB cache mode is hard wired to all cache attribute bits being 0 */
1644 ret = change_page_attr_clear(addr, addrinarray,
1645 __pgprot(_PAGE_CACHE_MASK), 1);
1646 if (ret)
1647 return ret;
1649 for (i = 0; i < addrinarray; i++)
1650 free_memtype(__pa(addr[i]), __pa(addr[i]) + PAGE_SIZE);
1652 return 0;
1654 EXPORT_SYMBOL(set_memory_array_wb);
1656 int set_memory_x(unsigned long addr, int numpages)
1658 if (!(__supported_pte_mask & _PAGE_NX))
1659 return 0;
1661 return change_page_attr_clear(&addr, numpages, __pgprot(_PAGE_NX), 0);
1663 EXPORT_SYMBOL(set_memory_x);
1665 int set_memory_nx(unsigned long addr, int numpages)
1667 if (!(__supported_pte_mask & _PAGE_NX))
1668 return 0;
1670 return change_page_attr_set(&addr, numpages, __pgprot(_PAGE_NX), 0);
1672 EXPORT_SYMBOL(set_memory_nx);
1674 int set_memory_ro(unsigned long addr, int numpages)
1676 return change_page_attr_clear(&addr, numpages, __pgprot(_PAGE_RW), 0);
1679 int set_memory_rw(unsigned long addr, int numpages)
1681 return change_page_attr_set(&addr, numpages, __pgprot(_PAGE_RW), 0);
1684 int set_memory_np(unsigned long addr, int numpages)
1686 return change_page_attr_clear(&addr, numpages, __pgprot(_PAGE_PRESENT), 0);
1689 int set_memory_4k(unsigned long addr, int numpages)
1691 return change_page_attr_set_clr(&addr, numpages, __pgprot(0),
1692 __pgprot(0), 1, 0, NULL);
1695 int set_pages_uc(struct page *page, int numpages)
1697 unsigned long addr = (unsigned long)page_address(page);
1699 return set_memory_uc(addr, numpages);
1701 EXPORT_SYMBOL(set_pages_uc);
1703 static int _set_pages_array(struct page **pages, int addrinarray,
1704 enum page_cache_mode new_type)
1706 unsigned long start;
1707 unsigned long end;
1708 enum page_cache_mode set_type;
1709 int i;
1710 int free_idx;
1711 int ret;
1713 for (i = 0; i < addrinarray; i++) {
1714 if (PageHighMem(pages[i]))
1715 continue;
1716 start = page_to_pfn(pages[i]) << PAGE_SHIFT;
1717 end = start + PAGE_SIZE;
1718 if (reserve_memtype(start, end, new_type, NULL))
1719 goto err_out;
1722 /* If WC, set to UC- first and then WC */
1723 set_type = (new_type == _PAGE_CACHE_MODE_WC) ?
1724 _PAGE_CACHE_MODE_UC_MINUS : new_type;
1726 ret = cpa_set_pages_array(pages, addrinarray,
1727 cachemode2pgprot(set_type));
1728 if (!ret && new_type == _PAGE_CACHE_MODE_WC)
1729 ret = change_page_attr_set_clr(NULL, addrinarray,
1730 cachemode2pgprot(
1731 _PAGE_CACHE_MODE_WC),
1732 __pgprot(_PAGE_CACHE_MASK),
1733 0, CPA_PAGES_ARRAY, pages);
1734 if (ret)
1735 goto err_out;
1736 return 0; /* Success */
1737 err_out:
1738 free_idx = i;
1739 for (i = 0; i < free_idx; i++) {
1740 if (PageHighMem(pages[i]))
1741 continue;
1742 start = page_to_pfn(pages[i]) << PAGE_SHIFT;
1743 end = start + PAGE_SIZE;
1744 free_memtype(start, end);
1746 return -EINVAL;
1749 int set_pages_array_uc(struct page **pages, int addrinarray)
1751 return _set_pages_array(pages, addrinarray, _PAGE_CACHE_MODE_UC_MINUS);
1753 EXPORT_SYMBOL(set_pages_array_uc);
1755 int set_pages_array_wc(struct page **pages, int addrinarray)
1757 return _set_pages_array(pages, addrinarray, _PAGE_CACHE_MODE_WC);
1759 EXPORT_SYMBOL(set_pages_array_wc);
1761 int set_pages_array_wt(struct page **pages, int addrinarray)
1763 return _set_pages_array(pages, addrinarray, _PAGE_CACHE_MODE_WT);
1765 EXPORT_SYMBOL_GPL(set_pages_array_wt);
1767 int set_pages_wb(struct page *page, int numpages)
1769 unsigned long addr = (unsigned long)page_address(page);
1771 return set_memory_wb(addr, numpages);
1773 EXPORT_SYMBOL(set_pages_wb);
1775 int set_pages_array_wb(struct page **pages, int addrinarray)
1777 int retval;
1778 unsigned long start;
1779 unsigned long end;
1780 int i;
1782 /* WB cache mode is hard wired to all cache attribute bits being 0 */
1783 retval = cpa_clear_pages_array(pages, addrinarray,
1784 __pgprot(_PAGE_CACHE_MASK));
1785 if (retval)
1786 return retval;
1788 for (i = 0; i < addrinarray; i++) {
1789 if (PageHighMem(pages[i]))
1790 continue;
1791 start = page_to_pfn(pages[i]) << PAGE_SHIFT;
1792 end = start + PAGE_SIZE;
1793 free_memtype(start, end);
1796 return 0;
1798 EXPORT_SYMBOL(set_pages_array_wb);
1800 int set_pages_x(struct page *page, int numpages)
1802 unsigned long addr = (unsigned long)page_address(page);
1804 return set_memory_x(addr, numpages);
1806 EXPORT_SYMBOL(set_pages_x);
1808 int set_pages_nx(struct page *page, int numpages)
1810 unsigned long addr = (unsigned long)page_address(page);
1812 return set_memory_nx(addr, numpages);
1814 EXPORT_SYMBOL(set_pages_nx);
1816 int set_pages_ro(struct page *page, int numpages)
1818 unsigned long addr = (unsigned long)page_address(page);
1820 return set_memory_ro(addr, numpages);
1823 int set_pages_rw(struct page *page, int numpages)
1825 unsigned long addr = (unsigned long)page_address(page);
1827 return set_memory_rw(addr, numpages);
1830 #ifdef CONFIG_DEBUG_PAGEALLOC
1832 static int __set_pages_p(struct page *page, int numpages)
1834 unsigned long tempaddr = (unsigned long) page_address(page);
1835 struct cpa_data cpa = { .vaddr = &tempaddr,
1836 .pgd = NULL,
1837 .numpages = numpages,
1838 .mask_set = __pgprot(_PAGE_PRESENT | _PAGE_RW),
1839 .mask_clr = __pgprot(0),
1840 .flags = 0};
1843 * No alias checking needed for setting present flag. otherwise,
1844 * we may need to break large pages for 64-bit kernel text
1845 * mappings (this adds to complexity if we want to do this from
1846 * atomic context especially). Let's keep it simple!
1848 return __change_page_attr_set_clr(&cpa, 0);
1851 static int __set_pages_np(struct page *page, int numpages)
1853 unsigned long tempaddr = (unsigned long) page_address(page);
1854 struct cpa_data cpa = { .vaddr = &tempaddr,
1855 .pgd = NULL,
1856 .numpages = numpages,
1857 .mask_set = __pgprot(0),
1858 .mask_clr = __pgprot(_PAGE_PRESENT | _PAGE_RW),
1859 .flags = 0};
1862 * No alias checking needed for setting not present flag. otherwise,
1863 * we may need to break large pages for 64-bit kernel text
1864 * mappings (this adds to complexity if we want to do this from
1865 * atomic context especially). Let's keep it simple!
1867 return __change_page_attr_set_clr(&cpa, 0);
1870 void __kernel_map_pages(struct page *page, int numpages, int enable)
1872 if (PageHighMem(page))
1873 return;
1874 if (!enable) {
1875 debug_check_no_locks_freed(page_address(page),
1876 numpages * PAGE_SIZE);
1880 * The return value is ignored as the calls cannot fail.
1881 * Large pages for identity mappings are not used at boot time
1882 * and hence no memory allocations during large page split.
1884 if (enable)
1885 __set_pages_p(page, numpages);
1886 else
1887 __set_pages_np(page, numpages);
1890 * We should perform an IPI and flush all tlbs,
1891 * but that can deadlock->flush only current cpu:
1893 __flush_tlb_all();
1895 arch_flush_lazy_mmu_mode();
1898 #ifdef CONFIG_HIBERNATION
1900 bool kernel_page_present(struct page *page)
1902 unsigned int level;
1903 pte_t *pte;
1905 if (PageHighMem(page))
1906 return false;
1908 pte = lookup_address((unsigned long)page_address(page), &level);
1909 return (pte_val(*pte) & _PAGE_PRESENT);
1912 #endif /* CONFIG_HIBERNATION */
1914 #endif /* CONFIG_DEBUG_PAGEALLOC */
1916 int kernel_map_pages_in_pgd(pgd_t *pgd, u64 pfn, unsigned long address,
1917 unsigned numpages, unsigned long page_flags)
1919 int retval = -EINVAL;
1921 struct cpa_data cpa = {
1922 .vaddr = &address,
1923 .pfn = pfn,
1924 .pgd = pgd,
1925 .numpages = numpages,
1926 .mask_set = __pgprot(0),
1927 .mask_clr = __pgprot(0),
1928 .flags = 0,
1931 if (!(__supported_pte_mask & _PAGE_NX))
1932 goto out;
1934 if (!(page_flags & _PAGE_NX))
1935 cpa.mask_clr = __pgprot(_PAGE_NX);
1937 cpa.mask_set = __pgprot(_PAGE_PRESENT | page_flags);
1939 retval = __change_page_attr_set_clr(&cpa, 0);
1940 __flush_tlb_all();
1942 out:
1943 return retval;
1946 void kernel_unmap_pages_in_pgd(pgd_t *root, unsigned long address,
1947 unsigned numpages)
1949 unmap_pgd_range(root, address, address + (numpages << PAGE_SHIFT));
1953 * The testcases use internal knowledge of the implementation that shouldn't
1954 * be exposed to the rest of the kernel. Include these directly here.
1956 #ifdef CONFIG_CPA_DEBUG
1957 #include "pageattr-test.c"
1958 #endif