4 * Watchdog driver for the TI OMAP 16xx & 24xx/34xx 32KHz (non-secure) watchdog
6 * Author: MontaVista Software, Inc.
7 * <gdavis@mvista.com> or <source@mvista.com>
9 * 2003 (c) MontaVista Software, Inc. This file is licensed under the
10 * terms of the GNU General Public License version 2. This program is
11 * licensed "as is" without any warranty of any kind, whether express
16 * 20030527: George G. Davis <gdavis@mvista.com>
17 * Initially based on linux-2.4.19-rmk7-pxa1/drivers/char/sa1100_wdt.c
18 * (c) Copyright 2000 Oleg Drokin <green@crimea.edu>
19 * Based on SoftDog driver by Alan Cox <alan@lxorguk.ukuu.org.uk>
21 * Copyright (c) 2004 Texas Instruments.
22 * 1. Modified to support OMAP1610 32-KHz watchdog timer
23 * 2. Ported to 2.6 kernel
25 * Copyright (c) 2005 David Brownell
26 * Use the driver model and standard identifiers; handle bigger timeouts.
29 #define pr_fmt(fmt) KBUILD_MODNAME ": " fmt
31 #include <linux/module.h>
32 #include <linux/types.h>
33 #include <linux/kernel.h>
36 #include <linux/miscdevice.h>
37 #include <linux/watchdog.h>
38 #include <linux/reboot.h>
39 #include <linux/init.h>
40 #include <linux/err.h>
41 #include <linux/platform_device.h>
42 #include <linux/moduleparam.h>
43 #include <linux/bitops.h>
45 #include <linux/uaccess.h>
46 #include <linux/slab.h>
47 #include <linux/pm_runtime.h>
48 #include <mach/hardware.h>
49 #include <plat/prcm.h>
53 static struct platform_device
*omap_wdt_dev
;
55 static unsigned timer_margin
;
56 module_param(timer_margin
, uint
, 0);
57 MODULE_PARM_DESC(timer_margin
, "initial watchdog timeout (in seconds)");
59 static unsigned int wdt_trgr_pattern
= 0x1234;
60 static DEFINE_SPINLOCK(wdt_lock
);
63 void __iomem
*base
; /* physical */
67 struct miscdevice omap_wdt_miscdev
;
70 static void omap_wdt_ping(struct omap_wdt_dev
*wdev
)
72 void __iomem
*base
= wdev
->base
;
74 /* wait for posted write to complete */
75 while ((__raw_readl(base
+ OMAP_WATCHDOG_WPS
)) & 0x08)
78 wdt_trgr_pattern
= ~wdt_trgr_pattern
;
79 __raw_writel(wdt_trgr_pattern
, (base
+ OMAP_WATCHDOG_TGR
));
81 /* wait for posted write to complete */
82 while ((__raw_readl(base
+ OMAP_WATCHDOG_WPS
)) & 0x08)
84 /* reloaded WCRR from WLDR */
87 static void omap_wdt_enable(struct omap_wdt_dev
*wdev
)
89 void __iomem
*base
= wdev
->base
;
91 /* Sequence to enable the watchdog */
92 __raw_writel(0xBBBB, base
+ OMAP_WATCHDOG_SPR
);
93 while ((__raw_readl(base
+ OMAP_WATCHDOG_WPS
)) & 0x10)
96 __raw_writel(0x4444, base
+ OMAP_WATCHDOG_SPR
);
97 while ((__raw_readl(base
+ OMAP_WATCHDOG_WPS
)) & 0x10)
101 static void omap_wdt_disable(struct omap_wdt_dev
*wdev
)
103 void __iomem
*base
= wdev
->base
;
105 /* sequence required to disable watchdog */
106 __raw_writel(0xAAAA, base
+ OMAP_WATCHDOG_SPR
); /* TIMER_MODE */
107 while (__raw_readl(base
+ OMAP_WATCHDOG_WPS
) & 0x10)
110 __raw_writel(0x5555, base
+ OMAP_WATCHDOG_SPR
); /* TIMER_MODE */
111 while (__raw_readl(base
+ OMAP_WATCHDOG_WPS
) & 0x10)
115 static void omap_wdt_adjust_timeout(unsigned new_timeout
)
117 if (new_timeout
< TIMER_MARGIN_MIN
)
118 new_timeout
= TIMER_MARGIN_DEFAULT
;
119 if (new_timeout
> TIMER_MARGIN_MAX
)
120 new_timeout
= TIMER_MARGIN_MAX
;
121 timer_margin
= new_timeout
;
124 static void omap_wdt_set_timeout(struct omap_wdt_dev
*wdev
)
126 u32 pre_margin
= GET_WLDR_VAL(timer_margin
);
127 void __iomem
*base
= wdev
->base
;
129 /* just count up at 32 KHz */
130 while (__raw_readl(base
+ OMAP_WATCHDOG_WPS
) & 0x04)
133 __raw_writel(pre_margin
, base
+ OMAP_WATCHDOG_LDR
);
134 while (__raw_readl(base
+ OMAP_WATCHDOG_WPS
) & 0x04)
139 * Allow only one task to hold it open
141 static int omap_wdt_open(struct inode
*inode
, struct file
*file
)
143 struct omap_wdt_dev
*wdev
= platform_get_drvdata(omap_wdt_dev
);
144 void __iomem
*base
= wdev
->base
;
146 if (test_and_set_bit(1, (unsigned long *)&(wdev
->omap_wdt_users
)))
149 pm_runtime_get_sync(wdev
->dev
);
151 /* initialize prescaler */
152 while (__raw_readl(base
+ OMAP_WATCHDOG_WPS
) & 0x01)
155 __raw_writel((1 << 5) | (PTV
<< 2), base
+ OMAP_WATCHDOG_CNTRL
);
156 while (__raw_readl(base
+ OMAP_WATCHDOG_WPS
) & 0x01)
159 file
->private_data
= (void *) wdev
;
161 omap_wdt_set_timeout(wdev
);
162 omap_wdt_ping(wdev
); /* trigger loading of new timeout value */
163 omap_wdt_enable(wdev
);
165 return nonseekable_open(inode
, file
);
168 static int omap_wdt_release(struct inode
*inode
, struct file
*file
)
170 struct omap_wdt_dev
*wdev
= file
->private_data
;
173 * Shut off the timer unless NOWAYOUT is defined.
175 #ifndef CONFIG_WATCHDOG_NOWAYOUT
176 omap_wdt_disable(wdev
);
178 pm_runtime_put_sync(wdev
->dev
);
180 pr_crit("Unexpected close, not stopping!\n");
182 wdev
->omap_wdt_users
= 0;
187 static ssize_t
omap_wdt_write(struct file
*file
, const char __user
*data
,
188 size_t len
, loff_t
*ppos
)
190 struct omap_wdt_dev
*wdev
= file
->private_data
;
192 /* Refresh LOAD_TIME. */
194 spin_lock(&wdt_lock
);
196 spin_unlock(&wdt_lock
);
201 static long omap_wdt_ioctl(struct file
*file
, unsigned int cmd
,
204 struct omap_wdt_dev
*wdev
;
206 static const struct watchdog_info ident
= {
207 .identity
= "OMAP Watchdog",
208 .options
= WDIOF_SETTIMEOUT
,
209 .firmware_version
= 0,
212 wdev
= file
->private_data
;
215 case WDIOC_GETSUPPORT
:
216 return copy_to_user((struct watchdog_info __user
*)arg
, &ident
,
218 case WDIOC_GETSTATUS
:
219 return put_user(0, (int __user
*)arg
);
220 case WDIOC_GETBOOTSTATUS
:
221 if (cpu_is_omap16xx())
222 return put_user(__raw_readw(ARM_SYSST
),
224 if (cpu_is_omap24xx())
225 return put_user(omap_prcm_get_reset_sources(),
227 return put_user(0, (int __user
*)arg
);
228 case WDIOC_KEEPALIVE
:
229 spin_lock(&wdt_lock
);
231 spin_unlock(&wdt_lock
);
233 case WDIOC_SETTIMEOUT
:
234 if (get_user(new_margin
, (int __user
*)arg
))
236 omap_wdt_adjust_timeout(new_margin
);
238 spin_lock(&wdt_lock
);
239 omap_wdt_disable(wdev
);
240 omap_wdt_set_timeout(wdev
);
241 omap_wdt_enable(wdev
);
244 spin_unlock(&wdt_lock
);
246 case WDIOC_GETTIMEOUT
:
247 return put_user(timer_margin
, (int __user
*)arg
);
253 static const struct file_operations omap_wdt_fops
= {
254 .owner
= THIS_MODULE
,
255 .write
= omap_wdt_write
,
256 .unlocked_ioctl
= omap_wdt_ioctl
,
257 .open
= omap_wdt_open
,
258 .release
= omap_wdt_release
,
262 static int __devinit
omap_wdt_probe(struct platform_device
*pdev
)
264 struct resource
*res
, *mem
;
265 struct omap_wdt_dev
*wdev
;
268 /* reserve static register mappings */
269 res
= platform_get_resource(pdev
, IORESOURCE_MEM
, 0);
272 goto err_get_resource
;
280 mem
= request_mem_region(res
->start
, resource_size(res
), pdev
->name
);
286 wdev
= kzalloc(sizeof(struct omap_wdt_dev
), GFP_KERNEL
);
292 wdev
->omap_wdt_users
= 0;
294 wdev
->dev
= &pdev
->dev
;
296 wdev
->base
= ioremap(res
->start
, resource_size(res
));
302 platform_set_drvdata(pdev
, wdev
);
304 pm_runtime_enable(wdev
->dev
);
305 pm_runtime_get_sync(wdev
->dev
);
307 omap_wdt_disable(wdev
);
308 omap_wdt_adjust_timeout(timer_margin
);
310 wdev
->omap_wdt_miscdev
.parent
= &pdev
->dev
;
311 wdev
->omap_wdt_miscdev
.minor
= WATCHDOG_MINOR
;
312 wdev
->omap_wdt_miscdev
.name
= "watchdog";
313 wdev
->omap_wdt_miscdev
.fops
= &omap_wdt_fops
;
315 ret
= misc_register(&(wdev
->omap_wdt_miscdev
));
319 pr_info("OMAP Watchdog Timer Rev 0x%02x: initial timeout %d sec\n",
320 __raw_readl(wdev
->base
+ OMAP_WATCHDOG_REV
) & 0xFF,
323 pm_runtime_put_sync(wdev
->dev
);
330 pm_runtime_disable(wdev
->dev
);
331 platform_set_drvdata(pdev
, NULL
);
339 release_mem_region(res
->start
, resource_size(res
));
347 static void omap_wdt_shutdown(struct platform_device
*pdev
)
349 struct omap_wdt_dev
*wdev
= platform_get_drvdata(pdev
);
351 if (wdev
->omap_wdt_users
) {
352 omap_wdt_disable(wdev
);
353 pm_runtime_put_sync(wdev
->dev
);
357 static int __devexit
omap_wdt_remove(struct platform_device
*pdev
)
359 struct omap_wdt_dev
*wdev
= platform_get_drvdata(pdev
);
360 struct resource
*res
= platform_get_resource(pdev
, IORESOURCE_MEM
, 0);
362 pm_runtime_disable(wdev
->dev
);
366 misc_deregister(&(wdev
->omap_wdt_miscdev
));
367 release_mem_region(res
->start
, resource_size(res
));
368 platform_set_drvdata(pdev
, NULL
);
380 /* REVISIT ... not clear this is the best way to handle system suspend; and
381 * it's very inappropriate for selective device suspend (e.g. suspending this
382 * through sysfs rather than by stopping the watchdog daemon). Also, this
383 * may not play well enough with NOWAYOUT...
386 static int omap_wdt_suspend(struct platform_device
*pdev
, pm_message_t state
)
388 struct omap_wdt_dev
*wdev
= platform_get_drvdata(pdev
);
390 if (wdev
->omap_wdt_users
) {
391 omap_wdt_disable(wdev
);
392 pm_runtime_put_sync(wdev
->dev
);
398 static int omap_wdt_resume(struct platform_device
*pdev
)
400 struct omap_wdt_dev
*wdev
= platform_get_drvdata(pdev
);
402 if (wdev
->omap_wdt_users
) {
403 pm_runtime_get_sync(wdev
->dev
);
404 omap_wdt_enable(wdev
);
412 #define omap_wdt_suspend NULL
413 #define omap_wdt_resume NULL
416 static const struct of_device_id omap_wdt_of_match
[] = {
417 { .compatible
= "ti,omap3-wdt", },
420 MODULE_DEVICE_TABLE(of
, omap_wdt_of_match
);
422 static struct platform_driver omap_wdt_driver
= {
423 .probe
= omap_wdt_probe
,
424 .remove
= __devexit_p(omap_wdt_remove
),
425 .shutdown
= omap_wdt_shutdown
,
426 .suspend
= omap_wdt_suspend
,
427 .resume
= omap_wdt_resume
,
429 .owner
= THIS_MODULE
,
431 .of_match_table
= omap_wdt_of_match
,
435 module_platform_driver(omap_wdt_driver
);
437 MODULE_AUTHOR("George G. Davis");
438 MODULE_LICENSE("GPL");
439 MODULE_ALIAS_MISCDEV(WATCHDOG_MINOR
);
440 MODULE_ALIAS("platform:omap_wdt");