drivers/net/ethernet/sfc/nic.h

   1 /****************************************************************************
   2  * Driver for Solarflare Solarstorm network controllers and boards
   3  * Copyright 2005-2006 Fen Systems Ltd.
   4  * Copyright 2006-2011 Solarflare Communications Inc.
   5  *
   6  * This program is free software; you can redistribute it and/or modify it
   7  * under the terms of the GNU General Public License version 2 as published
   8  * by the Free Software Foundation, incorporated herein by reference.
   9  */
  10
  11 #ifndef EFX_NIC_H
  12 #define EFX_NIC_H
  13
  14 #include <linux/net_tstamp.h>
  15 #include <linux/i2c-algo-bit.h>
  16 #include "net_driver.h"
  17 #include "efx.h"
  18 #include "mcdi.h"
  19 #include "spi.h"
  20
  21 /*
  22  * Falcon hardware control
  23  */
  24
  25 enum {
  26         EFX_REV_FALCON_A0 = 0,
  27         EFX_REV_FALCON_A1 = 1,
  28         EFX_REV_FALCON_B0 = 2,
  29         EFX_REV_SIENA_A0 = 3,
  30 };
  31
  32 static inline int efx_nic_rev(struct efx_nic *efx)
  33 {
  34         return efx->type->revision;
  35 }
  36
  37 extern u32 efx_nic_fpga_ver(struct efx_nic *efx);
  38
  39 /* NIC has two interlinked PCI functions for the same port. */
  40 static inline bool efx_nic_is_dual_func(struct efx_nic *efx)
  41 {
  42         return efx_nic_rev(efx) < EFX_REV_FALCON_B0;
  43 }
  44
  45 enum {
  46         PHY_TYPE_NONE = 0,
  47         PHY_TYPE_TXC43128 = 1,
  48         PHY_TYPE_88E1111 = 2,
  49         PHY_TYPE_SFX7101 = 3,
  50         PHY_TYPE_QT2022C2 = 4,
  51         PHY_TYPE_PM8358 = 6,
  52         PHY_TYPE_SFT9001A = 8,
  53         PHY_TYPE_QT2025C = 9,
  54         PHY_TYPE_SFT9001B = 10,
  55 };
  56
  57 #define FALCON_XMAC_LOOPBACKS                   \
  58         ((1 << LOOPBACK_XGMII) |                \
  59          (1 << LOOPBACK_XGXS) |                 \
  60          (1 << LOOPBACK_XAUI))
  61
  62 #define FALCON_GMAC_LOOPBACKS                   \
  63         (1 << LOOPBACK_GMAC)
  64
  65 /* Alignment of PCIe DMA boundaries (4KB) */
  66 #define EFX_PAGE_SIZE   4096
  67 /* Size and alignment of buffer table entries (same) */
  68 #define EFX_BUF_SIZE    EFX_PAGE_SIZE
  69
  70 /**
  71  * struct falcon_board_type - board operations and type information
  72  * @id: Board type id, as found in NVRAM
  73  * @init: Allocate resources and initialise peripheral hardware
  74  * @init_phy: Do board-specific PHY initialisation
  75  * @fini: Shut down hardware and free resources
  76  * @set_id_led: Set state of identifying LED or revert to automatic function
  77  * @monitor: Board-specific health check function
  78  */
  79 struct falcon_board_type {
  80         u8 id;
  81         int (*init) (struct efx_nic *nic);
  82         void (*init_phy) (struct efx_nic *efx);
  83         void (*fini) (struct efx_nic *nic);
  84         void (*set_id_led) (struct efx_nic *efx, enum efx_led_mode mode);
  85         int (*monitor) (struct efx_nic *nic);
  86 };
  87
  88 /**
  89  * struct falcon_board - board information
  90  * @type: Type of board
  91  * @major: Major rev. ('A', 'B' ...)
  92  * @minor: Minor rev. (0, 1, ...)
  93  * @i2c_adap: I2C adapter for on-board peripherals
  94  * @i2c_data: Data for bit-banging algorithm
  95  * @hwmon_client: I2C client for hardware monitor
  96  * @ioexp_client: I2C client for power/port control
  97  */
  98 struct falcon_board {
  99         const struct falcon_board_type *type;
 100         int major;
 101         int minor;
 102         struct i2c_adapter i2c_adap;
 103         struct i2c_algo_bit_data i2c_data;
 104         struct i2c_client *hwmon_client, *ioexp_client;
 105 };
 106
 107 /**
 108  * struct falcon_nic_data - Falcon NIC state
 109  * @pci_dev2: Secondary function of Falcon A
 110  * @board: Board state and functions
 111  * @stats_disable_count: Nest count for disabling statistics fetches
 112  * @stats_pending: Is there a pending DMA of MAC statistics.
 113  * @stats_timer: A timer for regularly fetching MAC statistics.
 114  * @stats_dma_done: Pointer to the flag which indicates DMA completion.
 115  * @spi_flash: SPI flash device
 116  * @spi_eeprom: SPI EEPROM device
 117  * @spi_lock: SPI bus lock
 118  * @mdio_lock: MDIO bus lock
 119  * @xmac_poll_required: XMAC link state needs polling
 120  */
 121 struct falcon_nic_data {
 122         struct pci_dev *pci_dev2;
 123         struct falcon_board board;
 124         unsigned int stats_disable_count;
 125         bool stats_pending;
 126         struct timer_list stats_timer;
 127         u32 *stats_dma_done;
 128         struct efx_spi_device spi_flash;
 129         struct efx_spi_device spi_eeprom;
 130         struct mutex spi_lock;
 131         struct mutex mdio_lock;
 132         bool xmac_poll_required;
 133 };
 134
 135 static inline struct falcon_board *falcon_board(struct efx_nic *efx)
 136 {
 137         struct falcon_nic_data *data = efx->nic_data;
 138         return &data->board;
 139 }
 140
 141 /**
 142  * struct siena_nic_data - Siena NIC state
 143  * @wol_filter_id: Wake-on-LAN packet filter id
 144  */
 145 struct siena_nic_data {
 146         int wol_filter_id;
 147 };
 148
 149 /*
 150  * On the SFC9000 family each port is associated with 1 PCI physical
 151  * function (PF) handled by sfc and a configurable number of virtual
 152  * functions (VFs) that may be handled by some other driver, often in
 153  * a VM guest.  The queue pointer registers are mapped in both PF and
 154  * VF BARs such that an 8K region provides access to a single RX, TX
 155  * and event queue (collectively a Virtual Interface, VI or VNIC).
 156  *
 157  * The PF has access to all 1024 VIs while VFs are mapped to VIs
 158  * according to VI_BASE and VI_SCALE: VF i has access to VIs numbered
 159  * in range [VI_BASE + i << VI_SCALE, VI_BASE + i + 1 << VI_SCALE).
 160  * The number of VIs and the VI_SCALE value are configurable but must
 161  * be established at boot time by firmware.
 162  */
 163
 164 /* Maximum VI_SCALE parameter supported by Siena */
 165 #define EFX_VI_SCALE_MAX 6
 166 /* Base VI to use for SR-IOV. Must be aligned to (1 << EFX_VI_SCALE_MAX),
 167  * so this is the smallest allowed value. */
 168 #define EFX_VI_BASE 128U
 169 /* Maximum number of VFs allowed */
 170 #define EFX_VF_COUNT_MAX 127
 171 /* Limit EVQs on VFs to be only 8k to reduce buffer table reservation */
 172 #define EFX_MAX_VF_EVQ_SIZE 8192UL
 173 /* The number of buffer table entries reserved for each VI on a VF */
 174 #define EFX_VF_BUFTBL_PER_VI                                    \
 175         ((EFX_MAX_VF_EVQ_SIZE + 2 * EFX_MAX_DMAQ_SIZE) *        \
 176          sizeof(efx_qword_t) / EFX_BUF_SIZE)
 177
 178 #ifdef CONFIG_SFC_SRIOV
 179
 180 static inline bool efx_sriov_wanted(struct efx_nic *efx)
 181 {
 182         return efx->vf_count != 0;
 183 }
 184 static inline bool efx_sriov_enabled(struct efx_nic *efx)
 185 {
 186         return efx->vf_init_count != 0;
 187 }
 188 static inline unsigned int efx_vf_size(struct efx_nic *efx)
 189 {
 190         return 1 << efx->vi_scale;
 191 }
 192
 193 extern int efx_init_sriov(void);
 194 extern void efx_sriov_probe(struct efx_nic *efx);
 195 extern int efx_sriov_init(struct efx_nic *efx);
 196 extern void efx_sriov_mac_address_changed(struct efx_nic *efx);
 197 extern void efx_sriov_tx_flush_done(struct efx_nic *efx, efx_qword_t *event);
 198 extern void efx_sriov_rx_flush_done(struct efx_nic *efx, efx_qword_t *event);
 199 extern void efx_sriov_event(struct efx_channel *channel, efx_qword_t *event);
 200 extern void efx_sriov_desc_fetch_err(struct efx_nic *efx, unsigned dmaq);
 201 extern void efx_sriov_flr(struct efx_nic *efx, unsigned flr);
 202 extern void efx_sriov_reset(struct efx_nic *efx);
 203 extern void efx_sriov_fini(struct efx_nic *efx);
 204 extern void efx_fini_sriov(void);
 205
 206 #else
 207
 208 static inline bool efx_sriov_wanted(struct efx_nic *efx) { return false; }
 209 static inline bool efx_sriov_enabled(struct efx_nic *efx) { return false; }
 210 static inline unsigned int efx_vf_size(struct efx_nic *efx) { return 0; }
 211
 212 static inline int efx_init_sriov(void) { return 0; }
 213 static inline void efx_sriov_probe(struct efx_nic *efx) {}
 214 static inline int efx_sriov_init(struct efx_nic *efx) { return -EOPNOTSUPP; }
 215 static inline void efx_sriov_mac_address_changed(struct efx_nic *efx) {}
 216 static inline void efx_sriov_tx_flush_done(struct efx_nic *efx,
 217                                            efx_qword_t *event) {}
 218 static inline void efx_sriov_rx_flush_done(struct efx_nic *efx,
 219                                            efx_qword_t *event) {}
 220 static inline void efx_sriov_event(struct efx_channel *channel,
 221                                    efx_qword_t *event) {}
 222 static inline void efx_sriov_desc_fetch_err(struct efx_nic *efx, unsigned dmaq) {}
 223 static inline void efx_sriov_flr(struct efx_nic *efx, unsigned flr) {}
 224 static inline void efx_sriov_reset(struct efx_nic *efx) {}
 225 static inline void efx_sriov_fini(struct efx_nic *efx) {}
 226 static inline void efx_fini_sriov(void) {}
 227
 228 #endif
 229
 230 extern int efx_sriov_set_vf_mac(struct net_device *dev, int vf, u8 *mac);
 231 extern int efx_sriov_set_vf_vlan(struct net_device *dev, int vf,
 232                                  u16 vlan, u8 qos);
 233 extern int efx_sriov_get_vf_config(struct net_device *dev, int vf,
 234                                    struct ifla_vf_info *ivf);
 235 extern int efx_sriov_set_vf_spoofchk(struct net_device *net_dev, int vf,
 236                                      bool spoofchk);
 237
 238 struct ethtool_ts_info;
 239 extern void efx_ptp_probe(struct efx_nic *efx);
 240 extern int efx_ptp_ioctl(struct efx_nic *efx, struct ifreq *ifr, int cmd);
 241 extern void efx_ptp_get_ts_info(struct efx_nic *efx,
 242                                 struct ethtool_ts_info *ts_info);
 243 extern bool efx_ptp_is_ptp_tx(struct efx_nic *efx, struct sk_buff *skb);
 244 extern int efx_ptp_tx(struct efx_nic *efx, struct sk_buff *skb);
 245 extern void efx_ptp_event(struct efx_nic *efx, efx_qword_t *ev);
 246
 247 extern const struct efx_nic_type falcon_a1_nic_type;
 248 extern const struct efx_nic_type falcon_b0_nic_type;
 249 extern const struct efx_nic_type siena_a0_nic_type;
 250
 251 /**************************************************************************
 252  *
 253  * Externs
 254  *
 255  **************************************************************************
 256  */
 257
 258 extern int falcon_probe_board(struct efx_nic *efx, u16 revision_info);
 259
 260 /* TX data path */
 261 extern int efx_nic_probe_tx(struct efx_tx_queue *tx_queue);
 262 extern void efx_nic_init_tx(struct efx_tx_queue *tx_queue);
 263 extern void efx_nic_fini_tx(struct efx_tx_queue *tx_queue);
 264 extern void efx_nic_remove_tx(struct efx_tx_queue *tx_queue);
 265 extern void efx_nic_push_buffers(struct efx_tx_queue *tx_queue);
 266
 267 /* RX data path */
 268 extern int efx_nic_probe_rx(struct efx_rx_queue *rx_queue);
 269 extern void efx_nic_init_rx(struct efx_rx_queue *rx_queue);
 270 extern void efx_nic_fini_rx(struct efx_rx_queue *rx_queue);
 271 extern void efx_nic_remove_rx(struct efx_rx_queue *rx_queue);
 272 extern void efx_nic_notify_rx_desc(struct efx_rx_queue *rx_queue);
 273 extern void efx_nic_generate_fill_event(struct efx_rx_queue *rx_queue);
 274
 275 /* Event data path */
 276 extern int efx_nic_probe_eventq(struct efx_channel *channel);
 277 extern void efx_nic_init_eventq(struct efx_channel *channel);
 278 extern void efx_nic_fini_eventq(struct efx_channel *channel);
 279 extern void efx_nic_remove_eventq(struct efx_channel *channel);
 280 extern int efx_nic_process_eventq(struct efx_channel *channel, int rx_quota);
 281 extern void efx_nic_eventq_read_ack(struct efx_channel *channel);
 282 extern bool efx_nic_event_present(struct efx_channel *channel);
 283
 284 /* Some statistics are computed as A - B where A and B each increase
 285  * linearly with some hardware counter(s) and the counters are read
 286  * asynchronously.  If the counters contributing to B are always read
 287  * after those contributing to A, the computed value may be lower than
 288  * the true value by some variable amount, and may decrease between
 289  * subsequent computations.
 290  *
 291  * We should never allow statistics to decrease or to exceed the true
 292  * value.  Since the computed value will never be greater than the
 293  * true value, we can achieve this by only storing the computed value
 294  * when it increases.
 295  */
 296 static inline void efx_update_diff_stat(u64 *stat, u64 diff)
 297 {
 298         if ((s64)(diff - *stat) > 0)
 299                 *stat = diff;
 300 }
 301
 302 /* Interrupts and test events */
 303 extern int efx_nic_init_interrupt(struct efx_nic *efx);
 304 extern void efx_nic_enable_interrupts(struct efx_nic *efx);
 305 extern void efx_nic_event_test_start(struct efx_channel *channel);
 306 extern void efx_nic_irq_test_start(struct efx_nic *efx);
 307 extern void efx_nic_disable_interrupts(struct efx_nic *efx);
 308 extern void efx_nic_fini_interrupt(struct efx_nic *efx);
 309 extern irqreturn_t efx_nic_fatal_interrupt(struct efx_nic *efx);
 310 extern irqreturn_t falcon_legacy_interrupt_a1(int irq, void *dev_id);
 311 extern void falcon_irq_ack_a1(struct efx_nic *efx);
 312
 313 static inline int efx_nic_event_test_irq_cpu(struct efx_channel *channel)
 314 {
 315         return ACCESS_ONCE(channel->event_test_cpu);
 316 }
 317 static inline int efx_nic_irq_test_irq_cpu(struct efx_nic *efx)
 318 {
 319         return ACCESS_ONCE(efx->last_irq_cpu);
 320 }
 321
 322 /* Global Resources */
 323 extern int efx_nic_flush_queues(struct efx_nic *efx);
 324 extern void siena_prepare_flush(struct efx_nic *efx);
 325 extern void siena_finish_flush(struct efx_nic *efx);
 326 extern void falcon_start_nic_stats(struct efx_nic *efx);
 327 extern void falcon_stop_nic_stats(struct efx_nic *efx);
 328 extern int falcon_reset_xaui(struct efx_nic *efx);
 329 extern void
 330 efx_nic_dimension_resources(struct efx_nic *efx, unsigned sram_lim_qw);
 331 extern void efx_nic_init_common(struct efx_nic *efx);
 332 extern void efx_nic_push_rx_indir_table(struct efx_nic *efx);
 333
 334 int efx_nic_alloc_buffer(struct efx_nic *efx, struct efx_buffer *buffer,
 335                          unsigned int len);
 336 void efx_nic_free_buffer(struct efx_nic *efx, struct efx_buffer *buffer);
 337
 338 /* Tests */
 339 struct efx_nic_register_test {
 340         unsigned address;
 341         efx_oword_t mask;
 342 };
 343 extern int efx_nic_test_registers(struct efx_nic *efx,
 344                                   const struct efx_nic_register_test *regs,
 345                                   size_t n_regs);
 346
 347 extern size_t efx_nic_get_regs_len(struct efx_nic *efx);
 348 extern void efx_nic_get_regs(struct efx_nic *efx, void *buf);
 349
 350 #define EFX_MAX_FLUSH_TIME 5000
 351
 352 extern void efx_generate_event(struct efx_nic *efx, unsigned int evq,
 353                                efx_qword_t *event);
 354
 355 #endif /* EFX_NIC_H */