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KVM: PPC: Book3S PR: Fix compilation without CONFIG_ALTIVEC
[linux-2.6/btrfs-unstable.git] / arch / powerpc / kvm / book3s_pr.c
blob8d45f185241a6c78f0bd02143a1e07247cef5563
1 /*
2 * Copyright (C) 2009. SUSE Linux Products GmbH. All rights reserved.
3 *
4 * Authors:
5 * Alexander Graf <agraf@suse.de>
6 * Kevin Wolf <mail@kevin-wolf.de>
7 * Paul Mackerras <paulus@samba.org>
8 *
9 * Description:
10 * Functions relating to running KVM on Book 3S processors where
11 * we don't have access to hypervisor mode, and we run the guest
12 * in problem state (user mode).
13 *
14 * This file is derived from arch/powerpc/kvm/44x.c,
15 * by Hollis Blanchard <hollisb@us.ibm.com>.
16 *
17 * This program is free software; you can redistribute it and/or modify
18 * it under the terms of the GNU General Public License, version 2, as
19 * published by the Free Software Foundation.
20 */
21
22 #include <linux/kvm_host.h>
23 #include <linux/export.h>
24 #include <linux/err.h>
25 #include <linux/slab.h>
26
27 #include <asm/reg.h>
28 #include <asm/cputable.h>
29 #include <asm/cacheflush.h>
30 #include <asm/tlbflush.h>
31 #include <asm/uaccess.h>
32 #include <asm/io.h>
33 #include <asm/kvm_ppc.h>
34 #include <asm/kvm_book3s.h>
35 #include <asm/mmu_context.h>
36 #include <asm/switch_to.h>
37 #include <asm/firmware.h>
38 #include <asm/hvcall.h>
39 #include <linux/gfp.h>
40 #include <linux/sched.h>
41 #include <linux/vmalloc.h>
42 #include <linux/highmem.h>
43
44 #include "trace.h"
45
46 /* #define EXIT_DEBUG */
47 /* #define DEBUG_EXT */
48
49 static int kvmppc_handle_ext(struct kvm_vcpu *vcpu, unsigned int exit_nr,
50 ulong msr);
51
52 /* Some compatibility defines */
53 #ifdef CONFIG_PPC_BOOK3S_32
54 #define MSR_USER32 MSR_USER
55 #define MSR_USER64 MSR_USER
56 #define HW_PAGE_SIZE PAGE_SIZE
57 #endif
58
59 void kvmppc_core_vcpu_load(struct kvm_vcpu *vcpu, int cpu)
60 {
61 #ifdef CONFIG_PPC_BOOK3S_64
62 struct kvmppc_book3s_shadow_vcpu *svcpu = svcpu_get(vcpu);
63 memcpy(svcpu->slb, to_book3s(vcpu)->slb_shadow, sizeof(svcpu->slb));
64 memcpy(&get_paca()->shadow_vcpu, to_book3s(vcpu)->shadow_vcpu,
65 sizeof(get_paca()->shadow_vcpu));
66 svcpu->slb_max = to_book3s(vcpu)->slb_shadow_max;
67 svcpu_put(svcpu);
68 #endif
69 vcpu->cpu = smp_processor_id();
70 #ifdef CONFIG_PPC_BOOK3S_32
71 current->thread.kvm_shadow_vcpu = to_book3s(vcpu)->shadow_vcpu;
72 #endif
73 }
74
75 void kvmppc_core_vcpu_put(struct kvm_vcpu *vcpu)
76 {
77 #ifdef CONFIG_PPC_BOOK3S_64
78 struct kvmppc_book3s_shadow_vcpu *svcpu = svcpu_get(vcpu);
79 memcpy(to_book3s(vcpu)->slb_shadow, svcpu->slb, sizeof(svcpu->slb));
80 memcpy(to_book3s(vcpu)->shadow_vcpu, &get_paca()->shadow_vcpu,
81 sizeof(get_paca()->shadow_vcpu));
82 to_book3s(vcpu)->slb_shadow_max = svcpu->slb_max;
83 svcpu_put(svcpu);
84 #endif
85
86 kvmppc_giveup_ext(vcpu, MSR_FP | MSR_VEC | MSR_VSX);
87 vcpu->cpu = -1;
88 }
89
90 int kvmppc_core_check_requests(struct kvm_vcpu *vcpu)
91 {
92 int r = 1; /* Indicate we want to get back into the guest */
93
94 /* We misuse TLB_FLUSH to indicate that we want to clear
95 all shadow cache entries */
96 if (kvm_check_request(KVM_REQ_TLB_FLUSH, vcpu))
97 kvmppc_mmu_pte_flush(vcpu, 0, 0);
98
99 return r;
100 }
101
102 /************* MMU Notifiers *************/
103
104 int kvm_unmap_hva(struct kvm *kvm, unsigned long hva)
105 {
106 trace_kvm_unmap_hva(hva);
107
108 /*
109 * Flush all shadow tlb entries everywhere. This is slow, but
110 * we are 100% sure that we catch the to be unmapped page
111 */
112 kvm_flush_remote_tlbs(kvm);
113
114 return 0;
115 }
116
117 int kvm_unmap_hva_range(struct kvm *kvm, unsigned long start, unsigned long end)
118 {
119 /* kvm_unmap_hva flushes everything anyways */
120 kvm_unmap_hva(kvm, start);
121
122 return 0;
123 }
124
125 int kvm_age_hva(struct kvm *kvm, unsigned long hva)
126 {
127 /* XXX could be more clever ;) */
128 return 0;
129 }
130
131 int kvm_test_age_hva(struct kvm *kvm, unsigned long hva)
132 {
133 /* XXX could be more clever ;) */
134 return 0;
135 }
136
137 void kvm_set_spte_hva(struct kvm *kvm, unsigned long hva, pte_t pte)
138 {
139 /* The page will get remapped properly on its next fault */
140 kvm_unmap_hva(kvm, hva);
141 }
142
143 /*****************************************/
144
145 static void kvmppc_recalc_shadow_msr(struct kvm_vcpu *vcpu)
146 {
147 ulong smsr = vcpu->arch.shared->msr;
148
149 /* Guest MSR values */
150 smsr &= MSR_FE0 | MSR_FE1 | MSR_SF | MSR_SE | MSR_BE;
151 /* Process MSR values */
152 smsr |= MSR_ME | MSR_RI | MSR_IR | MSR_DR | MSR_PR | MSR_EE;
153 /* External providers the guest reserved */
154 smsr |= (vcpu->arch.shared->msr & vcpu->arch.guest_owned_ext);
155 /* 64-bit Process MSR values */
156 #ifdef CONFIG_PPC_BOOK3S_64
157 smsr |= MSR_ISF | MSR_HV;
158 #endif
159 vcpu->arch.shadow_msr = smsr;
160 }
161
162 void kvmppc_set_msr(struct kvm_vcpu *vcpu, u64 msr)
163 {
164 ulong old_msr = vcpu->arch.shared->msr;
165
166 #ifdef EXIT_DEBUG
167 printk(KERN_INFO "KVM: Set MSR to 0x%llx\n", msr);
168 #endif
169
170 msr &= to_book3s(vcpu)->msr_mask;
171 vcpu->arch.shared->msr = msr;
172 kvmppc_recalc_shadow_msr(vcpu);
173
174 if (msr & MSR_POW) {
175 if (!vcpu->arch.pending_exceptions) {
176 kvm_vcpu_block(vcpu);
177 clear_bit(KVM_REQ_UNHALT, &vcpu->requests);
178 vcpu->stat.halt_wakeup++;
179
180 /* Unset POW bit after we woke up */
181 msr &= ~MSR_POW;
182 vcpu->arch.shared->msr = msr;
183 }
184 }
185
186 if ((vcpu->arch.shared->msr & (MSR_PR|MSR_IR|MSR_DR)) !=
187 (old_msr & (MSR_PR|MSR_IR|MSR_DR))) {
188 kvmppc_mmu_flush_segments(vcpu);
189 kvmppc_mmu_map_segment(vcpu, kvmppc_get_pc(vcpu));
190
191 /* Preload magic page segment when in kernel mode */
192 if (!(msr & MSR_PR) && vcpu->arch.magic_page_pa) {
193 struct kvm_vcpu_arch *a = &vcpu->arch;
194
195 if (msr & MSR_DR)
196 kvmppc_mmu_map_segment(vcpu, a->magic_page_ea);
197 else
198 kvmppc_mmu_map_segment(vcpu, a->magic_page_pa);
199 }
200 }
201
202 /*
203 * When switching from 32 to 64-bit, we may have a stale 32-bit
204 * magic page around, we need to flush it. Typically 32-bit magic
205 * page will be instanciated when calling into RTAS. Note: We
206 * assume that such transition only happens while in kernel mode,
207 * ie, we never transition from user 32-bit to kernel 64-bit with
208 * a 32-bit magic page around.
209 */
210 if (vcpu->arch.magic_page_pa &&
211 !(old_msr & MSR_PR) && !(old_msr & MSR_SF) && (msr & MSR_SF)) {
212 /* going from RTAS to normal kernel code */
213 kvmppc_mmu_pte_flush(vcpu, (uint32_t)vcpu->arch.magic_page_pa,
214 ~0xFFFUL);
215 }
216
217 /* Preload FPU if it's enabled */
218 if (vcpu->arch.shared->msr & MSR_FP)
219 kvmppc_handle_ext(vcpu, BOOK3S_INTERRUPT_FP_UNAVAIL, MSR_FP);
220 }
221
222 void kvmppc_set_pvr(struct kvm_vcpu *vcpu, u32 pvr)
223 {
224 u32 host_pvr;
225
226 vcpu->arch.hflags &= ~BOOK3S_HFLAG_SLB;
227 vcpu->arch.pvr = pvr;
228 #ifdef CONFIG_PPC_BOOK3S_64
229 if ((pvr >= 0x330000) && (pvr < 0x70330000)) {
230 kvmppc_mmu_book3s_64_init(vcpu);
231 if (!to_book3s(vcpu)->hior_explicit)
232 to_book3s(vcpu)->hior = 0xfff00000;
233 to_book3s(vcpu)->msr_mask = 0xffffffffffffffffULL;
234 vcpu->arch.cpu_type = KVM_CPU_3S_64;
235 } else
236 #endif
237 {
238 kvmppc_mmu_book3s_32_init(vcpu);
239 if (!to_book3s(vcpu)->hior_explicit)
240 to_book3s(vcpu)->hior = 0;
241 to_book3s(vcpu)->msr_mask = 0xffffffffULL;
242 vcpu->arch.cpu_type = KVM_CPU_3S_32;
243 }
244
245 kvmppc_sanity_check(vcpu);
246
247 /* If we are in hypervisor level on 970, we can tell the CPU to
248 * treat DCBZ as 32 bytes store */
249 vcpu->arch.hflags &= ~BOOK3S_HFLAG_DCBZ32;
250 if (vcpu->arch.mmu.is_dcbz32(vcpu) && (mfmsr() & MSR_HV) &&
251 !strcmp(cur_cpu_spec->platform, "ppc970"))
252 vcpu->arch.hflags |= BOOK3S_HFLAG_DCBZ32;
253
254 /* Cell performs badly if MSR_FEx are set. So let's hope nobody
255 really needs them in a VM on Cell and force disable them. */
256 if (!strcmp(cur_cpu_spec->platform, "ppc-cell-be"))
257 to_book3s(vcpu)->msr_mask &= ~(MSR_FE0 | MSR_FE1);
258
259 #ifdef CONFIG_PPC_BOOK3S_32
260 /* 32 bit Book3S always has 32 byte dcbz */
261 vcpu->arch.hflags |= BOOK3S_HFLAG_DCBZ32;
262 #endif
263
264 /* On some CPUs we can execute paired single operations natively */
265 asm ( "mfpvr %0" : "=r"(host_pvr));
266 switch (host_pvr) {
267 case 0x00080200: /* lonestar 2.0 */
268 case 0x00088202: /* lonestar 2.2 */
269 case 0x70000100: /* gekko 1.0 */
270 case 0x00080100: /* gekko 2.0 */
271 case 0x00083203: /* gekko 2.3a */
272 case 0x00083213: /* gekko 2.3b */
273 case 0x00083204: /* gekko 2.4 */
274 case 0x00083214: /* gekko 2.4e (8SE) - retail HW2 */
275 case 0x00087200: /* broadway */
276 vcpu->arch.hflags |= BOOK3S_HFLAG_NATIVE_PS;
277 /* Enable HID2.PSE - in case we need it later */
278 mtspr(SPRN_HID2_GEKKO, mfspr(SPRN_HID2_GEKKO) | (1 << 29));
279 }
280 }
281
282 /* Book3s_32 CPUs always have 32 bytes cache line size, which Linux assumes. To
283 * make Book3s_32 Linux work on Book3s_64, we have to make sure we trap dcbz to
284 * emulate 32 bytes dcbz length.
285 *
286 * The Book3s_64 inventors also realized this case and implemented a special bit
287 * in the HID5 register, which is a hypervisor ressource. Thus we can't use it.
288 *
289 * My approach here is to patch the dcbz instruction on executing pages.
290 */
291 static void kvmppc_patch_dcbz(struct kvm_vcpu *vcpu, struct kvmppc_pte *pte)
292 {
293 struct page *hpage;
294 u64 hpage_offset;
295 u32 *page;
296 int i;
297
298 hpage = gfn_to_page(vcpu->kvm, pte->raddr >> PAGE_SHIFT);
299 if (is_error_page(hpage))
300 return;
301
302 hpage_offset = pte->raddr & ~PAGE_MASK;
303 hpage_offset &= ~0xFFFULL;
304 hpage_offset /= 4;
305
306 get_page(hpage);
307 page = kmap_atomic(hpage);
308
309 /* patch dcbz into reserved instruction, so we trap */
310 for (i=hpage_offset; i < hpage_offset + (HW_PAGE_SIZE / 4); i++)
311 if ((page[i] & 0xff0007ff) == INS_DCBZ)
312 page[i] &= 0xfffffff7;
313
314 kunmap_atomic(page);
315 put_page(hpage);
316 }
317
318 static int kvmppc_visible_gfn(struct kvm_vcpu *vcpu, gfn_t gfn)
319 {
320 ulong mp_pa = vcpu->arch.magic_page_pa;
321
322 if (!(vcpu->arch.shared->msr & MSR_SF))
323 mp_pa = (uint32_t)mp_pa;
324
325 if (unlikely(mp_pa) &&
326 unlikely((mp_pa & KVM_PAM) >> PAGE_SHIFT == gfn)) {
327 return 1;
328 }
329
330 return kvm_is_visible_gfn(vcpu->kvm, gfn);
331 }
332
333 int kvmppc_handle_pagefault(struct kvm_run *run, struct kvm_vcpu *vcpu,
334 ulong eaddr, int vec)
335 {
336 bool data = (vec == BOOK3S_INTERRUPT_DATA_STORAGE);
337 int r = RESUME_GUEST;
338 int relocated;
339 int page_found = 0;
340 struct kvmppc_pte pte;
341 bool is_mmio = false;
342 bool dr = (vcpu->arch.shared->msr & MSR_DR) ? true : false;
343 bool ir = (vcpu->arch.shared->msr & MSR_IR) ? true : false;
344 u64 vsid;
345
346 relocated = data ? dr : ir;
347
348 /* Resolve real address if translation turned on */
349 if (relocated) {
350 page_found = vcpu->arch.mmu.xlate(vcpu, eaddr, &pte, data);
351 } else {
352 pte.may_execute = true;
353 pte.may_read = true;
354 pte.may_write = true;
355 pte.raddr = eaddr & KVM_PAM;
356 pte.eaddr = eaddr;
357 pte.vpage = eaddr >> 12;
358 }
359
360 switch (vcpu->arch.shared->msr & (MSR_DR|MSR_IR)) {
361 case 0:
362 pte.vpage |= ((u64)VSID_REAL << (SID_SHIFT - 12));
363 break;
364 case MSR_DR:
365 case MSR_IR:
366 vcpu->arch.mmu.esid_to_vsid(vcpu, eaddr >> SID_SHIFT, &vsid);
367
368 if ((vcpu->arch.shared->msr & (MSR_DR|MSR_IR)) == MSR_DR)
369 pte.vpage |= ((u64)VSID_REAL_DR << (SID_SHIFT - 12));
370 else
371 pte.vpage |= ((u64)VSID_REAL_IR << (SID_SHIFT - 12));
372 pte.vpage |= vsid;
373
374 if (vsid == -1)
375 page_found = -EINVAL;
376 break;
377 }
378
379 if (vcpu->arch.mmu.is_dcbz32(vcpu) &&
380 (!(vcpu->arch.hflags & BOOK3S_HFLAG_DCBZ32))) {
381 /*
382 * If we do the dcbz hack, we have to NX on every execution,
383 * so we can patch the executing code. This renders our guest
384 * NX-less.
385 */
386 pte.may_execute = !data;
387 }
388
389 if (page_found == -ENOENT) {
390 /* Page not found in guest PTE entries */
391 struct kvmppc_book3s_shadow_vcpu *svcpu = svcpu_get(vcpu);
392 vcpu->arch.shared->dar = kvmppc_get_fault_dar(vcpu);
393 vcpu->arch.shared->dsisr = svcpu->fault_dsisr;
394 vcpu->arch.shared->msr |=
395 (svcpu->shadow_srr1 & 0x00000000f8000000ULL);
396 svcpu_put(svcpu);
397 kvmppc_book3s_queue_irqprio(vcpu, vec);
398 } else if (page_found == -EPERM) {
399 /* Storage protection */
400 struct kvmppc_book3s_shadow_vcpu *svcpu = svcpu_get(vcpu);
401 vcpu->arch.shared->dar = kvmppc_get_fault_dar(vcpu);
402 vcpu->arch.shared->dsisr = svcpu->fault_dsisr & ~DSISR_NOHPTE;
403 vcpu->arch.shared->dsisr |= DSISR_PROTFAULT;
404 vcpu->arch.shared->msr |=
405 svcpu->shadow_srr1 & 0x00000000f8000000ULL;
406 svcpu_put(svcpu);
407 kvmppc_book3s_queue_irqprio(vcpu, vec);
408 } else if (page_found == -EINVAL) {
409 /* Page not found in guest SLB */
410 vcpu->arch.shared->dar = kvmppc_get_fault_dar(vcpu);
411 kvmppc_book3s_queue_irqprio(vcpu, vec + 0x80);
412 } else if (!is_mmio &&
413 kvmppc_visible_gfn(vcpu, pte.raddr >> PAGE_SHIFT)) {
414 /* The guest's PTE is not mapped yet. Map on the host */
415 kvmppc_mmu_map_page(vcpu, &pte);
416 if (data)
417 vcpu->stat.sp_storage++;
418 else if (vcpu->arch.mmu.is_dcbz32(vcpu) &&
419 (!(vcpu->arch.hflags & BOOK3S_HFLAG_DCBZ32)))
420 kvmppc_patch_dcbz(vcpu, &pte);
421 } else {
422 /* MMIO */
423 vcpu->stat.mmio_exits++;
424 vcpu->arch.paddr_accessed = pte.raddr;
425 vcpu->arch.vaddr_accessed = pte.eaddr;
426 r = kvmppc_emulate_mmio(run, vcpu);
427 if ( r == RESUME_HOST_NV )
428 r = RESUME_HOST;
429 }
430
431 return r;
432 }
433
434 static inline int get_fpr_index(int i)
435 {
436 return i * TS_FPRWIDTH;
437 }
438
439 /* Give up external provider (FPU, Altivec, VSX) */
440 void kvmppc_giveup_ext(struct kvm_vcpu *vcpu, ulong msr)
441 {
442 struct thread_struct *t = &current->thread;
443 u64 *vcpu_fpr = vcpu->arch.fpr;
444 #ifdef CONFIG_VSX
445 u64 *vcpu_vsx = vcpu->arch.vsr;
446 #endif
447 u64 *thread_fpr = (u64*)t->fpr;
448 int i;
449
450 /*
451 * VSX instructions can access FP and vector registers, so if
452 * we are giving up VSX, make sure we give up FP and VMX as well.
453 */
454 if (msr & MSR_VSX)
455 msr |= MSR_FP | MSR_VEC;
456
457 msr &= vcpu->arch.guest_owned_ext;
458 if (!msr)
459 return;
460
461 #ifdef DEBUG_EXT
462 printk(KERN_INFO "Giving up ext 0x%lx\n", msr);
463 #endif
464
465 if (msr & MSR_FP) {
466 /*
467 * Note that on CPUs with VSX, giveup_fpu stores
468 * both the traditional FP registers and the added VSX
469 * registers into thread.fpr[].
470 */
471 if (current->thread.regs->msr & MSR_FP)
472 giveup_fpu(current);
473 for (i = 0; i < ARRAY_SIZE(vcpu->arch.fpr); i++)
474 vcpu_fpr[i] = thread_fpr[get_fpr_index(i)];
475
476 vcpu->arch.fpscr = t->fpscr.val;
477
478 #ifdef CONFIG_VSX
479 if (cpu_has_feature(CPU_FTR_VSX))
480 for (i = 0; i < ARRAY_SIZE(vcpu->arch.vsr) / 2; i++)
481 vcpu_vsx[i] = thread_fpr[get_fpr_index(i) + 1];
482 #endif
483 }
484
485 #ifdef CONFIG_ALTIVEC
486 if (msr & MSR_VEC) {
487 if (current->thread.regs->msr & MSR_VEC)
488 giveup_altivec(current);
489 memcpy(vcpu->arch.vr, t->vr, sizeof(vcpu->arch.vr));
490 vcpu->arch.vscr = t->vscr;
491 }
492 #endif
493
494 vcpu->arch.guest_owned_ext &= ~(msr | MSR_VSX);
495 kvmppc_recalc_shadow_msr(vcpu);
496 }
497
498 static int kvmppc_read_inst(struct kvm_vcpu *vcpu)
499 {
500 ulong srr0 = kvmppc_get_pc(vcpu);
501 u32 last_inst = kvmppc_get_last_inst(vcpu);
502 int ret;
503
504 ret = kvmppc_ld(vcpu, &srr0, sizeof(u32), &last_inst, false);
505 if (ret == -ENOENT) {
506 ulong msr = vcpu->arch.shared->msr;
507
508 msr = kvmppc_set_field(msr, 33, 33, 1);
509 msr = kvmppc_set_field(msr, 34, 36, 0);
510 vcpu->arch.shared->msr = kvmppc_set_field(msr, 42, 47, 0);
511 kvmppc_book3s_queue_irqprio(vcpu, BOOK3S_INTERRUPT_INST_STORAGE);
512 return EMULATE_AGAIN;
513 }
514
515 return EMULATE_DONE;
516 }
517
518 static int kvmppc_check_ext(struct kvm_vcpu *vcpu, unsigned int exit_nr)
519 {
520
521 /* Need to do paired single emulation? */
522 if (!(vcpu->arch.hflags & BOOK3S_HFLAG_PAIRED_SINGLE))
523 return EMULATE_DONE;
524
525 /* Read out the instruction */
526 if (kvmppc_read_inst(vcpu) == EMULATE_DONE)
527 /* Need to emulate */
528 return EMULATE_FAIL;
529
530 return EMULATE_AGAIN;
531 }
532
533 /* Handle external providers (FPU, Altivec, VSX) */
534 static int kvmppc_handle_ext(struct kvm_vcpu *vcpu, unsigned int exit_nr,
535 ulong msr)
536 {
537 struct thread_struct *t = &current->thread;
538 u64 *vcpu_fpr = vcpu->arch.fpr;
539 #ifdef CONFIG_VSX
540 u64 *vcpu_vsx = vcpu->arch.vsr;
541 #endif
542 u64 *thread_fpr = (u64*)t->fpr;
543 int i;
544
545 /* When we have paired singles, we emulate in software */
546 if (vcpu->arch.hflags & BOOK3S_HFLAG_PAIRED_SINGLE)
547 return RESUME_GUEST;
548
549 if (!(vcpu->arch.shared->msr & msr)) {
550 kvmppc_book3s_queue_irqprio(vcpu, exit_nr);
551 return RESUME_GUEST;
552 }
553
554 if (msr == MSR_VSX) {
555 /* No VSX? Give an illegal instruction interrupt */
556 #ifdef CONFIG_VSX
557 if (!cpu_has_feature(CPU_FTR_VSX))
558 #endif
559 {
560 kvmppc_core_queue_program(vcpu, SRR1_PROGILL);
561 return RESUME_GUEST;
562 }
563
564 /*
565 * We have to load up all the FP and VMX registers before
566 * we can let the guest use VSX instructions.
567 */
568 msr = MSR_FP | MSR_VEC | MSR_VSX;
569 }
570
571 /* See if we already own all the ext(s) needed */
572 msr &= ~vcpu->arch.guest_owned_ext;
573 if (!msr)
574 return RESUME_GUEST;
575
576 #ifdef DEBUG_EXT
577 printk(KERN_INFO "Loading up ext 0x%lx\n", msr);
578 #endif
579
580 if (msr & MSR_FP) {
581 for (i = 0; i < ARRAY_SIZE(vcpu->arch.fpr); i++)
582 thread_fpr[get_fpr_index(i)] = vcpu_fpr[i];
583 #ifdef CONFIG_VSX
584 for (i = 0; i < ARRAY_SIZE(vcpu->arch.vsr) / 2; i++)
585 thread_fpr[get_fpr_index(i) + 1] = vcpu_vsx[i];
586 #endif
587 t->fpscr.val = vcpu->arch.fpscr;
588 t->fpexc_mode = 0;
589 kvmppc_load_up_fpu();
590 }
591
592 if (msr & MSR_VEC) {
593 #ifdef CONFIG_ALTIVEC
594 memcpy(t->vr, vcpu->arch.vr, sizeof(vcpu->arch.vr));
595 t->vscr = vcpu->arch.vscr;
596 t->vrsave = -1;
597 kvmppc_load_up_altivec();
598 #endif
599 }
600
601 current->thread.regs->msr |= msr;
602 vcpu->arch.guest_owned_ext |= msr;
603 kvmppc_recalc_shadow_msr(vcpu);
604
605 return RESUME_GUEST;
606 }
607
608 /*
609 * Kernel code using FP or VMX could have flushed guest state to
610 * the thread_struct; if so, get it back now.
611 */
612 static void kvmppc_handle_lost_ext(struct kvm_vcpu *vcpu)
613 {
614 unsigned long lost_ext;
615
616 lost_ext = vcpu->arch.guest_owned_ext & ~current->thread.regs->msr;
617 if (!lost_ext)
618 return;
619
620 if (lost_ext & MSR_FP)
621 kvmppc_load_up_fpu();
622 #ifdef CONFIG_ALTIVEC
623 if (lost_ext & MSR_VEC)
624 kvmppc_load_up_altivec();
625 #endif
626 current->thread.regs->msr |= lost_ext;
627 }
628
629 int kvmppc_handle_exit(struct kvm_run *run, struct kvm_vcpu *vcpu,
630 unsigned int exit_nr)
631 {
632 int r = RESUME_HOST;
633 int s;
634
635 vcpu->stat.sum_exits++;
636
637 run->exit_reason = KVM_EXIT_UNKNOWN;
638 run->ready_for_interrupt_injection = 1;
639
640 /* We get here with MSR.EE=1 */
641
642 trace_kvm_exit(exit_nr, vcpu);
643 kvm_guest_exit();
644
645 switch (exit_nr) {
646 case BOOK3S_INTERRUPT_INST_STORAGE:
647 {
648 struct kvmppc_book3s_shadow_vcpu *svcpu = svcpu_get(vcpu);
649 ulong shadow_srr1 = svcpu->shadow_srr1;
650 vcpu->stat.pf_instruc++;
651
652 #ifdef CONFIG_PPC_BOOK3S_32
653 /* We set segments as unused segments when invalidating them. So
654 * treat the respective fault as segment fault. */
655 if (svcpu->sr[kvmppc_get_pc(vcpu) >> SID_SHIFT] == SR_INVALID) {
656 kvmppc_mmu_map_segment(vcpu, kvmppc_get_pc(vcpu));
657 r = RESUME_GUEST;
658 svcpu_put(svcpu);
659 break;
660 }
661 #endif
662 svcpu_put(svcpu);
663
664 /* only care about PTEG not found errors, but leave NX alone */
665 if (shadow_srr1 & 0x40000000) {
666 r = kvmppc_handle_pagefault(run, vcpu, kvmppc_get_pc(vcpu), exit_nr);
667 vcpu->stat.sp_instruc++;
668 } else if (vcpu->arch.mmu.is_dcbz32(vcpu) &&
669 (!(vcpu->arch.hflags & BOOK3S_HFLAG_DCBZ32))) {
670 /*
671 * XXX If we do the dcbz hack we use the NX bit to flush&patch the page,
672 * so we can't use the NX bit inside the guest. Let's cross our fingers,
673 * that no guest that needs the dcbz hack does NX.
674 */
675 kvmppc_mmu_pte_flush(vcpu, kvmppc_get_pc(vcpu), ~0xFFFUL);
676 r = RESUME_GUEST;
677 } else {
678 vcpu->arch.shared->msr |= shadow_srr1 & 0x58000000;
679 kvmppc_book3s_queue_irqprio(vcpu, exit_nr);
680 r = RESUME_GUEST;
681 }
682 break;
683 }
684 case BOOK3S_INTERRUPT_DATA_STORAGE:
685 {
686 ulong dar = kvmppc_get_fault_dar(vcpu);
687 struct kvmppc_book3s_shadow_vcpu *svcpu = svcpu_get(vcpu);
688 u32 fault_dsisr = svcpu->fault_dsisr;
689 vcpu->stat.pf_storage++;
690
691 #ifdef CONFIG_PPC_BOOK3S_32
692 /* We set segments as unused segments when invalidating them. So
693 * treat the respective fault as segment fault. */
694 if ((svcpu->sr[dar >> SID_SHIFT]) == SR_INVALID) {
695 kvmppc_mmu_map_segment(vcpu, dar);
696 r = RESUME_GUEST;
697 svcpu_put(svcpu);
698 break;
699 }
700 #endif
701 svcpu_put(svcpu);
702
703 /* The only case we need to handle is missing shadow PTEs */
704 if (fault_dsisr & DSISR_NOHPTE) {
705 r = kvmppc_handle_pagefault(run, vcpu, dar, exit_nr);
706 } else {
707 vcpu->arch.shared->dar = dar;
708 vcpu->arch.shared->dsisr = fault_dsisr;
709 kvmppc_book3s_queue_irqprio(vcpu, exit_nr);
710 r = RESUME_GUEST;
711 }
712 break;
713 }
714 case BOOK3S_INTERRUPT_DATA_SEGMENT:
715 if (kvmppc_mmu_map_segment(vcpu, kvmppc_get_fault_dar(vcpu)) < 0) {
716 vcpu->arch.shared->dar = kvmppc_get_fault_dar(vcpu);
717 kvmppc_book3s_queue_irqprio(vcpu,
718 BOOK3S_INTERRUPT_DATA_SEGMENT);
719 }
720 r = RESUME_GUEST;
721 break;
722 case BOOK3S_INTERRUPT_INST_SEGMENT:
723 if (kvmppc_mmu_map_segment(vcpu, kvmppc_get_pc(vcpu)) < 0) {
724 kvmppc_book3s_queue_irqprio(vcpu,
725 BOOK3S_INTERRUPT_INST_SEGMENT);
726 }
727 r = RESUME_GUEST;
728 break;
729 /* We're good on these - the host merely wanted to get our attention */
730 case BOOK3S_INTERRUPT_DECREMENTER:
731 case BOOK3S_INTERRUPT_HV_DECREMENTER:
732 vcpu->stat.dec_exits++;
733 r = RESUME_GUEST;
734 break;
735 case BOOK3S_INTERRUPT_EXTERNAL:
736 case BOOK3S_INTERRUPT_EXTERNAL_LEVEL:
737 case BOOK3S_INTERRUPT_EXTERNAL_HV:
738 vcpu->stat.ext_intr_exits++;
739 r = RESUME_GUEST;
740 break;
741 case BOOK3S_INTERRUPT_PERFMON:
742 r = RESUME_GUEST;
743 break;
744 case BOOK3S_INTERRUPT_PROGRAM:
745 case BOOK3S_INTERRUPT_H_EMUL_ASSIST:
746 {
747 enum emulation_result er;
748 struct kvmppc_book3s_shadow_vcpu *svcpu;
749 ulong flags;
750
751 program_interrupt:
752 svcpu = svcpu_get(vcpu);
753 flags = svcpu->shadow_srr1 & 0x1f0000ull;
754 svcpu_put(svcpu);
755
756 if (vcpu->arch.shared->msr & MSR_PR) {
757 #ifdef EXIT_DEBUG
758 printk(KERN_INFO "Userspace triggered 0x700 exception at 0x%lx (0x%x)\n", kvmppc_get_pc(vcpu), kvmppc_get_last_inst(vcpu));
759 #endif
760 if ((kvmppc_get_last_inst(vcpu) & 0xff0007ff) !=
761 (INS_DCBZ & 0xfffffff7)) {
762 kvmppc_core_queue_program(vcpu, flags);
763 r = RESUME_GUEST;
764 break;
765 }
766 }
767
768 vcpu->stat.emulated_inst_exits++;
769 er = kvmppc_emulate_instruction(run, vcpu);
770 switch (er) {
771 case EMULATE_DONE:
772 r = RESUME_GUEST_NV;
773 break;
774 case EMULATE_AGAIN:
775 r = RESUME_GUEST;
776 break;
777 case EMULATE_FAIL:
778 printk(KERN_CRIT "%s: emulation at %lx failed (%08x)\n",
779 __func__, kvmppc_get_pc(vcpu), kvmppc_get_last_inst(vcpu));
780 kvmppc_core_queue_program(vcpu, flags);
781 r = RESUME_GUEST;
782 break;
783 case EMULATE_DO_MMIO:
784 run->exit_reason = KVM_EXIT_MMIO;
785 r = RESUME_HOST_NV;
786 break;
787 case EMULATE_EXIT_USER:
788 r = RESUME_HOST_NV;
789 break;
790 default:
791 BUG();
792 }
793 break;
794 }
795 case BOOK3S_INTERRUPT_SYSCALL:
796 if (vcpu->arch.papr_enabled &&
797 (kvmppc_get_last_sc(vcpu) == 0x44000022) &&
798 !(vcpu->arch.shared->msr & MSR_PR)) {
799 /* SC 1 papr hypercalls */
800 ulong cmd = kvmppc_get_gpr(vcpu, 3);
801 int i;
802
803 #ifdef CONFIG_KVM_BOOK3S_64_PR
804 if (kvmppc_h_pr(vcpu, cmd) == EMULATE_DONE) {
805 r = RESUME_GUEST;
806 break;
807 }
808 #endif
809
810 run->papr_hcall.nr = cmd;
811 for (i = 0; i < 9; ++i) {
812 ulong gpr = kvmppc_get_gpr(vcpu, 4 + i);
813 run->papr_hcall.args[i] = gpr;
814 }
815 run->exit_reason = KVM_EXIT_PAPR_HCALL;
816 vcpu->arch.hcall_needed = 1;
817 r = RESUME_HOST;
818 } else if (vcpu->arch.osi_enabled &&
819 (((u32)kvmppc_get_gpr(vcpu, 3)) == OSI_SC_MAGIC_R3) &&
820 (((u32)kvmppc_get_gpr(vcpu, 4)) == OSI_SC_MAGIC_R4)) {
821 /* MOL hypercalls */
822 u64 *gprs = run->osi.gprs;
823 int i;
824
825 run->exit_reason = KVM_EXIT_OSI;
826 for (i = 0; i < 32; i++)
827 gprs[i] = kvmppc_get_gpr(vcpu, i);
828 vcpu->arch.osi_needed = 1;
829 r = RESUME_HOST_NV;
830 } else if (!(vcpu->arch.shared->msr & MSR_PR) &&
831 (((u32)kvmppc_get_gpr(vcpu, 0)) == KVM_SC_MAGIC_R0)) {
832 /* KVM PV hypercalls */
833 kvmppc_set_gpr(vcpu, 3, kvmppc_kvm_pv(vcpu));
834 r = RESUME_GUEST;
835 } else {
836 /* Guest syscalls */
837 vcpu->stat.syscall_exits++;
838 kvmppc_book3s_queue_irqprio(vcpu, exit_nr);
839 r = RESUME_GUEST;
840 }
841 break;
842 case BOOK3S_INTERRUPT_FP_UNAVAIL:
843 case BOOK3S_INTERRUPT_ALTIVEC:
844 case BOOK3S_INTERRUPT_VSX:
845 {
846 int ext_msr = 0;
847
848 switch (exit_nr) {
849 case BOOK3S_INTERRUPT_FP_UNAVAIL: ext_msr = MSR_FP; break;
850 case BOOK3S_INTERRUPT_ALTIVEC: ext_msr = MSR_VEC; break;
851 case BOOK3S_INTERRUPT_VSX: ext_msr = MSR_VSX; break;
852 }
853
854 switch (kvmppc_check_ext(vcpu, exit_nr)) {
855 case EMULATE_DONE:
856 /* everything ok - let's enable the ext */
857 r = kvmppc_handle_ext(vcpu, exit_nr, ext_msr);
858 break;
859 case EMULATE_FAIL:
860 /* we need to emulate this instruction */
861 goto program_interrupt;
862 break;
863 default:
864 /* nothing to worry about - go again */
865 break;
866 }
867 break;
868 }
869 case BOOK3S_INTERRUPT_ALIGNMENT:
870 if (kvmppc_read_inst(vcpu) == EMULATE_DONE) {
871 vcpu->arch.shared->dsisr = kvmppc_alignment_dsisr(vcpu,
872 kvmppc_get_last_inst(vcpu));
873 vcpu->arch.shared->dar = kvmppc_alignment_dar(vcpu,
874 kvmppc_get_last_inst(vcpu));
875 kvmppc_book3s_queue_irqprio(vcpu, exit_nr);
876 }
877 r = RESUME_GUEST;
878 break;
879 case BOOK3S_INTERRUPT_MACHINE_CHECK:
880 case BOOK3S_INTERRUPT_TRACE:
881 kvmppc_book3s_queue_irqprio(vcpu, exit_nr);
882 r = RESUME_GUEST;
883 break;
884 default:
885 {
886 struct kvmppc_book3s_shadow_vcpu *svcpu = svcpu_get(vcpu);
887 ulong shadow_srr1 = svcpu->shadow_srr1;
888 svcpu_put(svcpu);
889 /* Ugh - bork here! What did we get? */
890 printk(KERN_EMERG "exit_nr=0x%x | pc=0x%lx | msr=0x%lx\n",
891 exit_nr, kvmppc_get_pc(vcpu), shadow_srr1);
892 r = RESUME_HOST;
893 BUG();
894 break;
895 }
896 }
897
898 if (!(r & RESUME_HOST)) {
899 /* To avoid clobbering exit_reason, only check for signals if
900 * we aren't already exiting to userspace for some other
901 * reason. */
902
903 /*
904 * Interrupts could be timers for the guest which we have to
905 * inject again, so let's postpone them until we're in the guest
906 * and if we really did time things so badly, then we just exit
907 * again due to a host external interrupt.
908 */
909 local_irq_disable();
910 s = kvmppc_prepare_to_enter(vcpu);
911 if (s <= 0) {
912 local_irq_enable();
913 r = s;
914 } else {
915 kvmppc_fix_ee_before_entry();
916 }
917 kvmppc_handle_lost_ext(vcpu);
918 }
919
920 trace_kvm_book3s_reenter(r, vcpu);
921
922 return r;
923 }
924
925 int kvm_arch_vcpu_ioctl_get_sregs(struct kvm_vcpu *vcpu,
926 struct kvm_sregs *sregs)
927 {
928 struct kvmppc_vcpu_book3s *vcpu3s = to_book3s(vcpu);
929 int i;
930
931 sregs->pvr = vcpu->arch.pvr;
932
933 sregs->u.s.sdr1 = to_book3s(vcpu)->sdr1;
934 if (vcpu->arch.hflags & BOOK3S_HFLAG_SLB) {
935 for (i = 0; i < 64; i++) {
936 sregs->u.s.ppc64.slb[i].slbe = vcpu->arch.slb[i].orige | i;
937 sregs->u.s.ppc64.slb[i].slbv = vcpu->arch.slb[i].origv;
938 }
939 } else {
940 for (i = 0; i < 16; i++)
941 sregs->u.s.ppc32.sr[i] = vcpu->arch.shared->sr[i];
942
943 for (i = 0; i < 8; i++) {
944 sregs->u.s.ppc32.ibat[i] = vcpu3s->ibat[i].raw;
945 sregs->u.s.ppc32.dbat[i] = vcpu3s->dbat[i].raw;
946 }
947 }
948
949 return 0;
950 }
951
952 int kvm_arch_vcpu_ioctl_set_sregs(struct kvm_vcpu *vcpu,
953 struct kvm_sregs *sregs)
954 {
955 struct kvmppc_vcpu_book3s *vcpu3s = to_book3s(vcpu);
956 int i;
957
958 kvmppc_set_pvr(vcpu, sregs->pvr);
959
960 vcpu3s->sdr1 = sregs->u.s.sdr1;
961 if (vcpu->arch.hflags & BOOK3S_HFLAG_SLB) {
962 for (i = 0; i < 64; i++) {
963 vcpu->arch.mmu.slbmte(vcpu, sregs->u.s.ppc64.slb[i].slbv,
964 sregs->u.s.ppc64.slb[i].slbe);
965 }
966 } else {
967 for (i = 0; i < 16; i++) {
968 vcpu->arch.mmu.mtsrin(vcpu, i, sregs->u.s.ppc32.sr[i]);
969 }
970 for (i = 0; i < 8; i++) {
971 kvmppc_set_bat(vcpu, &(vcpu3s->ibat[i]), false,
972 (u32)sregs->u.s.ppc32.ibat[i]);
973 kvmppc_set_bat(vcpu, &(vcpu3s->ibat[i]), true,
974 (u32)(sregs->u.s.ppc32.ibat[i] >> 32));
975 kvmppc_set_bat(vcpu, &(vcpu3s->dbat[i]), false,
976 (u32)sregs->u.s.ppc32.dbat[i]);
977 kvmppc_set_bat(vcpu, &(vcpu3s->dbat[i]), true,
978 (u32)(sregs->u.s.ppc32.dbat[i] >> 32));
979 }
980 }
981
982 /* Flush the MMU after messing with the segments */
983 kvmppc_mmu_pte_flush(vcpu, 0, 0);
984
985 return 0;
986 }
987
988 int kvmppc_get_one_reg(struct kvm_vcpu *vcpu, u64 id, union kvmppc_one_reg *val)
989 {
990 int r = 0;
991
992 switch (id) {
993 case KVM_REG_PPC_HIOR:
994 *val = get_reg_val(id, to_book3s(vcpu)->hior);
995 break;
996 #ifdef CONFIG_VSX
997 case KVM_REG_PPC_VSR0 ... KVM_REG_PPC_VSR31: {
998 long int i = id - KVM_REG_PPC_VSR0;
999
1000 if (!cpu_has_feature(CPU_FTR_VSX)) {
1001 r = -ENXIO;
1002 break;
1003 }
1004 val->vsxval[0] = vcpu->arch.fpr[i];
1005 val->vsxval[1] = vcpu->arch.vsr[i];
1006 break;
1007 }
1008 #endif /* CONFIG_VSX */
1009 default:
1010 r = -EINVAL;
1011 break;
1012 }
1013
1014 return r;
1015 }
1016
1017 int kvmppc_set_one_reg(struct kvm_vcpu *vcpu, u64 id, union kvmppc_one_reg *val)
1018 {
1019 int r = 0;
1020
1021 switch (id) {
1022 case KVM_REG_PPC_HIOR:
1023 to_book3s(vcpu)->hior = set_reg_val(id, *val);
1024 to_book3s(vcpu)->hior_explicit = true;
1025 break;
1026 #ifdef CONFIG_VSX
1027 case KVM_REG_PPC_VSR0 ... KVM_REG_PPC_VSR31: {
1028 long int i = id - KVM_REG_PPC_VSR0;
1029
1030 if (!cpu_has_feature(CPU_FTR_VSX)) {
1031 r = -ENXIO;
1032 break;
1033 }
1034 vcpu->arch.fpr[i] = val->vsxval[0];
1035 vcpu->arch.vsr[i] = val->vsxval[1];
1036 break;
1037 }
1038 #endif /* CONFIG_VSX */
1039 default:
1040 r = -EINVAL;
1041 break;
1042 }
1043
1044 return r;
1045 }
1046
1047 int kvmppc_core_check_processor_compat(void)
1048 {
1049 return 0;
1050 }
1051
1052 struct kvm_vcpu *kvmppc_core_vcpu_create(struct kvm *kvm, unsigned int id)
1053 {
1054 struct kvmppc_vcpu_book3s *vcpu_book3s;
1055 struct kvm_vcpu *vcpu;
1056 int err = -ENOMEM;
1057 unsigned long p;
1058
1059 vcpu_book3s = vzalloc(sizeof(struct kvmppc_vcpu_book3s));
1060 if (!vcpu_book3s)
1061 goto out;
1062
1063 vcpu_book3s->shadow_vcpu =
1064 kzalloc(sizeof(*vcpu_book3s->shadow_vcpu), GFP_KERNEL);
1065 if (!vcpu_book3s->shadow_vcpu)
1066 goto free_vcpu;
1067
1068 vcpu = &vcpu_book3s->vcpu;
1069 err = kvm_vcpu_init(vcpu, kvm, id);
1070 if (err)
1071 goto free_shadow_vcpu;
1072
1073 err = -ENOMEM;
1074 p = __get_free_page(GFP_KERNEL|__GFP_ZERO);
1075 if (!p)
1076 goto uninit_vcpu;
1077 /* the real shared page fills the last 4k of our page */
1078 vcpu->arch.shared = (void *)(p + PAGE_SIZE - 4096);
1079
1080 #ifdef CONFIG_PPC_BOOK3S_64
1081 /* default to book3s_64 (970fx) */
1082 vcpu->arch.pvr = 0x3C0301;
1083 #else
1084 /* default to book3s_32 (750) */
1085 vcpu->arch.pvr = 0x84202;
1086 #endif
1087 kvmppc_set_pvr(vcpu, vcpu->arch.pvr);
1088 vcpu->arch.slb_nr = 64;
1089
1090 vcpu->arch.shadow_msr = MSR_USER64;
1091
1092 err = kvmppc_mmu_init(vcpu);
1093 if (err < 0)
1094 goto uninit_vcpu;
1095
1096 return vcpu;
1097
1098 uninit_vcpu:
1099 kvm_vcpu_uninit(vcpu);
1100 free_shadow_vcpu:
1101 kfree(vcpu_book3s->shadow_vcpu);
1102 free_vcpu:
1103 vfree(vcpu_book3s);
1104 out:
1105 return ERR_PTR(err);
1106 }
1107
1108 void kvmppc_core_vcpu_free(struct kvm_vcpu *vcpu)
1109 {
1110 struct kvmppc_vcpu_book3s *vcpu_book3s = to_book3s(vcpu);
1111
1112 free_page((unsigned long)vcpu->arch.shared & PAGE_MASK);
1113 kvm_vcpu_uninit(vcpu);
1114 kfree(vcpu_book3s->shadow_vcpu);
1115 vfree(vcpu_book3s);
1116 }
1117
1118 int kvmppc_vcpu_run(struct kvm_run *kvm_run, struct kvm_vcpu *vcpu)
1119 {
1120 int ret;
1121 double fpr[32][TS_FPRWIDTH];
1122 unsigned int fpscr;
1123 int fpexc_mode;
1124 #ifdef CONFIG_ALTIVEC
1125 vector128 vr[32];
1126 vector128 vscr;
1127 unsigned long uninitialized_var(vrsave);
1128 int used_vr;
1129 #endif
1130 #ifdef CONFIG_VSX
1131 int used_vsr;
1132 #endif
1133 ulong ext_msr;
1134
1135 /* Check if we can run the vcpu at all */
1136 if (!vcpu->arch.sane) {
1137 kvm_run->exit_reason = KVM_EXIT_INTERNAL_ERROR;
1138 ret = -EINVAL;
1139 goto out;
1140 }
1141
1142 /*
1143 * Interrupts could be timers for the guest which we have to inject
1144 * again, so let's postpone them until we're in the guest and if we
1145 * really did time things so badly, then we just exit again due to
1146 * a host external interrupt.
1147 */
1148 local_irq_disable();
1149 ret = kvmppc_prepare_to_enter(vcpu);
1150 if (ret <= 0) {
1151 local_irq_enable();
1152 goto out;
1153 }
1154
1155 /* Save FPU state in stack */
1156 if (current->thread.regs->msr & MSR_FP)
1157 giveup_fpu(current);
1158 memcpy(fpr, current->thread.fpr, sizeof(current->thread.fpr));
1159 fpscr = current->thread.fpscr.val;
1160 fpexc_mode = current->thread.fpexc_mode;
1161
1162 #ifdef CONFIG_ALTIVEC
1163 /* Save Altivec state in stack */
1164 used_vr = current->thread.used_vr;
1165 if (used_vr) {
1166 if (current->thread.regs->msr & MSR_VEC)
1167 giveup_altivec(current);
1168 memcpy(vr, current->thread.vr, sizeof(current->thread.vr));
1169 vscr = current->thread.vscr;
1170 vrsave = current->thread.vrsave;
1171 }
1172 #endif
1173
1174 #ifdef CONFIG_VSX
1175 /* Save VSX state in stack */
1176 used_vsr = current->thread.used_vsr;
1177 if (used_vsr && (current->thread.regs->msr & MSR_VSX))
1178 __giveup_vsx(current);
1179 #endif
1180
1181 /* Remember the MSR with disabled extensions */
1182 ext_msr = current->thread.regs->msr;
1183
1184 /* Preload FPU if it's enabled */
1185 if (vcpu->arch.shared->msr & MSR_FP)
1186 kvmppc_handle_ext(vcpu, BOOK3S_INTERRUPT_FP_UNAVAIL, MSR_FP);
1187
1188 kvmppc_fix_ee_before_entry();
1189
1190 ret = __kvmppc_vcpu_run(kvm_run, vcpu);
1191
1192 /* No need for kvm_guest_exit. It's done in handle_exit.
1193 We also get here with interrupts enabled. */
1194
1195 /* Make sure we save the guest FPU/Altivec/VSX state */
1196 kvmppc_giveup_ext(vcpu, MSR_FP | MSR_VEC | MSR_VSX);
1197
1198 current->thread.regs->msr = ext_msr;
1199
1200 /* Restore FPU/VSX state from stack */
1201 memcpy(current->thread.fpr, fpr, sizeof(current->thread.fpr));
1202 current->thread.fpscr.val = fpscr;
1203 current->thread.fpexc_mode = fpexc_mode;
1204
1205 #ifdef CONFIG_ALTIVEC
1206 /* Restore Altivec state from stack */
1207 if (used_vr && current->thread.used_vr) {
1208 memcpy(current->thread.vr, vr, sizeof(current->thread.vr));
1209 current->thread.vscr = vscr;
1210 current->thread.vrsave = vrsave;
1211 }
1212 current->thread.used_vr = used_vr;
1213 #endif
1214
1215 #ifdef CONFIG_VSX
1216 current->thread.used_vsr = used_vsr;
1217 #endif
1218
1219 out:
1220 vcpu->mode = OUTSIDE_GUEST_MODE;
1221 return ret;
1222 }
1223
1224 /*
1225 * Get (and clear) the dirty memory log for a memory slot.
1226 */
1227 int kvm_vm_ioctl_get_dirty_log(struct kvm *kvm,
1228 struct kvm_dirty_log *log)
1229 {
1230 struct kvm_memory_slot *memslot;
1231 struct kvm_vcpu *vcpu;
1232 ulong ga, ga_end;
1233 int is_dirty = 0;
1234 int r;
1235 unsigned long n;
1236
1237 mutex_lock(&kvm->slots_lock);
1238
1239 r = kvm_get_dirty_log(kvm, log, &is_dirty);
1240 if (r)
1241 goto out;
1242
1243 /* If nothing is dirty, don't bother messing with page tables. */
1244 if (is_dirty) {
1245 memslot = id_to_memslot(kvm->memslots, log->slot);
1246
1247 ga = memslot->base_gfn << PAGE_SHIFT;
1248 ga_end = ga + (memslot->npages << PAGE_SHIFT);
1249
1250 kvm_for_each_vcpu(n, vcpu, kvm)
1251 kvmppc_mmu_pte_pflush(vcpu, ga, ga_end);
1252
1253 n = kvm_dirty_bitmap_bytes(memslot);
1254 memset(memslot->dirty_bitmap, 0, n);
1255 }
1256
1257 r = 0;
1258 out:
1259 mutex_unlock(&kvm->slots_lock);
1260 return r;
1261 }
1262
1263 #ifdef CONFIG_PPC64
1264 int kvm_vm_ioctl_get_smmu_info(struct kvm *kvm, struct kvm_ppc_smmu_info *info)
1265 {
1266 info->flags = KVM_PPC_1T_SEGMENTS;
1267
1268 /* SLB is always 64 entries */
1269 info->slb_size = 64;
1270
1271 /* Standard 4k base page size segment */
1272 info->sps[0].page_shift = 12;
1273 info->sps[0].slb_enc = 0;
1274 info->sps[0].enc[0].page_shift = 12;
1275 info->sps[0].enc[0].pte_enc = 0;
1276
1277 /* Standard 16M large page size segment */
1278 info->sps[1].page_shift = 24;
1279 info->sps[1].slb_enc = SLB_VSID_L;
1280 info->sps[1].enc[0].page_shift = 24;
1281 info->sps[1].enc[0].pte_enc = 0;
1282
1283 return 0;
1284 }
1285 #endif /* CONFIG_PPC64 */
1286
1287 void kvmppc_core_free_memslot(struct kvm_memory_slot *free,
1288 struct kvm_memory_slot *dont)
1289 {
1290 }
1291
1292 int kvmppc_core_create_memslot(struct kvm_memory_slot *slot,
1293 unsigned long npages)
1294 {
1295 return 0;
1296 }
1297
1298 int kvmppc_core_prepare_memory_region(struct kvm *kvm,
1299 struct kvm_memory_slot *memslot,
1300 struct kvm_userspace_memory_region *mem)
1301 {
1302 return 0;
1303 }
1304
1305 void kvmppc_core_commit_memory_region(struct kvm *kvm,
1306 struct kvm_userspace_memory_region *mem,
1307 const struct kvm_memory_slot *old)
1308 {
1309 }
1310
1311 void kvmppc_core_flush_memslot(struct kvm *kvm, struct kvm_memory_slot *memslot)
1312 {
1313 }
1314
1315 static unsigned int kvm_global_user_count = 0;
1316 static DEFINE_SPINLOCK(kvm_global_user_count_lock);
1317
1318 int kvmppc_core_init_vm(struct kvm *kvm)
1319 {
1320 #ifdef CONFIG_PPC64
1321 INIT_LIST_HEAD(&kvm->arch.spapr_tce_tables);
1322 INIT_LIST_HEAD(&kvm->arch.rtas_tokens);
1323 #endif
1324
1325 if (firmware_has_feature(FW_FEATURE_SET_MODE)) {
1326 spin_lock(&kvm_global_user_count_lock);
1327 if (++kvm_global_user_count == 1)
1328 pSeries_disable_reloc_on_exc();
1329 spin_unlock(&kvm_global_user_count_lock);
1330 }
1331 return 0;
1332 }
1333
1334 void kvmppc_core_destroy_vm(struct kvm *kvm)
1335 {
1336 #ifdef CONFIG_PPC64
1337 WARN_ON(!list_empty(&kvm->arch.spapr_tce_tables));
1338 #endif
1339
1340 if (firmware_has_feature(FW_FEATURE_SET_MODE)) {
1341 spin_lock(&kvm_global_user_count_lock);
1342 BUG_ON(kvm_global_user_count == 0);
1343 if (--kvm_global_user_count == 0)
1344 pSeries_enable_reloc_on_exc();
1345 spin_unlock(&kvm_global_user_count_lock);
1346 }
1347 }
1348
1349 static int kvmppc_book3s_init(void)
1350 {
1351 int r;
1352
1353 r = kvm_init(NULL, sizeof(struct kvmppc_vcpu_book3s), 0,
1354 THIS_MODULE);
1355
1356 if (r)
1357 return r;
1358
1359 r = kvmppc_mmu_hpte_sysinit();
1360
1361 return r;
1362 }
1363
1364 static void kvmppc_book3s_exit(void)
1365 {
1366 kvmppc_mmu_hpte_sysexit();
1367 kvm_exit();
1368 }
1369
1370 module_init(kvmppc_book3s_init);
1371 module_exit(kvmppc_book3s_exit);
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