1 /* Intel(R) Gigabit Ethernet Linux driver
2 * Copyright(c) 2007-2014 Intel Corporation.
4 * This program is free software; you can redistribute it and/or modify it
5 * under the terms and conditions of the GNU General Public License,
6 * version 2, as published by the Free Software Foundation.
8 * This program is distributed in the hope it will be useful, but WITHOUT
9 * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
10 * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
13 * You should have received a copy of the GNU General Public License along with
14 * this program; if not, see <http://www.gnu.org/licenses/>.
16 * The full GNU General Public License is included in this distribution in
17 * the file called "COPYING".
19 * Contact Information:
20 * e1000-devel Mailing List <e1000-devel@lists.sourceforge.net>
21 * Intel Corporation, 5200 N.E. Elam Young Parkway, Hillsboro, OR 97124-6497
24 #define pr_fmt(fmt) KBUILD_MODNAME ": " fmt
26 #include <linux/module.h>
27 #include <linux/types.h>
28 #include <linux/init.h>
29 #include <linux/bitops.h>
30 #include <linux/vmalloc.h>
31 #include <linux/pagemap.h>
32 #include <linux/netdevice.h>
33 #include <linux/ipv6.h>
34 #include <linux/slab.h>
35 #include <net/checksum.h>
36 #include <net/ip6_checksum.h>
37 #include <linux/net_tstamp.h>
38 #include <linux/mii.h>
39 #include <linux/ethtool.h>
41 #include <linux/if_vlan.h>
42 #include <linux/pci.h>
43 #include <linux/pci-aspm.h>
44 #include <linux/delay.h>
45 #include <linux/interrupt.h>
47 #include <linux/tcp.h>
48 #include <linux/sctp.h>
49 #include <linux/if_ether.h>
50 #include <linux/aer.h>
51 #include <linux/prefetch.h>
52 #include <linux/pm_runtime.h>
54 #include <linux/dca.h>
56 #include <linux/i2c.h>
62 #define DRV_VERSION __stringify(MAJ) "." __stringify(MIN) "." \
63 __stringify(BUILD) "-k"
64 char igb_driver_name
[] = "igb";
65 char igb_driver_version
[] = DRV_VERSION
;
66 static const char igb_driver_string
[] =
67 "Intel(R) Gigabit Ethernet Network Driver";
68 static const char igb_copyright
[] =
69 "Copyright (c) 2007-2014 Intel Corporation.";
71 static const struct e1000_info
*igb_info_tbl
[] = {
72 [board_82575
] = &e1000_82575_info
,
75 static const struct pci_device_id igb_pci_tbl
[] = {
76 { PCI_VDEVICE(INTEL
, E1000_DEV_ID_I354_BACKPLANE_1GBPS
) },
77 { PCI_VDEVICE(INTEL
, E1000_DEV_ID_I354_SGMII
) },
78 { PCI_VDEVICE(INTEL
, E1000_DEV_ID_I354_BACKPLANE_2_5GBPS
) },
79 { PCI_VDEVICE(INTEL
, E1000_DEV_ID_I211_COPPER
), board_82575
},
80 { PCI_VDEVICE(INTEL
, E1000_DEV_ID_I210_COPPER
), board_82575
},
81 { PCI_VDEVICE(INTEL
, E1000_DEV_ID_I210_FIBER
), board_82575
},
82 { PCI_VDEVICE(INTEL
, E1000_DEV_ID_I210_SERDES
), board_82575
},
83 { PCI_VDEVICE(INTEL
, E1000_DEV_ID_I210_SGMII
), board_82575
},
84 { PCI_VDEVICE(INTEL
, E1000_DEV_ID_I210_COPPER_FLASHLESS
), board_82575
},
85 { PCI_VDEVICE(INTEL
, E1000_DEV_ID_I210_SERDES_FLASHLESS
), board_82575
},
86 { PCI_VDEVICE(INTEL
, E1000_DEV_ID_I350_COPPER
), board_82575
},
87 { PCI_VDEVICE(INTEL
, E1000_DEV_ID_I350_FIBER
), board_82575
},
88 { PCI_VDEVICE(INTEL
, E1000_DEV_ID_I350_SERDES
), board_82575
},
89 { PCI_VDEVICE(INTEL
, E1000_DEV_ID_I350_SGMII
), board_82575
},
90 { PCI_VDEVICE(INTEL
, E1000_DEV_ID_82580_COPPER
), board_82575
},
91 { PCI_VDEVICE(INTEL
, E1000_DEV_ID_82580_FIBER
), board_82575
},
92 { PCI_VDEVICE(INTEL
, E1000_DEV_ID_82580_QUAD_FIBER
), board_82575
},
93 { PCI_VDEVICE(INTEL
, E1000_DEV_ID_82580_SERDES
), board_82575
},
94 { PCI_VDEVICE(INTEL
, E1000_DEV_ID_82580_SGMII
), board_82575
},
95 { PCI_VDEVICE(INTEL
, E1000_DEV_ID_82580_COPPER_DUAL
), board_82575
},
96 { PCI_VDEVICE(INTEL
, E1000_DEV_ID_DH89XXCC_SGMII
), board_82575
},
97 { PCI_VDEVICE(INTEL
, E1000_DEV_ID_DH89XXCC_SERDES
), board_82575
},
98 { PCI_VDEVICE(INTEL
, E1000_DEV_ID_DH89XXCC_BACKPLANE
), board_82575
},
99 { PCI_VDEVICE(INTEL
, E1000_DEV_ID_DH89XXCC_SFP
), board_82575
},
100 { PCI_VDEVICE(INTEL
, E1000_DEV_ID_82576
), board_82575
},
101 { PCI_VDEVICE(INTEL
, E1000_DEV_ID_82576_NS
), board_82575
},
102 { PCI_VDEVICE(INTEL
, E1000_DEV_ID_82576_NS_SERDES
), board_82575
},
103 { PCI_VDEVICE(INTEL
, E1000_DEV_ID_82576_FIBER
), board_82575
},
104 { PCI_VDEVICE(INTEL
, E1000_DEV_ID_82576_SERDES
), board_82575
},
105 { PCI_VDEVICE(INTEL
, E1000_DEV_ID_82576_SERDES_QUAD
), board_82575
},
106 { PCI_VDEVICE(INTEL
, E1000_DEV_ID_82576_QUAD_COPPER_ET2
), board_82575
},
107 { PCI_VDEVICE(INTEL
, E1000_DEV_ID_82576_QUAD_COPPER
), board_82575
},
108 { PCI_VDEVICE(INTEL
, E1000_DEV_ID_82575EB_COPPER
), board_82575
},
109 { PCI_VDEVICE(INTEL
, E1000_DEV_ID_82575EB_FIBER_SERDES
), board_82575
},
110 { PCI_VDEVICE(INTEL
, E1000_DEV_ID_82575GB_QUAD_COPPER
), board_82575
},
111 /* required last entry */
115 MODULE_DEVICE_TABLE(pci
, igb_pci_tbl
);
117 static int igb_setup_all_tx_resources(struct igb_adapter
*);
118 static int igb_setup_all_rx_resources(struct igb_adapter
*);
119 static void igb_free_all_tx_resources(struct igb_adapter
*);
120 static void igb_free_all_rx_resources(struct igb_adapter
*);
121 static void igb_setup_mrqc(struct igb_adapter
*);
122 static int igb_probe(struct pci_dev
*, const struct pci_device_id
*);
123 static void igb_remove(struct pci_dev
*pdev
);
124 static int igb_sw_init(struct igb_adapter
*);
125 static int igb_open(struct net_device
*);
126 static int igb_close(struct net_device
*);
127 static void igb_configure(struct igb_adapter
*);
128 static void igb_configure_tx(struct igb_adapter
*);
129 static void igb_configure_rx(struct igb_adapter
*);
130 static void igb_clean_all_tx_rings(struct igb_adapter
*);
131 static void igb_clean_all_rx_rings(struct igb_adapter
*);
132 static void igb_clean_tx_ring(struct igb_ring
*);
133 static void igb_clean_rx_ring(struct igb_ring
*);
134 static void igb_set_rx_mode(struct net_device
*);
135 static void igb_update_phy_info(unsigned long);
136 static void igb_watchdog(unsigned long);
137 static void igb_watchdog_task(struct work_struct
*);
138 static netdev_tx_t
igb_xmit_frame(struct sk_buff
*skb
, struct net_device
*);
139 static struct rtnl_link_stats64
*igb_get_stats64(struct net_device
*dev
,
140 struct rtnl_link_stats64
*stats
);
141 static int igb_change_mtu(struct net_device
*, int);
142 static int igb_set_mac(struct net_device
*, void *);
143 static void igb_set_uta(struct igb_adapter
*adapter
);
144 static irqreturn_t
igb_intr(int irq
, void *);
145 static irqreturn_t
igb_intr_msi(int irq
, void *);
146 static irqreturn_t
igb_msix_other(int irq
, void *);
147 static irqreturn_t
igb_msix_ring(int irq
, void *);
148 #ifdef CONFIG_IGB_DCA
149 static void igb_update_dca(struct igb_q_vector
*);
150 static void igb_setup_dca(struct igb_adapter
*);
151 #endif /* CONFIG_IGB_DCA */
152 static int igb_poll(struct napi_struct
*, int);
153 static bool igb_clean_tx_irq(struct igb_q_vector
*);
154 static bool igb_clean_rx_irq(struct igb_q_vector
*, int);
155 static int igb_ioctl(struct net_device
*, struct ifreq
*, int cmd
);
156 static void igb_tx_timeout(struct net_device
*);
157 static void igb_reset_task(struct work_struct
*);
158 static void igb_vlan_mode(struct net_device
*netdev
,
159 netdev_features_t features
);
160 static int igb_vlan_rx_add_vid(struct net_device
*, __be16
, u16
);
161 static int igb_vlan_rx_kill_vid(struct net_device
*, __be16
, u16
);
162 static void igb_restore_vlan(struct igb_adapter
*);
163 static void igb_rar_set_qsel(struct igb_adapter
*, u8
*, u32
, u8
);
164 static void igb_ping_all_vfs(struct igb_adapter
*);
165 static void igb_msg_task(struct igb_adapter
*);
166 static void igb_vmm_control(struct igb_adapter
*);
167 static int igb_set_vf_mac(struct igb_adapter
*, int, unsigned char *);
168 static void igb_restore_vf_multicasts(struct igb_adapter
*adapter
);
169 static int igb_ndo_set_vf_mac(struct net_device
*netdev
, int vf
, u8
*mac
);
170 static int igb_ndo_set_vf_vlan(struct net_device
*netdev
,
171 int vf
, u16 vlan
, u8 qos
);
172 static int igb_ndo_set_vf_bw(struct net_device
*, int, int, int);
173 static int igb_ndo_set_vf_spoofchk(struct net_device
*netdev
, int vf
,
175 static int igb_ndo_get_vf_config(struct net_device
*netdev
, int vf
,
176 struct ifla_vf_info
*ivi
);
177 static void igb_check_vf_rate_limit(struct igb_adapter
*);
179 #ifdef CONFIG_PCI_IOV
180 static int igb_vf_configure(struct igb_adapter
*adapter
, int vf
);
181 static int igb_pci_enable_sriov(struct pci_dev
*dev
, int num_vfs
);
185 #ifdef CONFIG_PM_SLEEP
186 static int igb_suspend(struct device
*);
188 static int igb_resume(struct device
*);
189 #ifdef CONFIG_PM_RUNTIME
190 static int igb_runtime_suspend(struct device
*dev
);
191 static int igb_runtime_resume(struct device
*dev
);
192 static int igb_runtime_idle(struct device
*dev
);
194 static const struct dev_pm_ops igb_pm_ops
= {
195 SET_SYSTEM_SLEEP_PM_OPS(igb_suspend
, igb_resume
)
196 SET_RUNTIME_PM_OPS(igb_runtime_suspend
, igb_runtime_resume
,
200 static void igb_shutdown(struct pci_dev
*);
201 static int igb_pci_sriov_configure(struct pci_dev
*dev
, int num_vfs
);
202 #ifdef CONFIG_IGB_DCA
203 static int igb_notify_dca(struct notifier_block
*, unsigned long, void *);
204 static struct notifier_block dca_notifier
= {
205 .notifier_call
= igb_notify_dca
,
210 #ifdef CONFIG_NET_POLL_CONTROLLER
211 /* for netdump / net console */
212 static void igb_netpoll(struct net_device
*);
214 #ifdef CONFIG_PCI_IOV
215 static unsigned int max_vfs
;
216 module_param(max_vfs
, uint
, 0);
217 MODULE_PARM_DESC(max_vfs
, "Maximum number of virtual functions to allocate per physical function");
218 #endif /* CONFIG_PCI_IOV */
220 static pci_ers_result_t
igb_io_error_detected(struct pci_dev
*,
221 pci_channel_state_t
);
222 static pci_ers_result_t
igb_io_slot_reset(struct pci_dev
*);
223 static void igb_io_resume(struct pci_dev
*);
225 static const struct pci_error_handlers igb_err_handler
= {
226 .error_detected
= igb_io_error_detected
,
227 .slot_reset
= igb_io_slot_reset
,
228 .resume
= igb_io_resume
,
231 static void igb_init_dmac(struct igb_adapter
*adapter
, u32 pba
);
233 static struct pci_driver igb_driver
= {
234 .name
= igb_driver_name
,
235 .id_table
= igb_pci_tbl
,
237 .remove
= igb_remove
,
239 .driver
.pm
= &igb_pm_ops
,
241 .shutdown
= igb_shutdown
,
242 .sriov_configure
= igb_pci_sriov_configure
,
243 .err_handler
= &igb_err_handler
246 MODULE_AUTHOR("Intel Corporation, <e1000-devel@lists.sourceforge.net>");
247 MODULE_DESCRIPTION("Intel(R) Gigabit Ethernet Network Driver");
248 MODULE_LICENSE("GPL");
249 MODULE_VERSION(DRV_VERSION
);
251 #define DEFAULT_MSG_ENABLE (NETIF_MSG_DRV|NETIF_MSG_PROBE|NETIF_MSG_LINK)
252 static int debug
= -1;
253 module_param(debug
, int, 0);
254 MODULE_PARM_DESC(debug
, "Debug level (0=none,...,16=all)");
256 struct igb_reg_info
{
261 static const struct igb_reg_info igb_reg_info_tbl
[] = {
263 /* General Registers */
264 {E1000_CTRL
, "CTRL"},
265 {E1000_STATUS
, "STATUS"},
266 {E1000_CTRL_EXT
, "CTRL_EXT"},
268 /* Interrupt Registers */
272 {E1000_RCTL
, "RCTL"},
273 {E1000_RDLEN(0), "RDLEN"},
274 {E1000_RDH(0), "RDH"},
275 {E1000_RDT(0), "RDT"},
276 {E1000_RXDCTL(0), "RXDCTL"},
277 {E1000_RDBAL(0), "RDBAL"},
278 {E1000_RDBAH(0), "RDBAH"},
281 {E1000_TCTL
, "TCTL"},
282 {E1000_TDBAL(0), "TDBAL"},
283 {E1000_TDBAH(0), "TDBAH"},
284 {E1000_TDLEN(0), "TDLEN"},
285 {E1000_TDH(0), "TDH"},
286 {E1000_TDT(0), "TDT"},
287 {E1000_TXDCTL(0), "TXDCTL"},
288 {E1000_TDFH
, "TDFH"},
289 {E1000_TDFT
, "TDFT"},
290 {E1000_TDFHS
, "TDFHS"},
291 {E1000_TDFPC
, "TDFPC"},
293 /* List Terminator */
297 /* igb_regdump - register printout routine */
298 static void igb_regdump(struct e1000_hw
*hw
, struct igb_reg_info
*reginfo
)
304 switch (reginfo
->ofs
) {
306 for (n
= 0; n
< 4; n
++)
307 regs
[n
] = rd32(E1000_RDLEN(n
));
310 for (n
= 0; n
< 4; n
++)
311 regs
[n
] = rd32(E1000_RDH(n
));
314 for (n
= 0; n
< 4; n
++)
315 regs
[n
] = rd32(E1000_RDT(n
));
317 case E1000_RXDCTL(0):
318 for (n
= 0; n
< 4; n
++)
319 regs
[n
] = rd32(E1000_RXDCTL(n
));
322 for (n
= 0; n
< 4; n
++)
323 regs
[n
] = rd32(E1000_RDBAL(n
));
326 for (n
= 0; n
< 4; n
++)
327 regs
[n
] = rd32(E1000_RDBAH(n
));
330 for (n
= 0; n
< 4; n
++)
331 regs
[n
] = rd32(E1000_RDBAL(n
));
334 for (n
= 0; n
< 4; n
++)
335 regs
[n
] = rd32(E1000_TDBAH(n
));
338 for (n
= 0; n
< 4; n
++)
339 regs
[n
] = rd32(E1000_TDLEN(n
));
342 for (n
= 0; n
< 4; n
++)
343 regs
[n
] = rd32(E1000_TDH(n
));
346 for (n
= 0; n
< 4; n
++)
347 regs
[n
] = rd32(E1000_TDT(n
));
349 case E1000_TXDCTL(0):
350 for (n
= 0; n
< 4; n
++)
351 regs
[n
] = rd32(E1000_TXDCTL(n
));
354 pr_info("%-15s %08x\n", reginfo
->name
, rd32(reginfo
->ofs
));
358 snprintf(rname
, 16, "%s%s", reginfo
->name
, "[0-3]");
359 pr_info("%-15s %08x %08x %08x %08x\n", rname
, regs
[0], regs
[1],
363 /* igb_dump - Print registers, Tx-rings and Rx-rings */
364 static void igb_dump(struct igb_adapter
*adapter
)
366 struct net_device
*netdev
= adapter
->netdev
;
367 struct e1000_hw
*hw
= &adapter
->hw
;
368 struct igb_reg_info
*reginfo
;
369 struct igb_ring
*tx_ring
;
370 union e1000_adv_tx_desc
*tx_desc
;
371 struct my_u0
{ u64 a
; u64 b
; } *u0
;
372 struct igb_ring
*rx_ring
;
373 union e1000_adv_rx_desc
*rx_desc
;
377 if (!netif_msg_hw(adapter
))
380 /* Print netdevice Info */
382 dev_info(&adapter
->pdev
->dev
, "Net device Info\n");
383 pr_info("Device Name state trans_start last_rx\n");
384 pr_info("%-15s %016lX %016lX %016lX\n", netdev
->name
,
385 netdev
->state
, netdev
->trans_start
, netdev
->last_rx
);
388 /* Print Registers */
389 dev_info(&adapter
->pdev
->dev
, "Register Dump\n");
390 pr_info(" Register Name Value\n");
391 for (reginfo
= (struct igb_reg_info
*)igb_reg_info_tbl
;
392 reginfo
->name
; reginfo
++) {
393 igb_regdump(hw
, reginfo
);
396 /* Print TX Ring Summary */
397 if (!netdev
|| !netif_running(netdev
))
400 dev_info(&adapter
->pdev
->dev
, "TX Rings Summary\n");
401 pr_info("Queue [NTU] [NTC] [bi(ntc)->dma ] leng ntw timestamp\n");
402 for (n
= 0; n
< adapter
->num_tx_queues
; n
++) {
403 struct igb_tx_buffer
*buffer_info
;
404 tx_ring
= adapter
->tx_ring
[n
];
405 buffer_info
= &tx_ring
->tx_buffer_info
[tx_ring
->next_to_clean
];
406 pr_info(" %5d %5X %5X %016llX %04X %p %016llX\n",
407 n
, tx_ring
->next_to_use
, tx_ring
->next_to_clean
,
408 (u64
)dma_unmap_addr(buffer_info
, dma
),
409 dma_unmap_len(buffer_info
, len
),
410 buffer_info
->next_to_watch
,
411 (u64
)buffer_info
->time_stamp
);
415 if (!netif_msg_tx_done(adapter
))
416 goto rx_ring_summary
;
418 dev_info(&adapter
->pdev
->dev
, "TX Rings Dump\n");
420 /* Transmit Descriptor Formats
422 * Advanced Transmit Descriptor
423 * +--------------------------------------------------------------+
424 * 0 | Buffer Address [63:0] |
425 * +--------------------------------------------------------------+
426 * 8 | PAYLEN | PORTS |CC|IDX | STA | DCMD |DTYP|MAC|RSV| DTALEN |
427 * +--------------------------------------------------------------+
428 * 63 46 45 40 39 38 36 35 32 31 24 15 0
431 for (n
= 0; n
< adapter
->num_tx_queues
; n
++) {
432 tx_ring
= adapter
->tx_ring
[n
];
433 pr_info("------------------------------------\n");
434 pr_info("TX QUEUE INDEX = %d\n", tx_ring
->queue_index
);
435 pr_info("------------------------------------\n");
436 pr_info("T [desc] [address 63:0 ] [PlPOCIStDDM Ln] [bi->dma ] leng ntw timestamp bi->skb\n");
438 for (i
= 0; tx_ring
->desc
&& (i
< tx_ring
->count
); i
++) {
439 const char *next_desc
;
440 struct igb_tx_buffer
*buffer_info
;
441 tx_desc
= IGB_TX_DESC(tx_ring
, i
);
442 buffer_info
= &tx_ring
->tx_buffer_info
[i
];
443 u0
= (struct my_u0
*)tx_desc
;
444 if (i
== tx_ring
->next_to_use
&&
445 i
== tx_ring
->next_to_clean
)
446 next_desc
= " NTC/U";
447 else if (i
== tx_ring
->next_to_use
)
449 else if (i
== tx_ring
->next_to_clean
)
454 pr_info("T [0x%03X] %016llX %016llX %016llX %04X %p %016llX %p%s\n",
455 i
, le64_to_cpu(u0
->a
),
457 (u64
)dma_unmap_addr(buffer_info
, dma
),
458 dma_unmap_len(buffer_info
, len
),
459 buffer_info
->next_to_watch
,
460 (u64
)buffer_info
->time_stamp
,
461 buffer_info
->skb
, next_desc
);
463 if (netif_msg_pktdata(adapter
) && buffer_info
->skb
)
464 print_hex_dump(KERN_INFO
, "",
466 16, 1, buffer_info
->skb
->data
,
467 dma_unmap_len(buffer_info
, len
),
472 /* Print RX Rings Summary */
474 dev_info(&adapter
->pdev
->dev
, "RX Rings Summary\n");
475 pr_info("Queue [NTU] [NTC]\n");
476 for (n
= 0; n
< adapter
->num_rx_queues
; n
++) {
477 rx_ring
= adapter
->rx_ring
[n
];
478 pr_info(" %5d %5X %5X\n",
479 n
, rx_ring
->next_to_use
, rx_ring
->next_to_clean
);
483 if (!netif_msg_rx_status(adapter
))
486 dev_info(&adapter
->pdev
->dev
, "RX Rings Dump\n");
488 /* Advanced Receive Descriptor (Read) Format
490 * +-----------------------------------------------------+
491 * 0 | Packet Buffer Address [63:1] |A0/NSE|
492 * +----------------------------------------------+------+
493 * 8 | Header Buffer Address [63:1] | DD |
494 * +-----------------------------------------------------+
497 * Advanced Receive Descriptor (Write-Back) Format
499 * 63 48 47 32 31 30 21 20 17 16 4 3 0
500 * +------------------------------------------------------+
501 * 0 | Packet IP |SPH| HDR_LEN | RSV|Packet| RSS |
502 * | Checksum Ident | | | | Type | Type |
503 * +------------------------------------------------------+
504 * 8 | VLAN Tag | Length | Extended Error | Extended Status |
505 * +------------------------------------------------------+
506 * 63 48 47 32 31 20 19 0
509 for (n
= 0; n
< adapter
->num_rx_queues
; n
++) {
510 rx_ring
= adapter
->rx_ring
[n
];
511 pr_info("------------------------------------\n");
512 pr_info("RX QUEUE INDEX = %d\n", rx_ring
->queue_index
);
513 pr_info("------------------------------------\n");
514 pr_info("R [desc] [ PktBuf A0] [ HeadBuf DD] [bi->dma ] [bi->skb] <-- Adv Rx Read format\n");
515 pr_info("RWB[desc] [PcsmIpSHl PtRs] [vl er S cks ln] ---------------- [bi->skb] <-- Adv Rx Write-Back format\n");
517 for (i
= 0; i
< rx_ring
->count
; i
++) {
518 const char *next_desc
;
519 struct igb_rx_buffer
*buffer_info
;
520 buffer_info
= &rx_ring
->rx_buffer_info
[i
];
521 rx_desc
= IGB_RX_DESC(rx_ring
, i
);
522 u0
= (struct my_u0
*)rx_desc
;
523 staterr
= le32_to_cpu(rx_desc
->wb
.upper
.status_error
);
525 if (i
== rx_ring
->next_to_use
)
527 else if (i
== rx_ring
->next_to_clean
)
532 if (staterr
& E1000_RXD_STAT_DD
) {
533 /* Descriptor Done */
534 pr_info("%s[0x%03X] %016llX %016llX ---------------- %s\n",
540 pr_info("%s[0x%03X] %016llX %016llX %016llX %s\n",
544 (u64
)buffer_info
->dma
,
547 if (netif_msg_pktdata(adapter
) &&
548 buffer_info
->dma
&& buffer_info
->page
) {
549 print_hex_dump(KERN_INFO
, "",
552 page_address(buffer_info
->page
) +
553 buffer_info
->page_offset
,
565 * igb_get_i2c_data - Reads the I2C SDA data bit
566 * @hw: pointer to hardware structure
567 * @i2cctl: Current value of I2CCTL register
569 * Returns the I2C data bit value
571 static int igb_get_i2c_data(void *data
)
573 struct igb_adapter
*adapter
= (struct igb_adapter
*)data
;
574 struct e1000_hw
*hw
= &adapter
->hw
;
575 s32 i2cctl
= rd32(E1000_I2CPARAMS
);
577 return !!(i2cctl
& E1000_I2C_DATA_IN
);
581 * igb_set_i2c_data - Sets the I2C data bit
582 * @data: pointer to hardware structure
583 * @state: I2C data value (0 or 1) to set
585 * Sets the I2C data bit
587 static void igb_set_i2c_data(void *data
, int state
)
589 struct igb_adapter
*adapter
= (struct igb_adapter
*)data
;
590 struct e1000_hw
*hw
= &adapter
->hw
;
591 s32 i2cctl
= rd32(E1000_I2CPARAMS
);
594 i2cctl
|= E1000_I2C_DATA_OUT
;
596 i2cctl
&= ~E1000_I2C_DATA_OUT
;
598 i2cctl
&= ~E1000_I2C_DATA_OE_N
;
599 i2cctl
|= E1000_I2C_CLK_OE_N
;
600 wr32(E1000_I2CPARAMS
, i2cctl
);
606 * igb_set_i2c_clk - Sets the I2C SCL clock
607 * @data: pointer to hardware structure
608 * @state: state to set clock
610 * Sets the I2C clock line to state
612 static void igb_set_i2c_clk(void *data
, int state
)
614 struct igb_adapter
*adapter
= (struct igb_adapter
*)data
;
615 struct e1000_hw
*hw
= &adapter
->hw
;
616 s32 i2cctl
= rd32(E1000_I2CPARAMS
);
619 i2cctl
|= E1000_I2C_CLK_OUT
;
620 i2cctl
&= ~E1000_I2C_CLK_OE_N
;
622 i2cctl
&= ~E1000_I2C_CLK_OUT
;
623 i2cctl
&= ~E1000_I2C_CLK_OE_N
;
625 wr32(E1000_I2CPARAMS
, i2cctl
);
630 * igb_get_i2c_clk - Gets the I2C SCL clock state
631 * @data: pointer to hardware structure
633 * Gets the I2C clock state
635 static int igb_get_i2c_clk(void *data
)
637 struct igb_adapter
*adapter
= (struct igb_adapter
*)data
;
638 struct e1000_hw
*hw
= &adapter
->hw
;
639 s32 i2cctl
= rd32(E1000_I2CPARAMS
);
641 return !!(i2cctl
& E1000_I2C_CLK_IN
);
644 static const struct i2c_algo_bit_data igb_i2c_algo
= {
645 .setsda
= igb_set_i2c_data
,
646 .setscl
= igb_set_i2c_clk
,
647 .getsda
= igb_get_i2c_data
,
648 .getscl
= igb_get_i2c_clk
,
654 * igb_get_hw_dev - return device
655 * @hw: pointer to hardware structure
657 * used by hardware layer to print debugging information
659 struct net_device
*igb_get_hw_dev(struct e1000_hw
*hw
)
661 struct igb_adapter
*adapter
= hw
->back
;
662 return adapter
->netdev
;
666 * igb_init_module - Driver Registration Routine
668 * igb_init_module is the first routine called when the driver is
669 * loaded. All it does is register with the PCI subsystem.
671 static int __init
igb_init_module(void)
675 pr_info("%s - version %s\n",
676 igb_driver_string
, igb_driver_version
);
677 pr_info("%s\n", igb_copyright
);
679 #ifdef CONFIG_IGB_DCA
680 dca_register_notify(&dca_notifier
);
682 ret
= pci_register_driver(&igb_driver
);
686 module_init(igb_init_module
);
689 * igb_exit_module - Driver Exit Cleanup Routine
691 * igb_exit_module is called just before the driver is removed
694 static void __exit
igb_exit_module(void)
696 #ifdef CONFIG_IGB_DCA
697 dca_unregister_notify(&dca_notifier
);
699 pci_unregister_driver(&igb_driver
);
702 module_exit(igb_exit_module
);
704 #define Q_IDX_82576(i) (((i & 0x1) << 3) + (i >> 1))
706 * igb_cache_ring_register - Descriptor ring to register mapping
707 * @adapter: board private structure to initialize
709 * Once we know the feature-set enabled for the device, we'll cache
710 * the register offset the descriptor ring is assigned to.
712 static void igb_cache_ring_register(struct igb_adapter
*adapter
)
715 u32 rbase_offset
= adapter
->vfs_allocated_count
;
717 switch (adapter
->hw
.mac
.type
) {
719 /* The queues are allocated for virtualization such that VF 0
720 * is allocated queues 0 and 8, VF 1 queues 1 and 9, etc.
721 * In order to avoid collision we start at the first free queue
722 * and continue consuming queues in the same sequence
724 if (adapter
->vfs_allocated_count
) {
725 for (; i
< adapter
->rss_queues
; i
++)
726 adapter
->rx_ring
[i
]->reg_idx
= rbase_offset
+
738 for (; i
< adapter
->num_rx_queues
; i
++)
739 adapter
->rx_ring
[i
]->reg_idx
= rbase_offset
+ i
;
740 for (; j
< adapter
->num_tx_queues
; j
++)
741 adapter
->tx_ring
[j
]->reg_idx
= rbase_offset
+ j
;
746 u32
igb_rd32(struct e1000_hw
*hw
, u32 reg
)
748 struct igb_adapter
*igb
= container_of(hw
, struct igb_adapter
, hw
);
749 u8 __iomem
*hw_addr
= ACCESS_ONCE(hw
->hw_addr
);
752 if (E1000_REMOVED(hw_addr
))
755 value
= readl(&hw_addr
[reg
]);
757 /* reads should not return all F's */
758 if (!(~value
) && (!reg
|| !(~readl(hw_addr
)))) {
759 struct net_device
*netdev
= igb
->netdev
;
761 netif_device_detach(netdev
);
762 netdev_err(netdev
, "PCIe link lost, device now detached\n");
769 * igb_write_ivar - configure ivar for given MSI-X vector
770 * @hw: pointer to the HW structure
771 * @msix_vector: vector number we are allocating to a given ring
772 * @index: row index of IVAR register to write within IVAR table
773 * @offset: column offset of in IVAR, should be multiple of 8
775 * This function is intended to handle the writing of the IVAR register
776 * for adapters 82576 and newer. The IVAR table consists of 2 columns,
777 * each containing an cause allocation for an Rx and Tx ring, and a
778 * variable number of rows depending on the number of queues supported.
780 static void igb_write_ivar(struct e1000_hw
*hw
, int msix_vector
,
781 int index
, int offset
)
783 u32 ivar
= array_rd32(E1000_IVAR0
, index
);
785 /* clear any bits that are currently set */
786 ivar
&= ~((u32
)0xFF << offset
);
788 /* write vector and valid bit */
789 ivar
|= (msix_vector
| E1000_IVAR_VALID
) << offset
;
791 array_wr32(E1000_IVAR0
, index
, ivar
);
794 #define IGB_N0_QUEUE -1
795 static void igb_assign_vector(struct igb_q_vector
*q_vector
, int msix_vector
)
797 struct igb_adapter
*adapter
= q_vector
->adapter
;
798 struct e1000_hw
*hw
= &adapter
->hw
;
799 int rx_queue
= IGB_N0_QUEUE
;
800 int tx_queue
= IGB_N0_QUEUE
;
803 if (q_vector
->rx
.ring
)
804 rx_queue
= q_vector
->rx
.ring
->reg_idx
;
805 if (q_vector
->tx
.ring
)
806 tx_queue
= q_vector
->tx
.ring
->reg_idx
;
808 switch (hw
->mac
.type
) {
810 /* The 82575 assigns vectors using a bitmask, which matches the
811 * bitmask for the EICR/EIMS/EIMC registers. To assign one
812 * or more queues to a vector, we write the appropriate bits
813 * into the MSIXBM register for that vector.
815 if (rx_queue
> IGB_N0_QUEUE
)
816 msixbm
= E1000_EICR_RX_QUEUE0
<< rx_queue
;
817 if (tx_queue
> IGB_N0_QUEUE
)
818 msixbm
|= E1000_EICR_TX_QUEUE0
<< tx_queue
;
819 if (!(adapter
->flags
& IGB_FLAG_HAS_MSIX
) && msix_vector
== 0)
820 msixbm
|= E1000_EIMS_OTHER
;
821 array_wr32(E1000_MSIXBM(0), msix_vector
, msixbm
);
822 q_vector
->eims_value
= msixbm
;
825 /* 82576 uses a table that essentially consists of 2 columns
826 * with 8 rows. The ordering is column-major so we use the
827 * lower 3 bits as the row index, and the 4th bit as the
830 if (rx_queue
> IGB_N0_QUEUE
)
831 igb_write_ivar(hw
, msix_vector
,
833 (rx_queue
& 0x8) << 1);
834 if (tx_queue
> IGB_N0_QUEUE
)
835 igb_write_ivar(hw
, msix_vector
,
837 ((tx_queue
& 0x8) << 1) + 8);
838 q_vector
->eims_value
= 1 << msix_vector
;
845 /* On 82580 and newer adapters the scheme is similar to 82576
846 * however instead of ordering column-major we have things
847 * ordered row-major. So we traverse the table by using
848 * bit 0 as the column offset, and the remaining bits as the
851 if (rx_queue
> IGB_N0_QUEUE
)
852 igb_write_ivar(hw
, msix_vector
,
854 (rx_queue
& 0x1) << 4);
855 if (tx_queue
> IGB_N0_QUEUE
)
856 igb_write_ivar(hw
, msix_vector
,
858 ((tx_queue
& 0x1) << 4) + 8);
859 q_vector
->eims_value
= 1 << msix_vector
;
866 /* add q_vector eims value to global eims_enable_mask */
867 adapter
->eims_enable_mask
|= q_vector
->eims_value
;
869 /* configure q_vector to set itr on first interrupt */
870 q_vector
->set_itr
= 1;
874 * igb_configure_msix - Configure MSI-X hardware
875 * @adapter: board private structure to initialize
877 * igb_configure_msix sets up the hardware to properly
878 * generate MSI-X interrupts.
880 static void igb_configure_msix(struct igb_adapter
*adapter
)
884 struct e1000_hw
*hw
= &adapter
->hw
;
886 adapter
->eims_enable_mask
= 0;
888 /* set vector for other causes, i.e. link changes */
889 switch (hw
->mac
.type
) {
891 tmp
= rd32(E1000_CTRL_EXT
);
892 /* enable MSI-X PBA support*/
893 tmp
|= E1000_CTRL_EXT_PBA_CLR
;
895 /* Auto-Mask interrupts upon ICR read. */
896 tmp
|= E1000_CTRL_EXT_EIAME
;
897 tmp
|= E1000_CTRL_EXT_IRCA
;
899 wr32(E1000_CTRL_EXT
, tmp
);
901 /* enable msix_other interrupt */
902 array_wr32(E1000_MSIXBM(0), vector
++, E1000_EIMS_OTHER
);
903 adapter
->eims_other
= E1000_EIMS_OTHER
;
913 /* Turn on MSI-X capability first, or our settings
914 * won't stick. And it will take days to debug.
916 wr32(E1000_GPIE
, E1000_GPIE_MSIX_MODE
|
917 E1000_GPIE_PBA
| E1000_GPIE_EIAME
|
920 /* enable msix_other interrupt */
921 adapter
->eims_other
= 1 << vector
;
922 tmp
= (vector
++ | E1000_IVAR_VALID
) << 8;
924 wr32(E1000_IVAR_MISC
, tmp
);
927 /* do nothing, since nothing else supports MSI-X */
929 } /* switch (hw->mac.type) */
931 adapter
->eims_enable_mask
|= adapter
->eims_other
;
933 for (i
= 0; i
< adapter
->num_q_vectors
; i
++)
934 igb_assign_vector(adapter
->q_vector
[i
], vector
++);
940 * igb_request_msix - Initialize MSI-X interrupts
941 * @adapter: board private structure to initialize
943 * igb_request_msix allocates MSI-X vectors and requests interrupts from the
946 static int igb_request_msix(struct igb_adapter
*adapter
)
948 struct net_device
*netdev
= adapter
->netdev
;
949 struct e1000_hw
*hw
= &adapter
->hw
;
950 int i
, err
= 0, vector
= 0, free_vector
= 0;
952 err
= request_irq(adapter
->msix_entries
[vector
].vector
,
953 igb_msix_other
, 0, netdev
->name
, adapter
);
957 for (i
= 0; i
< adapter
->num_q_vectors
; i
++) {
958 struct igb_q_vector
*q_vector
= adapter
->q_vector
[i
];
962 q_vector
->itr_register
= hw
->hw_addr
+ E1000_EITR(vector
);
964 if (q_vector
->rx
.ring
&& q_vector
->tx
.ring
)
965 sprintf(q_vector
->name
, "%s-TxRx-%u", netdev
->name
,
966 q_vector
->rx
.ring
->queue_index
);
967 else if (q_vector
->tx
.ring
)
968 sprintf(q_vector
->name
, "%s-tx-%u", netdev
->name
,
969 q_vector
->tx
.ring
->queue_index
);
970 else if (q_vector
->rx
.ring
)
971 sprintf(q_vector
->name
, "%s-rx-%u", netdev
->name
,
972 q_vector
->rx
.ring
->queue_index
);
974 sprintf(q_vector
->name
, "%s-unused", netdev
->name
);
976 err
= request_irq(adapter
->msix_entries
[vector
].vector
,
977 igb_msix_ring
, 0, q_vector
->name
,
983 igb_configure_msix(adapter
);
987 /* free already assigned IRQs */
988 free_irq(adapter
->msix_entries
[free_vector
++].vector
, adapter
);
991 for (i
= 0; i
< vector
; i
++) {
992 free_irq(adapter
->msix_entries
[free_vector
++].vector
,
993 adapter
->q_vector
[i
]);
1000 * igb_free_q_vector - Free memory allocated for specific interrupt vector
1001 * @adapter: board private structure to initialize
1002 * @v_idx: Index of vector to be freed
1004 * This function frees the memory allocated to the q_vector.
1006 static void igb_free_q_vector(struct igb_adapter
*adapter
, int v_idx
)
1008 struct igb_q_vector
*q_vector
= adapter
->q_vector
[v_idx
];
1010 adapter
->q_vector
[v_idx
] = NULL
;
1012 /* igb_get_stats64() might access the rings on this vector,
1013 * we must wait a grace period before freeing it.
1015 kfree_rcu(q_vector
, rcu
);
1019 * igb_reset_q_vector - Reset config for interrupt vector
1020 * @adapter: board private structure to initialize
1021 * @v_idx: Index of vector to be reset
1023 * If NAPI is enabled it will delete any references to the
1024 * NAPI struct. This is preparation for igb_free_q_vector.
1026 static void igb_reset_q_vector(struct igb_adapter
*adapter
, int v_idx
)
1028 struct igb_q_vector
*q_vector
= adapter
->q_vector
[v_idx
];
1030 /* Coming from igb_set_interrupt_capability, the vectors are not yet
1031 * allocated. So, q_vector is NULL so we should stop here.
1036 if (q_vector
->tx
.ring
)
1037 adapter
->tx_ring
[q_vector
->tx
.ring
->queue_index
] = NULL
;
1039 if (q_vector
->rx
.ring
)
1040 adapter
->tx_ring
[q_vector
->rx
.ring
->queue_index
] = NULL
;
1042 netif_napi_del(&q_vector
->napi
);
1046 static void igb_reset_interrupt_capability(struct igb_adapter
*adapter
)
1048 int v_idx
= adapter
->num_q_vectors
;
1050 if (adapter
->flags
& IGB_FLAG_HAS_MSIX
)
1051 pci_disable_msix(adapter
->pdev
);
1052 else if (adapter
->flags
& IGB_FLAG_HAS_MSI
)
1053 pci_disable_msi(adapter
->pdev
);
1056 igb_reset_q_vector(adapter
, v_idx
);
1060 * igb_free_q_vectors - Free memory allocated for interrupt vectors
1061 * @adapter: board private structure to initialize
1063 * This function frees the memory allocated to the q_vectors. In addition if
1064 * NAPI is enabled it will delete any references to the NAPI struct prior
1065 * to freeing the q_vector.
1067 static void igb_free_q_vectors(struct igb_adapter
*adapter
)
1069 int v_idx
= adapter
->num_q_vectors
;
1071 adapter
->num_tx_queues
= 0;
1072 adapter
->num_rx_queues
= 0;
1073 adapter
->num_q_vectors
= 0;
1076 igb_reset_q_vector(adapter
, v_idx
);
1077 igb_free_q_vector(adapter
, v_idx
);
1082 * igb_clear_interrupt_scheme - reset the device to a state of no interrupts
1083 * @adapter: board private structure to initialize
1085 * This function resets the device so that it has 0 Rx queues, Tx queues, and
1086 * MSI-X interrupts allocated.
1088 static void igb_clear_interrupt_scheme(struct igb_adapter
*adapter
)
1090 igb_free_q_vectors(adapter
);
1091 igb_reset_interrupt_capability(adapter
);
1095 * igb_set_interrupt_capability - set MSI or MSI-X if supported
1096 * @adapter: board private structure to initialize
1097 * @msix: boolean value of MSIX capability
1099 * Attempt to configure interrupts using the best available
1100 * capabilities of the hardware and kernel.
1102 static void igb_set_interrupt_capability(struct igb_adapter
*adapter
, bool msix
)
1109 adapter
->flags
|= IGB_FLAG_HAS_MSIX
;
1111 /* Number of supported queues. */
1112 adapter
->num_rx_queues
= adapter
->rss_queues
;
1113 if (adapter
->vfs_allocated_count
)
1114 adapter
->num_tx_queues
= 1;
1116 adapter
->num_tx_queues
= adapter
->rss_queues
;
1118 /* start with one vector for every Rx queue */
1119 numvecs
= adapter
->num_rx_queues
;
1121 /* if Tx handler is separate add 1 for every Tx queue */
1122 if (!(adapter
->flags
& IGB_FLAG_QUEUE_PAIRS
))
1123 numvecs
+= adapter
->num_tx_queues
;
1125 /* store the number of vectors reserved for queues */
1126 adapter
->num_q_vectors
= numvecs
;
1128 /* add 1 vector for link status interrupts */
1130 for (i
= 0; i
< numvecs
; i
++)
1131 adapter
->msix_entries
[i
].entry
= i
;
1133 err
= pci_enable_msix_range(adapter
->pdev
,
1134 adapter
->msix_entries
,
1140 igb_reset_interrupt_capability(adapter
);
1142 /* If we can't do MSI-X, try MSI */
1144 adapter
->flags
&= ~IGB_FLAG_HAS_MSIX
;
1145 #ifdef CONFIG_PCI_IOV
1146 /* disable SR-IOV for non MSI-X configurations */
1147 if (adapter
->vf_data
) {
1148 struct e1000_hw
*hw
= &adapter
->hw
;
1149 /* disable iov and allow time for transactions to clear */
1150 pci_disable_sriov(adapter
->pdev
);
1153 kfree(adapter
->vf_data
);
1154 adapter
->vf_data
= NULL
;
1155 wr32(E1000_IOVCTL
, E1000_IOVCTL_REUSE_VFQ
);
1158 dev_info(&adapter
->pdev
->dev
, "IOV Disabled\n");
1161 adapter
->vfs_allocated_count
= 0;
1162 adapter
->rss_queues
= 1;
1163 adapter
->flags
|= IGB_FLAG_QUEUE_PAIRS
;
1164 adapter
->num_rx_queues
= 1;
1165 adapter
->num_tx_queues
= 1;
1166 adapter
->num_q_vectors
= 1;
1167 if (!pci_enable_msi(adapter
->pdev
))
1168 adapter
->flags
|= IGB_FLAG_HAS_MSI
;
1171 static void igb_add_ring(struct igb_ring
*ring
,
1172 struct igb_ring_container
*head
)
1179 * igb_alloc_q_vector - Allocate memory for a single interrupt vector
1180 * @adapter: board private structure to initialize
1181 * @v_count: q_vectors allocated on adapter, used for ring interleaving
1182 * @v_idx: index of vector in adapter struct
1183 * @txr_count: total number of Tx rings to allocate
1184 * @txr_idx: index of first Tx ring to allocate
1185 * @rxr_count: total number of Rx rings to allocate
1186 * @rxr_idx: index of first Rx ring to allocate
1188 * We allocate one q_vector. If allocation fails we return -ENOMEM.
1190 static int igb_alloc_q_vector(struct igb_adapter
*adapter
,
1191 int v_count
, int v_idx
,
1192 int txr_count
, int txr_idx
,
1193 int rxr_count
, int rxr_idx
)
1195 struct igb_q_vector
*q_vector
;
1196 struct igb_ring
*ring
;
1197 int ring_count
, size
;
1199 /* igb only supports 1 Tx and/or 1 Rx queue per vector */
1200 if (txr_count
> 1 || rxr_count
> 1)
1203 ring_count
= txr_count
+ rxr_count
;
1204 size
= sizeof(struct igb_q_vector
) +
1205 (sizeof(struct igb_ring
) * ring_count
);
1207 /* allocate q_vector and rings */
1208 q_vector
= adapter
->q_vector
[v_idx
];
1210 q_vector
= kzalloc(size
, GFP_KERNEL
);
1214 /* initialize NAPI */
1215 netif_napi_add(adapter
->netdev
, &q_vector
->napi
,
1218 /* tie q_vector and adapter together */
1219 adapter
->q_vector
[v_idx
] = q_vector
;
1220 q_vector
->adapter
= adapter
;
1222 /* initialize work limits */
1223 q_vector
->tx
.work_limit
= adapter
->tx_work_limit
;
1225 /* initialize ITR configuration */
1226 q_vector
->itr_register
= adapter
->hw
.hw_addr
+ E1000_EITR(0);
1227 q_vector
->itr_val
= IGB_START_ITR
;
1229 /* initialize pointer to rings */
1230 ring
= q_vector
->ring
;
1234 /* rx or rx/tx vector */
1235 if (!adapter
->rx_itr_setting
|| adapter
->rx_itr_setting
> 3)
1236 q_vector
->itr_val
= adapter
->rx_itr_setting
;
1238 /* tx only vector */
1239 if (!adapter
->tx_itr_setting
|| adapter
->tx_itr_setting
> 3)
1240 q_vector
->itr_val
= adapter
->tx_itr_setting
;
1244 /* assign generic ring traits */
1245 ring
->dev
= &adapter
->pdev
->dev
;
1246 ring
->netdev
= adapter
->netdev
;
1248 /* configure backlink on ring */
1249 ring
->q_vector
= q_vector
;
1251 /* update q_vector Tx values */
1252 igb_add_ring(ring
, &q_vector
->tx
);
1254 /* For 82575, context index must be unique per ring. */
1255 if (adapter
->hw
.mac
.type
== e1000_82575
)
1256 set_bit(IGB_RING_FLAG_TX_CTX_IDX
, &ring
->flags
);
1258 /* apply Tx specific ring traits */
1259 ring
->count
= adapter
->tx_ring_count
;
1260 ring
->queue_index
= txr_idx
;
1262 u64_stats_init(&ring
->tx_syncp
);
1263 u64_stats_init(&ring
->tx_syncp2
);
1265 /* assign ring to adapter */
1266 adapter
->tx_ring
[txr_idx
] = ring
;
1268 /* push pointer to next ring */
1273 /* assign generic ring traits */
1274 ring
->dev
= &adapter
->pdev
->dev
;
1275 ring
->netdev
= adapter
->netdev
;
1277 /* configure backlink on ring */
1278 ring
->q_vector
= q_vector
;
1280 /* update q_vector Rx values */
1281 igb_add_ring(ring
, &q_vector
->rx
);
1283 /* set flag indicating ring supports SCTP checksum offload */
1284 if (adapter
->hw
.mac
.type
>= e1000_82576
)
1285 set_bit(IGB_RING_FLAG_RX_SCTP_CSUM
, &ring
->flags
);
1287 /* On i350, i354, i210, and i211, loopback VLAN packets
1288 * have the tag byte-swapped.
1290 if (adapter
->hw
.mac
.type
>= e1000_i350
)
1291 set_bit(IGB_RING_FLAG_RX_LB_VLAN_BSWAP
, &ring
->flags
);
1293 /* apply Rx specific ring traits */
1294 ring
->count
= adapter
->rx_ring_count
;
1295 ring
->queue_index
= rxr_idx
;
1297 u64_stats_init(&ring
->rx_syncp
);
1299 /* assign ring to adapter */
1300 adapter
->rx_ring
[rxr_idx
] = ring
;
1308 * igb_alloc_q_vectors - Allocate memory for interrupt vectors
1309 * @adapter: board private structure to initialize
1311 * We allocate one q_vector per queue interrupt. If allocation fails we
1314 static int igb_alloc_q_vectors(struct igb_adapter
*adapter
)
1316 int q_vectors
= adapter
->num_q_vectors
;
1317 int rxr_remaining
= adapter
->num_rx_queues
;
1318 int txr_remaining
= adapter
->num_tx_queues
;
1319 int rxr_idx
= 0, txr_idx
= 0, v_idx
= 0;
1322 if (q_vectors
>= (rxr_remaining
+ txr_remaining
)) {
1323 for (; rxr_remaining
; v_idx
++) {
1324 err
= igb_alloc_q_vector(adapter
, q_vectors
, v_idx
,
1330 /* update counts and index */
1336 for (; v_idx
< q_vectors
; v_idx
++) {
1337 int rqpv
= DIV_ROUND_UP(rxr_remaining
, q_vectors
- v_idx
);
1338 int tqpv
= DIV_ROUND_UP(txr_remaining
, q_vectors
- v_idx
);
1340 err
= igb_alloc_q_vector(adapter
, q_vectors
, v_idx
,
1341 tqpv
, txr_idx
, rqpv
, rxr_idx
);
1346 /* update counts and index */
1347 rxr_remaining
-= rqpv
;
1348 txr_remaining
-= tqpv
;
1356 adapter
->num_tx_queues
= 0;
1357 adapter
->num_rx_queues
= 0;
1358 adapter
->num_q_vectors
= 0;
1361 igb_free_q_vector(adapter
, v_idx
);
1367 * igb_init_interrupt_scheme - initialize interrupts, allocate queues/vectors
1368 * @adapter: board private structure to initialize
1369 * @msix: boolean value of MSIX capability
1371 * This function initializes the interrupts and allocates all of the queues.
1373 static int igb_init_interrupt_scheme(struct igb_adapter
*adapter
, bool msix
)
1375 struct pci_dev
*pdev
= adapter
->pdev
;
1378 igb_set_interrupt_capability(adapter
, msix
);
1380 err
= igb_alloc_q_vectors(adapter
);
1382 dev_err(&pdev
->dev
, "Unable to allocate memory for vectors\n");
1383 goto err_alloc_q_vectors
;
1386 igb_cache_ring_register(adapter
);
1390 err_alloc_q_vectors
:
1391 igb_reset_interrupt_capability(adapter
);
1396 * igb_request_irq - initialize interrupts
1397 * @adapter: board private structure to initialize
1399 * Attempts to configure interrupts using the best available
1400 * capabilities of the hardware and kernel.
1402 static int igb_request_irq(struct igb_adapter
*adapter
)
1404 struct net_device
*netdev
= adapter
->netdev
;
1405 struct pci_dev
*pdev
= adapter
->pdev
;
1408 if (adapter
->flags
& IGB_FLAG_HAS_MSIX
) {
1409 err
= igb_request_msix(adapter
);
1412 /* fall back to MSI */
1413 igb_free_all_tx_resources(adapter
);
1414 igb_free_all_rx_resources(adapter
);
1416 igb_clear_interrupt_scheme(adapter
);
1417 err
= igb_init_interrupt_scheme(adapter
, false);
1421 igb_setup_all_tx_resources(adapter
);
1422 igb_setup_all_rx_resources(adapter
);
1423 igb_configure(adapter
);
1426 igb_assign_vector(adapter
->q_vector
[0], 0);
1428 if (adapter
->flags
& IGB_FLAG_HAS_MSI
) {
1429 err
= request_irq(pdev
->irq
, igb_intr_msi
, 0,
1430 netdev
->name
, adapter
);
1434 /* fall back to legacy interrupts */
1435 igb_reset_interrupt_capability(adapter
);
1436 adapter
->flags
&= ~IGB_FLAG_HAS_MSI
;
1439 err
= request_irq(pdev
->irq
, igb_intr
, IRQF_SHARED
,
1440 netdev
->name
, adapter
);
1443 dev_err(&pdev
->dev
, "Error %d getting interrupt\n",
1450 static void igb_free_irq(struct igb_adapter
*adapter
)
1452 if (adapter
->flags
& IGB_FLAG_HAS_MSIX
) {
1455 free_irq(adapter
->msix_entries
[vector
++].vector
, adapter
);
1457 for (i
= 0; i
< adapter
->num_q_vectors
; i
++)
1458 free_irq(adapter
->msix_entries
[vector
++].vector
,
1459 adapter
->q_vector
[i
]);
1461 free_irq(adapter
->pdev
->irq
, adapter
);
1466 * igb_irq_disable - Mask off interrupt generation on the NIC
1467 * @adapter: board private structure
1469 static void igb_irq_disable(struct igb_adapter
*adapter
)
1471 struct e1000_hw
*hw
= &adapter
->hw
;
1473 /* we need to be careful when disabling interrupts. The VFs are also
1474 * mapped into these registers and so clearing the bits can cause
1475 * issues on the VF drivers so we only need to clear what we set
1477 if (adapter
->flags
& IGB_FLAG_HAS_MSIX
) {
1478 u32 regval
= rd32(E1000_EIAM
);
1480 wr32(E1000_EIAM
, regval
& ~adapter
->eims_enable_mask
);
1481 wr32(E1000_EIMC
, adapter
->eims_enable_mask
);
1482 regval
= rd32(E1000_EIAC
);
1483 wr32(E1000_EIAC
, regval
& ~adapter
->eims_enable_mask
);
1487 wr32(E1000_IMC
, ~0);
1489 if (adapter
->flags
& IGB_FLAG_HAS_MSIX
) {
1492 for (i
= 0; i
< adapter
->num_q_vectors
; i
++)
1493 synchronize_irq(adapter
->msix_entries
[i
].vector
);
1495 synchronize_irq(adapter
->pdev
->irq
);
1500 * igb_irq_enable - Enable default interrupt generation settings
1501 * @adapter: board private structure
1503 static void igb_irq_enable(struct igb_adapter
*adapter
)
1505 struct e1000_hw
*hw
= &adapter
->hw
;
1507 if (adapter
->flags
& IGB_FLAG_HAS_MSIX
) {
1508 u32 ims
= E1000_IMS_LSC
| E1000_IMS_DOUTSYNC
| E1000_IMS_DRSTA
;
1509 u32 regval
= rd32(E1000_EIAC
);
1511 wr32(E1000_EIAC
, regval
| adapter
->eims_enable_mask
);
1512 regval
= rd32(E1000_EIAM
);
1513 wr32(E1000_EIAM
, regval
| adapter
->eims_enable_mask
);
1514 wr32(E1000_EIMS
, adapter
->eims_enable_mask
);
1515 if (adapter
->vfs_allocated_count
) {
1516 wr32(E1000_MBVFIMR
, 0xFF);
1517 ims
|= E1000_IMS_VMMB
;
1519 wr32(E1000_IMS
, ims
);
1521 wr32(E1000_IMS
, IMS_ENABLE_MASK
|
1523 wr32(E1000_IAM
, IMS_ENABLE_MASK
|
1528 static void igb_update_mng_vlan(struct igb_adapter
*adapter
)
1530 struct e1000_hw
*hw
= &adapter
->hw
;
1531 u16 vid
= adapter
->hw
.mng_cookie
.vlan_id
;
1532 u16 old_vid
= adapter
->mng_vlan_id
;
1534 if (hw
->mng_cookie
.status
& E1000_MNG_DHCP_COOKIE_STATUS_VLAN
) {
1535 /* add VID to filter table */
1536 igb_vfta_set(hw
, vid
, true);
1537 adapter
->mng_vlan_id
= vid
;
1539 adapter
->mng_vlan_id
= IGB_MNG_VLAN_NONE
;
1542 if ((old_vid
!= (u16
)IGB_MNG_VLAN_NONE
) &&
1544 !test_bit(old_vid
, adapter
->active_vlans
)) {
1545 /* remove VID from filter table */
1546 igb_vfta_set(hw
, old_vid
, false);
1551 * igb_release_hw_control - release control of the h/w to f/w
1552 * @adapter: address of board private structure
1554 * igb_release_hw_control resets CTRL_EXT:DRV_LOAD bit.
1555 * For ASF and Pass Through versions of f/w this means that the
1556 * driver is no longer loaded.
1558 static void igb_release_hw_control(struct igb_adapter
*adapter
)
1560 struct e1000_hw
*hw
= &adapter
->hw
;
1563 /* Let firmware take over control of h/w */
1564 ctrl_ext
= rd32(E1000_CTRL_EXT
);
1565 wr32(E1000_CTRL_EXT
,
1566 ctrl_ext
& ~E1000_CTRL_EXT_DRV_LOAD
);
1570 * igb_get_hw_control - get control of the h/w from f/w
1571 * @adapter: address of board private structure
1573 * igb_get_hw_control sets CTRL_EXT:DRV_LOAD bit.
1574 * For ASF and Pass Through versions of f/w this means that
1575 * the driver is loaded.
1577 static void igb_get_hw_control(struct igb_adapter
*adapter
)
1579 struct e1000_hw
*hw
= &adapter
->hw
;
1582 /* Let firmware know the driver has taken over */
1583 ctrl_ext
= rd32(E1000_CTRL_EXT
);
1584 wr32(E1000_CTRL_EXT
,
1585 ctrl_ext
| E1000_CTRL_EXT_DRV_LOAD
);
1589 * igb_configure - configure the hardware for RX and TX
1590 * @adapter: private board structure
1592 static void igb_configure(struct igb_adapter
*adapter
)
1594 struct net_device
*netdev
= adapter
->netdev
;
1597 igb_get_hw_control(adapter
);
1598 igb_set_rx_mode(netdev
);
1600 igb_restore_vlan(adapter
);
1602 igb_setup_tctl(adapter
);
1603 igb_setup_mrqc(adapter
);
1604 igb_setup_rctl(adapter
);
1606 igb_configure_tx(adapter
);
1607 igb_configure_rx(adapter
);
1609 igb_rx_fifo_flush_82575(&adapter
->hw
);
1611 /* call igb_desc_unused which always leaves
1612 * at least 1 descriptor unused to make sure
1613 * next_to_use != next_to_clean
1615 for (i
= 0; i
< adapter
->num_rx_queues
; i
++) {
1616 struct igb_ring
*ring
= adapter
->rx_ring
[i
];
1617 igb_alloc_rx_buffers(ring
, igb_desc_unused(ring
));
1622 * igb_power_up_link - Power up the phy/serdes link
1623 * @adapter: address of board private structure
1625 void igb_power_up_link(struct igb_adapter
*adapter
)
1627 igb_reset_phy(&adapter
->hw
);
1629 if (adapter
->hw
.phy
.media_type
== e1000_media_type_copper
)
1630 igb_power_up_phy_copper(&adapter
->hw
);
1632 igb_power_up_serdes_link_82575(&adapter
->hw
);
1636 * igb_power_down_link - Power down the phy/serdes link
1637 * @adapter: address of board private structure
1639 static void igb_power_down_link(struct igb_adapter
*adapter
)
1641 if (adapter
->hw
.phy
.media_type
== e1000_media_type_copper
)
1642 igb_power_down_phy_copper_82575(&adapter
->hw
);
1644 igb_shutdown_serdes_link_82575(&adapter
->hw
);
1648 * Detect and switch function for Media Auto Sense
1649 * @adapter: address of the board private structure
1651 static void igb_check_swap_media(struct igb_adapter
*adapter
)
1653 struct e1000_hw
*hw
= &adapter
->hw
;
1654 u32 ctrl_ext
, connsw
;
1655 bool swap_now
= false;
1657 ctrl_ext
= rd32(E1000_CTRL_EXT
);
1658 connsw
= rd32(E1000_CONNSW
);
1660 /* need to live swap if current media is copper and we have fiber/serdes
1664 if ((hw
->phy
.media_type
== e1000_media_type_copper
) &&
1665 (!(connsw
& E1000_CONNSW_AUTOSENSE_EN
))) {
1667 } else if (!(connsw
& E1000_CONNSW_SERDESD
)) {
1668 /* copper signal takes time to appear */
1669 if (adapter
->copper_tries
< 4) {
1670 adapter
->copper_tries
++;
1671 connsw
|= E1000_CONNSW_AUTOSENSE_CONF
;
1672 wr32(E1000_CONNSW
, connsw
);
1675 adapter
->copper_tries
= 0;
1676 if ((connsw
& E1000_CONNSW_PHYSD
) &&
1677 (!(connsw
& E1000_CONNSW_PHY_PDN
))) {
1679 connsw
&= ~E1000_CONNSW_AUTOSENSE_CONF
;
1680 wr32(E1000_CONNSW
, connsw
);
1688 switch (hw
->phy
.media_type
) {
1689 case e1000_media_type_copper
:
1690 netdev_info(adapter
->netdev
,
1691 "MAS: changing media to fiber/serdes\n");
1693 E1000_CTRL_EXT_LINK_MODE_PCIE_SERDES
;
1694 adapter
->flags
|= IGB_FLAG_MEDIA_RESET
;
1695 adapter
->copper_tries
= 0;
1697 case e1000_media_type_internal_serdes
:
1698 case e1000_media_type_fiber
:
1699 netdev_info(adapter
->netdev
,
1700 "MAS: changing media to copper\n");
1702 ~E1000_CTRL_EXT_LINK_MODE_PCIE_SERDES
;
1703 adapter
->flags
|= IGB_FLAG_MEDIA_RESET
;
1706 /* shouldn't get here during regular operation */
1707 netdev_err(adapter
->netdev
,
1708 "AMS: Invalid media type found, returning\n");
1711 wr32(E1000_CTRL_EXT
, ctrl_ext
);
1715 * igb_up - Open the interface and prepare it to handle traffic
1716 * @adapter: board private structure
1718 int igb_up(struct igb_adapter
*adapter
)
1720 struct e1000_hw
*hw
= &adapter
->hw
;
1723 /* hardware has been reset, we need to reload some things */
1724 igb_configure(adapter
);
1726 clear_bit(__IGB_DOWN
, &adapter
->state
);
1728 for (i
= 0; i
< adapter
->num_q_vectors
; i
++)
1729 napi_enable(&(adapter
->q_vector
[i
]->napi
));
1731 if (adapter
->flags
& IGB_FLAG_HAS_MSIX
)
1732 igb_configure_msix(adapter
);
1734 igb_assign_vector(adapter
->q_vector
[0], 0);
1736 /* Clear any pending interrupts. */
1738 igb_irq_enable(adapter
);
1740 /* notify VFs that reset has been completed */
1741 if (adapter
->vfs_allocated_count
) {
1742 u32 reg_data
= rd32(E1000_CTRL_EXT
);
1744 reg_data
|= E1000_CTRL_EXT_PFRSTD
;
1745 wr32(E1000_CTRL_EXT
, reg_data
);
1748 netif_tx_start_all_queues(adapter
->netdev
);
1750 /* start the watchdog. */
1751 hw
->mac
.get_link_status
= 1;
1752 schedule_work(&adapter
->watchdog_task
);
1754 if ((adapter
->flags
& IGB_FLAG_EEE
) &&
1755 (!hw
->dev_spec
._82575
.eee_disable
))
1756 adapter
->eee_advert
= MDIO_EEE_100TX
| MDIO_EEE_1000T
;
1761 void igb_down(struct igb_adapter
*adapter
)
1763 struct net_device
*netdev
= adapter
->netdev
;
1764 struct e1000_hw
*hw
= &adapter
->hw
;
1768 /* signal that we're down so the interrupt handler does not
1769 * reschedule our watchdog timer
1771 set_bit(__IGB_DOWN
, &adapter
->state
);
1773 /* disable receives in the hardware */
1774 rctl
= rd32(E1000_RCTL
);
1775 wr32(E1000_RCTL
, rctl
& ~E1000_RCTL_EN
);
1776 /* flush and sleep below */
1778 netif_tx_stop_all_queues(netdev
);
1780 /* disable transmits in the hardware */
1781 tctl
= rd32(E1000_TCTL
);
1782 tctl
&= ~E1000_TCTL_EN
;
1783 wr32(E1000_TCTL
, tctl
);
1784 /* flush both disables and wait for them to finish */
1786 usleep_range(10000, 11000);
1788 igb_irq_disable(adapter
);
1790 adapter
->flags
&= ~IGB_FLAG_NEED_LINK_UPDATE
;
1792 for (i
= 0; i
< adapter
->num_q_vectors
; i
++) {
1793 napi_synchronize(&(adapter
->q_vector
[i
]->napi
));
1794 napi_disable(&(adapter
->q_vector
[i
]->napi
));
1798 del_timer_sync(&adapter
->watchdog_timer
);
1799 del_timer_sync(&adapter
->phy_info_timer
);
1801 netif_carrier_off(netdev
);
1803 /* record the stats before reset*/
1804 spin_lock(&adapter
->stats64_lock
);
1805 igb_update_stats(adapter
, &adapter
->stats64
);
1806 spin_unlock(&adapter
->stats64_lock
);
1808 adapter
->link_speed
= 0;
1809 adapter
->link_duplex
= 0;
1811 if (!pci_channel_offline(adapter
->pdev
))
1813 igb_clean_all_tx_rings(adapter
);
1814 igb_clean_all_rx_rings(adapter
);
1815 #ifdef CONFIG_IGB_DCA
1817 /* since we reset the hardware DCA settings were cleared */
1818 igb_setup_dca(adapter
);
1822 void igb_reinit_locked(struct igb_adapter
*adapter
)
1824 WARN_ON(in_interrupt());
1825 while (test_and_set_bit(__IGB_RESETTING
, &adapter
->state
))
1826 usleep_range(1000, 2000);
1829 clear_bit(__IGB_RESETTING
, &adapter
->state
);
1832 /** igb_enable_mas - Media Autosense re-enable after swap
1834 * @adapter: adapter struct
1836 static s32
igb_enable_mas(struct igb_adapter
*adapter
)
1838 struct e1000_hw
*hw
= &adapter
->hw
;
1842 connsw
= rd32(E1000_CONNSW
);
1843 if (!(hw
->phy
.media_type
== e1000_media_type_copper
))
1846 /* configure for SerDes media detect */
1847 if (!(connsw
& E1000_CONNSW_SERDESD
)) {
1848 connsw
|= E1000_CONNSW_ENRGSRC
;
1849 connsw
|= E1000_CONNSW_AUTOSENSE_EN
;
1850 wr32(E1000_CONNSW
, connsw
);
1852 } else if (connsw
& E1000_CONNSW_SERDESD
) {
1853 /* already SerDes, no need to enable anything */
1856 netdev_info(adapter
->netdev
,
1857 "MAS: Unable to configure feature, disabling..\n");
1858 adapter
->flags
&= ~IGB_FLAG_MAS_ENABLE
;
1863 void igb_reset(struct igb_adapter
*adapter
)
1865 struct pci_dev
*pdev
= adapter
->pdev
;
1866 struct e1000_hw
*hw
= &adapter
->hw
;
1867 struct e1000_mac_info
*mac
= &hw
->mac
;
1868 struct e1000_fc_info
*fc
= &hw
->fc
;
1869 u32 pba
= 0, tx_space
, min_tx_space
, min_rx_space
, hwm
;
1871 /* Repartition Pba for greater than 9k mtu
1872 * To take effect CTRL.RST is required.
1874 switch (mac
->type
) {
1878 pba
= rd32(E1000_RXPBS
);
1879 pba
= igb_rxpbs_adjust_82580(pba
);
1882 pba
= rd32(E1000_RXPBS
);
1883 pba
&= E1000_RXPBS_SIZE_MASK_82576
;
1889 pba
= E1000_PBA_34K
;
1893 if ((adapter
->max_frame_size
> ETH_FRAME_LEN
+ ETH_FCS_LEN
) &&
1894 (mac
->type
< e1000_82576
)) {
1895 /* adjust PBA for jumbo frames */
1896 wr32(E1000_PBA
, pba
);
1898 /* To maintain wire speed transmits, the Tx FIFO should be
1899 * large enough to accommodate two full transmit packets,
1900 * rounded up to the next 1KB and expressed in KB. Likewise,
1901 * the Rx FIFO should be large enough to accommodate at least
1902 * one full receive packet and is similarly rounded up and
1905 pba
= rd32(E1000_PBA
);
1906 /* upper 16 bits has Tx packet buffer allocation size in KB */
1907 tx_space
= pba
>> 16;
1908 /* lower 16 bits has Rx packet buffer allocation size in KB */
1910 /* the Tx fifo also stores 16 bytes of information about the Tx
1911 * but don't include ethernet FCS because hardware appends it
1913 min_tx_space
= (adapter
->max_frame_size
+
1914 sizeof(union e1000_adv_tx_desc
) -
1916 min_tx_space
= ALIGN(min_tx_space
, 1024);
1917 min_tx_space
>>= 10;
1918 /* software strips receive CRC, so leave room for it */
1919 min_rx_space
= adapter
->max_frame_size
;
1920 min_rx_space
= ALIGN(min_rx_space
, 1024);
1921 min_rx_space
>>= 10;
1923 /* If current Tx allocation is less than the min Tx FIFO size,
1924 * and the min Tx FIFO size is less than the current Rx FIFO
1925 * allocation, take space away from current Rx allocation
1927 if (tx_space
< min_tx_space
&&
1928 ((min_tx_space
- tx_space
) < pba
)) {
1929 pba
= pba
- (min_tx_space
- tx_space
);
1931 /* if short on Rx space, Rx wins and must trump Tx
1934 if (pba
< min_rx_space
)
1937 wr32(E1000_PBA
, pba
);
1940 /* flow control settings */
1941 /* The high water mark must be low enough to fit one full frame
1942 * (or the size used for early receive) above it in the Rx FIFO.
1943 * Set it to the lower of:
1944 * - 90% of the Rx FIFO size, or
1945 * - the full Rx FIFO size minus one full frame
1947 hwm
= min(((pba
<< 10) * 9 / 10),
1948 ((pba
<< 10) - 2 * adapter
->max_frame_size
));
1950 fc
->high_water
= hwm
& 0xFFFFFFF0; /* 16-byte granularity */
1951 fc
->low_water
= fc
->high_water
- 16;
1952 fc
->pause_time
= 0xFFFF;
1954 fc
->current_mode
= fc
->requested_mode
;
1956 /* disable receive for all VFs and wait one second */
1957 if (adapter
->vfs_allocated_count
) {
1960 for (i
= 0 ; i
< adapter
->vfs_allocated_count
; i
++)
1961 adapter
->vf_data
[i
].flags
&= IGB_VF_FLAG_PF_SET_MAC
;
1963 /* ping all the active vfs to let them know we are going down */
1964 igb_ping_all_vfs(adapter
);
1966 /* disable transmits and receives */
1967 wr32(E1000_VFRE
, 0);
1968 wr32(E1000_VFTE
, 0);
1971 /* Allow time for pending master requests to run */
1972 hw
->mac
.ops
.reset_hw(hw
);
1975 if (adapter
->flags
& IGB_FLAG_MEDIA_RESET
) {
1976 /* need to resetup here after media swap */
1977 adapter
->ei
.get_invariants(hw
);
1978 adapter
->flags
&= ~IGB_FLAG_MEDIA_RESET
;
1980 if (adapter
->flags
& IGB_FLAG_MAS_ENABLE
) {
1981 if (igb_enable_mas(adapter
))
1983 "Error enabling Media Auto Sense\n");
1985 if (hw
->mac
.ops
.init_hw(hw
))
1986 dev_err(&pdev
->dev
, "Hardware Error\n");
1988 /* Flow control settings reset on hardware reset, so guarantee flow
1989 * control is off when forcing speed.
1991 if (!hw
->mac
.autoneg
)
1992 igb_force_mac_fc(hw
);
1994 igb_init_dmac(adapter
, pba
);
1995 #ifdef CONFIG_IGB_HWMON
1996 /* Re-initialize the thermal sensor on i350 devices. */
1997 if (!test_bit(__IGB_DOWN
, &adapter
->state
)) {
1998 if (mac
->type
== e1000_i350
&& hw
->bus
.func
== 0) {
1999 /* If present, re-initialize the external thermal sensor
2003 mac
->ops
.init_thermal_sensor_thresh(hw
);
2007 /* Re-establish EEE setting */
2008 if (hw
->phy
.media_type
== e1000_media_type_copper
) {
2009 switch (mac
->type
) {
2013 igb_set_eee_i350(hw
);
2016 igb_set_eee_i354(hw
);
2022 if (!netif_running(adapter
->netdev
))
2023 igb_power_down_link(adapter
);
2025 igb_update_mng_vlan(adapter
);
2027 /* Enable h/w to recognize an 802.1Q VLAN Ethernet packet */
2028 wr32(E1000_VET
, ETHERNET_IEEE_VLAN_TYPE
);
2030 /* Re-enable PTP, where applicable. */
2031 igb_ptp_reset(adapter
);
2033 igb_get_phy_info(hw
);
2036 static netdev_features_t
igb_fix_features(struct net_device
*netdev
,
2037 netdev_features_t features
)
2039 /* Since there is no support for separate Rx/Tx vlan accel
2040 * enable/disable make sure Tx flag is always in same state as Rx.
2042 if (features
& NETIF_F_HW_VLAN_CTAG_RX
)
2043 features
|= NETIF_F_HW_VLAN_CTAG_TX
;
2045 features
&= ~NETIF_F_HW_VLAN_CTAG_TX
;
2050 static int igb_set_features(struct net_device
*netdev
,
2051 netdev_features_t features
)
2053 netdev_features_t changed
= netdev
->features
^ features
;
2054 struct igb_adapter
*adapter
= netdev_priv(netdev
);
2056 if (changed
& NETIF_F_HW_VLAN_CTAG_RX
)
2057 igb_vlan_mode(netdev
, features
);
2059 if (!(changed
& NETIF_F_RXALL
))
2062 netdev
->features
= features
;
2064 if (netif_running(netdev
))
2065 igb_reinit_locked(adapter
);
2072 static const struct net_device_ops igb_netdev_ops
= {
2073 .ndo_open
= igb_open
,
2074 .ndo_stop
= igb_close
,
2075 .ndo_start_xmit
= igb_xmit_frame
,
2076 .ndo_get_stats64
= igb_get_stats64
,
2077 .ndo_set_rx_mode
= igb_set_rx_mode
,
2078 .ndo_set_mac_address
= igb_set_mac
,
2079 .ndo_change_mtu
= igb_change_mtu
,
2080 .ndo_do_ioctl
= igb_ioctl
,
2081 .ndo_tx_timeout
= igb_tx_timeout
,
2082 .ndo_validate_addr
= eth_validate_addr
,
2083 .ndo_vlan_rx_add_vid
= igb_vlan_rx_add_vid
,
2084 .ndo_vlan_rx_kill_vid
= igb_vlan_rx_kill_vid
,
2085 .ndo_set_vf_mac
= igb_ndo_set_vf_mac
,
2086 .ndo_set_vf_vlan
= igb_ndo_set_vf_vlan
,
2087 .ndo_set_vf_rate
= igb_ndo_set_vf_bw
,
2088 .ndo_set_vf_spoofchk
= igb_ndo_set_vf_spoofchk
,
2089 .ndo_get_vf_config
= igb_ndo_get_vf_config
,
2090 #ifdef CONFIG_NET_POLL_CONTROLLER
2091 .ndo_poll_controller
= igb_netpoll
,
2093 .ndo_fix_features
= igb_fix_features
,
2094 .ndo_set_features
= igb_set_features
,
2098 * igb_set_fw_version - Configure version string for ethtool
2099 * @adapter: adapter struct
2101 void igb_set_fw_version(struct igb_adapter
*adapter
)
2103 struct e1000_hw
*hw
= &adapter
->hw
;
2104 struct e1000_fw_version fw
;
2106 igb_get_fw_version(hw
, &fw
);
2108 switch (hw
->mac
.type
) {
2111 if (!(igb_get_flash_presence_i210(hw
))) {
2112 snprintf(adapter
->fw_version
,
2113 sizeof(adapter
->fw_version
),
2115 fw
.invm_major
, fw
.invm_minor
,
2121 /* if option is rom valid, display its version too */
2123 snprintf(adapter
->fw_version
,
2124 sizeof(adapter
->fw_version
),
2125 "%d.%d, 0x%08x, %d.%d.%d",
2126 fw
.eep_major
, fw
.eep_minor
, fw
.etrack_id
,
2127 fw
.or_major
, fw
.or_build
, fw
.or_patch
);
2129 } else if (fw
.etrack_id
!= 0X0000) {
2130 snprintf(adapter
->fw_version
,
2131 sizeof(adapter
->fw_version
),
2133 fw
.eep_major
, fw
.eep_minor
, fw
.etrack_id
);
2135 snprintf(adapter
->fw_version
,
2136 sizeof(adapter
->fw_version
),
2138 fw
.eep_major
, fw
.eep_minor
, fw
.eep_build
);
2146 * igb_init_mas - init Media Autosense feature if enabled in the NVM
2148 * @adapter: adapter struct
2150 static void igb_init_mas(struct igb_adapter
*adapter
)
2152 struct e1000_hw
*hw
= &adapter
->hw
;
2155 hw
->nvm
.ops
.read(hw
, NVM_COMPAT
, 1, &eeprom_data
);
2156 switch (hw
->bus
.func
) {
2158 if (eeprom_data
& IGB_MAS_ENABLE_0
) {
2159 adapter
->flags
|= IGB_FLAG_MAS_ENABLE
;
2160 netdev_info(adapter
->netdev
,
2161 "MAS: Enabling Media Autosense for port %d\n",
2166 if (eeprom_data
& IGB_MAS_ENABLE_1
) {
2167 adapter
->flags
|= IGB_FLAG_MAS_ENABLE
;
2168 netdev_info(adapter
->netdev
,
2169 "MAS: Enabling Media Autosense for port %d\n",
2174 if (eeprom_data
& IGB_MAS_ENABLE_2
) {
2175 adapter
->flags
|= IGB_FLAG_MAS_ENABLE
;
2176 netdev_info(adapter
->netdev
,
2177 "MAS: Enabling Media Autosense for port %d\n",
2182 if (eeprom_data
& IGB_MAS_ENABLE_3
) {
2183 adapter
->flags
|= IGB_FLAG_MAS_ENABLE
;
2184 netdev_info(adapter
->netdev
,
2185 "MAS: Enabling Media Autosense for port %d\n",
2190 /* Shouldn't get here */
2191 netdev_err(adapter
->netdev
,
2192 "MAS: Invalid port configuration, returning\n");
2198 * igb_init_i2c - Init I2C interface
2199 * @adapter: pointer to adapter structure
2201 static s32
igb_init_i2c(struct igb_adapter
*adapter
)
2203 s32 status
= E1000_SUCCESS
;
2205 /* I2C interface supported on i350 devices */
2206 if (adapter
->hw
.mac
.type
!= e1000_i350
)
2207 return E1000_SUCCESS
;
2209 /* Initialize the i2c bus which is controlled by the registers.
2210 * This bus will use the i2c_algo_bit structue that implements
2211 * the protocol through toggling of the 4 bits in the register.
2213 adapter
->i2c_adap
.owner
= THIS_MODULE
;
2214 adapter
->i2c_algo
= igb_i2c_algo
;
2215 adapter
->i2c_algo
.data
= adapter
;
2216 adapter
->i2c_adap
.algo_data
= &adapter
->i2c_algo
;
2217 adapter
->i2c_adap
.dev
.parent
= &adapter
->pdev
->dev
;
2218 strlcpy(adapter
->i2c_adap
.name
, "igb BB",
2219 sizeof(adapter
->i2c_adap
.name
));
2220 status
= i2c_bit_add_bus(&adapter
->i2c_adap
);
2225 * igb_probe - Device Initialization Routine
2226 * @pdev: PCI device information struct
2227 * @ent: entry in igb_pci_tbl
2229 * Returns 0 on success, negative on failure
2231 * igb_probe initializes an adapter identified by a pci_dev structure.
2232 * The OS initialization, configuring of the adapter private structure,
2233 * and a hardware reset occur.
2235 static int igb_probe(struct pci_dev
*pdev
, const struct pci_device_id
*ent
)
2237 struct net_device
*netdev
;
2238 struct igb_adapter
*adapter
;
2239 struct e1000_hw
*hw
;
2240 u16 eeprom_data
= 0;
2242 static int global_quad_port_a
; /* global quad port a indication */
2243 const struct e1000_info
*ei
= igb_info_tbl
[ent
->driver_data
];
2244 int err
, pci_using_dac
;
2245 u8 part_str
[E1000_PBANUM_LENGTH
];
2247 /* Catch broken hardware that put the wrong VF device ID in
2248 * the PCIe SR-IOV capability.
2250 if (pdev
->is_virtfn
) {
2251 WARN(1, KERN_ERR
"%s (%hx:%hx) should not be a VF!\n",
2252 pci_name(pdev
), pdev
->vendor
, pdev
->device
);
2256 err
= pci_enable_device_mem(pdev
);
2261 err
= dma_set_mask_and_coherent(&pdev
->dev
, DMA_BIT_MASK(64));
2265 err
= dma_set_mask_and_coherent(&pdev
->dev
, DMA_BIT_MASK(32));
2268 "No usable DMA configuration, aborting\n");
2273 err
= pci_request_selected_regions(pdev
, pci_select_bars(pdev
,
2279 pci_enable_pcie_error_reporting(pdev
);
2281 pci_set_master(pdev
);
2282 pci_save_state(pdev
);
2285 netdev
= alloc_etherdev_mq(sizeof(struct igb_adapter
),
2288 goto err_alloc_etherdev
;
2290 SET_NETDEV_DEV(netdev
, &pdev
->dev
);
2292 pci_set_drvdata(pdev
, netdev
);
2293 adapter
= netdev_priv(netdev
);
2294 adapter
->netdev
= netdev
;
2295 adapter
->pdev
= pdev
;
2298 adapter
->msg_enable
= netif_msg_init(debug
, DEFAULT_MSG_ENABLE
);
2301 hw
->hw_addr
= pci_iomap(pdev
, 0, 0);
2305 netdev
->netdev_ops
= &igb_netdev_ops
;
2306 igb_set_ethtool_ops(netdev
);
2307 netdev
->watchdog_timeo
= 5 * HZ
;
2309 strncpy(netdev
->name
, pci_name(pdev
), sizeof(netdev
->name
) - 1);
2311 netdev
->mem_start
= pci_resource_start(pdev
, 0);
2312 netdev
->mem_end
= pci_resource_end(pdev
, 0);
2314 /* PCI config space info */
2315 hw
->vendor_id
= pdev
->vendor
;
2316 hw
->device_id
= pdev
->device
;
2317 hw
->revision_id
= pdev
->revision
;
2318 hw
->subsystem_vendor_id
= pdev
->subsystem_vendor
;
2319 hw
->subsystem_device_id
= pdev
->subsystem_device
;
2321 /* Copy the default MAC, PHY and NVM function pointers */
2322 memcpy(&hw
->mac
.ops
, ei
->mac_ops
, sizeof(hw
->mac
.ops
));
2323 memcpy(&hw
->phy
.ops
, ei
->phy_ops
, sizeof(hw
->phy
.ops
));
2324 memcpy(&hw
->nvm
.ops
, ei
->nvm_ops
, sizeof(hw
->nvm
.ops
));
2325 /* Initialize skew-specific constants */
2326 err
= ei
->get_invariants(hw
);
2330 /* setup the private structure */
2331 err
= igb_sw_init(adapter
);
2335 igb_get_bus_info_pcie(hw
);
2337 hw
->phy
.autoneg_wait_to_complete
= false;
2339 /* Copper options */
2340 if (hw
->phy
.media_type
== e1000_media_type_copper
) {
2341 hw
->phy
.mdix
= AUTO_ALL_MODES
;
2342 hw
->phy
.disable_polarity_correction
= false;
2343 hw
->phy
.ms_type
= e1000_ms_hw_default
;
2346 if (igb_check_reset_block(hw
))
2347 dev_info(&pdev
->dev
,
2348 "PHY reset is blocked due to SOL/IDER session.\n");
2350 /* features is initialized to 0 in allocation, it might have bits
2351 * set by igb_sw_init so we should use an or instead of an
2354 netdev
->features
|= NETIF_F_SG
|
2361 NETIF_F_HW_VLAN_CTAG_RX
|
2362 NETIF_F_HW_VLAN_CTAG_TX
;
2364 /* copy netdev features into list of user selectable features */
2365 netdev
->hw_features
|= netdev
->features
;
2366 netdev
->hw_features
|= NETIF_F_RXALL
;
2368 /* set this bit last since it cannot be part of hw_features */
2369 netdev
->features
|= NETIF_F_HW_VLAN_CTAG_FILTER
;
2371 netdev
->vlan_features
|= NETIF_F_TSO
|
2377 netdev
->priv_flags
|= IFF_SUPP_NOFCS
;
2379 if (pci_using_dac
) {
2380 netdev
->features
|= NETIF_F_HIGHDMA
;
2381 netdev
->vlan_features
|= NETIF_F_HIGHDMA
;
2384 if (hw
->mac
.type
>= e1000_82576
) {
2385 netdev
->hw_features
|= NETIF_F_SCTP_CSUM
;
2386 netdev
->features
|= NETIF_F_SCTP_CSUM
;
2389 netdev
->priv_flags
|= IFF_UNICAST_FLT
;
2391 adapter
->en_mng_pt
= igb_enable_mng_pass_thru(hw
);
2393 /* before reading the NVM, reset the controller to put the device in a
2394 * known good starting state
2396 hw
->mac
.ops
.reset_hw(hw
);
2398 /* make sure the NVM is good , i211/i210 parts can have special NVM
2399 * that doesn't contain a checksum
2401 switch (hw
->mac
.type
) {
2404 if (igb_get_flash_presence_i210(hw
)) {
2405 if (hw
->nvm
.ops
.validate(hw
) < 0) {
2407 "The NVM Checksum Is Not Valid\n");
2414 if (hw
->nvm
.ops
.validate(hw
) < 0) {
2415 dev_err(&pdev
->dev
, "The NVM Checksum Is Not Valid\n");
2422 /* copy the MAC address out of the NVM */
2423 if (hw
->mac
.ops
.read_mac_addr(hw
))
2424 dev_err(&pdev
->dev
, "NVM Read Error\n");
2426 memcpy(netdev
->dev_addr
, hw
->mac
.addr
, netdev
->addr_len
);
2428 if (!is_valid_ether_addr(netdev
->dev_addr
)) {
2429 dev_err(&pdev
->dev
, "Invalid MAC Address\n");
2434 /* get firmware version for ethtool -i */
2435 igb_set_fw_version(adapter
);
2437 setup_timer(&adapter
->watchdog_timer
, igb_watchdog
,
2438 (unsigned long) adapter
);
2439 setup_timer(&adapter
->phy_info_timer
, igb_update_phy_info
,
2440 (unsigned long) adapter
);
2442 INIT_WORK(&adapter
->reset_task
, igb_reset_task
);
2443 INIT_WORK(&adapter
->watchdog_task
, igb_watchdog_task
);
2445 /* Initialize link properties that are user-changeable */
2446 adapter
->fc_autoneg
= true;
2447 hw
->mac
.autoneg
= true;
2448 hw
->phy
.autoneg_advertised
= 0x2f;
2450 hw
->fc
.requested_mode
= e1000_fc_default
;
2451 hw
->fc
.current_mode
= e1000_fc_default
;
2453 igb_validate_mdi_setting(hw
);
2455 /* By default, support wake on port A */
2456 if (hw
->bus
.func
== 0)
2457 adapter
->flags
|= IGB_FLAG_WOL_SUPPORTED
;
2459 /* Check the NVM for wake support on non-port A ports */
2460 if (hw
->mac
.type
>= e1000_82580
)
2461 hw
->nvm
.ops
.read(hw
, NVM_INIT_CONTROL3_PORT_A
+
2462 NVM_82580_LAN_FUNC_OFFSET(hw
->bus
.func
), 1,
2464 else if (hw
->bus
.func
== 1)
2465 hw
->nvm
.ops
.read(hw
, NVM_INIT_CONTROL3_PORT_B
, 1, &eeprom_data
);
2467 if (eeprom_data
& IGB_EEPROM_APME
)
2468 adapter
->flags
|= IGB_FLAG_WOL_SUPPORTED
;
2470 /* now that we have the eeprom settings, apply the special cases where
2471 * the eeprom may be wrong or the board simply won't support wake on
2472 * lan on a particular port
2474 switch (pdev
->device
) {
2475 case E1000_DEV_ID_82575GB_QUAD_COPPER
:
2476 adapter
->flags
&= ~IGB_FLAG_WOL_SUPPORTED
;
2478 case E1000_DEV_ID_82575EB_FIBER_SERDES
:
2479 case E1000_DEV_ID_82576_FIBER
:
2480 case E1000_DEV_ID_82576_SERDES
:
2481 /* Wake events only supported on port A for dual fiber
2482 * regardless of eeprom setting
2484 if (rd32(E1000_STATUS
) & E1000_STATUS_FUNC_1
)
2485 adapter
->flags
&= ~IGB_FLAG_WOL_SUPPORTED
;
2487 case E1000_DEV_ID_82576_QUAD_COPPER
:
2488 case E1000_DEV_ID_82576_QUAD_COPPER_ET2
:
2489 /* if quad port adapter, disable WoL on all but port A */
2490 if (global_quad_port_a
!= 0)
2491 adapter
->flags
&= ~IGB_FLAG_WOL_SUPPORTED
;
2493 adapter
->flags
|= IGB_FLAG_QUAD_PORT_A
;
2494 /* Reset for multiple quad port adapters */
2495 if (++global_quad_port_a
== 4)
2496 global_quad_port_a
= 0;
2499 /* If the device can't wake, don't set software support */
2500 if (!device_can_wakeup(&adapter
->pdev
->dev
))
2501 adapter
->flags
&= ~IGB_FLAG_WOL_SUPPORTED
;
2504 /* initialize the wol settings based on the eeprom settings */
2505 if (adapter
->flags
& IGB_FLAG_WOL_SUPPORTED
)
2506 adapter
->wol
|= E1000_WUFC_MAG
;
2508 /* Some vendors want WoL disabled by default, but still supported */
2509 if ((hw
->mac
.type
== e1000_i350
) &&
2510 (pdev
->subsystem_vendor
== PCI_VENDOR_ID_HP
)) {
2511 adapter
->flags
|= IGB_FLAG_WOL_SUPPORTED
;
2515 device_set_wakeup_enable(&adapter
->pdev
->dev
,
2516 adapter
->flags
& IGB_FLAG_WOL_SUPPORTED
);
2518 /* reset the hardware with the new settings */
2521 /* Init the I2C interface */
2522 err
= igb_init_i2c(adapter
);
2524 dev_err(&pdev
->dev
, "failed to init i2c interface\n");
2528 /* let the f/w know that the h/w is now under the control of the
2531 igb_get_hw_control(adapter
);
2533 strcpy(netdev
->name
, "eth%d");
2534 err
= register_netdev(netdev
);
2538 /* carrier off reporting is important to ethtool even BEFORE open */
2539 netif_carrier_off(netdev
);
2541 #ifdef CONFIG_IGB_DCA
2542 if (dca_add_requester(&pdev
->dev
) == 0) {
2543 adapter
->flags
|= IGB_FLAG_DCA_ENABLED
;
2544 dev_info(&pdev
->dev
, "DCA enabled\n");
2545 igb_setup_dca(adapter
);
2549 #ifdef CONFIG_IGB_HWMON
2550 /* Initialize the thermal sensor on i350 devices. */
2551 if (hw
->mac
.type
== e1000_i350
&& hw
->bus
.func
== 0) {
2554 /* Read the NVM to determine if this i350 device supports an
2555 * external thermal sensor.
2557 hw
->nvm
.ops
.read(hw
, NVM_ETS_CFG
, 1, &ets_word
);
2558 if (ets_word
!= 0x0000 && ets_word
!= 0xFFFF)
2559 adapter
->ets
= true;
2561 adapter
->ets
= false;
2562 if (igb_sysfs_init(adapter
))
2564 "failed to allocate sysfs resources\n");
2566 adapter
->ets
= false;
2569 /* Check if Media Autosense is enabled */
2571 if (hw
->dev_spec
._82575
.mas_capable
)
2572 igb_init_mas(adapter
);
2574 /* do hw tstamp init after resetting */
2575 igb_ptp_init(adapter
);
2577 dev_info(&pdev
->dev
, "Intel(R) Gigabit Ethernet Network Connection\n");
2578 /* print bus type/speed/width info, not applicable to i354 */
2579 if (hw
->mac
.type
!= e1000_i354
) {
2580 dev_info(&pdev
->dev
, "%s: (PCIe:%s:%s) %pM\n",
2582 ((hw
->bus
.speed
== e1000_bus_speed_2500
) ? "2.5Gb/s" :
2583 (hw
->bus
.speed
== e1000_bus_speed_5000
) ? "5.0Gb/s" :
2585 ((hw
->bus
.width
== e1000_bus_width_pcie_x4
) ?
2587 (hw
->bus
.width
== e1000_bus_width_pcie_x2
) ?
2589 (hw
->bus
.width
== e1000_bus_width_pcie_x1
) ?
2590 "Width x1" : "unknown"), netdev
->dev_addr
);
2593 if ((hw
->mac
.type
>= e1000_i210
||
2594 igb_get_flash_presence_i210(hw
))) {
2595 ret_val
= igb_read_part_string(hw
, part_str
,
2596 E1000_PBANUM_LENGTH
);
2598 ret_val
= -E1000_ERR_INVM_VALUE_NOT_FOUND
;
2602 strcpy(part_str
, "Unknown");
2603 dev_info(&pdev
->dev
, "%s: PBA No: %s\n", netdev
->name
, part_str
);
2604 dev_info(&pdev
->dev
,
2605 "Using %s interrupts. %d rx queue(s), %d tx queue(s)\n",
2606 (adapter
->flags
& IGB_FLAG_HAS_MSIX
) ? "MSI-X" :
2607 (adapter
->flags
& IGB_FLAG_HAS_MSI
) ? "MSI" : "legacy",
2608 adapter
->num_rx_queues
, adapter
->num_tx_queues
);
2609 if (hw
->phy
.media_type
== e1000_media_type_copper
) {
2610 switch (hw
->mac
.type
) {
2614 /* Enable EEE for internal copper PHY devices */
2615 err
= igb_set_eee_i350(hw
);
2617 (!hw
->dev_spec
._82575
.eee_disable
)) {
2618 adapter
->eee_advert
=
2619 MDIO_EEE_100TX
| MDIO_EEE_1000T
;
2620 adapter
->flags
|= IGB_FLAG_EEE
;
2624 if ((rd32(E1000_CTRL_EXT
) &
2625 E1000_CTRL_EXT_LINK_MODE_SGMII
)) {
2626 err
= igb_set_eee_i354(hw
);
2628 (!hw
->dev_spec
._82575
.eee_disable
)) {
2629 adapter
->eee_advert
=
2630 MDIO_EEE_100TX
| MDIO_EEE_1000T
;
2631 adapter
->flags
|= IGB_FLAG_EEE
;
2639 pm_runtime_put_noidle(&pdev
->dev
);
2643 igb_release_hw_control(adapter
);
2644 memset(&adapter
->i2c_adap
, 0, sizeof(adapter
->i2c_adap
));
2646 if (!igb_check_reset_block(hw
))
2649 if (hw
->flash_address
)
2650 iounmap(hw
->flash_address
);
2652 igb_clear_interrupt_scheme(adapter
);
2653 pci_iounmap(pdev
, hw
->hw_addr
);
2655 free_netdev(netdev
);
2657 pci_release_selected_regions(pdev
,
2658 pci_select_bars(pdev
, IORESOURCE_MEM
));
2661 pci_disable_device(pdev
);
2665 #ifdef CONFIG_PCI_IOV
2666 static int igb_disable_sriov(struct pci_dev
*pdev
)
2668 struct net_device
*netdev
= pci_get_drvdata(pdev
);
2669 struct igb_adapter
*adapter
= netdev_priv(netdev
);
2670 struct e1000_hw
*hw
= &adapter
->hw
;
2672 /* reclaim resources allocated to VFs */
2673 if (adapter
->vf_data
) {
2674 /* disable iov and allow time for transactions to clear */
2675 if (pci_vfs_assigned(pdev
)) {
2676 dev_warn(&pdev
->dev
,
2677 "Cannot deallocate SR-IOV virtual functions while they are assigned - VFs will not be deallocated\n");
2680 pci_disable_sriov(pdev
);
2684 kfree(adapter
->vf_data
);
2685 adapter
->vf_data
= NULL
;
2686 adapter
->vfs_allocated_count
= 0;
2687 wr32(E1000_IOVCTL
, E1000_IOVCTL_REUSE_VFQ
);
2690 dev_info(&pdev
->dev
, "IOV Disabled\n");
2692 /* Re-enable DMA Coalescing flag since IOV is turned off */
2693 adapter
->flags
|= IGB_FLAG_DMAC
;
2699 static int igb_enable_sriov(struct pci_dev
*pdev
, int num_vfs
)
2701 struct net_device
*netdev
= pci_get_drvdata(pdev
);
2702 struct igb_adapter
*adapter
= netdev_priv(netdev
);
2703 int old_vfs
= pci_num_vf(pdev
);
2707 if (!(adapter
->flags
& IGB_FLAG_HAS_MSIX
) || num_vfs
> 7) {
2715 dev_info(&pdev
->dev
, "%d pre-allocated VFs found - override max_vfs setting of %d\n",
2717 adapter
->vfs_allocated_count
= old_vfs
;
2719 adapter
->vfs_allocated_count
= num_vfs
;
2721 adapter
->vf_data
= kcalloc(adapter
->vfs_allocated_count
,
2722 sizeof(struct vf_data_storage
), GFP_KERNEL
);
2724 /* if allocation failed then we do not support SR-IOV */
2725 if (!adapter
->vf_data
) {
2726 adapter
->vfs_allocated_count
= 0;
2728 "Unable to allocate memory for VF Data Storage\n");
2733 /* only call pci_enable_sriov() if no VFs are allocated already */
2735 err
= pci_enable_sriov(pdev
, adapter
->vfs_allocated_count
);
2739 dev_info(&pdev
->dev
, "%d VFs allocated\n",
2740 adapter
->vfs_allocated_count
);
2741 for (i
= 0; i
< adapter
->vfs_allocated_count
; i
++)
2742 igb_vf_configure(adapter
, i
);
2744 /* DMA Coalescing is not supported in IOV mode. */
2745 adapter
->flags
&= ~IGB_FLAG_DMAC
;
2749 kfree(adapter
->vf_data
);
2750 adapter
->vf_data
= NULL
;
2751 adapter
->vfs_allocated_count
= 0;
2758 * igb_remove_i2c - Cleanup I2C interface
2759 * @adapter: pointer to adapter structure
2761 static void igb_remove_i2c(struct igb_adapter
*adapter
)
2763 /* free the adapter bus structure */
2764 i2c_del_adapter(&adapter
->i2c_adap
);
2768 * igb_remove - Device Removal Routine
2769 * @pdev: PCI device information struct
2771 * igb_remove is called by the PCI subsystem to alert the driver
2772 * that it should release a PCI device. The could be caused by a
2773 * Hot-Plug event, or because the driver is going to be removed from
2776 static void igb_remove(struct pci_dev
*pdev
)
2778 struct net_device
*netdev
= pci_get_drvdata(pdev
);
2779 struct igb_adapter
*adapter
= netdev_priv(netdev
);
2780 struct e1000_hw
*hw
= &adapter
->hw
;
2782 pm_runtime_get_noresume(&pdev
->dev
);
2783 #ifdef CONFIG_IGB_HWMON
2784 igb_sysfs_exit(adapter
);
2786 igb_remove_i2c(adapter
);
2787 igb_ptp_stop(adapter
);
2788 /* The watchdog timer may be rescheduled, so explicitly
2789 * disable watchdog from being rescheduled.
2791 set_bit(__IGB_DOWN
, &adapter
->state
);
2792 del_timer_sync(&adapter
->watchdog_timer
);
2793 del_timer_sync(&adapter
->phy_info_timer
);
2795 cancel_work_sync(&adapter
->reset_task
);
2796 cancel_work_sync(&adapter
->watchdog_task
);
2798 #ifdef CONFIG_IGB_DCA
2799 if (adapter
->flags
& IGB_FLAG_DCA_ENABLED
) {
2800 dev_info(&pdev
->dev
, "DCA disabled\n");
2801 dca_remove_requester(&pdev
->dev
);
2802 adapter
->flags
&= ~IGB_FLAG_DCA_ENABLED
;
2803 wr32(E1000_DCA_CTRL
, E1000_DCA_CTRL_DCA_MODE_DISABLE
);
2807 /* Release control of h/w to f/w. If f/w is AMT enabled, this
2808 * would have already happened in close and is redundant.
2810 igb_release_hw_control(adapter
);
2812 unregister_netdev(netdev
);
2814 igb_clear_interrupt_scheme(adapter
);
2816 #ifdef CONFIG_PCI_IOV
2817 igb_disable_sriov(pdev
);
2820 pci_iounmap(pdev
, hw
->hw_addr
);
2821 if (hw
->flash_address
)
2822 iounmap(hw
->flash_address
);
2823 pci_release_selected_regions(pdev
,
2824 pci_select_bars(pdev
, IORESOURCE_MEM
));
2826 kfree(adapter
->shadow_vfta
);
2827 free_netdev(netdev
);
2829 pci_disable_pcie_error_reporting(pdev
);
2831 pci_disable_device(pdev
);
2835 * igb_probe_vfs - Initialize vf data storage and add VFs to pci config space
2836 * @adapter: board private structure to initialize
2838 * This function initializes the vf specific data storage and then attempts to
2839 * allocate the VFs. The reason for ordering it this way is because it is much
2840 * mor expensive time wise to disable SR-IOV than it is to allocate and free
2841 * the memory for the VFs.
2843 static void igb_probe_vfs(struct igb_adapter
*adapter
)
2845 #ifdef CONFIG_PCI_IOV
2846 struct pci_dev
*pdev
= adapter
->pdev
;
2847 struct e1000_hw
*hw
= &adapter
->hw
;
2849 /* Virtualization features not supported on i210 family. */
2850 if ((hw
->mac
.type
== e1000_i210
) || (hw
->mac
.type
== e1000_i211
))
2853 pci_sriov_set_totalvfs(pdev
, 7);
2854 igb_pci_enable_sriov(pdev
, max_vfs
);
2856 #endif /* CONFIG_PCI_IOV */
2859 static void igb_init_queue_configuration(struct igb_adapter
*adapter
)
2861 struct e1000_hw
*hw
= &adapter
->hw
;
2864 /* Determine the maximum number of RSS queues supported. */
2865 switch (hw
->mac
.type
) {
2867 max_rss_queues
= IGB_MAX_RX_QUEUES_I211
;
2871 max_rss_queues
= IGB_MAX_RX_QUEUES_82575
;
2874 /* I350 cannot do RSS and SR-IOV at the same time */
2875 if (!!adapter
->vfs_allocated_count
) {
2881 if (!!adapter
->vfs_allocated_count
) {
2889 max_rss_queues
= IGB_MAX_RX_QUEUES
;
2893 adapter
->rss_queues
= min_t(u32
, max_rss_queues
, num_online_cpus());
2895 /* Determine if we need to pair queues. */
2896 switch (hw
->mac
.type
) {
2899 /* Device supports enough interrupts without queue pairing. */
2902 /* If VFs are going to be allocated with RSS queues then we
2903 * should pair the queues in order to conserve interrupts due
2904 * to limited supply.
2906 if ((adapter
->rss_queues
> 1) &&
2907 (adapter
->vfs_allocated_count
> 6))
2908 adapter
->flags
|= IGB_FLAG_QUEUE_PAIRS
;
2915 /* If rss_queues > half of max_rss_queues, pair the queues in
2916 * order to conserve interrupts due to limited supply.
2918 if (adapter
->rss_queues
> (max_rss_queues
/ 2))
2919 adapter
->flags
|= IGB_FLAG_QUEUE_PAIRS
;
2925 * igb_sw_init - Initialize general software structures (struct igb_adapter)
2926 * @adapter: board private structure to initialize
2928 * igb_sw_init initializes the Adapter private data structure.
2929 * Fields are initialized based on PCI device information and
2930 * OS network device settings (MTU size).
2932 static int igb_sw_init(struct igb_adapter
*adapter
)
2934 struct e1000_hw
*hw
= &adapter
->hw
;
2935 struct net_device
*netdev
= adapter
->netdev
;
2936 struct pci_dev
*pdev
= adapter
->pdev
;
2938 pci_read_config_word(pdev
, PCI_COMMAND
, &hw
->bus
.pci_cmd_word
);
2940 /* set default ring sizes */
2941 adapter
->tx_ring_count
= IGB_DEFAULT_TXD
;
2942 adapter
->rx_ring_count
= IGB_DEFAULT_RXD
;
2944 /* set default ITR values */
2945 adapter
->rx_itr_setting
= IGB_DEFAULT_ITR
;
2946 adapter
->tx_itr_setting
= IGB_DEFAULT_ITR
;
2948 /* set default work limits */
2949 adapter
->tx_work_limit
= IGB_DEFAULT_TX_WORK
;
2951 adapter
->max_frame_size
= netdev
->mtu
+ ETH_HLEN
+ ETH_FCS_LEN
+
2953 adapter
->min_frame_size
= ETH_ZLEN
+ ETH_FCS_LEN
;
2955 spin_lock_init(&adapter
->stats64_lock
);
2956 #ifdef CONFIG_PCI_IOV
2957 switch (hw
->mac
.type
) {
2961 dev_warn(&pdev
->dev
,
2962 "Maximum of 7 VFs per PF, using max\n");
2963 max_vfs
= adapter
->vfs_allocated_count
= 7;
2965 adapter
->vfs_allocated_count
= max_vfs
;
2966 if (adapter
->vfs_allocated_count
)
2967 dev_warn(&pdev
->dev
,
2968 "Enabling SR-IOV VFs using the module parameter is deprecated - please use the pci sysfs interface.\n");
2973 #endif /* CONFIG_PCI_IOV */
2975 igb_init_queue_configuration(adapter
);
2977 /* Setup and initialize a copy of the hw vlan table array */
2978 adapter
->shadow_vfta
= kcalloc(E1000_VLAN_FILTER_TBL_SIZE
, sizeof(u32
),
2981 /* This call may decrease the number of queues */
2982 if (igb_init_interrupt_scheme(adapter
, true)) {
2983 dev_err(&pdev
->dev
, "Unable to allocate memory for queues\n");
2987 igb_probe_vfs(adapter
);
2989 /* Explicitly disable IRQ since the NIC can be in any state. */
2990 igb_irq_disable(adapter
);
2992 if (hw
->mac
.type
>= e1000_i350
)
2993 adapter
->flags
&= ~IGB_FLAG_DMAC
;
2995 set_bit(__IGB_DOWN
, &adapter
->state
);
3000 * igb_open - Called when a network interface is made active
3001 * @netdev: network interface device structure
3003 * Returns 0 on success, negative value on failure
3005 * The open entry point is called when a network interface is made
3006 * active by the system (IFF_UP). At this point all resources needed
3007 * for transmit and receive operations are allocated, the interrupt
3008 * handler is registered with the OS, the watchdog timer is started,
3009 * and the stack is notified that the interface is ready.
3011 static int __igb_open(struct net_device
*netdev
, bool resuming
)
3013 struct igb_adapter
*adapter
= netdev_priv(netdev
);
3014 struct e1000_hw
*hw
= &adapter
->hw
;
3015 struct pci_dev
*pdev
= adapter
->pdev
;
3019 /* disallow open during test */
3020 if (test_bit(__IGB_TESTING
, &adapter
->state
)) {
3026 pm_runtime_get_sync(&pdev
->dev
);
3028 netif_carrier_off(netdev
);
3030 /* allocate transmit descriptors */
3031 err
= igb_setup_all_tx_resources(adapter
);
3035 /* allocate receive descriptors */
3036 err
= igb_setup_all_rx_resources(adapter
);
3040 igb_power_up_link(adapter
);
3042 /* before we allocate an interrupt, we must be ready to handle it.
3043 * Setting DEBUG_SHIRQ in the kernel makes it fire an interrupt
3044 * as soon as we call pci_request_irq, so we have to setup our
3045 * clean_rx handler before we do so.
3047 igb_configure(adapter
);
3049 err
= igb_request_irq(adapter
);
3053 /* Notify the stack of the actual queue counts. */
3054 err
= netif_set_real_num_tx_queues(adapter
->netdev
,
3055 adapter
->num_tx_queues
);
3057 goto err_set_queues
;
3059 err
= netif_set_real_num_rx_queues(adapter
->netdev
,
3060 adapter
->num_rx_queues
);
3062 goto err_set_queues
;
3064 /* From here on the code is the same as igb_up() */
3065 clear_bit(__IGB_DOWN
, &adapter
->state
);
3067 for (i
= 0; i
< adapter
->num_q_vectors
; i
++)
3068 napi_enable(&(adapter
->q_vector
[i
]->napi
));
3070 /* Clear any pending interrupts. */
3073 igb_irq_enable(adapter
);
3075 /* notify VFs that reset has been completed */
3076 if (adapter
->vfs_allocated_count
) {
3077 u32 reg_data
= rd32(E1000_CTRL_EXT
);
3079 reg_data
|= E1000_CTRL_EXT_PFRSTD
;
3080 wr32(E1000_CTRL_EXT
, reg_data
);
3083 netif_tx_start_all_queues(netdev
);
3086 pm_runtime_put(&pdev
->dev
);
3088 /* start the watchdog. */
3089 hw
->mac
.get_link_status
= 1;
3090 schedule_work(&adapter
->watchdog_task
);
3095 igb_free_irq(adapter
);
3097 igb_release_hw_control(adapter
);
3098 igb_power_down_link(adapter
);
3099 igb_free_all_rx_resources(adapter
);
3101 igb_free_all_tx_resources(adapter
);
3105 pm_runtime_put(&pdev
->dev
);
3110 static int igb_open(struct net_device
*netdev
)
3112 return __igb_open(netdev
, false);
3116 * igb_close - Disables a network interface
3117 * @netdev: network interface device structure
3119 * Returns 0, this is not allowed to fail
3121 * The close entry point is called when an interface is de-activated
3122 * by the OS. The hardware is still under the driver's control, but
3123 * needs to be disabled. A global MAC reset is issued to stop the
3124 * hardware, and all transmit and receive resources are freed.
3126 static int __igb_close(struct net_device
*netdev
, bool suspending
)
3128 struct igb_adapter
*adapter
= netdev_priv(netdev
);
3129 struct pci_dev
*pdev
= adapter
->pdev
;
3131 WARN_ON(test_bit(__IGB_RESETTING
, &adapter
->state
));
3134 pm_runtime_get_sync(&pdev
->dev
);
3137 igb_free_irq(adapter
);
3139 igb_free_all_tx_resources(adapter
);
3140 igb_free_all_rx_resources(adapter
);
3143 pm_runtime_put_sync(&pdev
->dev
);
3147 static int igb_close(struct net_device
*netdev
)
3149 return __igb_close(netdev
, false);
3153 * igb_setup_tx_resources - allocate Tx resources (Descriptors)
3154 * @tx_ring: tx descriptor ring (for a specific queue) to setup
3156 * Return 0 on success, negative on failure
3158 int igb_setup_tx_resources(struct igb_ring
*tx_ring
)
3160 struct device
*dev
= tx_ring
->dev
;
3163 size
= sizeof(struct igb_tx_buffer
) * tx_ring
->count
;
3165 tx_ring
->tx_buffer_info
= vzalloc(size
);
3166 if (!tx_ring
->tx_buffer_info
)
3169 /* round up to nearest 4K */
3170 tx_ring
->size
= tx_ring
->count
* sizeof(union e1000_adv_tx_desc
);
3171 tx_ring
->size
= ALIGN(tx_ring
->size
, 4096);
3173 tx_ring
->desc
= dma_alloc_coherent(dev
, tx_ring
->size
,
3174 &tx_ring
->dma
, GFP_KERNEL
);
3178 tx_ring
->next_to_use
= 0;
3179 tx_ring
->next_to_clean
= 0;
3184 vfree(tx_ring
->tx_buffer_info
);
3185 tx_ring
->tx_buffer_info
= NULL
;
3186 dev_err(dev
, "Unable to allocate memory for the Tx descriptor ring\n");
3191 * igb_setup_all_tx_resources - wrapper to allocate Tx resources
3192 * (Descriptors) for all queues
3193 * @adapter: board private structure
3195 * Return 0 on success, negative on failure
3197 static int igb_setup_all_tx_resources(struct igb_adapter
*adapter
)
3199 struct pci_dev
*pdev
= adapter
->pdev
;
3202 for (i
= 0; i
< adapter
->num_tx_queues
; i
++) {
3203 err
= igb_setup_tx_resources(adapter
->tx_ring
[i
]);
3206 "Allocation for Tx Queue %u failed\n", i
);
3207 for (i
--; i
>= 0; i
--)
3208 igb_free_tx_resources(adapter
->tx_ring
[i
]);
3217 * igb_setup_tctl - configure the transmit control registers
3218 * @adapter: Board private structure
3220 void igb_setup_tctl(struct igb_adapter
*adapter
)
3222 struct e1000_hw
*hw
= &adapter
->hw
;
3225 /* disable queue 0 which is enabled by default on 82575 and 82576 */
3226 wr32(E1000_TXDCTL(0), 0);
3228 /* Program the Transmit Control Register */
3229 tctl
= rd32(E1000_TCTL
);
3230 tctl
&= ~E1000_TCTL_CT
;
3231 tctl
|= E1000_TCTL_PSP
| E1000_TCTL_RTLC
|
3232 (E1000_COLLISION_THRESHOLD
<< E1000_CT_SHIFT
);
3234 igb_config_collision_dist(hw
);
3236 /* Enable transmits */
3237 tctl
|= E1000_TCTL_EN
;
3239 wr32(E1000_TCTL
, tctl
);
3243 * igb_configure_tx_ring - Configure transmit ring after Reset
3244 * @adapter: board private structure
3245 * @ring: tx ring to configure
3247 * Configure a transmit ring after a reset.
3249 void igb_configure_tx_ring(struct igb_adapter
*adapter
,
3250 struct igb_ring
*ring
)
3252 struct e1000_hw
*hw
= &adapter
->hw
;
3254 u64 tdba
= ring
->dma
;
3255 int reg_idx
= ring
->reg_idx
;
3257 /* disable the queue */
3258 wr32(E1000_TXDCTL(reg_idx
), 0);
3262 wr32(E1000_TDLEN(reg_idx
),
3263 ring
->count
* sizeof(union e1000_adv_tx_desc
));
3264 wr32(E1000_TDBAL(reg_idx
),
3265 tdba
& 0x00000000ffffffffULL
);
3266 wr32(E1000_TDBAH(reg_idx
), tdba
>> 32);
3268 ring
->tail
= hw
->hw_addr
+ E1000_TDT(reg_idx
);
3269 wr32(E1000_TDH(reg_idx
), 0);
3270 writel(0, ring
->tail
);
3272 txdctl
|= IGB_TX_PTHRESH
;
3273 txdctl
|= IGB_TX_HTHRESH
<< 8;
3274 txdctl
|= IGB_TX_WTHRESH
<< 16;
3276 txdctl
|= E1000_TXDCTL_QUEUE_ENABLE
;
3277 wr32(E1000_TXDCTL(reg_idx
), txdctl
);
3281 * igb_configure_tx - Configure transmit Unit after Reset
3282 * @adapter: board private structure
3284 * Configure the Tx unit of the MAC after a reset.
3286 static void igb_configure_tx(struct igb_adapter
*adapter
)
3290 for (i
= 0; i
< adapter
->num_tx_queues
; i
++)
3291 igb_configure_tx_ring(adapter
, adapter
->tx_ring
[i
]);
3295 * igb_setup_rx_resources - allocate Rx resources (Descriptors)
3296 * @rx_ring: Rx descriptor ring (for a specific queue) to setup
3298 * Returns 0 on success, negative on failure
3300 int igb_setup_rx_resources(struct igb_ring
*rx_ring
)
3302 struct device
*dev
= rx_ring
->dev
;
3305 size
= sizeof(struct igb_rx_buffer
) * rx_ring
->count
;
3307 rx_ring
->rx_buffer_info
= vzalloc(size
);
3308 if (!rx_ring
->rx_buffer_info
)
3311 /* Round up to nearest 4K */
3312 rx_ring
->size
= rx_ring
->count
* sizeof(union e1000_adv_rx_desc
);
3313 rx_ring
->size
= ALIGN(rx_ring
->size
, 4096);
3315 rx_ring
->desc
= dma_alloc_coherent(dev
, rx_ring
->size
,
3316 &rx_ring
->dma
, GFP_KERNEL
);
3320 rx_ring
->next_to_alloc
= 0;
3321 rx_ring
->next_to_clean
= 0;
3322 rx_ring
->next_to_use
= 0;
3327 vfree(rx_ring
->rx_buffer_info
);
3328 rx_ring
->rx_buffer_info
= NULL
;
3329 dev_err(dev
, "Unable to allocate memory for the Rx descriptor ring\n");
3334 * igb_setup_all_rx_resources - wrapper to allocate Rx resources
3335 * (Descriptors) for all queues
3336 * @adapter: board private structure
3338 * Return 0 on success, negative on failure
3340 static int igb_setup_all_rx_resources(struct igb_adapter
*adapter
)
3342 struct pci_dev
*pdev
= adapter
->pdev
;
3345 for (i
= 0; i
< adapter
->num_rx_queues
; i
++) {
3346 err
= igb_setup_rx_resources(adapter
->rx_ring
[i
]);
3349 "Allocation for Rx Queue %u failed\n", i
);
3350 for (i
--; i
>= 0; i
--)
3351 igb_free_rx_resources(adapter
->rx_ring
[i
]);
3360 * igb_setup_mrqc - configure the multiple receive queue control registers
3361 * @adapter: Board private structure
3363 static void igb_setup_mrqc(struct igb_adapter
*adapter
)
3365 struct e1000_hw
*hw
= &adapter
->hw
;
3367 u32 j
, num_rx_queues
;
3368 static const u32 rsskey
[10] = { 0xDA565A6D, 0xC20E5B25, 0x3D256741,
3369 0xB08FA343, 0xCB2BCAD0, 0xB4307BAE,
3370 0xA32DCB77, 0x0CF23080, 0x3BB7426A,
3373 /* Fill out hash function seeds */
3374 for (j
= 0; j
< 10; j
++)
3375 wr32(E1000_RSSRK(j
), rsskey
[j
]);
3377 num_rx_queues
= adapter
->rss_queues
;
3379 switch (hw
->mac
.type
) {
3381 /* 82576 supports 2 RSS queues for SR-IOV */
3382 if (adapter
->vfs_allocated_count
)
3389 if (adapter
->rss_indir_tbl_init
!= num_rx_queues
) {
3390 for (j
= 0; j
< IGB_RETA_SIZE
; j
++)
3391 adapter
->rss_indir_tbl
[j
] =
3392 (j
* num_rx_queues
) / IGB_RETA_SIZE
;
3393 adapter
->rss_indir_tbl_init
= num_rx_queues
;
3395 igb_write_rss_indir_tbl(adapter
);
3397 /* Disable raw packet checksumming so that RSS hash is placed in
3398 * descriptor on writeback. No need to enable TCP/UDP/IP checksum
3399 * offloads as they are enabled by default
3401 rxcsum
= rd32(E1000_RXCSUM
);
3402 rxcsum
|= E1000_RXCSUM_PCSD
;
3404 if (adapter
->hw
.mac
.type
>= e1000_82576
)
3405 /* Enable Receive Checksum Offload for SCTP */
3406 rxcsum
|= E1000_RXCSUM_CRCOFL
;
3408 /* Don't need to set TUOFL or IPOFL, they default to 1 */
3409 wr32(E1000_RXCSUM
, rxcsum
);
3411 /* Generate RSS hash based on packet types, TCP/UDP
3412 * port numbers and/or IPv4/v6 src and dst addresses
3414 mrqc
= E1000_MRQC_RSS_FIELD_IPV4
|
3415 E1000_MRQC_RSS_FIELD_IPV4_TCP
|
3416 E1000_MRQC_RSS_FIELD_IPV6
|
3417 E1000_MRQC_RSS_FIELD_IPV6_TCP
|
3418 E1000_MRQC_RSS_FIELD_IPV6_TCP_EX
;
3420 if (adapter
->flags
& IGB_FLAG_RSS_FIELD_IPV4_UDP
)
3421 mrqc
|= E1000_MRQC_RSS_FIELD_IPV4_UDP
;
3422 if (adapter
->flags
& IGB_FLAG_RSS_FIELD_IPV6_UDP
)
3423 mrqc
|= E1000_MRQC_RSS_FIELD_IPV6_UDP
;
3425 /* If VMDq is enabled then we set the appropriate mode for that, else
3426 * we default to RSS so that an RSS hash is calculated per packet even
3427 * if we are only using one queue
3429 if (adapter
->vfs_allocated_count
) {
3430 if (hw
->mac
.type
> e1000_82575
) {
3431 /* Set the default pool for the PF's first queue */
3432 u32 vtctl
= rd32(E1000_VT_CTL
);
3434 vtctl
&= ~(E1000_VT_CTL_DEFAULT_POOL_MASK
|
3435 E1000_VT_CTL_DISABLE_DEF_POOL
);
3436 vtctl
|= adapter
->vfs_allocated_count
<<
3437 E1000_VT_CTL_DEFAULT_POOL_SHIFT
;
3438 wr32(E1000_VT_CTL
, vtctl
);
3440 if (adapter
->rss_queues
> 1)
3441 mrqc
|= E1000_MRQC_ENABLE_VMDQ_RSS_2Q
;
3443 mrqc
|= E1000_MRQC_ENABLE_VMDQ
;
3445 if (hw
->mac
.type
!= e1000_i211
)
3446 mrqc
|= E1000_MRQC_ENABLE_RSS_4Q
;
3448 igb_vmm_control(adapter
);
3450 wr32(E1000_MRQC
, mrqc
);
3454 * igb_setup_rctl - configure the receive control registers
3455 * @adapter: Board private structure
3457 void igb_setup_rctl(struct igb_adapter
*adapter
)
3459 struct e1000_hw
*hw
= &adapter
->hw
;
3462 rctl
= rd32(E1000_RCTL
);
3464 rctl
&= ~(3 << E1000_RCTL_MO_SHIFT
);
3465 rctl
&= ~(E1000_RCTL_LBM_TCVR
| E1000_RCTL_LBM_MAC
);
3467 rctl
|= E1000_RCTL_EN
| E1000_RCTL_BAM
| E1000_RCTL_RDMTS_HALF
|
3468 (hw
->mac
.mc_filter_type
<< E1000_RCTL_MO_SHIFT
);
3470 /* enable stripping of CRC. It's unlikely this will break BMC
3471 * redirection as it did with e1000. Newer features require
3472 * that the HW strips the CRC.
3474 rctl
|= E1000_RCTL_SECRC
;
3476 /* disable store bad packets and clear size bits. */
3477 rctl
&= ~(E1000_RCTL_SBP
| E1000_RCTL_SZ_256
);
3479 /* enable LPE to prevent packets larger than max_frame_size */
3480 rctl
|= E1000_RCTL_LPE
;
3482 /* disable queue 0 to prevent tail write w/o re-config */
3483 wr32(E1000_RXDCTL(0), 0);
3485 /* Attention!!! For SR-IOV PF driver operations you must enable
3486 * queue drop for all VF and PF queues to prevent head of line blocking
3487 * if an un-trusted VF does not provide descriptors to hardware.
3489 if (adapter
->vfs_allocated_count
) {
3490 /* set all queue drop enable bits */
3491 wr32(E1000_QDE
, ALL_QUEUES
);
3494 /* This is useful for sniffing bad packets. */
3495 if (adapter
->netdev
->features
& NETIF_F_RXALL
) {
3496 /* UPE and MPE will be handled by normal PROMISC logic
3497 * in e1000e_set_rx_mode
3499 rctl
|= (E1000_RCTL_SBP
| /* Receive bad packets */
3500 E1000_RCTL_BAM
| /* RX All Bcast Pkts */
3501 E1000_RCTL_PMCF
); /* RX All MAC Ctrl Pkts */
3503 rctl
&= ~(E1000_RCTL_VFE
| /* Disable VLAN filter */
3504 E1000_RCTL_DPF
| /* Allow filtered pause */
3505 E1000_RCTL_CFIEN
); /* Dis VLAN CFIEN Filter */
3506 /* Do not mess with E1000_CTRL_VME, it affects transmit as well,
3507 * and that breaks VLANs.
3511 wr32(E1000_RCTL
, rctl
);
3514 static inline int igb_set_vf_rlpml(struct igb_adapter
*adapter
, int size
,
3517 struct e1000_hw
*hw
= &adapter
->hw
;
3520 /* if it isn't the PF check to see if VFs are enabled and
3521 * increase the size to support vlan tags
3523 if (vfn
< adapter
->vfs_allocated_count
&&
3524 adapter
->vf_data
[vfn
].vlans_enabled
)
3525 size
+= VLAN_TAG_SIZE
;
3527 vmolr
= rd32(E1000_VMOLR(vfn
));
3528 vmolr
&= ~E1000_VMOLR_RLPML_MASK
;
3529 vmolr
|= size
| E1000_VMOLR_LPE
;
3530 wr32(E1000_VMOLR(vfn
), vmolr
);
3536 * igb_rlpml_set - set maximum receive packet size
3537 * @adapter: board private structure
3539 * Configure maximum receivable packet size.
3541 static void igb_rlpml_set(struct igb_adapter
*adapter
)
3543 u32 max_frame_size
= adapter
->max_frame_size
;
3544 struct e1000_hw
*hw
= &adapter
->hw
;
3545 u16 pf_id
= adapter
->vfs_allocated_count
;
3548 igb_set_vf_rlpml(adapter
, max_frame_size
, pf_id
);
3549 /* If we're in VMDQ or SR-IOV mode, then set global RLPML
3550 * to our max jumbo frame size, in case we need to enable
3551 * jumbo frames on one of the rings later.
3552 * This will not pass over-length frames into the default
3553 * queue because it's gated by the VMOLR.RLPML.
3555 max_frame_size
= MAX_JUMBO_FRAME_SIZE
;
3558 wr32(E1000_RLPML
, max_frame_size
);
3561 static inline void igb_set_vmolr(struct igb_adapter
*adapter
,
3564 struct e1000_hw
*hw
= &adapter
->hw
;
3567 /* This register exists only on 82576 and newer so if we are older then
3568 * we should exit and do nothing
3570 if (hw
->mac
.type
< e1000_82576
)
3573 vmolr
= rd32(E1000_VMOLR(vfn
));
3574 vmolr
|= E1000_VMOLR_STRVLAN
; /* Strip vlan tags */
3575 if (hw
->mac
.type
== e1000_i350
) {
3578 dvmolr
= rd32(E1000_DVMOLR(vfn
));
3579 dvmolr
|= E1000_DVMOLR_STRVLAN
;
3580 wr32(E1000_DVMOLR(vfn
), dvmolr
);
3583 vmolr
|= E1000_VMOLR_AUPE
; /* Accept untagged packets */
3585 vmolr
&= ~(E1000_VMOLR_AUPE
); /* Tagged packets ONLY */
3587 /* clear all bits that might not be set */
3588 vmolr
&= ~(E1000_VMOLR_BAM
| E1000_VMOLR_RSSE
);
3590 if (adapter
->rss_queues
> 1 && vfn
== adapter
->vfs_allocated_count
)
3591 vmolr
|= E1000_VMOLR_RSSE
; /* enable RSS */
3592 /* for VMDq only allow the VFs and pool 0 to accept broadcast and
3595 if (vfn
<= adapter
->vfs_allocated_count
)
3596 vmolr
|= E1000_VMOLR_BAM
; /* Accept broadcast */
3598 wr32(E1000_VMOLR(vfn
), vmolr
);
3602 * igb_configure_rx_ring - Configure a receive ring after Reset
3603 * @adapter: board private structure
3604 * @ring: receive ring to be configured
3606 * Configure the Rx unit of the MAC after a reset.
3608 void igb_configure_rx_ring(struct igb_adapter
*adapter
,
3609 struct igb_ring
*ring
)
3611 struct e1000_hw
*hw
= &adapter
->hw
;
3612 u64 rdba
= ring
->dma
;
3613 int reg_idx
= ring
->reg_idx
;
3614 u32 srrctl
= 0, rxdctl
= 0;
3616 /* disable the queue */
3617 wr32(E1000_RXDCTL(reg_idx
), 0);
3619 /* Set DMA base address registers */
3620 wr32(E1000_RDBAL(reg_idx
),
3621 rdba
& 0x00000000ffffffffULL
);
3622 wr32(E1000_RDBAH(reg_idx
), rdba
>> 32);
3623 wr32(E1000_RDLEN(reg_idx
),
3624 ring
->count
* sizeof(union e1000_adv_rx_desc
));
3626 /* initialize head and tail */
3627 ring
->tail
= hw
->hw_addr
+ E1000_RDT(reg_idx
);
3628 wr32(E1000_RDH(reg_idx
), 0);
3629 writel(0, ring
->tail
);
3631 /* set descriptor configuration */
3632 srrctl
= IGB_RX_HDR_LEN
<< E1000_SRRCTL_BSIZEHDRSIZE_SHIFT
;
3633 srrctl
|= IGB_RX_BUFSZ
>> E1000_SRRCTL_BSIZEPKT_SHIFT
;
3634 srrctl
|= E1000_SRRCTL_DESCTYPE_ADV_ONEBUF
;
3635 if (hw
->mac
.type
>= e1000_82580
)
3636 srrctl
|= E1000_SRRCTL_TIMESTAMP
;
3637 /* Only set Drop Enable if we are supporting multiple queues */
3638 if (adapter
->vfs_allocated_count
|| adapter
->num_rx_queues
> 1)
3639 srrctl
|= E1000_SRRCTL_DROP_EN
;
3641 wr32(E1000_SRRCTL(reg_idx
), srrctl
);
3643 /* set filtering for VMDQ pools */
3644 igb_set_vmolr(adapter
, reg_idx
& 0x7, true);
3646 rxdctl
|= IGB_RX_PTHRESH
;
3647 rxdctl
|= IGB_RX_HTHRESH
<< 8;
3648 rxdctl
|= IGB_RX_WTHRESH
<< 16;
3650 /* enable receive descriptor fetching */
3651 rxdctl
|= E1000_RXDCTL_QUEUE_ENABLE
;
3652 wr32(E1000_RXDCTL(reg_idx
), rxdctl
);
3656 * igb_configure_rx - Configure receive Unit after Reset
3657 * @adapter: board private structure
3659 * Configure the Rx unit of the MAC after a reset.
3661 static void igb_configure_rx(struct igb_adapter
*adapter
)
3665 /* set UTA to appropriate mode */
3666 igb_set_uta(adapter
);
3668 /* set the correct pool for the PF default MAC address in entry 0 */
3669 igb_rar_set_qsel(adapter
, adapter
->hw
.mac
.addr
, 0,
3670 adapter
->vfs_allocated_count
);
3672 /* Setup the HW Rx Head and Tail Descriptor Pointers and
3673 * the Base and Length of the Rx Descriptor Ring
3675 for (i
= 0; i
< adapter
->num_rx_queues
; i
++)
3676 igb_configure_rx_ring(adapter
, adapter
->rx_ring
[i
]);
3680 * igb_free_tx_resources - Free Tx Resources per Queue
3681 * @tx_ring: Tx descriptor ring for a specific queue
3683 * Free all transmit software resources
3685 void igb_free_tx_resources(struct igb_ring
*tx_ring
)
3687 igb_clean_tx_ring(tx_ring
);
3689 vfree(tx_ring
->tx_buffer_info
);
3690 tx_ring
->tx_buffer_info
= NULL
;
3692 /* if not set, then don't free */
3696 dma_free_coherent(tx_ring
->dev
, tx_ring
->size
,
3697 tx_ring
->desc
, tx_ring
->dma
);
3699 tx_ring
->desc
= NULL
;
3703 * igb_free_all_tx_resources - Free Tx Resources for All Queues
3704 * @adapter: board private structure
3706 * Free all transmit software resources
3708 static void igb_free_all_tx_resources(struct igb_adapter
*adapter
)
3712 for (i
= 0; i
< adapter
->num_tx_queues
; i
++)
3713 igb_free_tx_resources(adapter
->tx_ring
[i
]);
3716 void igb_unmap_and_free_tx_resource(struct igb_ring
*ring
,
3717 struct igb_tx_buffer
*tx_buffer
)
3719 if (tx_buffer
->skb
) {
3720 dev_kfree_skb_any(tx_buffer
->skb
);
3721 if (dma_unmap_len(tx_buffer
, len
))
3722 dma_unmap_single(ring
->dev
,
3723 dma_unmap_addr(tx_buffer
, dma
),
3724 dma_unmap_len(tx_buffer
, len
),
3726 } else if (dma_unmap_len(tx_buffer
, len
)) {
3727 dma_unmap_page(ring
->dev
,
3728 dma_unmap_addr(tx_buffer
, dma
),
3729 dma_unmap_len(tx_buffer
, len
),
3732 tx_buffer
->next_to_watch
= NULL
;
3733 tx_buffer
->skb
= NULL
;
3734 dma_unmap_len_set(tx_buffer
, len
, 0);
3735 /* buffer_info must be completely set up in the transmit path */
3739 * igb_clean_tx_ring - Free Tx Buffers
3740 * @tx_ring: ring to be cleaned
3742 static void igb_clean_tx_ring(struct igb_ring
*tx_ring
)
3744 struct igb_tx_buffer
*buffer_info
;
3748 if (!tx_ring
->tx_buffer_info
)
3750 /* Free all the Tx ring sk_buffs */
3752 for (i
= 0; i
< tx_ring
->count
; i
++) {
3753 buffer_info
= &tx_ring
->tx_buffer_info
[i
];
3754 igb_unmap_and_free_tx_resource(tx_ring
, buffer_info
);
3757 netdev_tx_reset_queue(txring_txq(tx_ring
));
3759 size
= sizeof(struct igb_tx_buffer
) * tx_ring
->count
;
3760 memset(tx_ring
->tx_buffer_info
, 0, size
);
3762 /* Zero out the descriptor ring */
3763 memset(tx_ring
->desc
, 0, tx_ring
->size
);
3765 tx_ring
->next_to_use
= 0;
3766 tx_ring
->next_to_clean
= 0;
3770 * igb_clean_all_tx_rings - Free Tx Buffers for all queues
3771 * @adapter: board private structure
3773 static void igb_clean_all_tx_rings(struct igb_adapter
*adapter
)
3777 for (i
= 0; i
< adapter
->num_tx_queues
; i
++)
3778 igb_clean_tx_ring(adapter
->tx_ring
[i
]);
3782 * igb_free_rx_resources - Free Rx Resources
3783 * @rx_ring: ring to clean the resources from
3785 * Free all receive software resources
3787 void igb_free_rx_resources(struct igb_ring
*rx_ring
)
3789 igb_clean_rx_ring(rx_ring
);
3791 vfree(rx_ring
->rx_buffer_info
);
3792 rx_ring
->rx_buffer_info
= NULL
;
3794 /* if not set, then don't free */
3798 dma_free_coherent(rx_ring
->dev
, rx_ring
->size
,
3799 rx_ring
->desc
, rx_ring
->dma
);
3801 rx_ring
->desc
= NULL
;
3805 * igb_free_all_rx_resources - Free Rx Resources for All Queues
3806 * @adapter: board private structure
3808 * Free all receive software resources
3810 static void igb_free_all_rx_resources(struct igb_adapter
*adapter
)
3814 for (i
= 0; i
< adapter
->num_rx_queues
; i
++)
3815 igb_free_rx_resources(adapter
->rx_ring
[i
]);
3819 * igb_clean_rx_ring - Free Rx Buffers per Queue
3820 * @rx_ring: ring to free buffers from
3822 static void igb_clean_rx_ring(struct igb_ring
*rx_ring
)
3828 dev_kfree_skb(rx_ring
->skb
);
3829 rx_ring
->skb
= NULL
;
3831 if (!rx_ring
->rx_buffer_info
)
3834 /* Free all the Rx ring sk_buffs */
3835 for (i
= 0; i
< rx_ring
->count
; i
++) {
3836 struct igb_rx_buffer
*buffer_info
= &rx_ring
->rx_buffer_info
[i
];
3838 if (!buffer_info
->page
)
3841 dma_unmap_page(rx_ring
->dev
,
3845 __free_page(buffer_info
->page
);
3847 buffer_info
->page
= NULL
;
3850 size
= sizeof(struct igb_rx_buffer
) * rx_ring
->count
;
3851 memset(rx_ring
->rx_buffer_info
, 0, size
);
3853 /* Zero out the descriptor ring */
3854 memset(rx_ring
->desc
, 0, rx_ring
->size
);
3856 rx_ring
->next_to_alloc
= 0;
3857 rx_ring
->next_to_clean
= 0;
3858 rx_ring
->next_to_use
= 0;
3862 * igb_clean_all_rx_rings - Free Rx Buffers for all queues
3863 * @adapter: board private structure
3865 static void igb_clean_all_rx_rings(struct igb_adapter
*adapter
)
3869 for (i
= 0; i
< adapter
->num_rx_queues
; i
++)
3870 igb_clean_rx_ring(adapter
->rx_ring
[i
]);
3874 * igb_set_mac - Change the Ethernet Address of the NIC
3875 * @netdev: network interface device structure
3876 * @p: pointer to an address structure
3878 * Returns 0 on success, negative on failure
3880 static int igb_set_mac(struct net_device
*netdev
, void *p
)
3882 struct igb_adapter
*adapter
= netdev_priv(netdev
);
3883 struct e1000_hw
*hw
= &adapter
->hw
;
3884 struct sockaddr
*addr
= p
;
3886 if (!is_valid_ether_addr(addr
->sa_data
))
3887 return -EADDRNOTAVAIL
;
3889 memcpy(netdev
->dev_addr
, addr
->sa_data
, netdev
->addr_len
);
3890 memcpy(hw
->mac
.addr
, addr
->sa_data
, netdev
->addr_len
);
3892 /* set the correct pool for the new PF MAC address in entry 0 */
3893 igb_rar_set_qsel(adapter
, hw
->mac
.addr
, 0,
3894 adapter
->vfs_allocated_count
);
3900 * igb_write_mc_addr_list - write multicast addresses to MTA
3901 * @netdev: network interface device structure
3903 * Writes multicast address list to the MTA hash table.
3904 * Returns: -ENOMEM on failure
3905 * 0 on no addresses written
3906 * X on writing X addresses to MTA
3908 static int igb_write_mc_addr_list(struct net_device
*netdev
)
3910 struct igb_adapter
*adapter
= netdev_priv(netdev
);
3911 struct e1000_hw
*hw
= &adapter
->hw
;
3912 struct netdev_hw_addr
*ha
;
3916 if (netdev_mc_empty(netdev
)) {
3917 /* nothing to program, so clear mc list */
3918 igb_update_mc_addr_list(hw
, NULL
, 0);
3919 igb_restore_vf_multicasts(adapter
);
3923 mta_list
= kzalloc(netdev_mc_count(netdev
) * 6, GFP_ATOMIC
);
3927 /* The shared function expects a packed array of only addresses. */
3929 netdev_for_each_mc_addr(ha
, netdev
)
3930 memcpy(mta_list
+ (i
++ * ETH_ALEN
), ha
->addr
, ETH_ALEN
);
3932 igb_update_mc_addr_list(hw
, mta_list
, i
);
3935 return netdev_mc_count(netdev
);
3939 * igb_write_uc_addr_list - write unicast addresses to RAR table
3940 * @netdev: network interface device structure
3942 * Writes unicast address list to the RAR table.
3943 * Returns: -ENOMEM on failure/insufficient address space
3944 * 0 on no addresses written
3945 * X on writing X addresses to the RAR table
3947 static int igb_write_uc_addr_list(struct net_device
*netdev
)
3949 struct igb_adapter
*adapter
= netdev_priv(netdev
);
3950 struct e1000_hw
*hw
= &adapter
->hw
;
3951 unsigned int vfn
= adapter
->vfs_allocated_count
;
3952 unsigned int rar_entries
= hw
->mac
.rar_entry_count
- (vfn
+ 1);
3955 /* return ENOMEM indicating insufficient memory for addresses */
3956 if (netdev_uc_count(netdev
) > rar_entries
)
3959 if (!netdev_uc_empty(netdev
) && rar_entries
) {
3960 struct netdev_hw_addr
*ha
;
3962 netdev_for_each_uc_addr(ha
, netdev
) {
3965 igb_rar_set_qsel(adapter
, ha
->addr
,
3971 /* write the addresses in reverse order to avoid write combining */
3972 for (; rar_entries
> 0 ; rar_entries
--) {
3973 wr32(E1000_RAH(rar_entries
), 0);
3974 wr32(E1000_RAL(rar_entries
), 0);
3982 * igb_set_rx_mode - Secondary Unicast, Multicast and Promiscuous mode set
3983 * @netdev: network interface device structure
3985 * The set_rx_mode entry point is called whenever the unicast or multicast
3986 * address lists or the network interface flags are updated. This routine is
3987 * responsible for configuring the hardware for proper unicast, multicast,
3988 * promiscuous mode, and all-multi behavior.
3990 static void igb_set_rx_mode(struct net_device
*netdev
)
3992 struct igb_adapter
*adapter
= netdev_priv(netdev
);
3993 struct e1000_hw
*hw
= &adapter
->hw
;
3994 unsigned int vfn
= adapter
->vfs_allocated_count
;
3995 u32 rctl
, vmolr
= 0;
3998 /* Check for Promiscuous and All Multicast modes */
3999 rctl
= rd32(E1000_RCTL
);
4001 /* clear the effected bits */
4002 rctl
&= ~(E1000_RCTL_UPE
| E1000_RCTL_MPE
| E1000_RCTL_VFE
);
4004 if (netdev
->flags
& IFF_PROMISC
) {
4005 /* retain VLAN HW filtering if in VT mode */
4006 if (adapter
->vfs_allocated_count
)
4007 rctl
|= E1000_RCTL_VFE
;
4008 rctl
|= (E1000_RCTL_UPE
| E1000_RCTL_MPE
);
4009 vmolr
|= (E1000_VMOLR_ROPE
| E1000_VMOLR_MPME
);
4011 if (netdev
->flags
& IFF_ALLMULTI
) {
4012 rctl
|= E1000_RCTL_MPE
;
4013 vmolr
|= E1000_VMOLR_MPME
;
4015 /* Write addresses to the MTA, if the attempt fails
4016 * then we should just turn on promiscuous mode so
4017 * that we can at least receive multicast traffic
4019 count
= igb_write_mc_addr_list(netdev
);
4021 rctl
|= E1000_RCTL_MPE
;
4022 vmolr
|= E1000_VMOLR_MPME
;
4024 vmolr
|= E1000_VMOLR_ROMPE
;
4027 /* Write addresses to available RAR registers, if there is not
4028 * sufficient space to store all the addresses then enable
4029 * unicast promiscuous mode
4031 count
= igb_write_uc_addr_list(netdev
);
4033 rctl
|= E1000_RCTL_UPE
;
4034 vmolr
|= E1000_VMOLR_ROPE
;
4036 rctl
|= E1000_RCTL_VFE
;
4038 wr32(E1000_RCTL
, rctl
);
4040 /* In order to support SR-IOV and eventually VMDq it is necessary to set
4041 * the VMOLR to enable the appropriate modes. Without this workaround
4042 * we will have issues with VLAN tag stripping not being done for frames
4043 * that are only arriving because we are the default pool
4045 if ((hw
->mac
.type
< e1000_82576
) || (hw
->mac
.type
> e1000_i350
))
4048 vmolr
|= rd32(E1000_VMOLR(vfn
)) &
4049 ~(E1000_VMOLR_ROPE
| E1000_VMOLR_MPME
| E1000_VMOLR_ROMPE
);
4050 wr32(E1000_VMOLR(vfn
), vmolr
);
4051 igb_restore_vf_multicasts(adapter
);
4054 static void igb_check_wvbr(struct igb_adapter
*adapter
)
4056 struct e1000_hw
*hw
= &adapter
->hw
;
4059 switch (hw
->mac
.type
) {
4062 wvbr
= rd32(E1000_WVBR
);
4070 adapter
->wvbr
|= wvbr
;
4073 #define IGB_STAGGERED_QUEUE_OFFSET 8
4075 static void igb_spoof_check(struct igb_adapter
*adapter
)
4082 for (j
= 0; j
< adapter
->vfs_allocated_count
; j
++) {
4083 if (adapter
->wvbr
& (1 << j
) ||
4084 adapter
->wvbr
& (1 << (j
+ IGB_STAGGERED_QUEUE_OFFSET
))) {
4085 dev_warn(&adapter
->pdev
->dev
,
4086 "Spoof event(s) detected on VF %d\n", j
);
4089 (1 << (j
+ IGB_STAGGERED_QUEUE_OFFSET
)));
4094 /* Need to wait a few seconds after link up to get diagnostic information from
4097 static void igb_update_phy_info(unsigned long data
)
4099 struct igb_adapter
*adapter
= (struct igb_adapter
*) data
;
4100 igb_get_phy_info(&adapter
->hw
);
4104 * igb_has_link - check shared code for link and determine up/down
4105 * @adapter: pointer to driver private info
4107 bool igb_has_link(struct igb_adapter
*adapter
)
4109 struct e1000_hw
*hw
= &adapter
->hw
;
4110 bool link_active
= false;
4112 /* get_link_status is set on LSC (link status) interrupt or
4113 * rx sequence error interrupt. get_link_status will stay
4114 * false until the e1000_check_for_link establishes link
4115 * for copper adapters ONLY
4117 switch (hw
->phy
.media_type
) {
4118 case e1000_media_type_copper
:
4119 if (!hw
->mac
.get_link_status
)
4121 case e1000_media_type_internal_serdes
:
4122 hw
->mac
.ops
.check_for_link(hw
);
4123 link_active
= !hw
->mac
.get_link_status
;
4126 case e1000_media_type_unknown
:
4130 if (((hw
->mac
.type
== e1000_i210
) ||
4131 (hw
->mac
.type
== e1000_i211
)) &&
4132 (hw
->phy
.id
== I210_I_PHY_ID
)) {
4133 if (!netif_carrier_ok(adapter
->netdev
)) {
4134 adapter
->flags
&= ~IGB_FLAG_NEED_LINK_UPDATE
;
4135 } else if (!(adapter
->flags
& IGB_FLAG_NEED_LINK_UPDATE
)) {
4136 adapter
->flags
|= IGB_FLAG_NEED_LINK_UPDATE
;
4137 adapter
->link_check_timeout
= jiffies
;
4144 static bool igb_thermal_sensor_event(struct e1000_hw
*hw
, u32 event
)
4147 u32 ctrl_ext
, thstat
;
4149 /* check for thermal sensor event on i350 copper only */
4150 if (hw
->mac
.type
== e1000_i350
) {
4151 thstat
= rd32(E1000_THSTAT
);
4152 ctrl_ext
= rd32(E1000_CTRL_EXT
);
4154 if ((hw
->phy
.media_type
== e1000_media_type_copper
) &&
4155 !(ctrl_ext
& E1000_CTRL_EXT_LINK_MODE_SGMII
))
4156 ret
= !!(thstat
& event
);
4163 * igb_watchdog - Timer Call-back
4164 * @data: pointer to adapter cast into an unsigned long
4166 static void igb_watchdog(unsigned long data
)
4168 struct igb_adapter
*adapter
= (struct igb_adapter
*)data
;
4169 /* Do the rest outside of interrupt context */
4170 schedule_work(&adapter
->watchdog_task
);
4173 static void igb_watchdog_task(struct work_struct
*work
)
4175 struct igb_adapter
*adapter
= container_of(work
,
4178 struct e1000_hw
*hw
= &adapter
->hw
;
4179 struct e1000_phy_info
*phy
= &hw
->phy
;
4180 struct net_device
*netdev
= adapter
->netdev
;
4185 link
= igb_has_link(adapter
);
4187 if (adapter
->flags
& IGB_FLAG_NEED_LINK_UPDATE
) {
4188 if (time_after(jiffies
, (adapter
->link_check_timeout
+ HZ
)))
4189 adapter
->flags
&= ~IGB_FLAG_NEED_LINK_UPDATE
;
4194 /* Force link down if we have fiber to swap to */
4195 if (adapter
->flags
& IGB_FLAG_MAS_ENABLE
) {
4196 if (hw
->phy
.media_type
== e1000_media_type_copper
) {
4197 connsw
= rd32(E1000_CONNSW
);
4198 if (!(connsw
& E1000_CONNSW_AUTOSENSE_EN
))
4203 /* Perform a reset if the media type changed. */
4204 if (hw
->dev_spec
._82575
.media_changed
) {
4205 hw
->dev_spec
._82575
.media_changed
= false;
4206 adapter
->flags
|= IGB_FLAG_MEDIA_RESET
;
4209 /* Cancel scheduled suspend requests. */
4210 pm_runtime_resume(netdev
->dev
.parent
);
4212 if (!netif_carrier_ok(netdev
)) {
4215 hw
->mac
.ops
.get_speed_and_duplex(hw
,
4216 &adapter
->link_speed
,
4217 &adapter
->link_duplex
);
4219 ctrl
= rd32(E1000_CTRL
);
4220 /* Links status message must follow this format */
4222 "igb: %s NIC Link is Up %d Mbps %s Duplex, Flow Control: %s\n",
4224 adapter
->link_speed
,
4225 adapter
->link_duplex
== FULL_DUPLEX
?
4227 (ctrl
& E1000_CTRL_TFCE
) &&
4228 (ctrl
& E1000_CTRL_RFCE
) ? "RX/TX" :
4229 (ctrl
& E1000_CTRL_RFCE
) ? "RX" :
4230 (ctrl
& E1000_CTRL_TFCE
) ? "TX" : "None");
4232 /* disable EEE if enabled */
4233 if ((adapter
->flags
& IGB_FLAG_EEE
) &&
4234 (adapter
->link_duplex
== HALF_DUPLEX
)) {
4235 dev_info(&adapter
->pdev
->dev
,
4236 "EEE Disabled: unsupported at half duplex. Re-enable using ethtool when at full duplex.\n");
4237 adapter
->hw
.dev_spec
._82575
.eee_disable
= true;
4238 adapter
->flags
&= ~IGB_FLAG_EEE
;
4241 /* check if SmartSpeed worked */
4242 igb_check_downshift(hw
);
4243 if (phy
->speed_downgraded
)
4244 netdev_warn(netdev
, "Link Speed was downgraded by SmartSpeed\n");
4246 /* check for thermal sensor event */
4247 if (igb_thermal_sensor_event(hw
,
4248 E1000_THSTAT_LINK_THROTTLE
))
4249 netdev_info(netdev
, "The network adapter link speed was downshifted because it overheated\n");
4251 /* adjust timeout factor according to speed/duplex */
4252 adapter
->tx_timeout_factor
= 1;
4253 switch (adapter
->link_speed
) {
4255 adapter
->tx_timeout_factor
= 14;
4258 /* maybe add some timeout factor ? */
4262 netif_carrier_on(netdev
);
4264 igb_ping_all_vfs(adapter
);
4265 igb_check_vf_rate_limit(adapter
);
4267 /* link state has changed, schedule phy info update */
4268 if (!test_bit(__IGB_DOWN
, &adapter
->state
))
4269 mod_timer(&adapter
->phy_info_timer
,
4270 round_jiffies(jiffies
+ 2 * HZ
));
4273 if (netif_carrier_ok(netdev
)) {
4274 adapter
->link_speed
= 0;
4275 adapter
->link_duplex
= 0;
4277 /* check for thermal sensor event */
4278 if (igb_thermal_sensor_event(hw
,
4279 E1000_THSTAT_PWR_DOWN
)) {
4280 netdev_err(netdev
, "The network adapter was stopped because it overheated\n");
4283 /* Links status message must follow this format */
4284 netdev_info(netdev
, "igb: %s NIC Link is Down\n",
4286 netif_carrier_off(netdev
);
4288 igb_ping_all_vfs(adapter
);
4290 /* link state has changed, schedule phy info update */
4291 if (!test_bit(__IGB_DOWN
, &adapter
->state
))
4292 mod_timer(&adapter
->phy_info_timer
,
4293 round_jiffies(jiffies
+ 2 * HZ
));
4295 /* link is down, time to check for alternate media */
4296 if (adapter
->flags
& IGB_FLAG_MAS_ENABLE
) {
4297 igb_check_swap_media(adapter
);
4298 if (adapter
->flags
& IGB_FLAG_MEDIA_RESET
) {
4299 schedule_work(&adapter
->reset_task
);
4300 /* return immediately */
4304 pm_schedule_suspend(netdev
->dev
.parent
,
4307 /* also check for alternate media here */
4308 } else if (!netif_carrier_ok(netdev
) &&
4309 (adapter
->flags
& IGB_FLAG_MAS_ENABLE
)) {
4310 igb_check_swap_media(adapter
);
4311 if (adapter
->flags
& IGB_FLAG_MEDIA_RESET
) {
4312 schedule_work(&adapter
->reset_task
);
4313 /* return immediately */
4319 spin_lock(&adapter
->stats64_lock
);
4320 igb_update_stats(adapter
, &adapter
->stats64
);
4321 spin_unlock(&adapter
->stats64_lock
);
4323 for (i
= 0; i
< adapter
->num_tx_queues
; i
++) {
4324 struct igb_ring
*tx_ring
= adapter
->tx_ring
[i
];
4325 if (!netif_carrier_ok(netdev
)) {
4326 /* We've lost link, so the controller stops DMA,
4327 * but we've got queued Tx work that's never going
4328 * to get done, so reset controller to flush Tx.
4329 * (Do the reset outside of interrupt context).
4331 if (igb_desc_unused(tx_ring
) + 1 < tx_ring
->count
) {
4332 adapter
->tx_timeout_count
++;
4333 schedule_work(&adapter
->reset_task
);
4334 /* return immediately since reset is imminent */
4339 /* Force detection of hung controller every watchdog period */
4340 set_bit(IGB_RING_FLAG_TX_DETECT_HANG
, &tx_ring
->flags
);
4343 /* Cause software interrupt to ensure Rx ring is cleaned */
4344 if (adapter
->flags
& IGB_FLAG_HAS_MSIX
) {
4347 for (i
= 0; i
< adapter
->num_q_vectors
; i
++)
4348 eics
|= adapter
->q_vector
[i
]->eims_value
;
4349 wr32(E1000_EICS
, eics
);
4351 wr32(E1000_ICS
, E1000_ICS_RXDMT0
);
4354 igb_spoof_check(adapter
);
4355 igb_ptp_rx_hang(adapter
);
4357 /* Reset the timer */
4358 if (!test_bit(__IGB_DOWN
, &adapter
->state
)) {
4359 if (adapter
->flags
& IGB_FLAG_NEED_LINK_UPDATE
)
4360 mod_timer(&adapter
->watchdog_timer
,
4361 round_jiffies(jiffies
+ HZ
));
4363 mod_timer(&adapter
->watchdog_timer
,
4364 round_jiffies(jiffies
+ 2 * HZ
));
4368 enum latency_range
{
4372 latency_invalid
= 255
4376 * igb_update_ring_itr - update the dynamic ITR value based on packet size
4377 * @q_vector: pointer to q_vector
4379 * Stores a new ITR value based on strictly on packet size. This
4380 * algorithm is less sophisticated than that used in igb_update_itr,
4381 * due to the difficulty of synchronizing statistics across multiple
4382 * receive rings. The divisors and thresholds used by this function
4383 * were determined based on theoretical maximum wire speed and testing
4384 * data, in order to minimize response time while increasing bulk
4386 * This functionality is controlled by ethtool's coalescing settings.
4387 * NOTE: This function is called only when operating in a multiqueue
4388 * receive environment.
4390 static void igb_update_ring_itr(struct igb_q_vector
*q_vector
)
4392 int new_val
= q_vector
->itr_val
;
4393 int avg_wire_size
= 0;
4394 struct igb_adapter
*adapter
= q_vector
->adapter
;
4395 unsigned int packets
;
4397 /* For non-gigabit speeds, just fix the interrupt rate at 4000
4398 * ints/sec - ITR timer value of 120 ticks.
4400 if (adapter
->link_speed
!= SPEED_1000
) {
4401 new_val
= IGB_4K_ITR
;
4405 packets
= q_vector
->rx
.total_packets
;
4407 avg_wire_size
= q_vector
->rx
.total_bytes
/ packets
;
4409 packets
= q_vector
->tx
.total_packets
;
4411 avg_wire_size
= max_t(u32
, avg_wire_size
,
4412 q_vector
->tx
.total_bytes
/ packets
);
4414 /* if avg_wire_size isn't set no work was done */
4418 /* Add 24 bytes to size to account for CRC, preamble, and gap */
4419 avg_wire_size
+= 24;
4421 /* Don't starve jumbo frames */
4422 avg_wire_size
= min(avg_wire_size
, 3000);
4424 /* Give a little boost to mid-size frames */
4425 if ((avg_wire_size
> 300) && (avg_wire_size
< 1200))
4426 new_val
= avg_wire_size
/ 3;
4428 new_val
= avg_wire_size
/ 2;
4430 /* conservative mode (itr 3) eliminates the lowest_latency setting */
4431 if (new_val
< IGB_20K_ITR
&&
4432 ((q_vector
->rx
.ring
&& adapter
->rx_itr_setting
== 3) ||
4433 (!q_vector
->rx
.ring
&& adapter
->tx_itr_setting
== 3)))
4434 new_val
= IGB_20K_ITR
;
4437 if (new_val
!= q_vector
->itr_val
) {
4438 q_vector
->itr_val
= new_val
;
4439 q_vector
->set_itr
= 1;
4442 q_vector
->rx
.total_bytes
= 0;
4443 q_vector
->rx
.total_packets
= 0;
4444 q_vector
->tx
.total_bytes
= 0;
4445 q_vector
->tx
.total_packets
= 0;
4449 * igb_update_itr - update the dynamic ITR value based on statistics
4450 * @q_vector: pointer to q_vector
4451 * @ring_container: ring info to update the itr for
4453 * Stores a new ITR value based on packets and byte
4454 * counts during the last interrupt. The advantage of per interrupt
4455 * computation is faster updates and more accurate ITR for the current
4456 * traffic pattern. Constants in this function were computed
4457 * based on theoretical maximum wire speed and thresholds were set based
4458 * on testing data as well as attempting to minimize response time
4459 * while increasing bulk throughput.
4460 * This functionality is controlled by ethtool's coalescing settings.
4461 * NOTE: These calculations are only valid when operating in a single-
4462 * queue environment.
4464 static void igb_update_itr(struct igb_q_vector
*q_vector
,
4465 struct igb_ring_container
*ring_container
)
4467 unsigned int packets
= ring_container
->total_packets
;
4468 unsigned int bytes
= ring_container
->total_bytes
;
4469 u8 itrval
= ring_container
->itr
;
4471 /* no packets, exit with status unchanged */
4476 case lowest_latency
:
4477 /* handle TSO and jumbo frames */
4478 if (bytes
/packets
> 8000)
4479 itrval
= bulk_latency
;
4480 else if ((packets
< 5) && (bytes
> 512))
4481 itrval
= low_latency
;
4483 case low_latency
: /* 50 usec aka 20000 ints/s */
4484 if (bytes
> 10000) {
4485 /* this if handles the TSO accounting */
4486 if (bytes
/packets
> 8000)
4487 itrval
= bulk_latency
;
4488 else if ((packets
< 10) || ((bytes
/packets
) > 1200))
4489 itrval
= bulk_latency
;
4490 else if ((packets
> 35))
4491 itrval
= lowest_latency
;
4492 } else if (bytes
/packets
> 2000) {
4493 itrval
= bulk_latency
;
4494 } else if (packets
<= 2 && bytes
< 512) {
4495 itrval
= lowest_latency
;
4498 case bulk_latency
: /* 250 usec aka 4000 ints/s */
4499 if (bytes
> 25000) {
4501 itrval
= low_latency
;
4502 } else if (bytes
< 1500) {
4503 itrval
= low_latency
;
4508 /* clear work counters since we have the values we need */
4509 ring_container
->total_bytes
= 0;
4510 ring_container
->total_packets
= 0;
4512 /* write updated itr to ring container */
4513 ring_container
->itr
= itrval
;
4516 static void igb_set_itr(struct igb_q_vector
*q_vector
)
4518 struct igb_adapter
*adapter
= q_vector
->adapter
;
4519 u32 new_itr
= q_vector
->itr_val
;
4522 /* for non-gigabit speeds, just fix the interrupt rate at 4000 */
4523 if (adapter
->link_speed
!= SPEED_1000
) {
4525 new_itr
= IGB_4K_ITR
;
4529 igb_update_itr(q_vector
, &q_vector
->tx
);
4530 igb_update_itr(q_vector
, &q_vector
->rx
);
4532 current_itr
= max(q_vector
->rx
.itr
, q_vector
->tx
.itr
);
4534 /* conservative mode (itr 3) eliminates the lowest_latency setting */
4535 if (current_itr
== lowest_latency
&&
4536 ((q_vector
->rx
.ring
&& adapter
->rx_itr_setting
== 3) ||
4537 (!q_vector
->rx
.ring
&& adapter
->tx_itr_setting
== 3)))
4538 current_itr
= low_latency
;
4540 switch (current_itr
) {
4541 /* counts and packets in update_itr are dependent on these numbers */
4542 case lowest_latency
:
4543 new_itr
= IGB_70K_ITR
; /* 70,000 ints/sec */
4546 new_itr
= IGB_20K_ITR
; /* 20,000 ints/sec */
4549 new_itr
= IGB_4K_ITR
; /* 4,000 ints/sec */
4556 if (new_itr
!= q_vector
->itr_val
) {
4557 /* this attempts to bias the interrupt rate towards Bulk
4558 * by adding intermediate steps when interrupt rate is
4561 new_itr
= new_itr
> q_vector
->itr_val
?
4562 max((new_itr
* q_vector
->itr_val
) /
4563 (new_itr
+ (q_vector
->itr_val
>> 2)),
4565 /* Don't write the value here; it resets the adapter's
4566 * internal timer, and causes us to delay far longer than
4567 * we should between interrupts. Instead, we write the ITR
4568 * value at the beginning of the next interrupt so the timing
4569 * ends up being correct.
4571 q_vector
->itr_val
= new_itr
;
4572 q_vector
->set_itr
= 1;
4576 static void igb_tx_ctxtdesc(struct igb_ring
*tx_ring
, u32 vlan_macip_lens
,
4577 u32 type_tucmd
, u32 mss_l4len_idx
)
4579 struct e1000_adv_tx_context_desc
*context_desc
;
4580 u16 i
= tx_ring
->next_to_use
;
4582 context_desc
= IGB_TX_CTXTDESC(tx_ring
, i
);
4585 tx_ring
->next_to_use
= (i
< tx_ring
->count
) ? i
: 0;
4587 /* set bits to identify this as an advanced context descriptor */
4588 type_tucmd
|= E1000_TXD_CMD_DEXT
| E1000_ADVTXD_DTYP_CTXT
;
4590 /* For 82575, context index must be unique per ring. */
4591 if (test_bit(IGB_RING_FLAG_TX_CTX_IDX
, &tx_ring
->flags
))
4592 mss_l4len_idx
|= tx_ring
->reg_idx
<< 4;
4594 context_desc
->vlan_macip_lens
= cpu_to_le32(vlan_macip_lens
);
4595 context_desc
->seqnum_seed
= 0;
4596 context_desc
->type_tucmd_mlhl
= cpu_to_le32(type_tucmd
);
4597 context_desc
->mss_l4len_idx
= cpu_to_le32(mss_l4len_idx
);
4600 static int igb_tso(struct igb_ring
*tx_ring
,
4601 struct igb_tx_buffer
*first
,
4604 struct sk_buff
*skb
= first
->skb
;
4605 u32 vlan_macip_lens
, type_tucmd
;
4606 u32 mss_l4len_idx
, l4len
;
4609 if (skb
->ip_summed
!= CHECKSUM_PARTIAL
)
4612 if (!skb_is_gso(skb
))
4615 err
= skb_cow_head(skb
, 0);
4619 /* ADV DTYP TUCMD MKRLOC/ISCSIHEDLEN */
4620 type_tucmd
= E1000_ADVTXD_TUCMD_L4T_TCP
;
4622 if (first
->protocol
== htons(ETH_P_IP
)) {
4623 struct iphdr
*iph
= ip_hdr(skb
);
4626 tcp_hdr(skb
)->check
= ~csum_tcpudp_magic(iph
->saddr
,
4630 type_tucmd
|= E1000_ADVTXD_TUCMD_IPV4
;
4631 first
->tx_flags
|= IGB_TX_FLAGS_TSO
|
4634 } else if (skb_is_gso_v6(skb
)) {
4635 ipv6_hdr(skb
)->payload_len
= 0;
4636 tcp_hdr(skb
)->check
= ~csum_ipv6_magic(&ipv6_hdr(skb
)->saddr
,
4637 &ipv6_hdr(skb
)->daddr
,
4639 first
->tx_flags
|= IGB_TX_FLAGS_TSO
|
4643 /* compute header lengths */
4644 l4len
= tcp_hdrlen(skb
);
4645 *hdr_len
= skb_transport_offset(skb
) + l4len
;
4647 /* update gso size and bytecount with header size */
4648 first
->gso_segs
= skb_shinfo(skb
)->gso_segs
;
4649 first
->bytecount
+= (first
->gso_segs
- 1) * *hdr_len
;
4652 mss_l4len_idx
= l4len
<< E1000_ADVTXD_L4LEN_SHIFT
;
4653 mss_l4len_idx
|= skb_shinfo(skb
)->gso_size
<< E1000_ADVTXD_MSS_SHIFT
;
4655 /* VLAN MACLEN IPLEN */
4656 vlan_macip_lens
= skb_network_header_len(skb
);
4657 vlan_macip_lens
|= skb_network_offset(skb
) << E1000_ADVTXD_MACLEN_SHIFT
;
4658 vlan_macip_lens
|= first
->tx_flags
& IGB_TX_FLAGS_VLAN_MASK
;
4660 igb_tx_ctxtdesc(tx_ring
, vlan_macip_lens
, type_tucmd
, mss_l4len_idx
);
4665 static void igb_tx_csum(struct igb_ring
*tx_ring
, struct igb_tx_buffer
*first
)
4667 struct sk_buff
*skb
= first
->skb
;
4668 u32 vlan_macip_lens
= 0;
4669 u32 mss_l4len_idx
= 0;
4672 if (skb
->ip_summed
!= CHECKSUM_PARTIAL
) {
4673 if (!(first
->tx_flags
& IGB_TX_FLAGS_VLAN
))
4678 switch (first
->protocol
) {
4679 case htons(ETH_P_IP
):
4680 vlan_macip_lens
|= skb_network_header_len(skb
);
4681 type_tucmd
|= E1000_ADVTXD_TUCMD_IPV4
;
4682 l4_hdr
= ip_hdr(skb
)->protocol
;
4684 case htons(ETH_P_IPV6
):
4685 vlan_macip_lens
|= skb_network_header_len(skb
);
4686 l4_hdr
= ipv6_hdr(skb
)->nexthdr
;
4689 if (unlikely(net_ratelimit())) {
4690 dev_warn(tx_ring
->dev
,
4691 "partial checksum but proto=%x!\n",
4699 type_tucmd
|= E1000_ADVTXD_TUCMD_L4T_TCP
;
4700 mss_l4len_idx
= tcp_hdrlen(skb
) <<
4701 E1000_ADVTXD_L4LEN_SHIFT
;
4704 type_tucmd
|= E1000_ADVTXD_TUCMD_L4T_SCTP
;
4705 mss_l4len_idx
= sizeof(struct sctphdr
) <<
4706 E1000_ADVTXD_L4LEN_SHIFT
;
4709 mss_l4len_idx
= sizeof(struct udphdr
) <<
4710 E1000_ADVTXD_L4LEN_SHIFT
;
4713 if (unlikely(net_ratelimit())) {
4714 dev_warn(tx_ring
->dev
,
4715 "partial checksum but l4 proto=%x!\n",
4721 /* update TX checksum flag */
4722 first
->tx_flags
|= IGB_TX_FLAGS_CSUM
;
4725 vlan_macip_lens
|= skb_network_offset(skb
) << E1000_ADVTXD_MACLEN_SHIFT
;
4726 vlan_macip_lens
|= first
->tx_flags
& IGB_TX_FLAGS_VLAN_MASK
;
4728 igb_tx_ctxtdesc(tx_ring
, vlan_macip_lens
, type_tucmd
, mss_l4len_idx
);
4731 #define IGB_SET_FLAG(_input, _flag, _result) \
4732 ((_flag <= _result) ? \
4733 ((u32)(_input & _flag) * (_result / _flag)) : \
4734 ((u32)(_input & _flag) / (_flag / _result)))
4736 static u32
igb_tx_cmd_type(struct sk_buff
*skb
, u32 tx_flags
)
4738 /* set type for advanced descriptor with frame checksum insertion */
4739 u32 cmd_type
= E1000_ADVTXD_DTYP_DATA
|
4740 E1000_ADVTXD_DCMD_DEXT
|
4741 E1000_ADVTXD_DCMD_IFCS
;
4743 /* set HW vlan bit if vlan is present */
4744 cmd_type
|= IGB_SET_FLAG(tx_flags
, IGB_TX_FLAGS_VLAN
,
4745 (E1000_ADVTXD_DCMD_VLE
));
4747 /* set segmentation bits for TSO */
4748 cmd_type
|= IGB_SET_FLAG(tx_flags
, IGB_TX_FLAGS_TSO
,
4749 (E1000_ADVTXD_DCMD_TSE
));
4751 /* set timestamp bit if present */
4752 cmd_type
|= IGB_SET_FLAG(tx_flags
, IGB_TX_FLAGS_TSTAMP
,
4753 (E1000_ADVTXD_MAC_TSTAMP
));
4755 /* insert frame checksum */
4756 cmd_type
^= IGB_SET_FLAG(skb
->no_fcs
, 1, E1000_ADVTXD_DCMD_IFCS
);
4761 static void igb_tx_olinfo_status(struct igb_ring
*tx_ring
,
4762 union e1000_adv_tx_desc
*tx_desc
,
4763 u32 tx_flags
, unsigned int paylen
)
4765 u32 olinfo_status
= paylen
<< E1000_ADVTXD_PAYLEN_SHIFT
;
4767 /* 82575 requires a unique index per ring */
4768 if (test_bit(IGB_RING_FLAG_TX_CTX_IDX
, &tx_ring
->flags
))
4769 olinfo_status
|= tx_ring
->reg_idx
<< 4;
4771 /* insert L4 checksum */
4772 olinfo_status
|= IGB_SET_FLAG(tx_flags
,
4774 (E1000_TXD_POPTS_TXSM
<< 8));
4776 /* insert IPv4 checksum */
4777 olinfo_status
|= IGB_SET_FLAG(tx_flags
,
4779 (E1000_TXD_POPTS_IXSM
<< 8));
4781 tx_desc
->read
.olinfo_status
= cpu_to_le32(olinfo_status
);
4784 static void igb_tx_map(struct igb_ring
*tx_ring
,
4785 struct igb_tx_buffer
*first
,
4788 struct sk_buff
*skb
= first
->skb
;
4789 struct igb_tx_buffer
*tx_buffer
;
4790 union e1000_adv_tx_desc
*tx_desc
;
4791 struct skb_frag_struct
*frag
;
4793 unsigned int data_len
, size
;
4794 u32 tx_flags
= first
->tx_flags
;
4795 u32 cmd_type
= igb_tx_cmd_type(skb
, tx_flags
);
4796 u16 i
= tx_ring
->next_to_use
;
4798 tx_desc
= IGB_TX_DESC(tx_ring
, i
);
4800 igb_tx_olinfo_status(tx_ring
, tx_desc
, tx_flags
, skb
->len
- hdr_len
);
4802 size
= skb_headlen(skb
);
4803 data_len
= skb
->data_len
;
4805 dma
= dma_map_single(tx_ring
->dev
, skb
->data
, size
, DMA_TO_DEVICE
);
4809 for (frag
= &skb_shinfo(skb
)->frags
[0];; frag
++) {
4810 if (dma_mapping_error(tx_ring
->dev
, dma
))
4813 /* record length, and DMA address */
4814 dma_unmap_len_set(tx_buffer
, len
, size
);
4815 dma_unmap_addr_set(tx_buffer
, dma
, dma
);
4817 tx_desc
->read
.buffer_addr
= cpu_to_le64(dma
);
4819 while (unlikely(size
> IGB_MAX_DATA_PER_TXD
)) {
4820 tx_desc
->read
.cmd_type_len
=
4821 cpu_to_le32(cmd_type
^ IGB_MAX_DATA_PER_TXD
);
4825 if (i
== tx_ring
->count
) {
4826 tx_desc
= IGB_TX_DESC(tx_ring
, 0);
4829 tx_desc
->read
.olinfo_status
= 0;
4831 dma
+= IGB_MAX_DATA_PER_TXD
;
4832 size
-= IGB_MAX_DATA_PER_TXD
;
4834 tx_desc
->read
.buffer_addr
= cpu_to_le64(dma
);
4837 if (likely(!data_len
))
4840 tx_desc
->read
.cmd_type_len
= cpu_to_le32(cmd_type
^ size
);
4844 if (i
== tx_ring
->count
) {
4845 tx_desc
= IGB_TX_DESC(tx_ring
, 0);
4848 tx_desc
->read
.olinfo_status
= 0;
4850 size
= skb_frag_size(frag
);
4853 dma
= skb_frag_dma_map(tx_ring
->dev
, frag
, 0,
4854 size
, DMA_TO_DEVICE
);
4856 tx_buffer
= &tx_ring
->tx_buffer_info
[i
];
4859 /* write last descriptor with RS and EOP bits */
4860 cmd_type
|= size
| IGB_TXD_DCMD
;
4861 tx_desc
->read
.cmd_type_len
= cpu_to_le32(cmd_type
);
4863 netdev_tx_sent_queue(txring_txq(tx_ring
), first
->bytecount
);
4865 /* set the timestamp */
4866 first
->time_stamp
= jiffies
;
4868 /* Force memory writes to complete before letting h/w know there
4869 * are new descriptors to fetch. (Only applicable for weak-ordered
4870 * memory model archs, such as IA-64).
4872 * We also need this memory barrier to make certain all of the
4873 * status bits have been updated before next_to_watch is written.
4877 /* set next_to_watch value indicating a packet is present */
4878 first
->next_to_watch
= tx_desc
;
4881 if (i
== tx_ring
->count
)
4884 tx_ring
->next_to_use
= i
;
4886 writel(i
, tx_ring
->tail
);
4888 /* we need this if more than one processor can write to our tail
4889 * at a time, it synchronizes IO on IA64/Altix systems
4896 dev_err(tx_ring
->dev
, "TX DMA map failed\n");
4898 /* clear dma mappings for failed tx_buffer_info map */
4900 tx_buffer
= &tx_ring
->tx_buffer_info
[i
];
4901 igb_unmap_and_free_tx_resource(tx_ring
, tx_buffer
);
4902 if (tx_buffer
== first
)
4909 tx_ring
->next_to_use
= i
;
4912 static int __igb_maybe_stop_tx(struct igb_ring
*tx_ring
, const u16 size
)
4914 struct net_device
*netdev
= tx_ring
->netdev
;
4916 netif_stop_subqueue(netdev
, tx_ring
->queue_index
);
4918 /* Herbert's original patch had:
4919 * smp_mb__after_netif_stop_queue();
4920 * but since that doesn't exist yet, just open code it.
4924 /* We need to check again in a case another CPU has just
4925 * made room available.
4927 if (igb_desc_unused(tx_ring
) < size
)
4931 netif_wake_subqueue(netdev
, tx_ring
->queue_index
);
4933 u64_stats_update_begin(&tx_ring
->tx_syncp2
);
4934 tx_ring
->tx_stats
.restart_queue2
++;
4935 u64_stats_update_end(&tx_ring
->tx_syncp2
);
4940 static inline int igb_maybe_stop_tx(struct igb_ring
*tx_ring
, const u16 size
)
4942 if (igb_desc_unused(tx_ring
) >= size
)
4944 return __igb_maybe_stop_tx(tx_ring
, size
);
4947 netdev_tx_t
igb_xmit_frame_ring(struct sk_buff
*skb
,
4948 struct igb_ring
*tx_ring
)
4950 struct igb_tx_buffer
*first
;
4953 u16 count
= TXD_USE_COUNT(skb_headlen(skb
));
4954 __be16 protocol
= vlan_get_protocol(skb
);
4957 /* need: 1 descriptor per page * PAGE_SIZE/IGB_MAX_DATA_PER_TXD,
4958 * + 1 desc for skb_headlen/IGB_MAX_DATA_PER_TXD,
4959 * + 2 desc gap to keep tail from touching head,
4960 * + 1 desc for context descriptor,
4961 * otherwise try next time
4963 if (NETDEV_FRAG_PAGE_MAX_SIZE
> IGB_MAX_DATA_PER_TXD
) {
4966 for (f
= 0; f
< skb_shinfo(skb
)->nr_frags
; f
++)
4967 count
+= TXD_USE_COUNT(skb_shinfo(skb
)->frags
[f
].size
);
4969 count
+= skb_shinfo(skb
)->nr_frags
;
4972 if (igb_maybe_stop_tx(tx_ring
, count
+ 3)) {
4973 /* this is a hard error */
4974 return NETDEV_TX_BUSY
;
4977 /* record the location of the first descriptor for this packet */
4978 first
= &tx_ring
->tx_buffer_info
[tx_ring
->next_to_use
];
4980 first
->bytecount
= skb
->len
;
4981 first
->gso_segs
= 1;
4983 if (unlikely(skb_shinfo(skb
)->tx_flags
& SKBTX_HW_TSTAMP
)) {
4984 struct igb_adapter
*adapter
= netdev_priv(tx_ring
->netdev
);
4986 if (!test_and_set_bit_lock(__IGB_PTP_TX_IN_PROGRESS
,
4988 skb_shinfo(skb
)->tx_flags
|= SKBTX_IN_PROGRESS
;
4989 tx_flags
|= IGB_TX_FLAGS_TSTAMP
;
4991 adapter
->ptp_tx_skb
= skb_get(skb
);
4992 adapter
->ptp_tx_start
= jiffies
;
4993 if (adapter
->hw
.mac
.type
== e1000_82576
)
4994 schedule_work(&adapter
->ptp_tx_work
);
4998 skb_tx_timestamp(skb
);
5000 if (vlan_tx_tag_present(skb
)) {
5001 tx_flags
|= IGB_TX_FLAGS_VLAN
;
5002 tx_flags
|= (vlan_tx_tag_get(skb
) << IGB_TX_FLAGS_VLAN_SHIFT
);
5005 /* record initial flags and protocol */
5006 first
->tx_flags
= tx_flags
;
5007 first
->protocol
= protocol
;
5009 tso
= igb_tso(tx_ring
, first
, &hdr_len
);
5013 igb_tx_csum(tx_ring
, first
);
5015 igb_tx_map(tx_ring
, first
, hdr_len
);
5017 /* Make sure there is space in the ring for the next send. */
5018 igb_maybe_stop_tx(tx_ring
, DESC_NEEDED
);
5020 return NETDEV_TX_OK
;
5023 igb_unmap_and_free_tx_resource(tx_ring
, first
);
5025 return NETDEV_TX_OK
;
5028 static inline struct igb_ring
*igb_tx_queue_mapping(struct igb_adapter
*adapter
,
5029 struct sk_buff
*skb
)
5031 unsigned int r_idx
= skb
->queue_mapping
;
5033 if (r_idx
>= adapter
->num_tx_queues
)
5034 r_idx
= r_idx
% adapter
->num_tx_queues
;
5036 return adapter
->tx_ring
[r_idx
];
5039 static netdev_tx_t
igb_xmit_frame(struct sk_buff
*skb
,
5040 struct net_device
*netdev
)
5042 struct igb_adapter
*adapter
= netdev_priv(netdev
);
5044 if (test_bit(__IGB_DOWN
, &adapter
->state
)) {
5045 dev_kfree_skb_any(skb
);
5046 return NETDEV_TX_OK
;
5049 if (skb
->len
<= 0) {
5050 dev_kfree_skb_any(skb
);
5051 return NETDEV_TX_OK
;
5054 /* The minimum packet size with TCTL.PSP set is 17 so pad the skb
5055 * in order to meet this minimum size requirement.
5057 if (unlikely(skb
->len
< 17)) {
5058 if (skb_pad(skb
, 17 - skb
->len
))
5059 return NETDEV_TX_OK
;
5061 skb_set_tail_pointer(skb
, 17);
5064 return igb_xmit_frame_ring(skb
, igb_tx_queue_mapping(adapter
, skb
));
5068 * igb_tx_timeout - Respond to a Tx Hang
5069 * @netdev: network interface device structure
5071 static void igb_tx_timeout(struct net_device
*netdev
)
5073 struct igb_adapter
*adapter
= netdev_priv(netdev
);
5074 struct e1000_hw
*hw
= &adapter
->hw
;
5076 /* Do the reset outside of interrupt context */
5077 adapter
->tx_timeout_count
++;
5079 if (hw
->mac
.type
>= e1000_82580
)
5080 hw
->dev_spec
._82575
.global_device_reset
= true;
5082 schedule_work(&adapter
->reset_task
);
5084 (adapter
->eims_enable_mask
& ~adapter
->eims_other
));
5087 static void igb_reset_task(struct work_struct
*work
)
5089 struct igb_adapter
*adapter
;
5090 adapter
= container_of(work
, struct igb_adapter
, reset_task
);
5093 netdev_err(adapter
->netdev
, "Reset adapter\n");
5094 igb_reinit_locked(adapter
);
5098 * igb_get_stats64 - Get System Network Statistics
5099 * @netdev: network interface device structure
5100 * @stats: rtnl_link_stats64 pointer
5102 static struct rtnl_link_stats64
*igb_get_stats64(struct net_device
*netdev
,
5103 struct rtnl_link_stats64
*stats
)
5105 struct igb_adapter
*adapter
= netdev_priv(netdev
);
5107 spin_lock(&adapter
->stats64_lock
);
5108 igb_update_stats(adapter
, &adapter
->stats64
);
5109 memcpy(stats
, &adapter
->stats64
, sizeof(*stats
));
5110 spin_unlock(&adapter
->stats64_lock
);
5116 * igb_change_mtu - Change the Maximum Transfer Unit
5117 * @netdev: network interface device structure
5118 * @new_mtu: new value for maximum frame size
5120 * Returns 0 on success, negative on failure
5122 static int igb_change_mtu(struct net_device
*netdev
, int new_mtu
)
5124 struct igb_adapter
*adapter
= netdev_priv(netdev
);
5125 struct pci_dev
*pdev
= adapter
->pdev
;
5126 int max_frame
= new_mtu
+ ETH_HLEN
+ ETH_FCS_LEN
+ VLAN_HLEN
;
5128 if ((new_mtu
< 68) || (max_frame
> MAX_JUMBO_FRAME_SIZE
)) {
5129 dev_err(&pdev
->dev
, "Invalid MTU setting\n");
5133 #define MAX_STD_JUMBO_FRAME_SIZE 9238
5134 if (max_frame
> MAX_STD_JUMBO_FRAME_SIZE
) {
5135 dev_err(&pdev
->dev
, "MTU > 9216 not supported.\n");
5139 /* adjust max frame to be at least the size of a standard frame */
5140 if (max_frame
< (ETH_FRAME_LEN
+ ETH_FCS_LEN
))
5141 max_frame
= ETH_FRAME_LEN
+ ETH_FCS_LEN
;
5143 while (test_and_set_bit(__IGB_RESETTING
, &adapter
->state
))
5144 usleep_range(1000, 2000);
5146 /* igb_down has a dependency on max_frame_size */
5147 adapter
->max_frame_size
= max_frame
;
5149 if (netif_running(netdev
))
5152 dev_info(&pdev
->dev
, "changing MTU from %d to %d\n",
5153 netdev
->mtu
, new_mtu
);
5154 netdev
->mtu
= new_mtu
;
5156 if (netif_running(netdev
))
5161 clear_bit(__IGB_RESETTING
, &adapter
->state
);
5167 * igb_update_stats - Update the board statistics counters
5168 * @adapter: board private structure
5170 void igb_update_stats(struct igb_adapter
*adapter
,
5171 struct rtnl_link_stats64
*net_stats
)
5173 struct e1000_hw
*hw
= &adapter
->hw
;
5174 struct pci_dev
*pdev
= adapter
->pdev
;
5180 u64 _bytes
, _packets
;
5182 #define PHY_IDLE_ERROR_COUNT_MASK 0x00FF
5184 /* Prevent stats update while adapter is being reset, or if the pci
5185 * connection is down.
5187 if (adapter
->link_speed
== 0)
5189 if (pci_channel_offline(pdev
))
5196 for (i
= 0; i
< adapter
->num_rx_queues
; i
++) {
5197 struct igb_ring
*ring
= adapter
->rx_ring
[i
];
5198 u32 rqdpc
= rd32(E1000_RQDPC(i
));
5199 if (hw
->mac
.type
>= e1000_i210
)
5200 wr32(E1000_RQDPC(i
), 0);
5203 ring
->rx_stats
.drops
+= rqdpc
;
5204 net_stats
->rx_fifo_errors
+= rqdpc
;
5208 start
= u64_stats_fetch_begin_irq(&ring
->rx_syncp
);
5209 _bytes
= ring
->rx_stats
.bytes
;
5210 _packets
= ring
->rx_stats
.packets
;
5211 } while (u64_stats_fetch_retry_irq(&ring
->rx_syncp
, start
));
5213 packets
+= _packets
;
5216 net_stats
->rx_bytes
= bytes
;
5217 net_stats
->rx_packets
= packets
;
5221 for (i
= 0; i
< adapter
->num_tx_queues
; i
++) {
5222 struct igb_ring
*ring
= adapter
->tx_ring
[i
];
5224 start
= u64_stats_fetch_begin_irq(&ring
->tx_syncp
);
5225 _bytes
= ring
->tx_stats
.bytes
;
5226 _packets
= ring
->tx_stats
.packets
;
5227 } while (u64_stats_fetch_retry_irq(&ring
->tx_syncp
, start
));
5229 packets
+= _packets
;
5231 net_stats
->tx_bytes
= bytes
;
5232 net_stats
->tx_packets
= packets
;
5235 /* read stats registers */
5236 adapter
->stats
.crcerrs
+= rd32(E1000_CRCERRS
);
5237 adapter
->stats
.gprc
+= rd32(E1000_GPRC
);
5238 adapter
->stats
.gorc
+= rd32(E1000_GORCL
);
5239 rd32(E1000_GORCH
); /* clear GORCL */
5240 adapter
->stats
.bprc
+= rd32(E1000_BPRC
);
5241 adapter
->stats
.mprc
+= rd32(E1000_MPRC
);
5242 adapter
->stats
.roc
+= rd32(E1000_ROC
);
5244 adapter
->stats
.prc64
+= rd32(E1000_PRC64
);
5245 adapter
->stats
.prc127
+= rd32(E1000_PRC127
);
5246 adapter
->stats
.prc255
+= rd32(E1000_PRC255
);
5247 adapter
->stats
.prc511
+= rd32(E1000_PRC511
);
5248 adapter
->stats
.prc1023
+= rd32(E1000_PRC1023
);
5249 adapter
->stats
.prc1522
+= rd32(E1000_PRC1522
);
5250 adapter
->stats
.symerrs
+= rd32(E1000_SYMERRS
);
5251 adapter
->stats
.sec
+= rd32(E1000_SEC
);
5253 mpc
= rd32(E1000_MPC
);
5254 adapter
->stats
.mpc
+= mpc
;
5255 net_stats
->rx_fifo_errors
+= mpc
;
5256 adapter
->stats
.scc
+= rd32(E1000_SCC
);
5257 adapter
->stats
.ecol
+= rd32(E1000_ECOL
);
5258 adapter
->stats
.mcc
+= rd32(E1000_MCC
);
5259 adapter
->stats
.latecol
+= rd32(E1000_LATECOL
);
5260 adapter
->stats
.dc
+= rd32(E1000_DC
);
5261 adapter
->stats
.rlec
+= rd32(E1000_RLEC
);
5262 adapter
->stats
.xonrxc
+= rd32(E1000_XONRXC
);
5263 adapter
->stats
.xontxc
+= rd32(E1000_XONTXC
);
5264 adapter
->stats
.xoffrxc
+= rd32(E1000_XOFFRXC
);
5265 adapter
->stats
.xofftxc
+= rd32(E1000_XOFFTXC
);
5266 adapter
->stats
.fcruc
+= rd32(E1000_FCRUC
);
5267 adapter
->stats
.gptc
+= rd32(E1000_GPTC
);
5268 adapter
->stats
.gotc
+= rd32(E1000_GOTCL
);
5269 rd32(E1000_GOTCH
); /* clear GOTCL */
5270 adapter
->stats
.rnbc
+= rd32(E1000_RNBC
);
5271 adapter
->stats
.ruc
+= rd32(E1000_RUC
);
5272 adapter
->stats
.rfc
+= rd32(E1000_RFC
);
5273 adapter
->stats
.rjc
+= rd32(E1000_RJC
);
5274 adapter
->stats
.tor
+= rd32(E1000_TORH
);
5275 adapter
->stats
.tot
+= rd32(E1000_TOTH
);
5276 adapter
->stats
.tpr
+= rd32(E1000_TPR
);
5278 adapter
->stats
.ptc64
+= rd32(E1000_PTC64
);
5279 adapter
->stats
.ptc127
+= rd32(E1000_PTC127
);
5280 adapter
->stats
.ptc255
+= rd32(E1000_PTC255
);
5281 adapter
->stats
.ptc511
+= rd32(E1000_PTC511
);
5282 adapter
->stats
.ptc1023
+= rd32(E1000_PTC1023
);
5283 adapter
->stats
.ptc1522
+= rd32(E1000_PTC1522
);
5285 adapter
->stats
.mptc
+= rd32(E1000_MPTC
);
5286 adapter
->stats
.bptc
+= rd32(E1000_BPTC
);
5288 adapter
->stats
.tpt
+= rd32(E1000_TPT
);
5289 adapter
->stats
.colc
+= rd32(E1000_COLC
);
5291 adapter
->stats
.algnerrc
+= rd32(E1000_ALGNERRC
);
5292 /* read internal phy specific stats */
5293 reg
= rd32(E1000_CTRL_EXT
);
5294 if (!(reg
& E1000_CTRL_EXT_LINK_MODE_MASK
)) {
5295 adapter
->stats
.rxerrc
+= rd32(E1000_RXERRC
);
5297 /* this stat has invalid values on i210/i211 */
5298 if ((hw
->mac
.type
!= e1000_i210
) &&
5299 (hw
->mac
.type
!= e1000_i211
))
5300 adapter
->stats
.tncrs
+= rd32(E1000_TNCRS
);
5303 adapter
->stats
.tsctc
+= rd32(E1000_TSCTC
);
5304 adapter
->stats
.tsctfc
+= rd32(E1000_TSCTFC
);
5306 adapter
->stats
.iac
+= rd32(E1000_IAC
);
5307 adapter
->stats
.icrxoc
+= rd32(E1000_ICRXOC
);
5308 adapter
->stats
.icrxptc
+= rd32(E1000_ICRXPTC
);
5309 adapter
->stats
.icrxatc
+= rd32(E1000_ICRXATC
);
5310 adapter
->stats
.ictxptc
+= rd32(E1000_ICTXPTC
);
5311 adapter
->stats
.ictxatc
+= rd32(E1000_ICTXATC
);
5312 adapter
->stats
.ictxqec
+= rd32(E1000_ICTXQEC
);
5313 adapter
->stats
.ictxqmtc
+= rd32(E1000_ICTXQMTC
);
5314 adapter
->stats
.icrxdmtc
+= rd32(E1000_ICRXDMTC
);
5316 /* Fill out the OS statistics structure */
5317 net_stats
->multicast
= adapter
->stats
.mprc
;
5318 net_stats
->collisions
= adapter
->stats
.colc
;
5322 /* RLEC on some newer hardware can be incorrect so build
5323 * our own version based on RUC and ROC
5325 net_stats
->rx_errors
= adapter
->stats
.rxerrc
+
5326 adapter
->stats
.crcerrs
+ adapter
->stats
.algnerrc
+
5327 adapter
->stats
.ruc
+ adapter
->stats
.roc
+
5328 adapter
->stats
.cexterr
;
5329 net_stats
->rx_length_errors
= adapter
->stats
.ruc
+
5331 net_stats
->rx_crc_errors
= adapter
->stats
.crcerrs
;
5332 net_stats
->rx_frame_errors
= adapter
->stats
.algnerrc
;
5333 net_stats
->rx_missed_errors
= adapter
->stats
.mpc
;
5336 net_stats
->tx_errors
= adapter
->stats
.ecol
+
5337 adapter
->stats
.latecol
;
5338 net_stats
->tx_aborted_errors
= adapter
->stats
.ecol
;
5339 net_stats
->tx_window_errors
= adapter
->stats
.latecol
;
5340 net_stats
->tx_carrier_errors
= adapter
->stats
.tncrs
;
5342 /* Tx Dropped needs to be maintained elsewhere */
5345 if (hw
->phy
.media_type
== e1000_media_type_copper
) {
5346 if ((adapter
->link_speed
== SPEED_1000
) &&
5347 (!igb_read_phy_reg(hw
, PHY_1000T_STATUS
, &phy_tmp
))) {
5348 phy_tmp
&= PHY_IDLE_ERROR_COUNT_MASK
;
5349 adapter
->phy_stats
.idle_errors
+= phy_tmp
;
5353 /* Management Stats */
5354 adapter
->stats
.mgptc
+= rd32(E1000_MGTPTC
);
5355 adapter
->stats
.mgprc
+= rd32(E1000_MGTPRC
);
5356 adapter
->stats
.mgpdc
+= rd32(E1000_MGTPDC
);
5359 reg
= rd32(E1000_MANC
);
5360 if (reg
& E1000_MANC_EN_BMC2OS
) {
5361 adapter
->stats
.o2bgptc
+= rd32(E1000_O2BGPTC
);
5362 adapter
->stats
.o2bspc
+= rd32(E1000_O2BSPC
);
5363 adapter
->stats
.b2ospc
+= rd32(E1000_B2OSPC
);
5364 adapter
->stats
.b2ogprc
+= rd32(E1000_B2OGPRC
);
5368 static irqreturn_t
igb_msix_other(int irq
, void *data
)
5370 struct igb_adapter
*adapter
= data
;
5371 struct e1000_hw
*hw
= &adapter
->hw
;
5372 u32 icr
= rd32(E1000_ICR
);
5373 /* reading ICR causes bit 31 of EICR to be cleared */
5375 if (icr
& E1000_ICR_DRSTA
)
5376 schedule_work(&adapter
->reset_task
);
5378 if (icr
& E1000_ICR_DOUTSYNC
) {
5379 /* HW is reporting DMA is out of sync */
5380 adapter
->stats
.doosync
++;
5381 /* The DMA Out of Sync is also indication of a spoof event
5382 * in IOV mode. Check the Wrong VM Behavior register to
5383 * see if it is really a spoof event.
5385 igb_check_wvbr(adapter
);
5388 /* Check for a mailbox event */
5389 if (icr
& E1000_ICR_VMMB
)
5390 igb_msg_task(adapter
);
5392 if (icr
& E1000_ICR_LSC
) {
5393 hw
->mac
.get_link_status
= 1;
5394 /* guard against interrupt when we're going down */
5395 if (!test_bit(__IGB_DOWN
, &adapter
->state
))
5396 mod_timer(&adapter
->watchdog_timer
, jiffies
+ 1);
5399 if (icr
& E1000_ICR_TS
) {
5400 u32 tsicr
= rd32(E1000_TSICR
);
5402 if (tsicr
& E1000_TSICR_TXTS
) {
5403 /* acknowledge the interrupt */
5404 wr32(E1000_TSICR
, E1000_TSICR_TXTS
);
5405 /* retrieve hardware timestamp */
5406 schedule_work(&adapter
->ptp_tx_work
);
5410 wr32(E1000_EIMS
, adapter
->eims_other
);
5415 static void igb_write_itr(struct igb_q_vector
*q_vector
)
5417 struct igb_adapter
*adapter
= q_vector
->adapter
;
5418 u32 itr_val
= q_vector
->itr_val
& 0x7FFC;
5420 if (!q_vector
->set_itr
)
5426 if (adapter
->hw
.mac
.type
== e1000_82575
)
5427 itr_val
|= itr_val
<< 16;
5429 itr_val
|= E1000_EITR_CNT_IGNR
;
5431 writel(itr_val
, q_vector
->itr_register
);
5432 q_vector
->set_itr
= 0;
5435 static irqreturn_t
igb_msix_ring(int irq
, void *data
)
5437 struct igb_q_vector
*q_vector
= data
;
5439 /* Write the ITR value calculated from the previous interrupt. */
5440 igb_write_itr(q_vector
);
5442 napi_schedule(&q_vector
->napi
);
5447 #ifdef CONFIG_IGB_DCA
5448 static void igb_update_tx_dca(struct igb_adapter
*adapter
,
5449 struct igb_ring
*tx_ring
,
5452 struct e1000_hw
*hw
= &adapter
->hw
;
5453 u32 txctrl
= dca3_get_tag(tx_ring
->dev
, cpu
);
5455 if (hw
->mac
.type
!= e1000_82575
)
5456 txctrl
<<= E1000_DCA_TXCTRL_CPUID_SHIFT
;
5458 /* We can enable relaxed ordering for reads, but not writes when
5459 * DCA is enabled. This is due to a known issue in some chipsets
5460 * which will cause the DCA tag to be cleared.
5462 txctrl
|= E1000_DCA_TXCTRL_DESC_RRO_EN
|
5463 E1000_DCA_TXCTRL_DATA_RRO_EN
|
5464 E1000_DCA_TXCTRL_DESC_DCA_EN
;
5466 wr32(E1000_DCA_TXCTRL(tx_ring
->reg_idx
), txctrl
);
5469 static void igb_update_rx_dca(struct igb_adapter
*adapter
,
5470 struct igb_ring
*rx_ring
,
5473 struct e1000_hw
*hw
= &adapter
->hw
;
5474 u32 rxctrl
= dca3_get_tag(&adapter
->pdev
->dev
, cpu
);
5476 if (hw
->mac
.type
!= e1000_82575
)
5477 rxctrl
<<= E1000_DCA_RXCTRL_CPUID_SHIFT
;
5479 /* We can enable relaxed ordering for reads, but not writes when
5480 * DCA is enabled. This is due to a known issue in some chipsets
5481 * which will cause the DCA tag to be cleared.
5483 rxctrl
|= E1000_DCA_RXCTRL_DESC_RRO_EN
|
5484 E1000_DCA_RXCTRL_DESC_DCA_EN
;
5486 wr32(E1000_DCA_RXCTRL(rx_ring
->reg_idx
), rxctrl
);
5489 static void igb_update_dca(struct igb_q_vector
*q_vector
)
5491 struct igb_adapter
*adapter
= q_vector
->adapter
;
5492 int cpu
= get_cpu();
5494 if (q_vector
->cpu
== cpu
)
5497 if (q_vector
->tx
.ring
)
5498 igb_update_tx_dca(adapter
, q_vector
->tx
.ring
, cpu
);
5500 if (q_vector
->rx
.ring
)
5501 igb_update_rx_dca(adapter
, q_vector
->rx
.ring
, cpu
);
5503 q_vector
->cpu
= cpu
;
5508 static void igb_setup_dca(struct igb_adapter
*adapter
)
5510 struct e1000_hw
*hw
= &adapter
->hw
;
5513 if (!(adapter
->flags
& IGB_FLAG_DCA_ENABLED
))
5516 /* Always use CB2 mode, difference is masked in the CB driver. */
5517 wr32(E1000_DCA_CTRL
, E1000_DCA_CTRL_DCA_MODE_CB2
);
5519 for (i
= 0; i
< adapter
->num_q_vectors
; i
++) {
5520 adapter
->q_vector
[i
]->cpu
= -1;
5521 igb_update_dca(adapter
->q_vector
[i
]);
5525 static int __igb_notify_dca(struct device
*dev
, void *data
)
5527 struct net_device
*netdev
= dev_get_drvdata(dev
);
5528 struct igb_adapter
*adapter
= netdev_priv(netdev
);
5529 struct pci_dev
*pdev
= adapter
->pdev
;
5530 struct e1000_hw
*hw
= &adapter
->hw
;
5531 unsigned long event
= *(unsigned long *)data
;
5534 case DCA_PROVIDER_ADD
:
5535 /* if already enabled, don't do it again */
5536 if (adapter
->flags
& IGB_FLAG_DCA_ENABLED
)
5538 if (dca_add_requester(dev
) == 0) {
5539 adapter
->flags
|= IGB_FLAG_DCA_ENABLED
;
5540 dev_info(&pdev
->dev
, "DCA enabled\n");
5541 igb_setup_dca(adapter
);
5544 /* Fall Through since DCA is disabled. */
5545 case DCA_PROVIDER_REMOVE
:
5546 if (adapter
->flags
& IGB_FLAG_DCA_ENABLED
) {
5547 /* without this a class_device is left
5548 * hanging around in the sysfs model
5550 dca_remove_requester(dev
);
5551 dev_info(&pdev
->dev
, "DCA disabled\n");
5552 adapter
->flags
&= ~IGB_FLAG_DCA_ENABLED
;
5553 wr32(E1000_DCA_CTRL
, E1000_DCA_CTRL_DCA_MODE_DISABLE
);
5561 static int igb_notify_dca(struct notifier_block
*nb
, unsigned long event
,
5566 ret_val
= driver_for_each_device(&igb_driver
.driver
, NULL
, &event
,
5569 return ret_val
? NOTIFY_BAD
: NOTIFY_DONE
;
5571 #endif /* CONFIG_IGB_DCA */
5573 #ifdef CONFIG_PCI_IOV
5574 static int igb_vf_configure(struct igb_adapter
*adapter
, int vf
)
5576 unsigned char mac_addr
[ETH_ALEN
];
5578 eth_zero_addr(mac_addr
);
5579 igb_set_vf_mac(adapter
, vf
, mac_addr
);
5581 /* By default spoof check is enabled for all VFs */
5582 adapter
->vf_data
[vf
].spoofchk_enabled
= true;
5588 static void igb_ping_all_vfs(struct igb_adapter
*adapter
)
5590 struct e1000_hw
*hw
= &adapter
->hw
;
5594 for (i
= 0 ; i
< adapter
->vfs_allocated_count
; i
++) {
5595 ping
= E1000_PF_CONTROL_MSG
;
5596 if (adapter
->vf_data
[i
].flags
& IGB_VF_FLAG_CTS
)
5597 ping
|= E1000_VT_MSGTYPE_CTS
;
5598 igb_write_mbx(hw
, &ping
, 1, i
);
5602 static int igb_set_vf_promisc(struct igb_adapter
*adapter
, u32
*msgbuf
, u32 vf
)
5604 struct e1000_hw
*hw
= &adapter
->hw
;
5605 u32 vmolr
= rd32(E1000_VMOLR(vf
));
5606 struct vf_data_storage
*vf_data
= &adapter
->vf_data
[vf
];
5608 vf_data
->flags
&= ~(IGB_VF_FLAG_UNI_PROMISC
|
5609 IGB_VF_FLAG_MULTI_PROMISC
);
5610 vmolr
&= ~(E1000_VMOLR_ROPE
| E1000_VMOLR_ROMPE
| E1000_VMOLR_MPME
);
5612 if (*msgbuf
& E1000_VF_SET_PROMISC_MULTICAST
) {
5613 vmolr
|= E1000_VMOLR_MPME
;
5614 vf_data
->flags
|= IGB_VF_FLAG_MULTI_PROMISC
;
5615 *msgbuf
&= ~E1000_VF_SET_PROMISC_MULTICAST
;
5617 /* if we have hashes and we are clearing a multicast promisc
5618 * flag we need to write the hashes to the MTA as this step
5619 * was previously skipped
5621 if (vf_data
->num_vf_mc_hashes
> 30) {
5622 vmolr
|= E1000_VMOLR_MPME
;
5623 } else if (vf_data
->num_vf_mc_hashes
) {
5626 vmolr
|= E1000_VMOLR_ROMPE
;
5627 for (j
= 0; j
< vf_data
->num_vf_mc_hashes
; j
++)
5628 igb_mta_set(hw
, vf_data
->vf_mc_hashes
[j
]);
5632 wr32(E1000_VMOLR(vf
), vmolr
);
5634 /* there are flags left unprocessed, likely not supported */
5635 if (*msgbuf
& E1000_VT_MSGINFO_MASK
)
5641 static int igb_set_vf_multicasts(struct igb_adapter
*adapter
,
5642 u32
*msgbuf
, u32 vf
)
5644 int n
= (msgbuf
[0] & E1000_VT_MSGINFO_MASK
) >> E1000_VT_MSGINFO_SHIFT
;
5645 u16
*hash_list
= (u16
*)&msgbuf
[1];
5646 struct vf_data_storage
*vf_data
= &adapter
->vf_data
[vf
];
5649 /* salt away the number of multicast addresses assigned
5650 * to this VF for later use to restore when the PF multi cast
5653 vf_data
->num_vf_mc_hashes
= n
;
5655 /* only up to 30 hash values supported */
5659 /* store the hashes for later use */
5660 for (i
= 0; i
< n
; i
++)
5661 vf_data
->vf_mc_hashes
[i
] = hash_list
[i
];
5663 /* Flush and reset the mta with the new values */
5664 igb_set_rx_mode(adapter
->netdev
);
5669 static void igb_restore_vf_multicasts(struct igb_adapter
*adapter
)
5671 struct e1000_hw
*hw
= &adapter
->hw
;
5672 struct vf_data_storage
*vf_data
;
5675 for (i
= 0; i
< adapter
->vfs_allocated_count
; i
++) {
5676 u32 vmolr
= rd32(E1000_VMOLR(i
));
5678 vmolr
&= ~(E1000_VMOLR_ROMPE
| E1000_VMOLR_MPME
);
5680 vf_data
= &adapter
->vf_data
[i
];
5682 if ((vf_data
->num_vf_mc_hashes
> 30) ||
5683 (vf_data
->flags
& IGB_VF_FLAG_MULTI_PROMISC
)) {
5684 vmolr
|= E1000_VMOLR_MPME
;
5685 } else if (vf_data
->num_vf_mc_hashes
) {
5686 vmolr
|= E1000_VMOLR_ROMPE
;
5687 for (j
= 0; j
< vf_data
->num_vf_mc_hashes
; j
++)
5688 igb_mta_set(hw
, vf_data
->vf_mc_hashes
[j
]);
5690 wr32(E1000_VMOLR(i
), vmolr
);
5694 static void igb_clear_vf_vfta(struct igb_adapter
*adapter
, u32 vf
)
5696 struct e1000_hw
*hw
= &adapter
->hw
;
5697 u32 pool_mask
, reg
, vid
;
5700 pool_mask
= 1 << (E1000_VLVF_POOLSEL_SHIFT
+ vf
);
5702 /* Find the vlan filter for this id */
5703 for (i
= 0; i
< E1000_VLVF_ARRAY_SIZE
; i
++) {
5704 reg
= rd32(E1000_VLVF(i
));
5706 /* remove the vf from the pool */
5709 /* if pool is empty then remove entry from vfta */
5710 if (!(reg
& E1000_VLVF_POOLSEL_MASK
) &&
5711 (reg
& E1000_VLVF_VLANID_ENABLE
)) {
5713 vid
= reg
& E1000_VLVF_VLANID_MASK
;
5714 igb_vfta_set(hw
, vid
, false);
5717 wr32(E1000_VLVF(i
), reg
);
5720 adapter
->vf_data
[vf
].vlans_enabled
= 0;
5723 static s32
igb_vlvf_set(struct igb_adapter
*adapter
, u32 vid
, bool add
, u32 vf
)
5725 struct e1000_hw
*hw
= &adapter
->hw
;
5728 /* The vlvf table only exists on 82576 hardware and newer */
5729 if (hw
->mac
.type
< e1000_82576
)
5732 /* we only need to do this if VMDq is enabled */
5733 if (!adapter
->vfs_allocated_count
)
5736 /* Find the vlan filter for this id */
5737 for (i
= 0; i
< E1000_VLVF_ARRAY_SIZE
; i
++) {
5738 reg
= rd32(E1000_VLVF(i
));
5739 if ((reg
& E1000_VLVF_VLANID_ENABLE
) &&
5740 vid
== (reg
& E1000_VLVF_VLANID_MASK
))
5745 if (i
== E1000_VLVF_ARRAY_SIZE
) {
5746 /* Did not find a matching VLAN ID entry that was
5747 * enabled. Search for a free filter entry, i.e.
5748 * one without the enable bit set
5750 for (i
= 0; i
< E1000_VLVF_ARRAY_SIZE
; i
++) {
5751 reg
= rd32(E1000_VLVF(i
));
5752 if (!(reg
& E1000_VLVF_VLANID_ENABLE
))
5756 if (i
< E1000_VLVF_ARRAY_SIZE
) {
5757 /* Found an enabled/available entry */
5758 reg
|= 1 << (E1000_VLVF_POOLSEL_SHIFT
+ vf
);
5760 /* if !enabled we need to set this up in vfta */
5761 if (!(reg
& E1000_VLVF_VLANID_ENABLE
)) {
5762 /* add VID to filter table */
5763 igb_vfta_set(hw
, vid
, true);
5764 reg
|= E1000_VLVF_VLANID_ENABLE
;
5766 reg
&= ~E1000_VLVF_VLANID_MASK
;
5768 wr32(E1000_VLVF(i
), reg
);
5770 /* do not modify RLPML for PF devices */
5771 if (vf
>= adapter
->vfs_allocated_count
)
5774 if (!adapter
->vf_data
[vf
].vlans_enabled
) {
5777 reg
= rd32(E1000_VMOLR(vf
));
5778 size
= reg
& E1000_VMOLR_RLPML_MASK
;
5780 reg
&= ~E1000_VMOLR_RLPML_MASK
;
5782 wr32(E1000_VMOLR(vf
), reg
);
5785 adapter
->vf_data
[vf
].vlans_enabled
++;
5788 if (i
< E1000_VLVF_ARRAY_SIZE
) {
5789 /* remove vf from the pool */
5790 reg
&= ~(1 << (E1000_VLVF_POOLSEL_SHIFT
+ vf
));
5791 /* if pool is empty then remove entry from vfta */
5792 if (!(reg
& E1000_VLVF_POOLSEL_MASK
)) {
5794 igb_vfta_set(hw
, vid
, false);
5796 wr32(E1000_VLVF(i
), reg
);
5798 /* do not modify RLPML for PF devices */
5799 if (vf
>= adapter
->vfs_allocated_count
)
5802 adapter
->vf_data
[vf
].vlans_enabled
--;
5803 if (!adapter
->vf_data
[vf
].vlans_enabled
) {
5806 reg
= rd32(E1000_VMOLR(vf
));
5807 size
= reg
& E1000_VMOLR_RLPML_MASK
;
5809 reg
&= ~E1000_VMOLR_RLPML_MASK
;
5811 wr32(E1000_VMOLR(vf
), reg
);
5818 static void igb_set_vmvir(struct igb_adapter
*adapter
, u32 vid
, u32 vf
)
5820 struct e1000_hw
*hw
= &adapter
->hw
;
5823 wr32(E1000_VMVIR(vf
), (vid
| E1000_VMVIR_VLANA_DEFAULT
));
5825 wr32(E1000_VMVIR(vf
), 0);
5828 static int igb_ndo_set_vf_vlan(struct net_device
*netdev
,
5829 int vf
, u16 vlan
, u8 qos
)
5832 struct igb_adapter
*adapter
= netdev_priv(netdev
);
5834 if ((vf
>= adapter
->vfs_allocated_count
) || (vlan
> 4095) || (qos
> 7))
5837 err
= igb_vlvf_set(adapter
, vlan
, !!vlan
, vf
);
5840 igb_set_vmvir(adapter
, vlan
| (qos
<< VLAN_PRIO_SHIFT
), vf
);
5841 igb_set_vmolr(adapter
, vf
, !vlan
);
5842 adapter
->vf_data
[vf
].pf_vlan
= vlan
;
5843 adapter
->vf_data
[vf
].pf_qos
= qos
;
5844 dev_info(&adapter
->pdev
->dev
,
5845 "Setting VLAN %d, QOS 0x%x on VF %d\n", vlan
, qos
, vf
);
5846 if (test_bit(__IGB_DOWN
, &adapter
->state
)) {
5847 dev_warn(&adapter
->pdev
->dev
,
5848 "The VF VLAN has been set, but the PF device is not up.\n");
5849 dev_warn(&adapter
->pdev
->dev
,
5850 "Bring the PF device up before attempting to use the VF device.\n");
5853 igb_vlvf_set(adapter
, adapter
->vf_data
[vf
].pf_vlan
,
5855 igb_set_vmvir(adapter
, vlan
, vf
);
5856 igb_set_vmolr(adapter
, vf
, true);
5857 adapter
->vf_data
[vf
].pf_vlan
= 0;
5858 adapter
->vf_data
[vf
].pf_qos
= 0;
5864 static int igb_find_vlvf_entry(struct igb_adapter
*adapter
, int vid
)
5866 struct e1000_hw
*hw
= &adapter
->hw
;
5870 /* Find the vlan filter for this id */
5871 for (i
= 0; i
< E1000_VLVF_ARRAY_SIZE
; i
++) {
5872 reg
= rd32(E1000_VLVF(i
));
5873 if ((reg
& E1000_VLVF_VLANID_ENABLE
) &&
5874 vid
== (reg
& E1000_VLVF_VLANID_MASK
))
5878 if (i
>= E1000_VLVF_ARRAY_SIZE
)
5884 static int igb_set_vf_vlan(struct igb_adapter
*adapter
, u32
*msgbuf
, u32 vf
)
5886 struct e1000_hw
*hw
= &adapter
->hw
;
5887 int add
= (msgbuf
[0] & E1000_VT_MSGINFO_MASK
) >> E1000_VT_MSGINFO_SHIFT
;
5888 int vid
= (msgbuf
[1] & E1000_VLVF_VLANID_MASK
);
5891 /* If in promiscuous mode we need to make sure the PF also has
5892 * the VLAN filter set.
5894 if (add
&& (adapter
->netdev
->flags
& IFF_PROMISC
))
5895 err
= igb_vlvf_set(adapter
, vid
, add
,
5896 adapter
->vfs_allocated_count
);
5900 err
= igb_vlvf_set(adapter
, vid
, add
, vf
);
5905 /* Go through all the checks to see if the VLAN filter should
5906 * be wiped completely.
5908 if (!add
&& (adapter
->netdev
->flags
& IFF_PROMISC
)) {
5910 int regndx
= igb_find_vlvf_entry(adapter
, vid
);
5914 /* See if any other pools are set for this VLAN filter
5915 * entry other than the PF.
5917 vlvf
= bits
= rd32(E1000_VLVF(regndx
));
5918 bits
&= 1 << (E1000_VLVF_POOLSEL_SHIFT
+
5919 adapter
->vfs_allocated_count
);
5920 /* If the filter was removed then ensure PF pool bit
5921 * is cleared if the PF only added itself to the pool
5922 * because the PF is in promiscuous mode.
5924 if ((vlvf
& VLAN_VID_MASK
) == vid
&&
5925 !test_bit(vid
, adapter
->active_vlans
) &&
5927 igb_vlvf_set(adapter
, vid
, add
,
5928 adapter
->vfs_allocated_count
);
5935 static inline void igb_vf_reset(struct igb_adapter
*adapter
, u32 vf
)
5937 /* clear flags - except flag that indicates PF has set the MAC */
5938 adapter
->vf_data
[vf
].flags
&= IGB_VF_FLAG_PF_SET_MAC
;
5939 adapter
->vf_data
[vf
].last_nack
= jiffies
;
5941 /* reset offloads to defaults */
5942 igb_set_vmolr(adapter
, vf
, true);
5944 /* reset vlans for device */
5945 igb_clear_vf_vfta(adapter
, vf
);
5946 if (adapter
->vf_data
[vf
].pf_vlan
)
5947 igb_ndo_set_vf_vlan(adapter
->netdev
, vf
,
5948 adapter
->vf_data
[vf
].pf_vlan
,
5949 adapter
->vf_data
[vf
].pf_qos
);
5951 igb_clear_vf_vfta(adapter
, vf
);
5953 /* reset multicast table array for vf */
5954 adapter
->vf_data
[vf
].num_vf_mc_hashes
= 0;
5956 /* Flush and reset the mta with the new values */
5957 igb_set_rx_mode(adapter
->netdev
);
5960 static void igb_vf_reset_event(struct igb_adapter
*adapter
, u32 vf
)
5962 unsigned char *vf_mac
= adapter
->vf_data
[vf
].vf_mac_addresses
;
5964 /* clear mac address as we were hotplug removed/added */
5965 if (!(adapter
->vf_data
[vf
].flags
& IGB_VF_FLAG_PF_SET_MAC
))
5966 eth_zero_addr(vf_mac
);
5968 /* process remaining reset events */
5969 igb_vf_reset(adapter
, vf
);
5972 static void igb_vf_reset_msg(struct igb_adapter
*adapter
, u32 vf
)
5974 struct e1000_hw
*hw
= &adapter
->hw
;
5975 unsigned char *vf_mac
= adapter
->vf_data
[vf
].vf_mac_addresses
;
5976 int rar_entry
= hw
->mac
.rar_entry_count
- (vf
+ 1);
5978 u8
*addr
= (u8
*)(&msgbuf
[1]);
5980 /* process all the same items cleared in a function level reset */
5981 igb_vf_reset(adapter
, vf
);
5983 /* set vf mac address */
5984 igb_rar_set_qsel(adapter
, vf_mac
, rar_entry
, vf
);
5986 /* enable transmit and receive for vf */
5987 reg
= rd32(E1000_VFTE
);
5988 wr32(E1000_VFTE
, reg
| (1 << vf
));
5989 reg
= rd32(E1000_VFRE
);
5990 wr32(E1000_VFRE
, reg
| (1 << vf
));
5992 adapter
->vf_data
[vf
].flags
|= IGB_VF_FLAG_CTS
;
5994 /* reply to reset with ack and vf mac address */
5995 msgbuf
[0] = E1000_VF_RESET
| E1000_VT_MSGTYPE_ACK
;
5996 memcpy(addr
, vf_mac
, ETH_ALEN
);
5997 igb_write_mbx(hw
, msgbuf
, 3, vf
);
6000 static int igb_set_vf_mac_addr(struct igb_adapter
*adapter
, u32
*msg
, int vf
)
6002 /* The VF MAC Address is stored in a packed array of bytes
6003 * starting at the second 32 bit word of the msg array
6005 unsigned char *addr
= (char *)&msg
[1];
6008 if (is_valid_ether_addr(addr
))
6009 err
= igb_set_vf_mac(adapter
, vf
, addr
);
6014 static void igb_rcv_ack_from_vf(struct igb_adapter
*adapter
, u32 vf
)
6016 struct e1000_hw
*hw
= &adapter
->hw
;
6017 struct vf_data_storage
*vf_data
= &adapter
->vf_data
[vf
];
6018 u32 msg
= E1000_VT_MSGTYPE_NACK
;
6020 /* if device isn't clear to send it shouldn't be reading either */
6021 if (!(vf_data
->flags
& IGB_VF_FLAG_CTS
) &&
6022 time_after(jiffies
, vf_data
->last_nack
+ (2 * HZ
))) {
6023 igb_write_mbx(hw
, &msg
, 1, vf
);
6024 vf_data
->last_nack
= jiffies
;
6028 static void igb_rcv_msg_from_vf(struct igb_adapter
*adapter
, u32 vf
)
6030 struct pci_dev
*pdev
= adapter
->pdev
;
6031 u32 msgbuf
[E1000_VFMAILBOX_SIZE
];
6032 struct e1000_hw
*hw
= &adapter
->hw
;
6033 struct vf_data_storage
*vf_data
= &adapter
->vf_data
[vf
];
6036 retval
= igb_read_mbx(hw
, msgbuf
, E1000_VFMAILBOX_SIZE
, vf
);
6039 /* if receive failed revoke VF CTS stats and restart init */
6040 dev_err(&pdev
->dev
, "Error receiving message from VF\n");
6041 vf_data
->flags
&= ~IGB_VF_FLAG_CTS
;
6042 if (!time_after(jiffies
, vf_data
->last_nack
+ (2 * HZ
)))
6047 /* this is a message we already processed, do nothing */
6048 if (msgbuf
[0] & (E1000_VT_MSGTYPE_ACK
| E1000_VT_MSGTYPE_NACK
))
6051 /* until the vf completes a reset it should not be
6052 * allowed to start any configuration.
6054 if (msgbuf
[0] == E1000_VF_RESET
) {
6055 igb_vf_reset_msg(adapter
, vf
);
6059 if (!(vf_data
->flags
& IGB_VF_FLAG_CTS
)) {
6060 if (!time_after(jiffies
, vf_data
->last_nack
+ (2 * HZ
)))
6066 switch ((msgbuf
[0] & 0xFFFF)) {
6067 case E1000_VF_SET_MAC_ADDR
:
6069 if (!(vf_data
->flags
& IGB_VF_FLAG_PF_SET_MAC
))
6070 retval
= igb_set_vf_mac_addr(adapter
, msgbuf
, vf
);
6072 dev_warn(&pdev
->dev
,
6073 "VF %d attempted to override administratively set MAC address\nReload the VF driver to resume operations\n",
6076 case E1000_VF_SET_PROMISC
:
6077 retval
= igb_set_vf_promisc(adapter
, msgbuf
, vf
);
6079 case E1000_VF_SET_MULTICAST
:
6080 retval
= igb_set_vf_multicasts(adapter
, msgbuf
, vf
);
6082 case E1000_VF_SET_LPE
:
6083 retval
= igb_set_vf_rlpml(adapter
, msgbuf
[1], vf
);
6085 case E1000_VF_SET_VLAN
:
6087 if (vf_data
->pf_vlan
)
6088 dev_warn(&pdev
->dev
,
6089 "VF %d attempted to override administratively set VLAN tag\nReload the VF driver to resume operations\n",
6092 retval
= igb_set_vf_vlan(adapter
, msgbuf
, vf
);
6095 dev_err(&pdev
->dev
, "Unhandled Msg %08x\n", msgbuf
[0]);
6100 msgbuf
[0] |= E1000_VT_MSGTYPE_CTS
;
6102 /* notify the VF of the results of what it sent us */
6104 msgbuf
[0] |= E1000_VT_MSGTYPE_NACK
;
6106 msgbuf
[0] |= E1000_VT_MSGTYPE_ACK
;
6108 igb_write_mbx(hw
, msgbuf
, 1, vf
);
6111 static void igb_msg_task(struct igb_adapter
*adapter
)
6113 struct e1000_hw
*hw
= &adapter
->hw
;
6116 for (vf
= 0; vf
< adapter
->vfs_allocated_count
; vf
++) {
6117 /* process any reset requests */
6118 if (!igb_check_for_rst(hw
, vf
))
6119 igb_vf_reset_event(adapter
, vf
);
6121 /* process any messages pending */
6122 if (!igb_check_for_msg(hw
, vf
))
6123 igb_rcv_msg_from_vf(adapter
, vf
);
6125 /* process any acks */
6126 if (!igb_check_for_ack(hw
, vf
))
6127 igb_rcv_ack_from_vf(adapter
, vf
);
6132 * igb_set_uta - Set unicast filter table address
6133 * @adapter: board private structure
6135 * The unicast table address is a register array of 32-bit registers.
6136 * The table is meant to be used in a way similar to how the MTA is used
6137 * however due to certain limitations in the hardware it is necessary to
6138 * set all the hash bits to 1 and use the VMOLR ROPE bit as a promiscuous
6139 * enable bit to allow vlan tag stripping when promiscuous mode is enabled
6141 static void igb_set_uta(struct igb_adapter
*adapter
)
6143 struct e1000_hw
*hw
= &adapter
->hw
;
6146 /* The UTA table only exists on 82576 hardware and newer */
6147 if (hw
->mac
.type
< e1000_82576
)
6150 /* we only need to do this if VMDq is enabled */
6151 if (!adapter
->vfs_allocated_count
)
6154 for (i
= 0; i
< hw
->mac
.uta_reg_count
; i
++)
6155 array_wr32(E1000_UTA
, i
, ~0);
6159 * igb_intr_msi - Interrupt Handler
6160 * @irq: interrupt number
6161 * @data: pointer to a network interface device structure
6163 static irqreturn_t
igb_intr_msi(int irq
, void *data
)
6165 struct igb_adapter
*adapter
= data
;
6166 struct igb_q_vector
*q_vector
= adapter
->q_vector
[0];
6167 struct e1000_hw
*hw
= &adapter
->hw
;
6168 /* read ICR disables interrupts using IAM */
6169 u32 icr
= rd32(E1000_ICR
);
6171 igb_write_itr(q_vector
);
6173 if (icr
& E1000_ICR_DRSTA
)
6174 schedule_work(&adapter
->reset_task
);
6176 if (icr
& E1000_ICR_DOUTSYNC
) {
6177 /* HW is reporting DMA is out of sync */
6178 adapter
->stats
.doosync
++;
6181 if (icr
& (E1000_ICR_RXSEQ
| E1000_ICR_LSC
)) {
6182 hw
->mac
.get_link_status
= 1;
6183 if (!test_bit(__IGB_DOWN
, &adapter
->state
))
6184 mod_timer(&adapter
->watchdog_timer
, jiffies
+ 1);
6187 if (icr
& E1000_ICR_TS
) {
6188 u32 tsicr
= rd32(E1000_TSICR
);
6190 if (tsicr
& E1000_TSICR_TXTS
) {
6191 /* acknowledge the interrupt */
6192 wr32(E1000_TSICR
, E1000_TSICR_TXTS
);
6193 /* retrieve hardware timestamp */
6194 schedule_work(&adapter
->ptp_tx_work
);
6198 napi_schedule(&q_vector
->napi
);
6204 * igb_intr - Legacy Interrupt Handler
6205 * @irq: interrupt number
6206 * @data: pointer to a network interface device structure
6208 static irqreturn_t
igb_intr(int irq
, void *data
)
6210 struct igb_adapter
*adapter
= data
;
6211 struct igb_q_vector
*q_vector
= adapter
->q_vector
[0];
6212 struct e1000_hw
*hw
= &adapter
->hw
;
6213 /* Interrupt Auto-Mask...upon reading ICR, interrupts are masked. No
6214 * need for the IMC write
6216 u32 icr
= rd32(E1000_ICR
);
6218 /* IMS will not auto-mask if INT_ASSERTED is not set, and if it is
6219 * not set, then the adapter didn't send an interrupt
6221 if (!(icr
& E1000_ICR_INT_ASSERTED
))
6224 igb_write_itr(q_vector
);
6226 if (icr
& E1000_ICR_DRSTA
)
6227 schedule_work(&adapter
->reset_task
);
6229 if (icr
& E1000_ICR_DOUTSYNC
) {
6230 /* HW is reporting DMA is out of sync */
6231 adapter
->stats
.doosync
++;
6234 if (icr
& (E1000_ICR_RXSEQ
| E1000_ICR_LSC
)) {
6235 hw
->mac
.get_link_status
= 1;
6236 /* guard against interrupt when we're going down */
6237 if (!test_bit(__IGB_DOWN
, &adapter
->state
))
6238 mod_timer(&adapter
->watchdog_timer
, jiffies
+ 1);
6241 if (icr
& E1000_ICR_TS
) {
6242 u32 tsicr
= rd32(E1000_TSICR
);
6244 if (tsicr
& E1000_TSICR_TXTS
) {
6245 /* acknowledge the interrupt */
6246 wr32(E1000_TSICR
, E1000_TSICR_TXTS
);
6247 /* retrieve hardware timestamp */
6248 schedule_work(&adapter
->ptp_tx_work
);
6252 napi_schedule(&q_vector
->napi
);
6257 static void igb_ring_irq_enable(struct igb_q_vector
*q_vector
)
6259 struct igb_adapter
*adapter
= q_vector
->adapter
;
6260 struct e1000_hw
*hw
= &adapter
->hw
;
6262 if ((q_vector
->rx
.ring
&& (adapter
->rx_itr_setting
& 3)) ||
6263 (!q_vector
->rx
.ring
&& (adapter
->tx_itr_setting
& 3))) {
6264 if ((adapter
->num_q_vectors
== 1) && !adapter
->vf_data
)
6265 igb_set_itr(q_vector
);
6267 igb_update_ring_itr(q_vector
);
6270 if (!test_bit(__IGB_DOWN
, &adapter
->state
)) {
6271 if (adapter
->flags
& IGB_FLAG_HAS_MSIX
)
6272 wr32(E1000_EIMS
, q_vector
->eims_value
);
6274 igb_irq_enable(adapter
);
6279 * igb_poll - NAPI Rx polling callback
6280 * @napi: napi polling structure
6281 * @budget: count of how many packets we should handle
6283 static int igb_poll(struct napi_struct
*napi
, int budget
)
6285 struct igb_q_vector
*q_vector
= container_of(napi
,
6286 struct igb_q_vector
,
6288 bool clean_complete
= true;
6290 #ifdef CONFIG_IGB_DCA
6291 if (q_vector
->adapter
->flags
& IGB_FLAG_DCA_ENABLED
)
6292 igb_update_dca(q_vector
);
6294 if (q_vector
->tx
.ring
)
6295 clean_complete
= igb_clean_tx_irq(q_vector
);
6297 if (q_vector
->rx
.ring
)
6298 clean_complete
&= igb_clean_rx_irq(q_vector
, budget
);
6300 /* If all work not completed, return budget and keep polling */
6301 if (!clean_complete
)
6304 /* If not enough Rx work done, exit the polling mode */
6305 napi_complete(napi
);
6306 igb_ring_irq_enable(q_vector
);
6312 * igb_clean_tx_irq - Reclaim resources after transmit completes
6313 * @q_vector: pointer to q_vector containing needed info
6315 * returns true if ring is completely cleaned
6317 static bool igb_clean_tx_irq(struct igb_q_vector
*q_vector
)
6319 struct igb_adapter
*adapter
= q_vector
->adapter
;
6320 struct igb_ring
*tx_ring
= q_vector
->tx
.ring
;
6321 struct igb_tx_buffer
*tx_buffer
;
6322 union e1000_adv_tx_desc
*tx_desc
;
6323 unsigned int total_bytes
= 0, total_packets
= 0;
6324 unsigned int budget
= q_vector
->tx
.work_limit
;
6325 unsigned int i
= tx_ring
->next_to_clean
;
6327 if (test_bit(__IGB_DOWN
, &adapter
->state
))
6330 tx_buffer
= &tx_ring
->tx_buffer_info
[i
];
6331 tx_desc
= IGB_TX_DESC(tx_ring
, i
);
6332 i
-= tx_ring
->count
;
6335 union e1000_adv_tx_desc
*eop_desc
= tx_buffer
->next_to_watch
;
6337 /* if next_to_watch is not set then there is no work pending */
6341 /* prevent any other reads prior to eop_desc */
6342 read_barrier_depends();
6344 /* if DD is not set pending work has not been completed */
6345 if (!(eop_desc
->wb
.status
& cpu_to_le32(E1000_TXD_STAT_DD
)))
6348 /* clear next_to_watch to prevent false hangs */
6349 tx_buffer
->next_to_watch
= NULL
;
6351 /* update the statistics for this packet */
6352 total_bytes
+= tx_buffer
->bytecount
;
6353 total_packets
+= tx_buffer
->gso_segs
;
6356 dev_kfree_skb_any(tx_buffer
->skb
);
6358 /* unmap skb header data */
6359 dma_unmap_single(tx_ring
->dev
,
6360 dma_unmap_addr(tx_buffer
, dma
),
6361 dma_unmap_len(tx_buffer
, len
),
6364 /* clear tx_buffer data */
6365 tx_buffer
->skb
= NULL
;
6366 dma_unmap_len_set(tx_buffer
, len
, 0);
6368 /* clear last DMA location and unmap remaining buffers */
6369 while (tx_desc
!= eop_desc
) {
6374 i
-= tx_ring
->count
;
6375 tx_buffer
= tx_ring
->tx_buffer_info
;
6376 tx_desc
= IGB_TX_DESC(tx_ring
, 0);
6379 /* unmap any remaining paged data */
6380 if (dma_unmap_len(tx_buffer
, len
)) {
6381 dma_unmap_page(tx_ring
->dev
,
6382 dma_unmap_addr(tx_buffer
, dma
),
6383 dma_unmap_len(tx_buffer
, len
),
6385 dma_unmap_len_set(tx_buffer
, len
, 0);
6389 /* move us one more past the eop_desc for start of next pkt */
6394 i
-= tx_ring
->count
;
6395 tx_buffer
= tx_ring
->tx_buffer_info
;
6396 tx_desc
= IGB_TX_DESC(tx_ring
, 0);
6399 /* issue prefetch for next Tx descriptor */
6402 /* update budget accounting */
6404 } while (likely(budget
));
6406 netdev_tx_completed_queue(txring_txq(tx_ring
),
6407 total_packets
, total_bytes
);
6408 i
+= tx_ring
->count
;
6409 tx_ring
->next_to_clean
= i
;
6410 u64_stats_update_begin(&tx_ring
->tx_syncp
);
6411 tx_ring
->tx_stats
.bytes
+= total_bytes
;
6412 tx_ring
->tx_stats
.packets
+= total_packets
;
6413 u64_stats_update_end(&tx_ring
->tx_syncp
);
6414 q_vector
->tx
.total_bytes
+= total_bytes
;
6415 q_vector
->tx
.total_packets
+= total_packets
;
6417 if (test_bit(IGB_RING_FLAG_TX_DETECT_HANG
, &tx_ring
->flags
)) {
6418 struct e1000_hw
*hw
= &adapter
->hw
;
6420 /* Detect a transmit hang in hardware, this serializes the
6421 * check with the clearing of time_stamp and movement of i
6423 clear_bit(IGB_RING_FLAG_TX_DETECT_HANG
, &tx_ring
->flags
);
6424 if (tx_buffer
->next_to_watch
&&
6425 time_after(jiffies
, tx_buffer
->time_stamp
+
6426 (adapter
->tx_timeout_factor
* HZ
)) &&
6427 !(rd32(E1000_STATUS
) & E1000_STATUS_TXOFF
)) {
6429 /* detected Tx unit hang */
6430 dev_err(tx_ring
->dev
,
6431 "Detected Tx Unit Hang\n"
6435 " next_to_use <%x>\n"
6436 " next_to_clean <%x>\n"
6437 "buffer_info[next_to_clean]\n"
6438 " time_stamp <%lx>\n"
6439 " next_to_watch <%p>\n"
6441 " desc.status <%x>\n",
6442 tx_ring
->queue_index
,
6443 rd32(E1000_TDH(tx_ring
->reg_idx
)),
6444 readl(tx_ring
->tail
),
6445 tx_ring
->next_to_use
,
6446 tx_ring
->next_to_clean
,
6447 tx_buffer
->time_stamp
,
6448 tx_buffer
->next_to_watch
,
6450 tx_buffer
->next_to_watch
->wb
.status
);
6451 netif_stop_subqueue(tx_ring
->netdev
,
6452 tx_ring
->queue_index
);
6454 /* we are about to reset, no point in enabling stuff */
6459 #define TX_WAKE_THRESHOLD (DESC_NEEDED * 2)
6460 if (unlikely(total_packets
&&
6461 netif_carrier_ok(tx_ring
->netdev
) &&
6462 igb_desc_unused(tx_ring
) >= TX_WAKE_THRESHOLD
)) {
6463 /* Make sure that anybody stopping the queue after this
6464 * sees the new next_to_clean.
6467 if (__netif_subqueue_stopped(tx_ring
->netdev
,
6468 tx_ring
->queue_index
) &&
6469 !(test_bit(__IGB_DOWN
, &adapter
->state
))) {
6470 netif_wake_subqueue(tx_ring
->netdev
,
6471 tx_ring
->queue_index
);
6473 u64_stats_update_begin(&tx_ring
->tx_syncp
);
6474 tx_ring
->tx_stats
.restart_queue
++;
6475 u64_stats_update_end(&tx_ring
->tx_syncp
);
6483 * igb_reuse_rx_page - page flip buffer and store it back on the ring
6484 * @rx_ring: rx descriptor ring to store buffers on
6485 * @old_buff: donor buffer to have page reused
6487 * Synchronizes page for reuse by the adapter
6489 static void igb_reuse_rx_page(struct igb_ring
*rx_ring
,
6490 struct igb_rx_buffer
*old_buff
)
6492 struct igb_rx_buffer
*new_buff
;
6493 u16 nta
= rx_ring
->next_to_alloc
;
6495 new_buff
= &rx_ring
->rx_buffer_info
[nta
];
6497 /* update, and store next to alloc */
6499 rx_ring
->next_to_alloc
= (nta
< rx_ring
->count
) ? nta
: 0;
6501 /* transfer page from old buffer to new buffer */
6502 *new_buff
= *old_buff
;
6504 /* sync the buffer for use by the device */
6505 dma_sync_single_range_for_device(rx_ring
->dev
, old_buff
->dma
,
6506 old_buff
->page_offset
,
6511 static bool igb_can_reuse_rx_page(struct igb_rx_buffer
*rx_buffer
,
6513 unsigned int truesize
)
6515 /* avoid re-using remote pages */
6516 if (unlikely(page_to_nid(page
) != numa_node_id()))
6519 #if (PAGE_SIZE < 8192)
6520 /* if we are only owner of page we can reuse it */
6521 if (unlikely(page_count(page
) != 1))
6524 /* flip page offset to other buffer */
6525 rx_buffer
->page_offset
^= IGB_RX_BUFSZ
;
6527 /* since we are the only owner of the page and we need to
6528 * increment it, just set the value to 2 in order to avoid
6529 * an unnecessary locked operation
6531 atomic_set(&page
->_count
, 2);
6533 /* move offset up to the next cache line */
6534 rx_buffer
->page_offset
+= truesize
;
6536 if (rx_buffer
->page_offset
> (PAGE_SIZE
- IGB_RX_BUFSZ
))
6539 /* bump ref count on page before it is given to the stack */
6547 * igb_add_rx_frag - Add contents of Rx buffer to sk_buff
6548 * @rx_ring: rx descriptor ring to transact packets on
6549 * @rx_buffer: buffer containing page to add
6550 * @rx_desc: descriptor containing length of buffer written by hardware
6551 * @skb: sk_buff to place the data into
6553 * This function will add the data contained in rx_buffer->page to the skb.
6554 * This is done either through a direct copy if the data in the buffer is
6555 * less than the skb header size, otherwise it will just attach the page as
6556 * a frag to the skb.
6558 * The function will then update the page offset if necessary and return
6559 * true if the buffer can be reused by the adapter.
6561 static bool igb_add_rx_frag(struct igb_ring
*rx_ring
,
6562 struct igb_rx_buffer
*rx_buffer
,
6563 union e1000_adv_rx_desc
*rx_desc
,
6564 struct sk_buff
*skb
)
6566 struct page
*page
= rx_buffer
->page
;
6567 unsigned int size
= le16_to_cpu(rx_desc
->wb
.upper
.length
);
6568 #if (PAGE_SIZE < 8192)
6569 unsigned int truesize
= IGB_RX_BUFSZ
;
6571 unsigned int truesize
= ALIGN(size
, L1_CACHE_BYTES
);
6574 if ((size
<= IGB_RX_HDR_LEN
) && !skb_is_nonlinear(skb
)) {
6575 unsigned char *va
= page_address(page
) + rx_buffer
->page_offset
;
6577 if (igb_test_staterr(rx_desc
, E1000_RXDADV_STAT_TSIP
)) {
6578 igb_ptp_rx_pktstamp(rx_ring
->q_vector
, va
, skb
);
6579 va
+= IGB_TS_HDR_LEN
;
6580 size
-= IGB_TS_HDR_LEN
;
6583 memcpy(__skb_put(skb
, size
), va
, ALIGN(size
, sizeof(long)));
6585 /* we can reuse buffer as-is, just make sure it is local */
6586 if (likely(page_to_nid(page
) == numa_node_id()))
6589 /* this page cannot be reused so discard it */
6594 skb_add_rx_frag(skb
, skb_shinfo(skb
)->nr_frags
, page
,
6595 rx_buffer
->page_offset
, size
, truesize
);
6597 return igb_can_reuse_rx_page(rx_buffer
, page
, truesize
);
6600 static struct sk_buff
*igb_fetch_rx_buffer(struct igb_ring
*rx_ring
,
6601 union e1000_adv_rx_desc
*rx_desc
,
6602 struct sk_buff
*skb
)
6604 struct igb_rx_buffer
*rx_buffer
;
6607 rx_buffer
= &rx_ring
->rx_buffer_info
[rx_ring
->next_to_clean
];
6609 page
= rx_buffer
->page
;
6613 void *page_addr
= page_address(page
) +
6614 rx_buffer
->page_offset
;
6616 /* prefetch first cache line of first page */
6617 prefetch(page_addr
);
6618 #if L1_CACHE_BYTES < 128
6619 prefetch(page_addr
+ L1_CACHE_BYTES
);
6622 /* allocate a skb to store the frags */
6623 skb
= netdev_alloc_skb_ip_align(rx_ring
->netdev
,
6625 if (unlikely(!skb
)) {
6626 rx_ring
->rx_stats
.alloc_failed
++;
6630 /* we will be copying header into skb->data in
6631 * pskb_may_pull so it is in our interest to prefetch
6632 * it now to avoid a possible cache miss
6634 prefetchw(skb
->data
);
6637 /* we are reusing so sync this buffer for CPU use */
6638 dma_sync_single_range_for_cpu(rx_ring
->dev
,
6640 rx_buffer
->page_offset
,
6644 /* pull page into skb */
6645 if (igb_add_rx_frag(rx_ring
, rx_buffer
, rx_desc
, skb
)) {
6646 /* hand second half of page back to the ring */
6647 igb_reuse_rx_page(rx_ring
, rx_buffer
);
6649 /* we are not reusing the buffer so unmap it */
6650 dma_unmap_page(rx_ring
->dev
, rx_buffer
->dma
,
6651 PAGE_SIZE
, DMA_FROM_DEVICE
);
6654 /* clear contents of rx_buffer */
6655 rx_buffer
->page
= NULL
;
6660 static inline void igb_rx_checksum(struct igb_ring
*ring
,
6661 union e1000_adv_rx_desc
*rx_desc
,
6662 struct sk_buff
*skb
)
6664 skb_checksum_none_assert(skb
);
6666 /* Ignore Checksum bit is set */
6667 if (igb_test_staterr(rx_desc
, E1000_RXD_STAT_IXSM
))
6670 /* Rx checksum disabled via ethtool */
6671 if (!(ring
->netdev
->features
& NETIF_F_RXCSUM
))
6674 /* TCP/UDP checksum error bit is set */
6675 if (igb_test_staterr(rx_desc
,
6676 E1000_RXDEXT_STATERR_TCPE
|
6677 E1000_RXDEXT_STATERR_IPE
)) {
6678 /* work around errata with sctp packets where the TCPE aka
6679 * L4E bit is set incorrectly on 64 byte (60 byte w/o crc)
6680 * packets, (aka let the stack check the crc32c)
6682 if (!((skb
->len
== 60) &&
6683 test_bit(IGB_RING_FLAG_RX_SCTP_CSUM
, &ring
->flags
))) {
6684 u64_stats_update_begin(&ring
->rx_syncp
);
6685 ring
->rx_stats
.csum_err
++;
6686 u64_stats_update_end(&ring
->rx_syncp
);
6688 /* let the stack verify checksum errors */
6691 /* It must be a TCP or UDP packet with a valid checksum */
6692 if (igb_test_staterr(rx_desc
, E1000_RXD_STAT_TCPCS
|
6693 E1000_RXD_STAT_UDPCS
))
6694 skb
->ip_summed
= CHECKSUM_UNNECESSARY
;
6696 dev_dbg(ring
->dev
, "cksum success: bits %08X\n",
6697 le32_to_cpu(rx_desc
->wb
.upper
.status_error
));
6700 static inline void igb_rx_hash(struct igb_ring
*ring
,
6701 union e1000_adv_rx_desc
*rx_desc
,
6702 struct sk_buff
*skb
)
6704 if (ring
->netdev
->features
& NETIF_F_RXHASH
)
6706 le32_to_cpu(rx_desc
->wb
.lower
.hi_dword
.rss
),
6711 * igb_is_non_eop - process handling of non-EOP buffers
6712 * @rx_ring: Rx ring being processed
6713 * @rx_desc: Rx descriptor for current buffer
6714 * @skb: current socket buffer containing buffer in progress
6716 * This function updates next to clean. If the buffer is an EOP buffer
6717 * this function exits returning false, otherwise it will place the
6718 * sk_buff in the next buffer to be chained and return true indicating
6719 * that this is in fact a non-EOP buffer.
6721 static bool igb_is_non_eop(struct igb_ring
*rx_ring
,
6722 union e1000_adv_rx_desc
*rx_desc
)
6724 u32 ntc
= rx_ring
->next_to_clean
+ 1;
6726 /* fetch, update, and store next to clean */
6727 ntc
= (ntc
< rx_ring
->count
) ? ntc
: 0;
6728 rx_ring
->next_to_clean
= ntc
;
6730 prefetch(IGB_RX_DESC(rx_ring
, ntc
));
6732 if (likely(igb_test_staterr(rx_desc
, E1000_RXD_STAT_EOP
)))
6739 * igb_get_headlen - determine size of header for LRO/GRO
6740 * @data: pointer to the start of the headers
6741 * @max_len: total length of section to find headers in
6743 * This function is meant to determine the length of headers that will
6744 * be recognized by hardware for LRO, and GRO offloads. The main
6745 * motivation of doing this is to only perform one pull for IPv4 TCP
6746 * packets so that we can do basic things like calculating the gso_size
6747 * based on the average data per packet.
6749 static unsigned int igb_get_headlen(unsigned char *data
,
6750 unsigned int max_len
)
6753 unsigned char *network
;
6756 struct vlan_hdr
*vlan
;
6759 struct ipv6hdr
*ipv6
;
6762 u8 nexthdr
= 0; /* default to not TCP */
6765 /* this should never happen, but better safe than sorry */
6766 if (max_len
< ETH_HLEN
)
6769 /* initialize network frame pointer */
6772 /* set first protocol and move network header forward */
6773 protocol
= hdr
.eth
->h_proto
;
6774 hdr
.network
+= ETH_HLEN
;
6776 /* handle any vlan tag if present */
6777 if (protocol
== htons(ETH_P_8021Q
)) {
6778 if ((hdr
.network
- data
) > (max_len
- VLAN_HLEN
))
6781 protocol
= hdr
.vlan
->h_vlan_encapsulated_proto
;
6782 hdr
.network
+= VLAN_HLEN
;
6785 /* handle L3 protocols */
6786 if (protocol
== htons(ETH_P_IP
)) {
6787 if ((hdr
.network
- data
) > (max_len
- sizeof(struct iphdr
)))
6790 /* access ihl as a u8 to avoid unaligned access on ia64 */
6791 hlen
= (hdr
.network
[0] & 0x0F) << 2;
6793 /* verify hlen meets minimum size requirements */
6794 if (hlen
< sizeof(struct iphdr
))
6795 return hdr
.network
- data
;
6797 /* record next protocol if header is present */
6798 if (!(hdr
.ipv4
->frag_off
& htons(IP_OFFSET
)))
6799 nexthdr
= hdr
.ipv4
->protocol
;
6800 } else if (protocol
== htons(ETH_P_IPV6
)) {
6801 if ((hdr
.network
- data
) > (max_len
- sizeof(struct ipv6hdr
)))
6804 /* record next protocol */
6805 nexthdr
= hdr
.ipv6
->nexthdr
;
6806 hlen
= sizeof(struct ipv6hdr
);
6808 return hdr
.network
- data
;
6811 /* relocate pointer to start of L4 header */
6812 hdr
.network
+= hlen
;
6814 /* finally sort out TCP */
6815 if (nexthdr
== IPPROTO_TCP
) {
6816 if ((hdr
.network
- data
) > (max_len
- sizeof(struct tcphdr
)))
6819 /* access doff as a u8 to avoid unaligned access on ia64 */
6820 hlen
= (hdr
.network
[12] & 0xF0) >> 2;
6822 /* verify hlen meets minimum size requirements */
6823 if (hlen
< sizeof(struct tcphdr
))
6824 return hdr
.network
- data
;
6826 hdr
.network
+= hlen
;
6827 } else if (nexthdr
== IPPROTO_UDP
) {
6828 if ((hdr
.network
- data
) > (max_len
- sizeof(struct udphdr
)))
6831 hdr
.network
+= sizeof(struct udphdr
);
6834 /* If everything has gone correctly hdr.network should be the
6835 * data section of the packet and will be the end of the header.
6836 * If not then it probably represents the end of the last recognized
6839 if ((hdr
.network
- data
) < max_len
)
6840 return hdr
.network
- data
;
6846 * igb_pull_tail - igb specific version of skb_pull_tail
6847 * @rx_ring: rx descriptor ring packet is being transacted on
6848 * @rx_desc: pointer to the EOP Rx descriptor
6849 * @skb: pointer to current skb being adjusted
6851 * This function is an igb specific version of __pskb_pull_tail. The
6852 * main difference between this version and the original function is that
6853 * this function can make several assumptions about the state of things
6854 * that allow for significant optimizations versus the standard function.
6855 * As a result we can do things like drop a frag and maintain an accurate
6856 * truesize for the skb.
6858 static void igb_pull_tail(struct igb_ring
*rx_ring
,
6859 union e1000_adv_rx_desc
*rx_desc
,
6860 struct sk_buff
*skb
)
6862 struct skb_frag_struct
*frag
= &skb_shinfo(skb
)->frags
[0];
6864 unsigned int pull_len
;
6866 /* it is valid to use page_address instead of kmap since we are
6867 * working with pages allocated out of the lomem pool per
6868 * alloc_page(GFP_ATOMIC)
6870 va
= skb_frag_address(frag
);
6872 if (igb_test_staterr(rx_desc
, E1000_RXDADV_STAT_TSIP
)) {
6873 /* retrieve timestamp from buffer */
6874 igb_ptp_rx_pktstamp(rx_ring
->q_vector
, va
, skb
);
6876 /* update pointers to remove timestamp header */
6877 skb_frag_size_sub(frag
, IGB_TS_HDR_LEN
);
6878 frag
->page_offset
+= IGB_TS_HDR_LEN
;
6879 skb
->data_len
-= IGB_TS_HDR_LEN
;
6880 skb
->len
-= IGB_TS_HDR_LEN
;
6882 /* move va to start of packet data */
6883 va
+= IGB_TS_HDR_LEN
;
6886 /* we need the header to contain the greater of either ETH_HLEN or
6887 * 60 bytes if the skb->len is less than 60 for skb_pad.
6889 pull_len
= igb_get_headlen(va
, IGB_RX_HDR_LEN
);
6891 /* align pull length to size of long to optimize memcpy performance */
6892 skb_copy_to_linear_data(skb
, va
, ALIGN(pull_len
, sizeof(long)));
6894 /* update all of the pointers */
6895 skb_frag_size_sub(frag
, pull_len
);
6896 frag
->page_offset
+= pull_len
;
6897 skb
->data_len
-= pull_len
;
6898 skb
->tail
+= pull_len
;
6902 * igb_cleanup_headers - Correct corrupted or empty headers
6903 * @rx_ring: rx descriptor ring packet is being transacted on
6904 * @rx_desc: pointer to the EOP Rx descriptor
6905 * @skb: pointer to current skb being fixed
6907 * Address the case where we are pulling data in on pages only
6908 * and as such no data is present in the skb header.
6910 * In addition if skb is not at least 60 bytes we need to pad it so that
6911 * it is large enough to qualify as a valid Ethernet frame.
6913 * Returns true if an error was encountered and skb was freed.
6915 static bool igb_cleanup_headers(struct igb_ring
*rx_ring
,
6916 union e1000_adv_rx_desc
*rx_desc
,
6917 struct sk_buff
*skb
)
6919 if (unlikely((igb_test_staterr(rx_desc
,
6920 E1000_RXDEXT_ERR_FRAME_ERR_MASK
)))) {
6921 struct net_device
*netdev
= rx_ring
->netdev
;
6922 if (!(netdev
->features
& NETIF_F_RXALL
)) {
6923 dev_kfree_skb_any(skb
);
6928 /* place header in linear portion of buffer */
6929 if (skb_is_nonlinear(skb
))
6930 igb_pull_tail(rx_ring
, rx_desc
, skb
);
6932 /* if skb_pad returns an error the skb was freed */
6933 if (unlikely(skb
->len
< 60)) {
6934 int pad_len
= 60 - skb
->len
;
6936 if (skb_pad(skb
, pad_len
))
6938 __skb_put(skb
, pad_len
);
6945 * igb_process_skb_fields - Populate skb header fields from Rx descriptor
6946 * @rx_ring: rx descriptor ring packet is being transacted on
6947 * @rx_desc: pointer to the EOP Rx descriptor
6948 * @skb: pointer to current skb being populated
6950 * This function checks the ring, descriptor, and packet information in
6951 * order to populate the hash, checksum, VLAN, timestamp, protocol, and
6952 * other fields within the skb.
6954 static void igb_process_skb_fields(struct igb_ring
*rx_ring
,
6955 union e1000_adv_rx_desc
*rx_desc
,
6956 struct sk_buff
*skb
)
6958 struct net_device
*dev
= rx_ring
->netdev
;
6960 igb_rx_hash(rx_ring
, rx_desc
, skb
);
6962 igb_rx_checksum(rx_ring
, rx_desc
, skb
);
6964 if (igb_test_staterr(rx_desc
, E1000_RXDADV_STAT_TS
) &&
6965 !igb_test_staterr(rx_desc
, E1000_RXDADV_STAT_TSIP
))
6966 igb_ptp_rx_rgtstamp(rx_ring
->q_vector
, skb
);
6968 if ((dev
->features
& NETIF_F_HW_VLAN_CTAG_RX
) &&
6969 igb_test_staterr(rx_desc
, E1000_RXD_STAT_VP
)) {
6972 if (igb_test_staterr(rx_desc
, E1000_RXDEXT_STATERR_LB
) &&
6973 test_bit(IGB_RING_FLAG_RX_LB_VLAN_BSWAP
, &rx_ring
->flags
))
6974 vid
= be16_to_cpu(rx_desc
->wb
.upper
.vlan
);
6976 vid
= le16_to_cpu(rx_desc
->wb
.upper
.vlan
);
6978 __vlan_hwaccel_put_tag(skb
, htons(ETH_P_8021Q
), vid
);
6981 skb_record_rx_queue(skb
, rx_ring
->queue_index
);
6983 skb
->protocol
= eth_type_trans(skb
, rx_ring
->netdev
);
6986 static bool igb_clean_rx_irq(struct igb_q_vector
*q_vector
, const int budget
)
6988 struct igb_ring
*rx_ring
= q_vector
->rx
.ring
;
6989 struct sk_buff
*skb
= rx_ring
->skb
;
6990 unsigned int total_bytes
= 0, total_packets
= 0;
6991 u16 cleaned_count
= igb_desc_unused(rx_ring
);
6993 while (likely(total_packets
< budget
)) {
6994 union e1000_adv_rx_desc
*rx_desc
;
6996 /* return some buffers to hardware, one at a time is too slow */
6997 if (cleaned_count
>= IGB_RX_BUFFER_WRITE
) {
6998 igb_alloc_rx_buffers(rx_ring
, cleaned_count
);
7002 rx_desc
= IGB_RX_DESC(rx_ring
, rx_ring
->next_to_clean
);
7004 if (!igb_test_staterr(rx_desc
, E1000_RXD_STAT_DD
))
7007 /* This memory barrier is needed to keep us from reading
7008 * any other fields out of the rx_desc until we know the
7009 * RXD_STAT_DD bit is set
7013 /* retrieve a buffer from the ring */
7014 skb
= igb_fetch_rx_buffer(rx_ring
, rx_desc
, skb
);
7016 /* exit if we failed to retrieve a buffer */
7022 /* fetch next buffer in frame if non-eop */
7023 if (igb_is_non_eop(rx_ring
, rx_desc
))
7026 /* verify the packet layout is correct */
7027 if (igb_cleanup_headers(rx_ring
, rx_desc
, skb
)) {
7032 /* probably a little skewed due to removing CRC */
7033 total_bytes
+= skb
->len
;
7035 /* populate checksum, timestamp, VLAN, and protocol */
7036 igb_process_skb_fields(rx_ring
, rx_desc
, skb
);
7038 napi_gro_receive(&q_vector
->napi
, skb
);
7040 /* reset skb pointer */
7043 /* update budget accounting */
7047 /* place incomplete frames back on ring for completion */
7050 u64_stats_update_begin(&rx_ring
->rx_syncp
);
7051 rx_ring
->rx_stats
.packets
+= total_packets
;
7052 rx_ring
->rx_stats
.bytes
+= total_bytes
;
7053 u64_stats_update_end(&rx_ring
->rx_syncp
);
7054 q_vector
->rx
.total_packets
+= total_packets
;
7055 q_vector
->rx
.total_bytes
+= total_bytes
;
7058 igb_alloc_rx_buffers(rx_ring
, cleaned_count
);
7060 return total_packets
< budget
;
7063 static bool igb_alloc_mapped_page(struct igb_ring
*rx_ring
,
7064 struct igb_rx_buffer
*bi
)
7066 struct page
*page
= bi
->page
;
7069 /* since we are recycling buffers we should seldom need to alloc */
7073 /* alloc new page for storage */
7074 page
= __skb_alloc_page(GFP_ATOMIC
| __GFP_COLD
, NULL
);
7075 if (unlikely(!page
)) {
7076 rx_ring
->rx_stats
.alloc_failed
++;
7080 /* map page for use */
7081 dma
= dma_map_page(rx_ring
->dev
, page
, 0, PAGE_SIZE
, DMA_FROM_DEVICE
);
7083 /* if mapping failed free memory back to system since
7084 * there isn't much point in holding memory we can't use
7086 if (dma_mapping_error(rx_ring
->dev
, dma
)) {
7089 rx_ring
->rx_stats
.alloc_failed
++;
7095 bi
->page_offset
= 0;
7101 * igb_alloc_rx_buffers - Replace used receive buffers; packet split
7102 * @adapter: address of board private structure
7104 void igb_alloc_rx_buffers(struct igb_ring
*rx_ring
, u16 cleaned_count
)
7106 union e1000_adv_rx_desc
*rx_desc
;
7107 struct igb_rx_buffer
*bi
;
7108 u16 i
= rx_ring
->next_to_use
;
7114 rx_desc
= IGB_RX_DESC(rx_ring
, i
);
7115 bi
= &rx_ring
->rx_buffer_info
[i
];
7116 i
-= rx_ring
->count
;
7119 if (!igb_alloc_mapped_page(rx_ring
, bi
))
7122 /* Refresh the desc even if buffer_addrs didn't change
7123 * because each write-back erases this info.
7125 rx_desc
->read
.pkt_addr
= cpu_to_le64(bi
->dma
+ bi
->page_offset
);
7131 rx_desc
= IGB_RX_DESC(rx_ring
, 0);
7132 bi
= rx_ring
->rx_buffer_info
;
7133 i
-= rx_ring
->count
;
7136 /* clear the hdr_addr for the next_to_use descriptor */
7137 rx_desc
->read
.hdr_addr
= 0;
7140 } while (cleaned_count
);
7142 i
+= rx_ring
->count
;
7144 if (rx_ring
->next_to_use
!= i
) {
7145 /* record the next descriptor to use */
7146 rx_ring
->next_to_use
= i
;
7148 /* update next to alloc since we have filled the ring */
7149 rx_ring
->next_to_alloc
= i
;
7151 /* Force memory writes to complete before letting h/w
7152 * know there are new descriptors to fetch. (Only
7153 * applicable for weak-ordered memory model archs,
7157 writel(i
, rx_ring
->tail
);
7167 static int igb_mii_ioctl(struct net_device
*netdev
, struct ifreq
*ifr
, int cmd
)
7169 struct igb_adapter
*adapter
= netdev_priv(netdev
);
7170 struct mii_ioctl_data
*data
= if_mii(ifr
);
7172 if (adapter
->hw
.phy
.media_type
!= e1000_media_type_copper
)
7177 data
->phy_id
= adapter
->hw
.phy
.addr
;
7180 if (igb_read_phy_reg(&adapter
->hw
, data
->reg_num
& 0x1F,
7197 static int igb_ioctl(struct net_device
*netdev
, struct ifreq
*ifr
, int cmd
)
7203 return igb_mii_ioctl(netdev
, ifr
, cmd
);
7205 return igb_ptp_get_ts_config(netdev
, ifr
);
7207 return igb_ptp_set_ts_config(netdev
, ifr
);
7213 s32
igb_read_pcie_cap_reg(struct e1000_hw
*hw
, u32 reg
, u16
*value
)
7215 struct igb_adapter
*adapter
= hw
->back
;
7217 if (pcie_capability_read_word(adapter
->pdev
, reg
, value
))
7218 return -E1000_ERR_CONFIG
;
7223 s32
igb_write_pcie_cap_reg(struct e1000_hw
*hw
, u32 reg
, u16
*value
)
7225 struct igb_adapter
*adapter
= hw
->back
;
7227 if (pcie_capability_write_word(adapter
->pdev
, reg
, *value
))
7228 return -E1000_ERR_CONFIG
;
7233 static void igb_vlan_mode(struct net_device
*netdev
, netdev_features_t features
)
7235 struct igb_adapter
*adapter
= netdev_priv(netdev
);
7236 struct e1000_hw
*hw
= &adapter
->hw
;
7238 bool enable
= !!(features
& NETIF_F_HW_VLAN_CTAG_RX
);
7241 /* enable VLAN tag insert/strip */
7242 ctrl
= rd32(E1000_CTRL
);
7243 ctrl
|= E1000_CTRL_VME
;
7244 wr32(E1000_CTRL
, ctrl
);
7246 /* Disable CFI check */
7247 rctl
= rd32(E1000_RCTL
);
7248 rctl
&= ~E1000_RCTL_CFIEN
;
7249 wr32(E1000_RCTL
, rctl
);
7251 /* disable VLAN tag insert/strip */
7252 ctrl
= rd32(E1000_CTRL
);
7253 ctrl
&= ~E1000_CTRL_VME
;
7254 wr32(E1000_CTRL
, ctrl
);
7257 igb_rlpml_set(adapter
);
7260 static int igb_vlan_rx_add_vid(struct net_device
*netdev
,
7261 __be16 proto
, u16 vid
)
7263 struct igb_adapter
*adapter
= netdev_priv(netdev
);
7264 struct e1000_hw
*hw
= &adapter
->hw
;
7265 int pf_id
= adapter
->vfs_allocated_count
;
7267 /* attempt to add filter to vlvf array */
7268 igb_vlvf_set(adapter
, vid
, true, pf_id
);
7270 /* add the filter since PF can receive vlans w/o entry in vlvf */
7271 igb_vfta_set(hw
, vid
, true);
7273 set_bit(vid
, adapter
->active_vlans
);
7278 static int igb_vlan_rx_kill_vid(struct net_device
*netdev
,
7279 __be16 proto
, u16 vid
)
7281 struct igb_adapter
*adapter
= netdev_priv(netdev
);
7282 struct e1000_hw
*hw
= &adapter
->hw
;
7283 int pf_id
= adapter
->vfs_allocated_count
;
7286 /* remove vlan from VLVF table array */
7287 err
= igb_vlvf_set(adapter
, vid
, false, pf_id
);
7289 /* if vid was not present in VLVF just remove it from table */
7291 igb_vfta_set(hw
, vid
, false);
7293 clear_bit(vid
, adapter
->active_vlans
);
7298 static void igb_restore_vlan(struct igb_adapter
*adapter
)
7302 igb_vlan_mode(adapter
->netdev
, adapter
->netdev
->features
);
7304 for_each_set_bit(vid
, adapter
->active_vlans
, VLAN_N_VID
)
7305 igb_vlan_rx_add_vid(adapter
->netdev
, htons(ETH_P_8021Q
), vid
);
7308 int igb_set_spd_dplx(struct igb_adapter
*adapter
, u32 spd
, u8 dplx
)
7310 struct pci_dev
*pdev
= adapter
->pdev
;
7311 struct e1000_mac_info
*mac
= &adapter
->hw
.mac
;
7315 /* Make sure dplx is at most 1 bit and lsb of speed is not set
7316 * for the switch() below to work
7318 if ((spd
& 1) || (dplx
& ~1))
7321 /* Fiber NIC's only allow 1000 gbps Full duplex
7322 * and 100Mbps Full duplex for 100baseFx sfp
7324 if (adapter
->hw
.phy
.media_type
== e1000_media_type_internal_serdes
) {
7325 switch (spd
+ dplx
) {
7326 case SPEED_10
+ DUPLEX_HALF
:
7327 case SPEED_10
+ DUPLEX_FULL
:
7328 case SPEED_100
+ DUPLEX_HALF
:
7335 switch (spd
+ dplx
) {
7336 case SPEED_10
+ DUPLEX_HALF
:
7337 mac
->forced_speed_duplex
= ADVERTISE_10_HALF
;
7339 case SPEED_10
+ DUPLEX_FULL
:
7340 mac
->forced_speed_duplex
= ADVERTISE_10_FULL
;
7342 case SPEED_100
+ DUPLEX_HALF
:
7343 mac
->forced_speed_duplex
= ADVERTISE_100_HALF
;
7345 case SPEED_100
+ DUPLEX_FULL
:
7346 mac
->forced_speed_duplex
= ADVERTISE_100_FULL
;
7348 case SPEED_1000
+ DUPLEX_FULL
:
7350 adapter
->hw
.phy
.autoneg_advertised
= ADVERTISE_1000_FULL
;
7352 case SPEED_1000
+ DUPLEX_HALF
: /* not supported */
7357 /* clear MDI, MDI(-X) override is only allowed when autoneg enabled */
7358 adapter
->hw
.phy
.mdix
= AUTO_ALL_MODES
;
7363 dev_err(&pdev
->dev
, "Unsupported Speed/Duplex configuration\n");
7367 static int __igb_shutdown(struct pci_dev
*pdev
, bool *enable_wake
,
7370 struct net_device
*netdev
= pci_get_drvdata(pdev
);
7371 struct igb_adapter
*adapter
= netdev_priv(netdev
);
7372 struct e1000_hw
*hw
= &adapter
->hw
;
7373 u32 ctrl
, rctl
, status
;
7374 u32 wufc
= runtime
? E1000_WUFC_LNKC
: adapter
->wol
;
7379 netif_device_detach(netdev
);
7381 if (netif_running(netdev
))
7382 __igb_close(netdev
, true);
7384 igb_clear_interrupt_scheme(adapter
);
7387 retval
= pci_save_state(pdev
);
7392 status
= rd32(E1000_STATUS
);
7393 if (status
& E1000_STATUS_LU
)
7394 wufc
&= ~E1000_WUFC_LNKC
;
7397 igb_setup_rctl(adapter
);
7398 igb_set_rx_mode(netdev
);
7400 /* turn on all-multi mode if wake on multicast is enabled */
7401 if (wufc
& E1000_WUFC_MC
) {
7402 rctl
= rd32(E1000_RCTL
);
7403 rctl
|= E1000_RCTL_MPE
;
7404 wr32(E1000_RCTL
, rctl
);
7407 ctrl
= rd32(E1000_CTRL
);
7408 /* advertise wake from D3Cold */
7409 #define E1000_CTRL_ADVD3WUC 0x00100000
7410 /* phy power management enable */
7411 #define E1000_CTRL_EN_PHY_PWR_MGMT 0x00200000
7412 ctrl
|= E1000_CTRL_ADVD3WUC
;
7413 wr32(E1000_CTRL
, ctrl
);
7415 /* Allow time for pending master requests to run */
7416 igb_disable_pcie_master(hw
);
7418 wr32(E1000_WUC
, E1000_WUC_PME_EN
);
7419 wr32(E1000_WUFC
, wufc
);
7422 wr32(E1000_WUFC
, 0);
7425 *enable_wake
= wufc
|| adapter
->en_mng_pt
;
7427 igb_power_down_link(adapter
);
7429 igb_power_up_link(adapter
);
7431 /* Release control of h/w to f/w. If f/w is AMT enabled, this
7432 * would have already happened in close and is redundant.
7434 igb_release_hw_control(adapter
);
7436 pci_disable_device(pdev
);
7442 #ifdef CONFIG_PM_SLEEP
7443 static int igb_suspend(struct device
*dev
)
7447 struct pci_dev
*pdev
= to_pci_dev(dev
);
7449 retval
= __igb_shutdown(pdev
, &wake
, 0);
7454 pci_prepare_to_sleep(pdev
);
7456 pci_wake_from_d3(pdev
, false);
7457 pci_set_power_state(pdev
, PCI_D3hot
);
7462 #endif /* CONFIG_PM_SLEEP */
7464 static int igb_resume(struct device
*dev
)
7466 struct pci_dev
*pdev
= to_pci_dev(dev
);
7467 struct net_device
*netdev
= pci_get_drvdata(pdev
);
7468 struct igb_adapter
*adapter
= netdev_priv(netdev
);
7469 struct e1000_hw
*hw
= &adapter
->hw
;
7472 pci_set_power_state(pdev
, PCI_D0
);
7473 pci_restore_state(pdev
);
7474 pci_save_state(pdev
);
7476 err
= pci_enable_device_mem(pdev
);
7479 "igb: Cannot enable PCI device from suspend\n");
7482 pci_set_master(pdev
);
7484 pci_enable_wake(pdev
, PCI_D3hot
, 0);
7485 pci_enable_wake(pdev
, PCI_D3cold
, 0);
7487 if (igb_init_interrupt_scheme(adapter
, true)) {
7488 dev_err(&pdev
->dev
, "Unable to allocate memory for queues\n");
7494 /* let the f/w know that the h/w is now under the control of the
7497 igb_get_hw_control(adapter
);
7499 wr32(E1000_WUS
, ~0);
7501 if (netdev
->flags
& IFF_UP
) {
7503 err
= __igb_open(netdev
, true);
7509 netif_device_attach(netdev
);
7513 #ifdef CONFIG_PM_RUNTIME
7514 static int igb_runtime_idle(struct device
*dev
)
7516 struct pci_dev
*pdev
= to_pci_dev(dev
);
7517 struct net_device
*netdev
= pci_get_drvdata(pdev
);
7518 struct igb_adapter
*adapter
= netdev_priv(netdev
);
7520 if (!igb_has_link(adapter
))
7521 pm_schedule_suspend(dev
, MSEC_PER_SEC
* 5);
7526 static int igb_runtime_suspend(struct device
*dev
)
7528 struct pci_dev
*pdev
= to_pci_dev(dev
);
7532 retval
= __igb_shutdown(pdev
, &wake
, 1);
7537 pci_prepare_to_sleep(pdev
);
7539 pci_wake_from_d3(pdev
, false);
7540 pci_set_power_state(pdev
, PCI_D3hot
);
7546 static int igb_runtime_resume(struct device
*dev
)
7548 return igb_resume(dev
);
7550 #endif /* CONFIG_PM_RUNTIME */
7553 static void igb_shutdown(struct pci_dev
*pdev
)
7557 __igb_shutdown(pdev
, &wake
, 0);
7559 if (system_state
== SYSTEM_POWER_OFF
) {
7560 pci_wake_from_d3(pdev
, wake
);
7561 pci_set_power_state(pdev
, PCI_D3hot
);
7565 #ifdef CONFIG_PCI_IOV
7566 static int igb_sriov_reinit(struct pci_dev
*dev
)
7568 struct net_device
*netdev
= pci_get_drvdata(dev
);
7569 struct igb_adapter
*adapter
= netdev_priv(netdev
);
7570 struct pci_dev
*pdev
= adapter
->pdev
;
7574 if (netif_running(netdev
))
7577 igb_clear_interrupt_scheme(adapter
);
7579 igb_init_queue_configuration(adapter
);
7581 if (igb_init_interrupt_scheme(adapter
, true)) {
7582 dev_err(&pdev
->dev
, "Unable to allocate memory for queues\n");
7586 if (netif_running(netdev
))
7594 static int igb_pci_disable_sriov(struct pci_dev
*dev
)
7596 int err
= igb_disable_sriov(dev
);
7599 err
= igb_sriov_reinit(dev
);
7604 static int igb_pci_enable_sriov(struct pci_dev
*dev
, int num_vfs
)
7606 int err
= igb_enable_sriov(dev
, num_vfs
);
7611 err
= igb_sriov_reinit(dev
);
7620 static int igb_pci_sriov_configure(struct pci_dev
*dev
, int num_vfs
)
7622 #ifdef CONFIG_PCI_IOV
7624 return igb_pci_disable_sriov(dev
);
7626 return igb_pci_enable_sriov(dev
, num_vfs
);
7631 #ifdef CONFIG_NET_POLL_CONTROLLER
7632 /* Polling 'interrupt' - used by things like netconsole to send skbs
7633 * without having to re-enable interrupts. It's not called while
7634 * the interrupt routine is executing.
7636 static void igb_netpoll(struct net_device
*netdev
)
7638 struct igb_adapter
*adapter
= netdev_priv(netdev
);
7639 struct e1000_hw
*hw
= &adapter
->hw
;
7640 struct igb_q_vector
*q_vector
;
7643 for (i
= 0; i
< adapter
->num_q_vectors
; i
++) {
7644 q_vector
= adapter
->q_vector
[i
];
7645 if (adapter
->flags
& IGB_FLAG_HAS_MSIX
)
7646 wr32(E1000_EIMC
, q_vector
->eims_value
);
7648 igb_irq_disable(adapter
);
7649 napi_schedule(&q_vector
->napi
);
7652 #endif /* CONFIG_NET_POLL_CONTROLLER */
7655 * igb_io_error_detected - called when PCI error is detected
7656 * @pdev: Pointer to PCI device
7657 * @state: The current pci connection state
7659 * This function is called after a PCI bus error affecting
7660 * this device has been detected.
7662 static pci_ers_result_t
igb_io_error_detected(struct pci_dev
*pdev
,
7663 pci_channel_state_t state
)
7665 struct net_device
*netdev
= pci_get_drvdata(pdev
);
7666 struct igb_adapter
*adapter
= netdev_priv(netdev
);
7668 netif_device_detach(netdev
);
7670 if (state
== pci_channel_io_perm_failure
)
7671 return PCI_ERS_RESULT_DISCONNECT
;
7673 if (netif_running(netdev
))
7675 pci_disable_device(pdev
);
7677 /* Request a slot slot reset. */
7678 return PCI_ERS_RESULT_NEED_RESET
;
7682 * igb_io_slot_reset - called after the pci bus has been reset.
7683 * @pdev: Pointer to PCI device
7685 * Restart the card from scratch, as if from a cold-boot. Implementation
7686 * resembles the first-half of the igb_resume routine.
7688 static pci_ers_result_t
igb_io_slot_reset(struct pci_dev
*pdev
)
7690 struct net_device
*netdev
= pci_get_drvdata(pdev
);
7691 struct igb_adapter
*adapter
= netdev_priv(netdev
);
7692 struct e1000_hw
*hw
= &adapter
->hw
;
7693 pci_ers_result_t result
;
7696 if (pci_enable_device_mem(pdev
)) {
7698 "Cannot re-enable PCI device after reset.\n");
7699 result
= PCI_ERS_RESULT_DISCONNECT
;
7701 pci_set_master(pdev
);
7702 pci_restore_state(pdev
);
7703 pci_save_state(pdev
);
7705 pci_enable_wake(pdev
, PCI_D3hot
, 0);
7706 pci_enable_wake(pdev
, PCI_D3cold
, 0);
7709 wr32(E1000_WUS
, ~0);
7710 result
= PCI_ERS_RESULT_RECOVERED
;
7713 err
= pci_cleanup_aer_uncorrect_error_status(pdev
);
7716 "pci_cleanup_aer_uncorrect_error_status failed 0x%0x\n",
7718 /* non-fatal, continue */
7725 * igb_io_resume - called when traffic can start flowing again.
7726 * @pdev: Pointer to PCI device
7728 * This callback is called when the error recovery driver tells us that
7729 * its OK to resume normal operation. Implementation resembles the
7730 * second-half of the igb_resume routine.
7732 static void igb_io_resume(struct pci_dev
*pdev
)
7734 struct net_device
*netdev
= pci_get_drvdata(pdev
);
7735 struct igb_adapter
*adapter
= netdev_priv(netdev
);
7737 if (netif_running(netdev
)) {
7738 if (igb_up(adapter
)) {
7739 dev_err(&pdev
->dev
, "igb_up failed after reset\n");
7744 netif_device_attach(netdev
);
7746 /* let the f/w know that the h/w is now under the control of the
7749 igb_get_hw_control(adapter
);
7752 static void igb_rar_set_qsel(struct igb_adapter
*adapter
, u8
*addr
, u32 index
,
7755 u32 rar_low
, rar_high
;
7756 struct e1000_hw
*hw
= &adapter
->hw
;
7758 /* HW expects these in little endian so we reverse the byte order
7759 * from network order (big endian) to little endian
7761 rar_low
= ((u32
) addr
[0] | ((u32
) addr
[1] << 8) |
7762 ((u32
) addr
[2] << 16) | ((u32
) addr
[3] << 24));
7763 rar_high
= ((u32
) addr
[4] | ((u32
) addr
[5] << 8));
7765 /* Indicate to hardware the Address is Valid. */
7766 rar_high
|= E1000_RAH_AV
;
7768 if (hw
->mac
.type
== e1000_82575
)
7769 rar_high
|= E1000_RAH_POOL_1
* qsel
;
7771 rar_high
|= E1000_RAH_POOL_1
<< qsel
;
7773 wr32(E1000_RAL(index
), rar_low
);
7775 wr32(E1000_RAH(index
), rar_high
);
7779 static int igb_set_vf_mac(struct igb_adapter
*adapter
,
7780 int vf
, unsigned char *mac_addr
)
7782 struct e1000_hw
*hw
= &adapter
->hw
;
7783 /* VF MAC addresses start at end of receive addresses and moves
7784 * towards the first, as a result a collision should not be possible
7786 int rar_entry
= hw
->mac
.rar_entry_count
- (vf
+ 1);
7788 memcpy(adapter
->vf_data
[vf
].vf_mac_addresses
, mac_addr
, ETH_ALEN
);
7790 igb_rar_set_qsel(adapter
, mac_addr
, rar_entry
, vf
);
7795 static int igb_ndo_set_vf_mac(struct net_device
*netdev
, int vf
, u8
*mac
)
7797 struct igb_adapter
*adapter
= netdev_priv(netdev
);
7798 if (!is_valid_ether_addr(mac
) || (vf
>= adapter
->vfs_allocated_count
))
7800 adapter
->vf_data
[vf
].flags
|= IGB_VF_FLAG_PF_SET_MAC
;
7801 dev_info(&adapter
->pdev
->dev
, "setting MAC %pM on VF %d\n", mac
, vf
);
7802 dev_info(&adapter
->pdev
->dev
,
7803 "Reload the VF driver to make this change effective.");
7804 if (test_bit(__IGB_DOWN
, &adapter
->state
)) {
7805 dev_warn(&adapter
->pdev
->dev
,
7806 "The VF MAC address has been set, but the PF device is not up.\n");
7807 dev_warn(&adapter
->pdev
->dev
,
7808 "Bring the PF device up before attempting to use the VF device.\n");
7810 return igb_set_vf_mac(adapter
, vf
, mac
);
7813 static int igb_link_mbps(int internal_link_speed
)
7815 switch (internal_link_speed
) {
7825 static void igb_set_vf_rate_limit(struct e1000_hw
*hw
, int vf
, int tx_rate
,
7832 /* Calculate the rate factor values to set */
7833 rf_int
= link_speed
/ tx_rate
;
7834 rf_dec
= (link_speed
- (rf_int
* tx_rate
));
7835 rf_dec
= (rf_dec
* (1 << E1000_RTTBCNRC_RF_INT_SHIFT
)) /
7838 bcnrc_val
= E1000_RTTBCNRC_RS_ENA
;
7839 bcnrc_val
|= ((rf_int
<< E1000_RTTBCNRC_RF_INT_SHIFT
) &
7840 E1000_RTTBCNRC_RF_INT_MASK
);
7841 bcnrc_val
|= (rf_dec
& E1000_RTTBCNRC_RF_DEC_MASK
);
7846 wr32(E1000_RTTDQSEL
, vf
); /* vf X uses queue X */
7847 /* Set global transmit compensation time to the MMW_SIZE in RTTBCNRM
7848 * register. MMW_SIZE=0x014 if 9728-byte jumbo is supported.
7850 wr32(E1000_RTTBCNRM
, 0x14);
7851 wr32(E1000_RTTBCNRC
, bcnrc_val
);
7854 static void igb_check_vf_rate_limit(struct igb_adapter
*adapter
)
7856 int actual_link_speed
, i
;
7857 bool reset_rate
= false;
7859 /* VF TX rate limit was not set or not supported */
7860 if ((adapter
->vf_rate_link_speed
== 0) ||
7861 (adapter
->hw
.mac
.type
!= e1000_82576
))
7864 actual_link_speed
= igb_link_mbps(adapter
->link_speed
);
7865 if (actual_link_speed
!= adapter
->vf_rate_link_speed
) {
7867 adapter
->vf_rate_link_speed
= 0;
7868 dev_info(&adapter
->pdev
->dev
,
7869 "Link speed has been changed. VF Transmit rate is disabled\n");
7872 for (i
= 0; i
< adapter
->vfs_allocated_count
; i
++) {
7874 adapter
->vf_data
[i
].tx_rate
= 0;
7876 igb_set_vf_rate_limit(&adapter
->hw
, i
,
7877 adapter
->vf_data
[i
].tx_rate
,
7882 static int igb_ndo_set_vf_bw(struct net_device
*netdev
, int vf
,
7883 int min_tx_rate
, int max_tx_rate
)
7885 struct igb_adapter
*adapter
= netdev_priv(netdev
);
7886 struct e1000_hw
*hw
= &adapter
->hw
;
7887 int actual_link_speed
;
7889 if (hw
->mac
.type
!= e1000_82576
)
7895 actual_link_speed
= igb_link_mbps(adapter
->link_speed
);
7896 if ((vf
>= adapter
->vfs_allocated_count
) ||
7897 (!(rd32(E1000_STATUS
) & E1000_STATUS_LU
)) ||
7898 (max_tx_rate
< 0) ||
7899 (max_tx_rate
> actual_link_speed
))
7902 adapter
->vf_rate_link_speed
= actual_link_speed
;
7903 adapter
->vf_data
[vf
].tx_rate
= (u16
)max_tx_rate
;
7904 igb_set_vf_rate_limit(hw
, vf
, max_tx_rate
, actual_link_speed
);
7909 static int igb_ndo_set_vf_spoofchk(struct net_device
*netdev
, int vf
,
7912 struct igb_adapter
*adapter
= netdev_priv(netdev
);
7913 struct e1000_hw
*hw
= &adapter
->hw
;
7914 u32 reg_val
, reg_offset
;
7916 if (!adapter
->vfs_allocated_count
)
7919 if (vf
>= adapter
->vfs_allocated_count
)
7922 reg_offset
= (hw
->mac
.type
== e1000_82576
) ? E1000_DTXSWC
: E1000_TXSWC
;
7923 reg_val
= rd32(reg_offset
);
7925 reg_val
|= ((1 << vf
) |
7926 (1 << (vf
+ E1000_DTXSWC_VLAN_SPOOF_SHIFT
)));
7928 reg_val
&= ~((1 << vf
) |
7929 (1 << (vf
+ E1000_DTXSWC_VLAN_SPOOF_SHIFT
)));
7930 wr32(reg_offset
, reg_val
);
7932 adapter
->vf_data
[vf
].spoofchk_enabled
= setting
;
7933 return E1000_SUCCESS
;
7936 static int igb_ndo_get_vf_config(struct net_device
*netdev
,
7937 int vf
, struct ifla_vf_info
*ivi
)
7939 struct igb_adapter
*adapter
= netdev_priv(netdev
);
7940 if (vf
>= adapter
->vfs_allocated_count
)
7943 memcpy(&ivi
->mac
, adapter
->vf_data
[vf
].vf_mac_addresses
, ETH_ALEN
);
7944 ivi
->max_tx_rate
= adapter
->vf_data
[vf
].tx_rate
;
7945 ivi
->min_tx_rate
= 0;
7946 ivi
->vlan
= adapter
->vf_data
[vf
].pf_vlan
;
7947 ivi
->qos
= adapter
->vf_data
[vf
].pf_qos
;
7948 ivi
->spoofchk
= adapter
->vf_data
[vf
].spoofchk_enabled
;
7952 static void igb_vmm_control(struct igb_adapter
*adapter
)
7954 struct e1000_hw
*hw
= &adapter
->hw
;
7957 switch (hw
->mac
.type
) {
7963 /* replication is not supported for 82575 */
7966 /* notify HW that the MAC is adding vlan tags */
7967 reg
= rd32(E1000_DTXCTL
);
7968 reg
|= E1000_DTXCTL_VLAN_ADDED
;
7969 wr32(E1000_DTXCTL
, reg
);
7972 /* enable replication vlan tag stripping */
7973 reg
= rd32(E1000_RPLOLR
);
7974 reg
|= E1000_RPLOLR_STRVLAN
;
7975 wr32(E1000_RPLOLR
, reg
);
7978 /* none of the above registers are supported by i350 */
7982 if (adapter
->vfs_allocated_count
) {
7983 igb_vmdq_set_loopback_pf(hw
, true);
7984 igb_vmdq_set_replication_pf(hw
, true);
7985 igb_vmdq_set_anti_spoofing_pf(hw
, true,
7986 adapter
->vfs_allocated_count
);
7988 igb_vmdq_set_loopback_pf(hw
, false);
7989 igb_vmdq_set_replication_pf(hw
, false);
7993 static void igb_init_dmac(struct igb_adapter
*adapter
, u32 pba
)
7995 struct e1000_hw
*hw
= &adapter
->hw
;
7999 if (hw
->mac
.type
> e1000_82580
) {
8000 if (adapter
->flags
& IGB_FLAG_DMAC
) {
8003 /* force threshold to 0. */
8004 wr32(E1000_DMCTXTH
, 0);
8006 /* DMA Coalescing high water mark needs to be greater
8007 * than the Rx threshold. Set hwm to PBA - max frame
8008 * size in 16B units, capping it at PBA - 6KB.
8010 hwm
= 64 * pba
- adapter
->max_frame_size
/ 16;
8011 if (hwm
< 64 * (pba
- 6))
8012 hwm
= 64 * (pba
- 6);
8013 reg
= rd32(E1000_FCRTC
);
8014 reg
&= ~E1000_FCRTC_RTH_COAL_MASK
;
8015 reg
|= ((hwm
<< E1000_FCRTC_RTH_COAL_SHIFT
)
8016 & E1000_FCRTC_RTH_COAL_MASK
);
8017 wr32(E1000_FCRTC
, reg
);
8019 /* Set the DMA Coalescing Rx threshold to PBA - 2 * max
8020 * frame size, capping it at PBA - 10KB.
8022 dmac_thr
= pba
- adapter
->max_frame_size
/ 512;
8023 if (dmac_thr
< pba
- 10)
8024 dmac_thr
= pba
- 10;
8025 reg
= rd32(E1000_DMACR
);
8026 reg
&= ~E1000_DMACR_DMACTHR_MASK
;
8027 reg
|= ((dmac_thr
<< E1000_DMACR_DMACTHR_SHIFT
)
8028 & E1000_DMACR_DMACTHR_MASK
);
8030 /* transition to L0x or L1 if available..*/
8031 reg
|= (E1000_DMACR_DMAC_EN
| E1000_DMACR_DMAC_LX_MASK
);
8033 /* watchdog timer= +-1000 usec in 32usec intervals */
8036 /* Disable BMC-to-OS Watchdog Enable */
8037 if (hw
->mac
.type
!= e1000_i354
)
8038 reg
&= ~E1000_DMACR_DC_BMC2OSW_EN
;
8040 wr32(E1000_DMACR
, reg
);
8042 /* no lower threshold to disable
8043 * coalescing(smart fifb)-UTRESH=0
8045 wr32(E1000_DMCRTRH
, 0);
8047 reg
= (IGB_DMCTLX_DCFLUSH_DIS
| 0x4);
8049 wr32(E1000_DMCTLX
, reg
);
8051 /* free space in tx packet buffer to wake from
8054 wr32(E1000_DMCTXTH
, (IGB_MIN_TXPBSIZE
-
8055 (IGB_TX_BUF_4096
+ adapter
->max_frame_size
)) >> 6);
8057 /* make low power state decision controlled
8060 reg
= rd32(E1000_PCIEMISC
);
8061 reg
&= ~E1000_PCIEMISC_LX_DECISION
;
8062 wr32(E1000_PCIEMISC
, reg
);
8063 } /* endif adapter->dmac is not disabled */
8064 } else if (hw
->mac
.type
== e1000_82580
) {
8065 u32 reg
= rd32(E1000_PCIEMISC
);
8067 wr32(E1000_PCIEMISC
, reg
& ~E1000_PCIEMISC_LX_DECISION
);
8068 wr32(E1000_DMACR
, 0);
8073 * igb_read_i2c_byte - Reads 8 bit word over I2C
8074 * @hw: pointer to hardware structure
8075 * @byte_offset: byte offset to read
8076 * @dev_addr: device address
8079 * Performs byte read operation over I2C interface at
8080 * a specified device address.
8082 s32
igb_read_i2c_byte(struct e1000_hw
*hw
, u8 byte_offset
,
8083 u8 dev_addr
, u8
*data
)
8085 struct igb_adapter
*adapter
= container_of(hw
, struct igb_adapter
, hw
);
8086 struct i2c_client
*this_client
= adapter
->i2c_client
;
8091 return E1000_ERR_I2C
;
8093 swfw_mask
= E1000_SWFW_PHY0_SM
;
8095 if (hw
->mac
.ops
.acquire_swfw_sync(hw
, swfw_mask
)
8097 return E1000_ERR_SWFW_SYNC
;
8099 status
= i2c_smbus_read_byte_data(this_client
, byte_offset
);
8100 hw
->mac
.ops
.release_swfw_sync(hw
, swfw_mask
);
8103 return E1000_ERR_I2C
;
8106 return E1000_SUCCESS
;
8111 * igb_write_i2c_byte - Writes 8 bit word over I2C
8112 * @hw: pointer to hardware structure
8113 * @byte_offset: byte offset to write
8114 * @dev_addr: device address
8115 * @data: value to write
8117 * Performs byte write operation over I2C interface at
8118 * a specified device address.
8120 s32
igb_write_i2c_byte(struct e1000_hw
*hw
, u8 byte_offset
,
8121 u8 dev_addr
, u8 data
)
8123 struct igb_adapter
*adapter
= container_of(hw
, struct igb_adapter
, hw
);
8124 struct i2c_client
*this_client
= adapter
->i2c_client
;
8126 u16 swfw_mask
= E1000_SWFW_PHY0_SM
;
8129 return E1000_ERR_I2C
;
8131 if (hw
->mac
.ops
.acquire_swfw_sync(hw
, swfw_mask
) != E1000_SUCCESS
)
8132 return E1000_ERR_SWFW_SYNC
;
8133 status
= i2c_smbus_write_byte_data(this_client
, byte_offset
, data
);
8134 hw
->mac
.ops
.release_swfw_sync(hw
, swfw_mask
);
8137 return E1000_ERR_I2C
;
8139 return E1000_SUCCESS
;
8143 int igb_reinit_queues(struct igb_adapter
*adapter
)
8145 struct net_device
*netdev
= adapter
->netdev
;
8146 struct pci_dev
*pdev
= adapter
->pdev
;
8149 if (netif_running(netdev
))
8152 igb_reset_interrupt_capability(adapter
);
8154 if (igb_init_interrupt_scheme(adapter
, true)) {
8155 dev_err(&pdev
->dev
, "Unable to allocate memory for queues\n");
8159 if (netif_running(netdev
))
8160 err
= igb_open(netdev
);