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KVM: MMU: Make setting shadow ptes atomic on i386
[linux-2.6/btrfs-unstable.git] / drivers / kvm / mmu.c
blobf24b540148aa3def67b832e4dacbd3fefe6715e0
1 /*
2 * Kernel-based Virtual Machine driver for Linux
3 *
4 * This module enables machines with Intel VT-x extensions to run virtual
5 * machines without emulation or binary translation.
6 *
7 * MMU support
8 *
9 * Copyright (C) 2006 Qumranet, Inc.
10 *
11 * Authors:
12 * Yaniv Kamay <yaniv@qumranet.com>
13 * Avi Kivity <avi@qumranet.com>
14 *
15 * This work is licensed under the terms of the GNU GPL, version 2. See
16 * the COPYING file in the top-level directory.
17 *
18 */
19 #include <linux/types.h>
20 #include <linux/string.h>
21 #include <asm/page.h>
22 #include <linux/mm.h>
23 #include <linux/highmem.h>
24 #include <linux/module.h>
25 #include <asm/cmpxchg.h>
26
27 #include "vmx.h"
28 #include "kvm.h"
29
30 #undef MMU_DEBUG
31
32 #undef AUDIT
33
34 #ifdef AUDIT
35 static void kvm_mmu_audit(struct kvm_vcpu *vcpu, const char *msg);
36 #else
37 static void kvm_mmu_audit(struct kvm_vcpu *vcpu, const char *msg) {}
38 #endif
39
40 #ifdef MMU_DEBUG
41
42 #define pgprintk(x...) do { if (dbg) printk(x); } while (0)
43 #define rmap_printk(x...) do { if (dbg) printk(x); } while (0)
44
45 #else
46
47 #define pgprintk(x...) do { } while (0)
48 #define rmap_printk(x...) do { } while (0)
49
50 #endif
51
52 #if defined(MMU_DEBUG) || defined(AUDIT)
53 static int dbg = 1;
54 #endif
55
56 #ifndef MMU_DEBUG
57 #define ASSERT(x) do { } while (0)
58 #else
59 #define ASSERT(x) \
60 if (!(x)) { \
61 printk(KERN_WARNING "assertion failed %s:%d: %s\n", \
62 __FILE__, __LINE__, #x); \
63 }
64 #endif
65
66 #define PT64_PT_BITS 9
67 #define PT64_ENT_PER_PAGE (1 << PT64_PT_BITS)
68 #define PT32_PT_BITS 10
69 #define PT32_ENT_PER_PAGE (1 << PT32_PT_BITS)
70
71 #define PT_WRITABLE_SHIFT 1
72
73 #define PT_PRESENT_MASK (1ULL << 0)
74 #define PT_WRITABLE_MASK (1ULL << PT_WRITABLE_SHIFT)
75 #define PT_USER_MASK (1ULL << 2)
76 #define PT_PWT_MASK (1ULL << 3)
77 #define PT_PCD_MASK (1ULL << 4)
78 #define PT_ACCESSED_MASK (1ULL << 5)
79 #define PT_DIRTY_MASK (1ULL << 6)
80 #define PT_PAGE_SIZE_MASK (1ULL << 7)
81 #define PT_PAT_MASK (1ULL << 7)
82 #define PT_GLOBAL_MASK (1ULL << 8)
83 #define PT64_NX_MASK (1ULL << 63)
84
85 #define PT_PAT_SHIFT 7
86 #define PT_DIR_PAT_SHIFT 12
87 #define PT_DIR_PAT_MASK (1ULL << PT_DIR_PAT_SHIFT)
88
89 #define PT32_DIR_PSE36_SIZE 4
90 #define PT32_DIR_PSE36_SHIFT 13
91 #define PT32_DIR_PSE36_MASK (((1ULL << PT32_DIR_PSE36_SIZE) - 1) << PT32_DIR_PSE36_SHIFT)
92
93
94 #define PT32_PTE_COPY_MASK \
95 (PT_PRESENT_MASK | PT_ACCESSED_MASK | PT_DIRTY_MASK | PT_GLOBAL_MASK)
96
97 #define PT64_PTE_COPY_MASK (PT64_NX_MASK | PT32_PTE_COPY_MASK)
98
99 #define PT_FIRST_AVAIL_BITS_SHIFT 9
100 #define PT64_SECOND_AVAIL_BITS_SHIFT 52
101
102 #define PT_SHADOW_PS_MARK (1ULL << PT_FIRST_AVAIL_BITS_SHIFT)
103 #define PT_SHADOW_IO_MARK (1ULL << PT_FIRST_AVAIL_BITS_SHIFT)
104
105 #define PT_SHADOW_WRITABLE_SHIFT (PT_FIRST_AVAIL_BITS_SHIFT + 1)
106 #define PT_SHADOW_WRITABLE_MASK (1ULL << PT_SHADOW_WRITABLE_SHIFT)
107
108 #define PT_SHADOW_USER_SHIFT (PT_SHADOW_WRITABLE_SHIFT + 1)
109 #define PT_SHADOW_USER_MASK (1ULL << (PT_SHADOW_USER_SHIFT))
110
111 #define PT_SHADOW_BITS_OFFSET (PT_SHADOW_WRITABLE_SHIFT - PT_WRITABLE_SHIFT)
112
113 #define VALID_PAGE(x) ((x) != INVALID_PAGE)
114
115 #define PT64_LEVEL_BITS 9
116
117 #define PT64_LEVEL_SHIFT(level) \
118 ( PAGE_SHIFT + (level - 1) * PT64_LEVEL_BITS )
119
120 #define PT64_LEVEL_MASK(level) \
121 (((1ULL << PT64_LEVEL_BITS) - 1) << PT64_LEVEL_SHIFT(level))
122
123 #define PT64_INDEX(address, level)\
124 (((address) >> PT64_LEVEL_SHIFT(level)) & ((1 << PT64_LEVEL_BITS) - 1))
125
126
127 #define PT32_LEVEL_BITS 10
128
129 #define PT32_LEVEL_SHIFT(level) \
130 ( PAGE_SHIFT + (level - 1) * PT32_LEVEL_BITS )
131
132 #define PT32_LEVEL_MASK(level) \
133 (((1ULL << PT32_LEVEL_BITS) - 1) << PT32_LEVEL_SHIFT(level))
134
135 #define PT32_INDEX(address, level)\
136 (((address) >> PT32_LEVEL_SHIFT(level)) & ((1 << PT32_LEVEL_BITS) - 1))
137
138
139 #define PT64_BASE_ADDR_MASK (((1ULL << 52) - 1) & ~(u64)(PAGE_SIZE-1))
140 #define PT64_DIR_BASE_ADDR_MASK \
141 (PT64_BASE_ADDR_MASK & ~((1ULL << (PAGE_SHIFT + PT64_LEVEL_BITS)) - 1))
142
143 #define PT32_BASE_ADDR_MASK PAGE_MASK
144 #define PT32_DIR_BASE_ADDR_MASK \
145 (PAGE_MASK & ~((1ULL << (PAGE_SHIFT + PT32_LEVEL_BITS)) - 1))
146
147
148 #define PFERR_PRESENT_MASK (1U << 0)
149 #define PFERR_WRITE_MASK (1U << 1)
150 #define PFERR_USER_MASK (1U << 2)
151 #define PFERR_FETCH_MASK (1U << 4)
152
153 #define PT64_ROOT_LEVEL 4
154 #define PT32_ROOT_LEVEL 2
155 #define PT32E_ROOT_LEVEL 3
156
157 #define PT_DIRECTORY_LEVEL 2
158 #define PT_PAGE_TABLE_LEVEL 1
159
160 #define RMAP_EXT 4
161
162 struct kvm_rmap_desc {
163 u64 *shadow_ptes[RMAP_EXT];
164 struct kvm_rmap_desc *more;
165 };
166
167 static struct kmem_cache *pte_chain_cache;
168 static struct kmem_cache *rmap_desc_cache;
169 static struct kmem_cache *mmu_page_cache;
170 static struct kmem_cache *mmu_page_header_cache;
171
172 static int is_write_protection(struct kvm_vcpu *vcpu)
173 {
174 return vcpu->cr0 & CR0_WP_MASK;
175 }
176
177 static int is_cpuid_PSE36(void)
178 {
179 return 1;
180 }
181
182 static int is_nx(struct kvm_vcpu *vcpu)
183 {
184 return vcpu->shadow_efer & EFER_NX;
185 }
186
187 static int is_present_pte(unsigned long pte)
188 {
189 return pte & PT_PRESENT_MASK;
190 }
191
192 static int is_writeble_pte(unsigned long pte)
193 {
194 return pte & PT_WRITABLE_MASK;
195 }
196
197 static int is_io_pte(unsigned long pte)
198 {
199 return pte & PT_SHADOW_IO_MARK;
200 }
201
202 static int is_rmap_pte(u64 pte)
203 {
204 return (pte & (PT_WRITABLE_MASK | PT_PRESENT_MASK))
205 == (PT_WRITABLE_MASK | PT_PRESENT_MASK);
206 }
207
208 static void set_shadow_pte(u64 *sptep, u64 spte)
209 {
210 #ifdef CONFIG_X86_64
211 set_64bit((unsigned long *)sptep, spte);
212 #else
213 set_64bit((unsigned long long *)sptep, spte);
214 #endif
215 }
216
217 static int mmu_topup_memory_cache(struct kvm_mmu_memory_cache *cache,
218 struct kmem_cache *base_cache, int min,
219 gfp_t gfp_flags)
220 {
221 void *obj;
222
223 if (cache->nobjs >= min)
224 return 0;
225 while (cache->nobjs < ARRAY_SIZE(cache->objects)) {
226 obj = kmem_cache_zalloc(base_cache, gfp_flags);
227 if (!obj)
228 return -ENOMEM;
229 cache->objects[cache->nobjs++] = obj;
230 }
231 return 0;
232 }
233
234 static void mmu_free_memory_cache(struct kvm_mmu_memory_cache *mc)
235 {
236 while (mc->nobjs)
237 kfree(mc->objects[--mc->nobjs]);
238 }
239
240 static int __mmu_topup_memory_caches(struct kvm_vcpu *vcpu, gfp_t gfp_flags)
241 {
242 int r;
243
244 r = mmu_topup_memory_cache(&vcpu->mmu_pte_chain_cache,
245 pte_chain_cache, 4, gfp_flags);
246 if (r)
247 goto out;
248 r = mmu_topup_memory_cache(&vcpu->mmu_rmap_desc_cache,
249 rmap_desc_cache, 1, gfp_flags);
250 if (r)
251 goto out;
252 r = mmu_topup_memory_cache(&vcpu->mmu_page_cache,
253 mmu_page_cache, 4, gfp_flags);
254 if (r)
255 goto out;
256 r = mmu_topup_memory_cache(&vcpu->mmu_page_header_cache,
257 mmu_page_header_cache, 4, gfp_flags);
258 out:
259 return r;
260 }
261
262 static int mmu_topup_memory_caches(struct kvm_vcpu *vcpu)
263 {
264 int r;
265
266 r = __mmu_topup_memory_caches(vcpu, GFP_NOWAIT);
267 if (r < 0) {
268 spin_unlock(&vcpu->kvm->lock);
269 kvm_arch_ops->vcpu_put(vcpu);
270 r = __mmu_topup_memory_caches(vcpu, GFP_KERNEL);
271 kvm_arch_ops->vcpu_load(vcpu);
272 spin_lock(&vcpu->kvm->lock);
273 }
274 return r;
275 }
276
277 static void mmu_free_memory_caches(struct kvm_vcpu *vcpu)
278 {
279 mmu_free_memory_cache(&vcpu->mmu_pte_chain_cache);
280 mmu_free_memory_cache(&vcpu->mmu_rmap_desc_cache);
281 mmu_free_memory_cache(&vcpu->mmu_page_cache);
282 mmu_free_memory_cache(&vcpu->mmu_page_header_cache);
283 }
284
285 static void *mmu_memory_cache_alloc(struct kvm_mmu_memory_cache *mc,
286 size_t size)
287 {
288 void *p;
289
290 BUG_ON(!mc->nobjs);
291 p = mc->objects[--mc->nobjs];
292 memset(p, 0, size);
293 return p;
294 }
295
296 static void mmu_memory_cache_free(struct kvm_mmu_memory_cache *mc, void *obj)
297 {
298 if (mc->nobjs < KVM_NR_MEM_OBJS)
299 mc->objects[mc->nobjs++] = obj;
300 else
301 kfree(obj);
302 }
303
304 static struct kvm_pte_chain *mmu_alloc_pte_chain(struct kvm_vcpu *vcpu)
305 {
306 return mmu_memory_cache_alloc(&vcpu->mmu_pte_chain_cache,
307 sizeof(struct kvm_pte_chain));
308 }
309
310 static void mmu_free_pte_chain(struct kvm_vcpu *vcpu,
311 struct kvm_pte_chain *pc)
312 {
313 mmu_memory_cache_free(&vcpu->mmu_pte_chain_cache, pc);
314 }
315
316 static struct kvm_rmap_desc *mmu_alloc_rmap_desc(struct kvm_vcpu *vcpu)
317 {
318 return mmu_memory_cache_alloc(&vcpu->mmu_rmap_desc_cache,
319 sizeof(struct kvm_rmap_desc));
320 }
321
322 static void mmu_free_rmap_desc(struct kvm_vcpu *vcpu,
323 struct kvm_rmap_desc *rd)
324 {
325 mmu_memory_cache_free(&vcpu->mmu_rmap_desc_cache, rd);
326 }
327
328 /*
329 * Reverse mapping data structures:
330 *
331 * If page->private bit zero is zero, then page->private points to the
332 * shadow page table entry that points to page_address(page).
333 *
334 * If page->private bit zero is one, (then page->private & ~1) points
335 * to a struct kvm_rmap_desc containing more mappings.
336 */
337 static void rmap_add(struct kvm_vcpu *vcpu, u64 *spte)
338 {
339 struct page *page;
340 struct kvm_rmap_desc *desc;
341 int i;
342
343 if (!is_rmap_pte(*spte))
344 return;
345 page = pfn_to_page((*spte & PT64_BASE_ADDR_MASK) >> PAGE_SHIFT);
346 if (!page_private(page)) {
347 rmap_printk("rmap_add: %p %llx 0->1\n", spte, *spte);
348 set_page_private(page,(unsigned long)spte);
349 } else if (!(page_private(page) & 1)) {
350 rmap_printk("rmap_add: %p %llx 1->many\n", spte, *spte);
351 desc = mmu_alloc_rmap_desc(vcpu);
352 desc->shadow_ptes[0] = (u64 *)page_private(page);
353 desc->shadow_ptes[1] = spte;
354 set_page_private(page,(unsigned long)desc | 1);
355 } else {
356 rmap_printk("rmap_add: %p %llx many->many\n", spte, *spte);
357 desc = (struct kvm_rmap_desc *)(page_private(page) & ~1ul);
358 while (desc->shadow_ptes[RMAP_EXT-1] && desc->more)
359 desc = desc->more;
360 if (desc->shadow_ptes[RMAP_EXT-1]) {
361 desc->more = mmu_alloc_rmap_desc(vcpu);
362 desc = desc->more;
363 }
364 for (i = 0; desc->shadow_ptes[i]; ++i)
365 ;
366 desc->shadow_ptes[i] = spte;
367 }
368 }
369
370 static void rmap_desc_remove_entry(struct kvm_vcpu *vcpu,
371 struct page *page,
372 struct kvm_rmap_desc *desc,
373 int i,
374 struct kvm_rmap_desc *prev_desc)
375 {
376 int j;
377
378 for (j = RMAP_EXT - 1; !desc->shadow_ptes[j] && j > i; --j)
379 ;
380 desc->shadow_ptes[i] = desc->shadow_ptes[j];
381 desc->shadow_ptes[j] = NULL;
382 if (j != 0)
383 return;
384 if (!prev_desc && !desc->more)
385 set_page_private(page,(unsigned long)desc->shadow_ptes[0]);
386 else
387 if (prev_desc)
388 prev_desc->more = desc->more;
389 else
390 set_page_private(page,(unsigned long)desc->more | 1);
391 mmu_free_rmap_desc(vcpu, desc);
392 }
393
394 static void rmap_remove(struct kvm_vcpu *vcpu, u64 *spte)
395 {
396 struct page *page;
397 struct kvm_rmap_desc *desc;
398 struct kvm_rmap_desc *prev_desc;
399 int i;
400
401 if (!is_rmap_pte(*spte))
402 return;
403 page = pfn_to_page((*spte & PT64_BASE_ADDR_MASK) >> PAGE_SHIFT);
404 if (!page_private(page)) {
405 printk(KERN_ERR "rmap_remove: %p %llx 0->BUG\n", spte, *spte);
406 BUG();
407 } else if (!(page_private(page) & 1)) {
408 rmap_printk("rmap_remove: %p %llx 1->0\n", spte, *spte);
409 if ((u64 *)page_private(page) != spte) {
410 printk(KERN_ERR "rmap_remove: %p %llx 1->BUG\n",
411 spte, *spte);
412 BUG();
413 }
414 set_page_private(page,0);
415 } else {
416 rmap_printk("rmap_remove: %p %llx many->many\n", spte, *spte);
417 desc = (struct kvm_rmap_desc *)(page_private(page) & ~1ul);
418 prev_desc = NULL;
419 while (desc) {
420 for (i = 0; i < RMAP_EXT && desc->shadow_ptes[i]; ++i)
421 if (desc->shadow_ptes[i] == spte) {
422 rmap_desc_remove_entry(vcpu, page,
423 desc, i,
424 prev_desc);
425 return;
426 }
427 prev_desc = desc;
428 desc = desc->more;
429 }
430 BUG();
431 }
432 }
433
434 static void rmap_write_protect(struct kvm_vcpu *vcpu, u64 gfn)
435 {
436 struct kvm *kvm = vcpu->kvm;
437 struct page *page;
438 struct kvm_rmap_desc *desc;
439 u64 *spte;
440
441 page = gfn_to_page(kvm, gfn);
442 BUG_ON(!page);
443
444 while (page_private(page)) {
445 if (!(page_private(page) & 1))
446 spte = (u64 *)page_private(page);
447 else {
448 desc = (struct kvm_rmap_desc *)(page_private(page) & ~1ul);
449 spte = desc->shadow_ptes[0];
450 }
451 BUG_ON(!spte);
452 BUG_ON((*spte & PT64_BASE_ADDR_MASK) >> PAGE_SHIFT
453 != page_to_pfn(page));
454 BUG_ON(!(*spte & PT_PRESENT_MASK));
455 BUG_ON(!(*spte & PT_WRITABLE_MASK));
456 rmap_printk("rmap_write_protect: spte %p %llx\n", spte, *spte);
457 rmap_remove(vcpu, spte);
458 kvm_arch_ops->tlb_flush(vcpu);
459 set_shadow_pte(spte, *spte & ~PT_WRITABLE_MASK);
460 }
461 }
462
463 #ifdef MMU_DEBUG
464 static int is_empty_shadow_page(u64 *spt)
465 {
466 u64 *pos;
467 u64 *end;
468
469 for (pos = spt, end = pos + PAGE_SIZE / sizeof(u64); pos != end; pos++)
470 if (*pos != 0) {
471 printk(KERN_ERR "%s: %p %llx\n", __FUNCTION__,
472 pos, *pos);
473 return 0;
474 }
475 return 1;
476 }
477 #endif
478
479 static void kvm_mmu_free_page(struct kvm_vcpu *vcpu,
480 struct kvm_mmu_page *page_head)
481 {
482 ASSERT(is_empty_shadow_page(page_head->spt));
483 list_del(&page_head->link);
484 mmu_memory_cache_free(&vcpu->mmu_page_cache, page_head->spt);
485 mmu_memory_cache_free(&vcpu->mmu_page_header_cache, page_head);
486 ++vcpu->kvm->n_free_mmu_pages;
487 }
488
489 static unsigned kvm_page_table_hashfn(gfn_t gfn)
490 {
491 return gfn;
492 }
493
494 static struct kvm_mmu_page *kvm_mmu_alloc_page(struct kvm_vcpu *vcpu,
495 u64 *parent_pte)
496 {
497 struct kvm_mmu_page *page;
498
499 if (!vcpu->kvm->n_free_mmu_pages)
500 return NULL;
501
502 page = mmu_memory_cache_alloc(&vcpu->mmu_page_header_cache,
503 sizeof *page);
504 page->spt = mmu_memory_cache_alloc(&vcpu->mmu_page_cache, PAGE_SIZE);
505 set_page_private(virt_to_page(page->spt), (unsigned long)page);
506 list_add(&page->link, &vcpu->kvm->active_mmu_pages);
507 ASSERT(is_empty_shadow_page(page->spt));
508 page->slot_bitmap = 0;
509 page->multimapped = 0;
510 page->parent_pte = parent_pte;
511 --vcpu->kvm->n_free_mmu_pages;
512 return page;
513 }
514
515 static void mmu_page_add_parent_pte(struct kvm_vcpu *vcpu,
516 struct kvm_mmu_page *page, u64 *parent_pte)
517 {
518 struct kvm_pte_chain *pte_chain;
519 struct hlist_node *node;
520 int i;
521
522 if (!parent_pte)
523 return;
524 if (!page->multimapped) {
525 u64 *old = page->parent_pte;
526
527 if (!old) {
528 page->parent_pte = parent_pte;
529 return;
530 }
531 page->multimapped = 1;
532 pte_chain = mmu_alloc_pte_chain(vcpu);
533 INIT_HLIST_HEAD(&page->parent_ptes);
534 hlist_add_head(&pte_chain->link, &page->parent_ptes);
535 pte_chain->parent_ptes[0] = old;
536 }
537 hlist_for_each_entry(pte_chain, node, &page->parent_ptes, link) {
538 if (pte_chain->parent_ptes[NR_PTE_CHAIN_ENTRIES-1])
539 continue;
540 for (i = 0; i < NR_PTE_CHAIN_ENTRIES; ++i)
541 if (!pte_chain->parent_ptes[i]) {
542 pte_chain->parent_ptes[i] = parent_pte;
543 return;
544 }
545 }
546 pte_chain = mmu_alloc_pte_chain(vcpu);
547 BUG_ON(!pte_chain);
548 hlist_add_head(&pte_chain->link, &page->parent_ptes);
549 pte_chain->parent_ptes[0] = parent_pte;
550 }
551
552 static void mmu_page_remove_parent_pte(struct kvm_vcpu *vcpu,
553 struct kvm_mmu_page *page,
554 u64 *parent_pte)
555 {
556 struct kvm_pte_chain *pte_chain;
557 struct hlist_node *node;
558 int i;
559
560 if (!page->multimapped) {
561 BUG_ON(page->parent_pte != parent_pte);
562 page->parent_pte = NULL;
563 return;
564 }
565 hlist_for_each_entry(pte_chain, node, &page->parent_ptes, link)
566 for (i = 0; i < NR_PTE_CHAIN_ENTRIES; ++i) {
567 if (!pte_chain->parent_ptes[i])
568 break;
569 if (pte_chain->parent_ptes[i] != parent_pte)
570 continue;
571 while (i + 1 < NR_PTE_CHAIN_ENTRIES
572 && pte_chain->parent_ptes[i + 1]) {
573 pte_chain->parent_ptes[i]
574 = pte_chain->parent_ptes[i + 1];
575 ++i;
576 }
577 pte_chain->parent_ptes[i] = NULL;
578 if (i == 0) {
579 hlist_del(&pte_chain->link);
580 mmu_free_pte_chain(vcpu, pte_chain);
581 if (hlist_empty(&page->parent_ptes)) {
582 page->multimapped = 0;
583 page->parent_pte = NULL;
584 }
585 }
586 return;
587 }
588 BUG();
589 }
590
591 static struct kvm_mmu_page *kvm_mmu_lookup_page(struct kvm_vcpu *vcpu,
592 gfn_t gfn)
593 {
594 unsigned index;
595 struct hlist_head *bucket;
596 struct kvm_mmu_page *page;
597 struct hlist_node *node;
598
599 pgprintk("%s: looking for gfn %lx\n", __FUNCTION__, gfn);
600 index = kvm_page_table_hashfn(gfn) % KVM_NUM_MMU_PAGES;
601 bucket = &vcpu->kvm->mmu_page_hash[index];
602 hlist_for_each_entry(page, node, bucket, hash_link)
603 if (page->gfn == gfn && !page->role.metaphysical) {
604 pgprintk("%s: found role %x\n",
605 __FUNCTION__, page->role.word);
606 return page;
607 }
608 return NULL;
609 }
610
611 static struct kvm_mmu_page *kvm_mmu_get_page(struct kvm_vcpu *vcpu,
612 gfn_t gfn,
613 gva_t gaddr,
614 unsigned level,
615 int metaphysical,
616 unsigned hugepage_access,
617 u64 *parent_pte)
618 {
619 union kvm_mmu_page_role role;
620 unsigned index;
621 unsigned quadrant;
622 struct hlist_head *bucket;
623 struct kvm_mmu_page *page;
624 struct hlist_node *node;
625
626 role.word = 0;
627 role.glevels = vcpu->mmu.root_level;
628 role.level = level;
629 role.metaphysical = metaphysical;
630 role.hugepage_access = hugepage_access;
631 if (vcpu->mmu.root_level <= PT32_ROOT_LEVEL) {
632 quadrant = gaddr >> (PAGE_SHIFT + (PT64_PT_BITS * level));
633 quadrant &= (1 << ((PT32_PT_BITS - PT64_PT_BITS) * level)) - 1;
634 role.quadrant = quadrant;
635 }
636 pgprintk("%s: looking gfn %lx role %x\n", __FUNCTION__,
637 gfn, role.word);
638 index = kvm_page_table_hashfn(gfn) % KVM_NUM_MMU_PAGES;
639 bucket = &vcpu->kvm->mmu_page_hash[index];
640 hlist_for_each_entry(page, node, bucket, hash_link)
641 if (page->gfn == gfn && page->role.word == role.word) {
642 mmu_page_add_parent_pte(vcpu, page, parent_pte);
643 pgprintk("%s: found\n", __FUNCTION__);
644 return page;
645 }
646 page = kvm_mmu_alloc_page(vcpu, parent_pte);
647 if (!page)
648 return page;
649 pgprintk("%s: adding gfn %lx role %x\n", __FUNCTION__, gfn, role.word);
650 page->gfn = gfn;
651 page->role = role;
652 hlist_add_head(&page->hash_link, bucket);
653 if (!metaphysical)
654 rmap_write_protect(vcpu, gfn);
655 return page;
656 }
657
658 static void kvm_mmu_page_unlink_children(struct kvm_vcpu *vcpu,
659 struct kvm_mmu_page *page)
660 {
661 unsigned i;
662 u64 *pt;
663 u64 ent;
664
665 pt = page->spt;
666
667 if (page->role.level == PT_PAGE_TABLE_LEVEL) {
668 for (i = 0; i < PT64_ENT_PER_PAGE; ++i) {
669 if (pt[i] & PT_PRESENT_MASK)
670 rmap_remove(vcpu, &pt[i]);
671 pt[i] = 0;
672 }
673 kvm_arch_ops->tlb_flush(vcpu);
674 return;
675 }
676
677 for (i = 0; i < PT64_ENT_PER_PAGE; ++i) {
678 ent = pt[i];
679
680 pt[i] = 0;
681 if (!(ent & PT_PRESENT_MASK))
682 continue;
683 ent &= PT64_BASE_ADDR_MASK;
684 mmu_page_remove_parent_pte(vcpu, page_header(ent), &pt[i]);
685 }
686 }
687
688 static void kvm_mmu_put_page(struct kvm_vcpu *vcpu,
689 struct kvm_mmu_page *page,
690 u64 *parent_pte)
691 {
692 mmu_page_remove_parent_pte(vcpu, page, parent_pte);
693 }
694
695 static void kvm_mmu_zap_page(struct kvm_vcpu *vcpu,
696 struct kvm_mmu_page *page)
697 {
698 u64 *parent_pte;
699
700 while (page->multimapped || page->parent_pte) {
701 if (!page->multimapped)
702 parent_pte = page->parent_pte;
703 else {
704 struct kvm_pte_chain *chain;
705
706 chain = container_of(page->parent_ptes.first,
707 struct kvm_pte_chain, link);
708 parent_pte = chain->parent_ptes[0];
709 }
710 BUG_ON(!parent_pte);
711 kvm_mmu_put_page(vcpu, page, parent_pte);
712 set_shadow_pte(parent_pte, 0);
713 }
714 kvm_mmu_page_unlink_children(vcpu, page);
715 if (!page->root_count) {
716 hlist_del(&page->hash_link);
717 kvm_mmu_free_page(vcpu, page);
718 } else
719 list_move(&page->link, &vcpu->kvm->active_mmu_pages);
720 }
721
722 static int kvm_mmu_unprotect_page(struct kvm_vcpu *vcpu, gfn_t gfn)
723 {
724 unsigned index;
725 struct hlist_head *bucket;
726 struct kvm_mmu_page *page;
727 struct hlist_node *node, *n;
728 int r;
729
730 pgprintk("%s: looking for gfn %lx\n", __FUNCTION__, gfn);
731 r = 0;
732 index = kvm_page_table_hashfn(gfn) % KVM_NUM_MMU_PAGES;
733 bucket = &vcpu->kvm->mmu_page_hash[index];
734 hlist_for_each_entry_safe(page, node, n, bucket, hash_link)
735 if (page->gfn == gfn && !page->role.metaphysical) {
736 pgprintk("%s: gfn %lx role %x\n", __FUNCTION__, gfn,
737 page->role.word);
738 kvm_mmu_zap_page(vcpu, page);
739 r = 1;
740 }
741 return r;
742 }
743
744 static void mmu_unshadow(struct kvm_vcpu *vcpu, gfn_t gfn)
745 {
746 struct kvm_mmu_page *page;
747
748 while ((page = kvm_mmu_lookup_page(vcpu, gfn)) != NULL) {
749 pgprintk("%s: zap %lx %x\n",
750 __FUNCTION__, gfn, page->role.word);
751 kvm_mmu_zap_page(vcpu, page);
752 }
753 }
754
755 static void page_header_update_slot(struct kvm *kvm, void *pte, gpa_t gpa)
756 {
757 int slot = memslot_id(kvm, gfn_to_memslot(kvm, gpa >> PAGE_SHIFT));
758 struct kvm_mmu_page *page_head = page_header(__pa(pte));
759
760 __set_bit(slot, &page_head->slot_bitmap);
761 }
762
763 hpa_t safe_gpa_to_hpa(struct kvm_vcpu *vcpu, gpa_t gpa)
764 {
765 hpa_t hpa = gpa_to_hpa(vcpu, gpa);
766
767 return is_error_hpa(hpa) ? bad_page_address | (gpa & ~PAGE_MASK): hpa;
768 }
769
770 hpa_t gpa_to_hpa(struct kvm_vcpu *vcpu, gpa_t gpa)
771 {
772 struct page *page;
773
774 ASSERT((gpa & HPA_ERR_MASK) == 0);
775 page = gfn_to_page(vcpu->kvm, gpa >> PAGE_SHIFT);
776 if (!page)
777 return gpa | HPA_ERR_MASK;
778 return ((hpa_t)page_to_pfn(page) << PAGE_SHIFT)
779 | (gpa & (PAGE_SIZE-1));
780 }
781
782 hpa_t gva_to_hpa(struct kvm_vcpu *vcpu, gva_t gva)
783 {
784 gpa_t gpa = vcpu->mmu.gva_to_gpa(vcpu, gva);
785
786 if (gpa == UNMAPPED_GVA)
787 return UNMAPPED_GVA;
788 return gpa_to_hpa(vcpu, gpa);
789 }
790
791 struct page *gva_to_page(struct kvm_vcpu *vcpu, gva_t gva)
792 {
793 gpa_t gpa = vcpu->mmu.gva_to_gpa(vcpu, gva);
794
795 if (gpa == UNMAPPED_GVA)
796 return NULL;
797 return pfn_to_page(gpa_to_hpa(vcpu, gpa) >> PAGE_SHIFT);
798 }
799
800 static void nonpaging_new_cr3(struct kvm_vcpu *vcpu)
801 {
802 }
803
804 static int nonpaging_map(struct kvm_vcpu *vcpu, gva_t v, hpa_t p)
805 {
806 int level = PT32E_ROOT_LEVEL;
807 hpa_t table_addr = vcpu->mmu.root_hpa;
808
809 for (; ; level--) {
810 u32 index = PT64_INDEX(v, level);
811 u64 *table;
812 u64 pte;
813
814 ASSERT(VALID_PAGE(table_addr));
815 table = __va(table_addr);
816
817 if (level == 1) {
818 pte = table[index];
819 if (is_present_pte(pte) && is_writeble_pte(pte))
820 return 0;
821 mark_page_dirty(vcpu->kvm, v >> PAGE_SHIFT);
822 page_header_update_slot(vcpu->kvm, table, v);
823 table[index] = p | PT_PRESENT_MASK | PT_WRITABLE_MASK |
824 PT_USER_MASK;
825 rmap_add(vcpu, &table[index]);
826 return 0;
827 }
828
829 if (table[index] == 0) {
830 struct kvm_mmu_page *new_table;
831 gfn_t pseudo_gfn;
832
833 pseudo_gfn = (v & PT64_DIR_BASE_ADDR_MASK)
834 >> PAGE_SHIFT;
835 new_table = kvm_mmu_get_page(vcpu, pseudo_gfn,
836 v, level - 1,
837 1, 0, &table[index]);
838 if (!new_table) {
839 pgprintk("nonpaging_map: ENOMEM\n");
840 return -ENOMEM;
841 }
842
843 table[index] = __pa(new_table->spt) | PT_PRESENT_MASK
844 | PT_WRITABLE_MASK | PT_USER_MASK;
845 }
846 table_addr = table[index] & PT64_BASE_ADDR_MASK;
847 }
848 }
849
850 static void mmu_free_roots(struct kvm_vcpu *vcpu)
851 {
852 int i;
853 struct kvm_mmu_page *page;
854
855 #ifdef CONFIG_X86_64
856 if (vcpu->mmu.shadow_root_level == PT64_ROOT_LEVEL) {
857 hpa_t root = vcpu->mmu.root_hpa;
858
859 ASSERT(VALID_PAGE(root));
860 page = page_header(root);
861 --page->root_count;
862 vcpu->mmu.root_hpa = INVALID_PAGE;
863 return;
864 }
865 #endif
866 for (i = 0; i < 4; ++i) {
867 hpa_t root = vcpu->mmu.pae_root[i];
868
869 if (root) {
870 ASSERT(VALID_PAGE(root));
871 root &= PT64_BASE_ADDR_MASK;
872 page = page_header(root);
873 --page->root_count;
874 }
875 vcpu->mmu.pae_root[i] = INVALID_PAGE;
876 }
877 vcpu->mmu.root_hpa = INVALID_PAGE;
878 }
879
880 static void mmu_alloc_roots(struct kvm_vcpu *vcpu)
881 {
882 int i;
883 gfn_t root_gfn;
884 struct kvm_mmu_page *page;
885
886 root_gfn = vcpu->cr3 >> PAGE_SHIFT;
887
888 #ifdef CONFIG_X86_64
889 if (vcpu->mmu.shadow_root_level == PT64_ROOT_LEVEL) {
890 hpa_t root = vcpu->mmu.root_hpa;
891
892 ASSERT(!VALID_PAGE(root));
893 page = kvm_mmu_get_page(vcpu, root_gfn, 0,
894 PT64_ROOT_LEVEL, 0, 0, NULL);
895 root = __pa(page->spt);
896 ++page->root_count;
897 vcpu->mmu.root_hpa = root;
898 return;
899 }
900 #endif
901 for (i = 0; i < 4; ++i) {
902 hpa_t root = vcpu->mmu.pae_root[i];
903
904 ASSERT(!VALID_PAGE(root));
905 if (vcpu->mmu.root_level == PT32E_ROOT_LEVEL) {
906 if (!is_present_pte(vcpu->pdptrs[i])) {
907 vcpu->mmu.pae_root[i] = 0;
908 continue;
909 }
910 root_gfn = vcpu->pdptrs[i] >> PAGE_SHIFT;
911 } else if (vcpu->mmu.root_level == 0)
912 root_gfn = 0;
913 page = kvm_mmu_get_page(vcpu, root_gfn, i << 30,
914 PT32_ROOT_LEVEL, !is_paging(vcpu),
915 0, NULL);
916 root = __pa(page->spt);
917 ++page->root_count;
918 vcpu->mmu.pae_root[i] = root | PT_PRESENT_MASK;
919 }
920 vcpu->mmu.root_hpa = __pa(vcpu->mmu.pae_root);
921 }
922
923 static gpa_t nonpaging_gva_to_gpa(struct kvm_vcpu *vcpu, gva_t vaddr)
924 {
925 return vaddr;
926 }
927
928 static int nonpaging_page_fault(struct kvm_vcpu *vcpu, gva_t gva,
929 u32 error_code)
930 {
931 gpa_t addr = gva;
932 hpa_t paddr;
933 int r;
934
935 r = mmu_topup_memory_caches(vcpu);
936 if (r)
937 return r;
938
939 ASSERT(vcpu);
940 ASSERT(VALID_PAGE(vcpu->mmu.root_hpa));
941
942
943 paddr = gpa_to_hpa(vcpu , addr & PT64_BASE_ADDR_MASK);
944
945 if (is_error_hpa(paddr))
946 return 1;
947
948 return nonpaging_map(vcpu, addr & PAGE_MASK, paddr);
949 }
950
951 static void nonpaging_free(struct kvm_vcpu *vcpu)
952 {
953 mmu_free_roots(vcpu);
954 }
955
956 static int nonpaging_init_context(struct kvm_vcpu *vcpu)
957 {
958 struct kvm_mmu *context = &vcpu->mmu;
959
960 context->new_cr3 = nonpaging_new_cr3;
961 context->page_fault = nonpaging_page_fault;
962 context->gva_to_gpa = nonpaging_gva_to_gpa;
963 context->free = nonpaging_free;
964 context->root_level = 0;
965 context->shadow_root_level = PT32E_ROOT_LEVEL;
966 mmu_alloc_roots(vcpu);
967 ASSERT(VALID_PAGE(context->root_hpa));
968 kvm_arch_ops->set_cr3(vcpu, context->root_hpa);
969 return 0;
970 }
971
972 static void kvm_mmu_flush_tlb(struct kvm_vcpu *vcpu)
973 {
974 ++vcpu->stat.tlb_flush;
975 kvm_arch_ops->tlb_flush(vcpu);
976 }
977
978 static void paging_new_cr3(struct kvm_vcpu *vcpu)
979 {
980 pgprintk("%s: cr3 %lx\n", __FUNCTION__, vcpu->cr3);
981 mmu_free_roots(vcpu);
982 if (unlikely(vcpu->kvm->n_free_mmu_pages < KVM_MIN_FREE_MMU_PAGES))
983 kvm_mmu_free_some_pages(vcpu);
984 mmu_alloc_roots(vcpu);
985 kvm_mmu_flush_tlb(vcpu);
986 kvm_arch_ops->set_cr3(vcpu, vcpu->mmu.root_hpa);
987 }
988
989 static void inject_page_fault(struct kvm_vcpu *vcpu,
990 u64 addr,
991 u32 err_code)
992 {
993 kvm_arch_ops->inject_page_fault(vcpu, addr, err_code);
994 }
995
996 static void paging_free(struct kvm_vcpu *vcpu)
997 {
998 nonpaging_free(vcpu);
999 }
1000
1001 #define PTTYPE 64
1002 #include "paging_tmpl.h"
1003 #undef PTTYPE
1004
1005 #define PTTYPE 32
1006 #include "paging_tmpl.h"
1007 #undef PTTYPE
1008
1009 static int paging64_init_context_common(struct kvm_vcpu *vcpu, int level)
1010 {
1011 struct kvm_mmu *context = &vcpu->mmu;
1012
1013 ASSERT(is_pae(vcpu));
1014 context->new_cr3 = paging_new_cr3;
1015 context->page_fault = paging64_page_fault;
1016 context->gva_to_gpa = paging64_gva_to_gpa;
1017 context->free = paging_free;
1018 context->root_level = level;
1019 context->shadow_root_level = level;
1020 mmu_alloc_roots(vcpu);
1021 ASSERT(VALID_PAGE(context->root_hpa));
1022 kvm_arch_ops->set_cr3(vcpu, context->root_hpa |
1023 (vcpu->cr3 & (CR3_PCD_MASK | CR3_WPT_MASK)));
1024 return 0;
1025 }
1026
1027 static int paging64_init_context(struct kvm_vcpu *vcpu)
1028 {
1029 return paging64_init_context_common(vcpu, PT64_ROOT_LEVEL);
1030 }
1031
1032 static int paging32_init_context(struct kvm_vcpu *vcpu)
1033 {
1034 struct kvm_mmu *context = &vcpu->mmu;
1035
1036 context->new_cr3 = paging_new_cr3;
1037 context->page_fault = paging32_page_fault;
1038 context->gva_to_gpa = paging32_gva_to_gpa;
1039 context->free = paging_free;
1040 context->root_level = PT32_ROOT_LEVEL;
1041 context->shadow_root_level = PT32E_ROOT_LEVEL;
1042 mmu_alloc_roots(vcpu);
1043 ASSERT(VALID_PAGE(context->root_hpa));
1044 kvm_arch_ops->set_cr3(vcpu, context->root_hpa |
1045 (vcpu->cr3 & (CR3_PCD_MASK | CR3_WPT_MASK)));
1046 return 0;
1047 }
1048
1049 static int paging32E_init_context(struct kvm_vcpu *vcpu)
1050 {
1051 return paging64_init_context_common(vcpu, PT32E_ROOT_LEVEL);
1052 }
1053
1054 static int init_kvm_mmu(struct kvm_vcpu *vcpu)
1055 {
1056 ASSERT(vcpu);
1057 ASSERT(!VALID_PAGE(vcpu->mmu.root_hpa));
1058
1059 mmu_topup_memory_caches(vcpu);
1060 if (!is_paging(vcpu))
1061 return nonpaging_init_context(vcpu);
1062 else if (is_long_mode(vcpu))
1063 return paging64_init_context(vcpu);
1064 else if (is_pae(vcpu))
1065 return paging32E_init_context(vcpu);
1066 else
1067 return paging32_init_context(vcpu);
1068 }
1069
1070 static void destroy_kvm_mmu(struct kvm_vcpu *vcpu)
1071 {
1072 ASSERT(vcpu);
1073 if (VALID_PAGE(vcpu->mmu.root_hpa)) {
1074 vcpu->mmu.free(vcpu);
1075 vcpu->mmu.root_hpa = INVALID_PAGE;
1076 }
1077 }
1078
1079 int kvm_mmu_reset_context(struct kvm_vcpu *vcpu)
1080 {
1081 int r;
1082
1083 destroy_kvm_mmu(vcpu);
1084 r = init_kvm_mmu(vcpu);
1085 if (r < 0)
1086 goto out;
1087 r = mmu_topup_memory_caches(vcpu);
1088 out:
1089 return r;
1090 }
1091
1092 static void mmu_pte_write_zap_pte(struct kvm_vcpu *vcpu,
1093 struct kvm_mmu_page *page,
1094 u64 *spte)
1095 {
1096 u64 pte;
1097 struct kvm_mmu_page *child;
1098
1099 pte = *spte;
1100 if (is_present_pte(pte)) {
1101 if (page->role.level == PT_PAGE_TABLE_LEVEL)
1102 rmap_remove(vcpu, spte);
1103 else {
1104 child = page_header(pte & PT64_BASE_ADDR_MASK);
1105 mmu_page_remove_parent_pte(vcpu, child, spte);
1106 }
1107 }
1108 *spte = 0;
1109 }
1110
1111 static void mmu_pte_write_new_pte(struct kvm_vcpu *vcpu,
1112 struct kvm_mmu_page *page,
1113 u64 *spte,
1114 const void *new, int bytes)
1115 {
1116 if (page->role.level != PT_PAGE_TABLE_LEVEL)
1117 return;
1118
1119 if (page->role.glevels == PT32_ROOT_LEVEL)
1120 paging32_update_pte(vcpu, page, spte, new, bytes);
1121 else
1122 paging64_update_pte(vcpu, page, spte, new, bytes);
1123 }
1124
1125 void kvm_mmu_pte_write(struct kvm_vcpu *vcpu, gpa_t gpa,
1126 const u8 *old, const u8 *new, int bytes)
1127 {
1128 gfn_t gfn = gpa >> PAGE_SHIFT;
1129 struct kvm_mmu_page *page;
1130 struct hlist_node *node, *n;
1131 struct hlist_head *bucket;
1132 unsigned index;
1133 u64 *spte;
1134 unsigned offset = offset_in_page(gpa);
1135 unsigned pte_size;
1136 unsigned page_offset;
1137 unsigned misaligned;
1138 unsigned quadrant;
1139 int level;
1140 int flooded = 0;
1141 int npte;
1142
1143 pgprintk("%s: gpa %llx bytes %d\n", __FUNCTION__, gpa, bytes);
1144 if (gfn == vcpu->last_pt_write_gfn) {
1145 ++vcpu->last_pt_write_count;
1146 if (vcpu->last_pt_write_count >= 3)
1147 flooded = 1;
1148 } else {
1149 vcpu->last_pt_write_gfn = gfn;
1150 vcpu->last_pt_write_count = 1;
1151 }
1152 index = kvm_page_table_hashfn(gfn) % KVM_NUM_MMU_PAGES;
1153 bucket = &vcpu->kvm->mmu_page_hash[index];
1154 hlist_for_each_entry_safe(page, node, n, bucket, hash_link) {
1155 if (page->gfn != gfn || page->role.metaphysical)
1156 continue;
1157 pte_size = page->role.glevels == PT32_ROOT_LEVEL ? 4 : 8;
1158 misaligned = (offset ^ (offset + bytes - 1)) & ~(pte_size - 1);
1159 misaligned |= bytes < 4;
1160 if (misaligned || flooded) {
1161 /*
1162 * Misaligned accesses are too much trouble to fix
1163 * up; also, they usually indicate a page is not used
1164 * as a page table.
1165 *
1166 * If we're seeing too many writes to a page,
1167 * it may no longer be a page table, or we may be
1168 * forking, in which case it is better to unmap the
1169 * page.
1170 */
1171 pgprintk("misaligned: gpa %llx bytes %d role %x\n",
1172 gpa, bytes, page->role.word);
1173 kvm_mmu_zap_page(vcpu, page);
1174 continue;
1175 }
1176 page_offset = offset;
1177 level = page->role.level;
1178 npte = 1;
1179 if (page->role.glevels == PT32_ROOT_LEVEL) {
1180 page_offset <<= 1; /* 32->64 */
1181 /*
1182 * A 32-bit pde maps 4MB while the shadow pdes map
1183 * only 2MB. So we need to double the offset again
1184 * and zap two pdes instead of one.
1185 */
1186 if (level == PT32_ROOT_LEVEL) {
1187 page_offset &= ~7; /* kill rounding error */
1188 page_offset <<= 1;
1189 npte = 2;
1190 }
1191 quadrant = page_offset >> PAGE_SHIFT;
1192 page_offset &= ~PAGE_MASK;
1193 if (quadrant != page->role.quadrant)
1194 continue;
1195 }
1196 spte = &page->spt[page_offset / sizeof(*spte)];
1197 while (npte--) {
1198 mmu_pte_write_zap_pte(vcpu, page, spte);
1199 mmu_pte_write_new_pte(vcpu, page, spte, new, bytes);
1200 ++spte;
1201 }
1202 }
1203 }
1204
1205 int kvm_mmu_unprotect_page_virt(struct kvm_vcpu *vcpu, gva_t gva)
1206 {
1207 gpa_t gpa = vcpu->mmu.gva_to_gpa(vcpu, gva);
1208
1209 return kvm_mmu_unprotect_page(vcpu, gpa >> PAGE_SHIFT);
1210 }
1211
1212 void kvm_mmu_free_some_pages(struct kvm_vcpu *vcpu)
1213 {
1214 while (vcpu->kvm->n_free_mmu_pages < KVM_REFILL_PAGES) {
1215 struct kvm_mmu_page *page;
1216
1217 page = container_of(vcpu->kvm->active_mmu_pages.prev,
1218 struct kvm_mmu_page, link);
1219 kvm_mmu_zap_page(vcpu, page);
1220 }
1221 }
1222 EXPORT_SYMBOL_GPL(kvm_mmu_free_some_pages);
1223
1224 static void free_mmu_pages(struct kvm_vcpu *vcpu)
1225 {
1226 struct kvm_mmu_page *page;
1227
1228 while (!list_empty(&vcpu->kvm->active_mmu_pages)) {
1229 page = container_of(vcpu->kvm->active_mmu_pages.next,
1230 struct kvm_mmu_page, link);
1231 kvm_mmu_zap_page(vcpu, page);
1232 }
1233 free_page((unsigned long)vcpu->mmu.pae_root);
1234 }
1235
1236 static int alloc_mmu_pages(struct kvm_vcpu *vcpu)
1237 {
1238 struct page *page;
1239 int i;
1240
1241 ASSERT(vcpu);
1242
1243 vcpu->kvm->n_free_mmu_pages = KVM_NUM_MMU_PAGES;
1244
1245 /*
1246 * When emulating 32-bit mode, cr3 is only 32 bits even on x86_64.
1247 * Therefore we need to allocate shadow page tables in the first
1248 * 4GB of memory, which happens to fit the DMA32 zone.
1249 */
1250 page = alloc_page(GFP_KERNEL | __GFP_DMA32);
1251 if (!page)
1252 goto error_1;
1253 vcpu->mmu.pae_root = page_address(page);
1254 for (i = 0; i < 4; ++i)
1255 vcpu->mmu.pae_root[i] = INVALID_PAGE;
1256
1257 return 0;
1258
1259 error_1:
1260 free_mmu_pages(vcpu);
1261 return -ENOMEM;
1262 }
1263
1264 int kvm_mmu_create(struct kvm_vcpu *vcpu)
1265 {
1266 ASSERT(vcpu);
1267 ASSERT(!VALID_PAGE(vcpu->mmu.root_hpa));
1268
1269 return alloc_mmu_pages(vcpu);
1270 }
1271
1272 int kvm_mmu_setup(struct kvm_vcpu *vcpu)
1273 {
1274 ASSERT(vcpu);
1275 ASSERT(!VALID_PAGE(vcpu->mmu.root_hpa));
1276
1277 return init_kvm_mmu(vcpu);
1278 }
1279
1280 void kvm_mmu_destroy(struct kvm_vcpu *vcpu)
1281 {
1282 ASSERT(vcpu);
1283
1284 destroy_kvm_mmu(vcpu);
1285 free_mmu_pages(vcpu);
1286 mmu_free_memory_caches(vcpu);
1287 }
1288
1289 void kvm_mmu_slot_remove_write_access(struct kvm_vcpu *vcpu, int slot)
1290 {
1291 struct kvm *kvm = vcpu->kvm;
1292 struct kvm_mmu_page *page;
1293
1294 list_for_each_entry(page, &kvm->active_mmu_pages, link) {
1295 int i;
1296 u64 *pt;
1297
1298 if (!test_bit(slot, &page->slot_bitmap))
1299 continue;
1300
1301 pt = page->spt;
1302 for (i = 0; i < PT64_ENT_PER_PAGE; ++i)
1303 /* avoid RMW */
1304 if (pt[i] & PT_WRITABLE_MASK) {
1305 rmap_remove(vcpu, &pt[i]);
1306 pt[i] &= ~PT_WRITABLE_MASK;
1307 }
1308 }
1309 }
1310
1311 void kvm_mmu_zap_all(struct kvm_vcpu *vcpu)
1312 {
1313 destroy_kvm_mmu(vcpu);
1314
1315 while (!list_empty(&vcpu->kvm->active_mmu_pages)) {
1316 struct kvm_mmu_page *page;
1317
1318 page = container_of(vcpu->kvm->active_mmu_pages.next,
1319 struct kvm_mmu_page, link);
1320 kvm_mmu_zap_page(vcpu, page);
1321 }
1322
1323 mmu_free_memory_caches(vcpu);
1324 kvm_arch_ops->tlb_flush(vcpu);
1325 init_kvm_mmu(vcpu);
1326 }
1327
1328 void kvm_mmu_module_exit(void)
1329 {
1330 if (pte_chain_cache)
1331 kmem_cache_destroy(pte_chain_cache);
1332 if (rmap_desc_cache)
1333 kmem_cache_destroy(rmap_desc_cache);
1334 if (mmu_page_cache)
1335 kmem_cache_destroy(mmu_page_cache);
1336 if (mmu_page_header_cache)
1337 kmem_cache_destroy(mmu_page_header_cache);
1338 }
1339
1340 int kvm_mmu_module_init(void)
1341 {
1342 pte_chain_cache = kmem_cache_create("kvm_pte_chain",
1343 sizeof(struct kvm_pte_chain),
1344 0, 0, NULL, NULL);
1345 if (!pte_chain_cache)
1346 goto nomem;
1347 rmap_desc_cache = kmem_cache_create("kvm_rmap_desc",
1348 sizeof(struct kvm_rmap_desc),
1349 0, 0, NULL, NULL);
1350 if (!rmap_desc_cache)
1351 goto nomem;
1352
1353 mmu_page_cache = kmem_cache_create("kvm_mmu_page",
1354 PAGE_SIZE,
1355 PAGE_SIZE, 0, NULL, NULL);
1356 if (!mmu_page_cache)
1357 goto nomem;
1358
1359 mmu_page_header_cache = kmem_cache_create("kvm_mmu_page_header",
1360 sizeof(struct kvm_mmu_page),
1361 0, 0, NULL, NULL);
1362 if (!mmu_page_header_cache)
1363 goto nomem;
1364
1365 return 0;
1366
1367 nomem:
1368 kvm_mmu_module_exit();
1369 return -ENOMEM;
1370 }
1371
1372 #ifdef AUDIT
1373
1374 static const char *audit_msg;
1375
1376 static gva_t canonicalize(gva_t gva)
1377 {
1378 #ifdef CONFIG_X86_64
1379 gva = (long long)(gva << 16) >> 16;
1380 #endif
1381 return gva;
1382 }
1383
1384 static void audit_mappings_page(struct kvm_vcpu *vcpu, u64 page_pte,
1385 gva_t va, int level)
1386 {
1387 u64 *pt = __va(page_pte & PT64_BASE_ADDR_MASK);
1388 int i;
1389 gva_t va_delta = 1ul << (PAGE_SHIFT + 9 * (level - 1));
1390
1391 for (i = 0; i < PT64_ENT_PER_PAGE; ++i, va += va_delta) {
1392 u64 ent = pt[i];
1393
1394 if (!(ent & PT_PRESENT_MASK))
1395 continue;
1396
1397 va = canonicalize(va);
1398 if (level > 1)
1399 audit_mappings_page(vcpu, ent, va, level - 1);
1400 else {
1401 gpa_t gpa = vcpu->mmu.gva_to_gpa(vcpu, va);
1402 hpa_t hpa = gpa_to_hpa(vcpu, gpa);
1403
1404 if ((ent & PT_PRESENT_MASK)
1405 && (ent & PT64_BASE_ADDR_MASK) != hpa)
1406 printk(KERN_ERR "audit error: (%s) levels %d"
1407 " gva %lx gpa %llx hpa %llx ent %llx\n",
1408 audit_msg, vcpu->mmu.root_level,
1409 va, gpa, hpa, ent);
1410 }
1411 }
1412 }
1413
1414 static void audit_mappings(struct kvm_vcpu *vcpu)
1415 {
1416 unsigned i;
1417
1418 if (vcpu->mmu.root_level == 4)
1419 audit_mappings_page(vcpu, vcpu->mmu.root_hpa, 0, 4);
1420 else
1421 for (i = 0; i < 4; ++i)
1422 if (vcpu->mmu.pae_root[i] & PT_PRESENT_MASK)
1423 audit_mappings_page(vcpu,
1424 vcpu->mmu.pae_root[i],
1425 i << 30,
1426 2);
1427 }
1428
1429 static int count_rmaps(struct kvm_vcpu *vcpu)
1430 {
1431 int nmaps = 0;
1432 int i, j, k;
1433
1434 for (i = 0; i < KVM_MEMORY_SLOTS; ++i) {
1435 struct kvm_memory_slot *m = &vcpu->kvm->memslots[i];
1436 struct kvm_rmap_desc *d;
1437
1438 for (j = 0; j < m->npages; ++j) {
1439 struct page *page = m->phys_mem[j];
1440
1441 if (!page->private)
1442 continue;
1443 if (!(page->private & 1)) {
1444 ++nmaps;
1445 continue;
1446 }
1447 d = (struct kvm_rmap_desc *)(page->private & ~1ul);
1448 while (d) {
1449 for (k = 0; k < RMAP_EXT; ++k)
1450 if (d->shadow_ptes[k])
1451 ++nmaps;
1452 else
1453 break;
1454 d = d->more;
1455 }
1456 }
1457 }
1458 return nmaps;
1459 }
1460
1461 static int count_writable_mappings(struct kvm_vcpu *vcpu)
1462 {
1463 int nmaps = 0;
1464 struct kvm_mmu_page *page;
1465 int i;
1466
1467 list_for_each_entry(page, &vcpu->kvm->active_mmu_pages, link) {
1468 u64 *pt = page->spt;
1469
1470 if (page->role.level != PT_PAGE_TABLE_LEVEL)
1471 continue;
1472
1473 for (i = 0; i < PT64_ENT_PER_PAGE; ++i) {
1474 u64 ent = pt[i];
1475
1476 if (!(ent & PT_PRESENT_MASK))
1477 continue;
1478 if (!(ent & PT_WRITABLE_MASK))
1479 continue;
1480 ++nmaps;
1481 }
1482 }
1483 return nmaps;
1484 }
1485
1486 static void audit_rmap(struct kvm_vcpu *vcpu)
1487 {
1488 int n_rmap = count_rmaps(vcpu);
1489 int n_actual = count_writable_mappings(vcpu);
1490
1491 if (n_rmap != n_actual)
1492 printk(KERN_ERR "%s: (%s) rmap %d actual %d\n",
1493 __FUNCTION__, audit_msg, n_rmap, n_actual);
1494 }
1495
1496 static void audit_write_protection(struct kvm_vcpu *vcpu)
1497 {
1498 struct kvm_mmu_page *page;
1499
1500 list_for_each_entry(page, &vcpu->kvm->active_mmu_pages, link) {
1501 hfn_t hfn;
1502 struct page *pg;
1503
1504 if (page->role.metaphysical)
1505 continue;
1506
1507 hfn = gpa_to_hpa(vcpu, (gpa_t)page->gfn << PAGE_SHIFT)
1508 >> PAGE_SHIFT;
1509 pg = pfn_to_page(hfn);
1510 if (pg->private)
1511 printk(KERN_ERR "%s: (%s) shadow page has writable"
1512 " mappings: gfn %lx role %x\n",
1513 __FUNCTION__, audit_msg, page->gfn,
1514 page->role.word);
1515 }
1516 }
1517
1518 static void kvm_mmu_audit(struct kvm_vcpu *vcpu, const char *msg)
1519 {
1520 int olddbg = dbg;
1521
1522 dbg = 0;
1523 audit_msg = msg;
1524 audit_rmap(vcpu);
1525 audit_write_protection(vcpu);
1526 audit_mappings(vcpu);
1527 dbg = olddbg;
1528 }
1529
1530 #endif
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